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event: Convert existing spy records to simple

Browse source 
Very few of the existing event-spy records use the arguments they are
passed. Update them to use a simple spy instead, to simplify the code.

Where an adaptor function is currently used, remove it where possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2023-08-21 21:16:56 -06:00 • committed by Tom Rini
parent dd802467f4
commit f72d0d4a2f
24 changed files with 52 additions and 78 deletions
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4
arch/arm/mach-imx/imx8/cpu.c
View file

@ -69,7 +69,7 @@ int arch_cpu_init(void)
return 0; return 0;
} }
static int imx8_init_mu(void *ctx, struct event *event) static int imx8_init_mu(void)
{ {
struct udevice *devp; struct udevice *devp;
int node, ret; int node, ret;
@ -91,7 +91,7 @@ static int imx8_init_mu(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, imx8_init_mu); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8_init_mu);
#if defined(CONFIG_ARCH_MISC_INIT) #if defined(CONFIG_ARCH_MISC_INIT)
int arch_misc_init(void) int arch_misc_init(void)

4
arch/arm/mach-imx/imx8m/soc.c
View file

@ -532,7 +532,7 @@ static void imx_set_wdog_powerdown(bool enable)
writew(enable, &wdog3->wmcr); writew(enable, &wdog3->wmcr);
} }
static int imx8m_check_clock(void *ctx, struct event *event) static int imx8m_check_clock(void)
{ {
struct udevice *dev; struct udevice *dev;
int ret; int ret;
@ -549,7 +549,7 @@ static int imx8m_check_clock(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, imx8m_check_clock); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8m_check_clock);
static void imx8m_setup_snvs(void) static void imx8m_setup_snvs(void)
{ {

7
arch/arm/mach-imx/imx8ulp/soc.c
View file

@ -803,12 +803,7 @@ int imx8ulp_dm_post_init(void)
return 0; return 0;
} }
EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8ulp_dm_post_init);
static int imx8ulp_evt_dm_post_init(void *ctx, struct event *event)
{
return imx8ulp_dm_post_init();
}
EVENT_SPY(EVT_DM_POST_INIT_F, imx8ulp_evt_dm_post_init);
#if defined(CONFIG_SPL_BUILD) #if defined(CONFIG_SPL_BUILD)
__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)

4
arch/arm/mach-imx/imx9/soc.c
View file

@ -552,7 +552,7 @@ int arch_cpu_init(void)
return 0; return 0;
} }
int imx9_probe_mu(void *ctx, struct event *event) int imx9_probe_mu(void)
{ {
struct udevice *devp; struct udevice *devp;
int node, ret; int node, ret;
@ -576,7 +576,7 @@ int imx9_probe_mu(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, imx9_probe_mu); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx9_probe_mu);
int timer_init(void) int timer_init(void)
{ {

4
arch/arm/mach-omap2/am33xx/board.c
View file

@ -527,7 +527,7 @@ void board_init_f(ulong dummy)
#endif #endif
static int am33xx_dm_post_init(void *ctx, struct event *event) static int am33xx_dm_post_init(void)
{ {
hw_data_init(); hw_data_init();
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
@ -535,4 +535,4 @@ static int am33xx_dm_post_init(void *ctx, struct event *event)
#endif #endif
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, am33xx_dm_post_init); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, am33xx_dm_post_init);

12
arch/arm/mach-omap2/hwinit-common.c
View file

@ -174,7 +174,7 @@ void __weak init_package_revision(void)
* done in each of these cases * done in each of these cases
* This function is called with SRAM stack. * This function is called with SRAM stack.
*/ */
void early_system_init(void) int early_system_init(void)
{ {
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
int ret; int ret;
@ -225,6 +225,8 @@ void early_system_init(void)
debug_uart_init(); debug_uart_init();
#endif #endif
prcm_init(); prcm_init();
return 0;
} }
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
@ -240,13 +242,7 @@ void board_init_f(ulong dummy)
} }
#endif #endif
static int omap2_system_init(void *ctx, struct event *event) EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, early_system_init);
{
early_system_init();
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT_F, omap2_system_init);
/* /*
* Routine: wait_for_command_complete * Routine: wait_for_command_complete

10
arch/mips/mach-pic32/cpu.c
View file

@ -95,14 +95,8 @@ static void prefetch_init(void)
iounmap(regs); iounmap(regs);
} }
/* arch specific CPU init after DM */ /* arch-specific CPU init after DM: flash prefetch */
static int pic32_flash_prefetch(void *ctx, struct event *event) EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, prefetch_init);
{
/* flash prefetch */
prefetch_init();
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT_F, pic32_flash_prefetch);
/* Un-gate DDR2 modules (gated by default) */ /* Un-gate DDR2 modules (gated by default) */
static void ddr2_pmd_ungate(void) static void ddr2_pmd_ungate(void)

4
arch/nios2/cpu/cpu.c
View file

@ -64,7 +64,7 @@ static void copy_exception_trampoline(void)
} }
#endif #endif
static int nios_cpu_setup(void *ctx, struct event *event) static int nios_cpu_setup(void)
{ {
struct udevice *dev; struct udevice *dev;
int ret; int ret;
@ -80,7 +80,7 @@ static int nios_cpu_setup(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, nios_cpu_setup); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, nios_cpu_setup);
static int altera_nios2_get_desc(const struct udevice *dev, char *buf, static int altera_nios2_get_desc(const struct udevice *dev, char *buf,
int size) int size)

4
arch/riscv/cpu/cpu.c
View file

@ -91,7 +91,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1)
} }
#endif #endif
int riscv_cpu_setup(void *ctx, struct event *event) int riscv_cpu_setup(void)
{ {
int ret; int ret;
@ -145,7 +145,7 @@ int riscv_cpu_setup(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, riscv_cpu_setup); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, riscv_cpu_setup);
int arch_early_init_r(void) int arch_early_init_r(void)
{ {

2
arch/riscv/include/asm/system.h
View file

@ -26,6 +26,6 @@ struct event;
} while (0) } while (0)
/* Hook to set up the CPU (called from SPL too) */ /* Hook to set up the CPU (called from SPL too) */
int riscv_cpu_setup(void *ctx, struct event *event); int riscv_cpu_setup(void);
#endif /* __ASM_RISCV_SYSTEM_H */ #endif /* __ASM_RISCV_SYSTEM_H */

2
arch/riscv/lib/spl.c
View file

@ -28,7 +28,7 @@ __weak void board_init_f(ulong dummy)
if (ret) if (ret)
panic("spl_early_init() failed: %d\n", ret); panic("spl_early_init() failed: %d\n", ret);
riscv_cpu_setup(NULL, NULL); riscv_cpu_setup();
preloader_console_init(); preloader_console_init();

7
arch/sandbox/cpu/start.c
View file

@ -119,12 +119,7 @@ int sandbox_early_getopt_check(void)
os_exit(0); os_exit(0);
} }
EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, sandbox_early_getopt_check);
static int sandbox_misc_init_f(void *ctx, struct event *event)
{
return sandbox_early_getopt_check();
}
EVENT_SPY(EVT_MISC_INIT_F, sandbox_misc_init_f);
static int sandbox_cmdline_cb_help(struct sandbox_state *state, const char *arg) static int sandbox_cmdline_cb_help(struct sandbox_state *state, const char *arg)
{ {

4
arch/x86/cpu/baytrail/cpu.c
View file

@ -45,7 +45,7 @@ static void hsuart_clock_set(void *base)
* Configure the internal clock of both SIO HS-UARTs, if they are enabled * Configure the internal clock of both SIO HS-UARTs, if they are enabled
* via FSP * via FSP
*/ */
static int baytrail_uart_init(void *ctx, struct event *event) static int baytrail_uart_init(void)
{ {
struct udevice *dev; struct udevice *dev;
void *base; void *base;
@ -64,7 +64,7 @@ static int baytrail_uart_init(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, baytrail_uart_init); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, baytrail_uart_init);
static void set_max_freq(void) static void set_max_freq(void)
{ {

4
arch/x86/cpu/broadwell/cpu.c
View file

@ -25,7 +25,7 @@
#include <asm/arch/pch.h> #include <asm/arch/pch.h>
#include <asm/arch/rcb.h> #include <asm/arch/rcb.h>
static int broadwell_init_cpu(void *ctx, struct event *event) static int broadwell_init_cpu(void)
{ {
struct udevice *dev; struct udevice *dev;
int ret; int ret;
@ -40,7 +40,7 @@ static int broadwell_init_cpu(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, broadwell_init_cpu); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, broadwell_init_cpu);
void set_max_freq(void) void set_max_freq(void)
{ {

4
arch/x86/cpu/ivybridge/cpu.c
View file

@ -54,7 +54,7 @@ int arch_cpu_init(void)
return x86_cpu_init_f(); return x86_cpu_init_f();
} }
static int ivybridge_cpu_init(void *ctx, struct event *ev) static int ivybridge_cpu_init(void)
{ {
struct pci_controller *hose; struct pci_controller *hose;
struct udevice *bus, *dev; struct udevice *bus, *dev;
@ -86,7 +86,7 @@ static int ivybridge_cpu_init(void *ctx, struct event *ev)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, ivybridge_cpu_init); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, ivybridge_cpu_init);
#define PCH_EHCI0_TEMP_BAR0 0xe8000000 #define PCH_EHCI0_TEMP_BAR0 0xe8000000
#define PCH_EHCI1_TEMP_BAR0 0xe8000400 #define PCH_EHCI1_TEMP_BAR0 0xe8000400

10
arch/x86/cpu/quark/quark.c
View file

@ -248,9 +248,7 @@ int arch_cpu_init(void)
return 0; return 0;
} }
static int quark_init_pcie(void *ctx, struct event *event) /*
{
/*
* Initialize PCIe controller * Initialize PCIe controller
* *
* Quark SoC holds the PCIe controller in reset following a power on. * Quark SoC holds the PCIe controller in reset following a power on.
@ -259,11 +257,7 @@ static int quark_init_pcie(void *ctx, struct event *event)
* space and any access to its PCI configuration registers will cause * space and any access to its PCI configuration registers will cause
* system hang while it is held in reset. * system hang while it is held in reset.
*/ */
quark_pcie_early_init(); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, quark_pcie_early_init);
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT_F, quark_init_pcie);
int checkcpu(void) int checkcpu(void)
{ {

4
arch/x86/lib/fsp2/fsp_init.c
View file

@ -19,7 +19,7 @@
#include <dm/uclass-internal.h> #include <dm/uclass-internal.h>
#include <asm/fsp2/fsp_internal.h> #include <asm/fsp2/fsp_internal.h>
int fsp_setup_pinctrl(void *ctx, struct event *event) int fsp_setup_pinctrl(void)
{ {
struct udevice *dev; struct udevice *dev;
ofnode node; ofnode node;
@ -42,7 +42,7 @@ int fsp_setup_pinctrl(void *ctx, struct event *event)
return ret; return ret;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, fsp_setup_pinctrl);
#if !defined(CONFIG_TPL_BUILD) #if !defined(CONFIG_TPL_BUILD)
binman_sym_declare(ulong, intel_fsp_m, image_pos); binman_sym_declare(ulong, intel_fsp_m, image_pos);

4
board/google/chromebook_coral/coral.c
View file

@ -33,7 +33,7 @@ struct cros_gpio_info {
int flags; int flags;
}; };
static int coral_check_ll_boot(void *ctx, struct event *event) static int coral_check_ll_boot(void)
{ {
if (!ll_boot_init()) { if (!ll_boot_init()) {
printf("Running as secondary loader"); printf("Running as secondary loader");
@ -57,7 +57,7 @@ static int coral_check_ll_boot(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_MISC_INIT_F, coral_check_ll_boot); EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, coral_check_ll_boot);
int arch_misc_init(void) int arch_misc_init(void)
{ {

4
board/keymile/kmcent2/kmcent2.c
View file

@ -182,7 +182,7 @@ unsigned long get_serial_clock(unsigned long dummy)
return (gd->bus_clk / 2); return (gd->bus_clk / 2);
} }
static int kmcent2_misc_init_f(void *ctx, struct event *event) static int kmcent2_misc_init_f(void)
{ {
/* configure QRIO pis for i2c deblocking */ /* configure QRIO pis for i2c deblocking */
i2c_deblock_gpio_cfg(); i2c_deblock_gpio_cfg();
@ -210,7 +210,7 @@ static int kmcent2_misc_init_f(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_MISC_INIT_F, kmcent2_misc_init_f); EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, kmcent2_misc_init_f);
#define USED_SRDS_BANK 0 #define USED_SRDS_BANK 0
#define EXPECTED_SRDS_RFCK SRDS_PLLCR0_RFCK_SEL_100 #define EXPECTED_SRDS_RFCK SRDS_PLLCR0_RFCK_SEL_100

4
board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
View file

@ -110,14 +110,14 @@ int board_early_init_f(void)
return 0; return 0;
} }
static int pg_wcom_misc_init_f(void *ctx, struct event *event) static int pg_wcom_misc_init_f(void)
{ {
if (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED)) if (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED))
check_for_uboot_update(); check_for_uboot_update();
return 0; return 0;
} }
EVENT_SPY(EVT_MISC_INIT_F, pg_wcom_misc_init_f); EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, pg_wcom_misc_init_f);
int board_init(void) int board_init(void)
{ {

2
board/starfive/visionfive2/spl.c
View file

@ -218,7 +218,7 @@ void board_init_f(ulong dummy)
if (ret) if (ret)
panic("spl_early_init() failed: %d\n", ret); panic("spl_early_init() failed: %d\n", ret);
riscv_cpu_setup(NULL, NULL); riscv_cpu_setup();
preloader_console_init(); preloader_console_init();
/* Set the parent clock of cpu_root clock to pll0, /* Set the parent clock of cpu_root clock to pll0,

4
drivers/cpu/microblaze_cpu.c
View file

@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
ci = tmp; \ ci = tmp; \
} }
static int microblaze_cpu_probe_all(void *ctx, struct event *event) static int microblaze_cpu_probe_all(void)
{ {
int ret; int ret;
@ -29,7 +29,7 @@ static int microblaze_cpu_probe_all(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_DM_POST_INIT_F, microblaze_cpu_probe_all); EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, microblaze_cpu_probe_all);
static void microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo *ci) static void microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo *ci)
{ {

4
lib/fwu_updates/fwu.c
View file

@ -618,7 +618,7 @@ int fwu_trial_state_ctr_start(void)
return ret; return ret;
} }
static int fwu_boottime_checks(void *ctx, struct event *event) static int fwu_boottime_checks(void)
{ {
int ret; int ret;
u32 boot_idx, active_idx; u32 boot_idx, active_idx;
@ -682,4 +682,4 @@ static int fwu_boottime_checks(void *ctx, struct event *event)
return 0; return 0;
} }
EVENT_SPY(EVT_MAIN_LOOP, fwu_boottime_checks); EVENT_SPY_SIMPLE(EVT_MAIN_LOOP, fwu_boottime_checks);

2
test/py/tests/test_event_dump.py
View file

@ -18,6 +18,6 @@ def test_event_dump(u_boot_console):
-------------------- ------------------------------ ------------------------------ -------------------- ------------------------------ ------------------------------
EVT_FT_FIXUP bootmeth_vbe_ft_fixup .*boot/vbe_request.c:.* EVT_FT_FIXUP bootmeth_vbe_ft_fixup .*boot/vbe_request.c:.*
EVT_FT_FIXUP bootmeth_vbe_simple_ft_fixup .*boot/vbe_simple_os.c:.* EVT_FT_FIXUP bootmeth_vbe_simple_ft_fixup .*boot/vbe_simple_os.c:.*
EVT_MISC_INIT_F sandbox_misc_init_f .*arch/sandbox/cpu/start.c:.* EVT_MISC_INIT_F sandbox_early_getopt_check .*arch/sandbox/cpu/start.c:.*
EVT_TEST h_adder_simple .*test/common/event.c:''' EVT_TEST h_adder_simple .*test/common/event.c:'''
assert re.match(expect, out, re.MULTILINE) is not None assert re.match(expect, out, re.MULTILINE) is not None