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efi_loader: refactor switch to non-secure mode
Refactor the switch from supervisor to hypervisor to a new function called at the beginning of do_bootefi(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
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b4f471f18e
commit
f6c6df7ebc
7 changed files with 132 additions and 67 deletions
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@ -14,6 +14,7 @@ obj-$(CONFIG_SYS_ARM_MPU) += mpu_v7r.o
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ifneq ($(CONFIG_SPL_BUILD),y)
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ifneq ($(CONFIG_SPL_BUILD),y)
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obj-$(CONFIG_EFI_LOADER) += sctlr.o
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obj-$(CONFIG_EFI_LOADER) += sctlr.o
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obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o
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endif
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endif
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ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
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ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
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56
arch/arm/cpu/armv7/exception_level.c
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56
arch/arm/cpu/armv7/exception_level.c
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@ -0,0 +1,56 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Switch to non-secure mode
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*
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* Copyright (c) 2018 Heinrich Schuchardt
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*
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* This module contains the ARMv7 specific code required for leaving the
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* secure mode before booting an operating system.
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*/
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#include <common.h>
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#include <bootm.h>
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#include <asm/armv7.h>
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#include <asm/secure.h>
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#include <asm/setjmp.h>
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/**
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* entry_non_secure() - entry point when switching to non-secure mode
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*
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* When switching to non-secure mode switch_to_non_secure_mode() calls this
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* function passing a jump buffer. We use this jump buffer to restore the
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* original stack and register state.
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*
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* @non_secure_jmp: jump buffer for restoring stack and registers
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*/
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static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
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{
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dcache_enable();
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debug("Reached non-secure mode\n");
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/* Restore stack and registers saved in switch_to_non_secure_mode() */
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longjmp(non_secure_jmp, 1);
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}
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/**
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* switch_to_non_secure_mode() - switch to non-secure mode
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*
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* Operating systems may expect to run in non-secure mode. Here we check if
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* we are running in secure mode and switch to non-secure mode if necessary.
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*/
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void switch_to_non_secure_mode(void)
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{
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static bool is_nonsec;
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struct jmp_buf_data non_secure_jmp;
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if (armv7_boot_nonsec() && !is_nonsec) {
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if (setjmp(&non_secure_jmp))
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return;
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dcache_disable(); /* flush cache before switch to HYP */
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armv7_init_nonsec();
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is_nonsec = true;
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secure_ram_addr(_do_nonsec_entry)(entry_non_secure,
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(uintptr_t)&non_secure_jmp,
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0, 0);
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}
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}
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@ -14,6 +14,7 @@ ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o
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obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o
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else
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else
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obj-y += exceptions.o
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obj-y += exceptions.o
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obj-y += exception_level.o
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endif
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endif
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obj-y += cache.o
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obj-y += cache.o
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obj-y += tlb.o
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obj-y += tlb.o
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55
arch/arm/cpu/armv8/exception_level.c
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55
arch/arm/cpu/armv8/exception_level.c
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@ -0,0 +1,55 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Switch to non-secure mode
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*
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* Copyright (c) 2018 Heinrich Schuchardt
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*
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* This module contains the ARMv8 specific code required to adjust the exception
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* level before booting an operating system.
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*/
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#include <common.h>
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#include <bootm.h>
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#include <asm/setjmp.h>
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/**
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* entry_non_secure() - entry point when switching to non-secure mode
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*
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* When switching to non-secure mode switch_to_non_secure_mode() calls this
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* function passing a jump buffer. We use this jump buffer to restore the
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* original stack and register state.
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*
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* @non_secure_jmp: jump buffer for restoring stack and registers
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*/
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static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
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{
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dcache_enable();
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debug("Reached non-secure mode\n");
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/* Restore stack and registers saved in switch_to_non_secure_mode() */
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longjmp(non_secure_jmp, 1);
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}
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/**
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* switch_to_non_secure_mode() - switch to non-secure mode
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*
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* Exception level EL3 is meant to be used by the secure monitor only (ARM
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* trusted firmware being one embodiment). The operating system shall be
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* started at exception level EL2. So here we check the exception level
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* and switch it if necessary.
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*/
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void switch_to_non_secure_mode(void)
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{
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struct jmp_buf_data non_secure_jmp;
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/* On AArch64 we need to make sure we call our payload in < EL3 */
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if (current_el() == 3) {
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if (setjmp(&non_secure_jmp))
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return;
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dcache_disable(); /* flush cache before switch to EL2 */
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/* Move into EL2 and keep running there */
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armv8_switch_to_el2((uintptr_t)&non_secure_jmp, 0, 0, 0,
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(uintptr_t)entry_non_secure, ES_TO_AARCH64);
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}
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}
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@ -5,8 +5,9 @@
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* Copyright (c) 2016 Alexander Graf
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* Copyright (c) 2016 Alexander Graf
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*/
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*/
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#include <charset.h>
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#include <common.h>
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#include <common.h>
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#include <bootm.h>
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#include <charset.h>
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#include <command.h>
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#include <command.h>
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#include <dm.h>
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#include <dm.h>
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#include <efi_loader.h>
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#include <efi_loader.h>
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@ -21,11 +22,6 @@
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#include <asm-generic/unaligned.h>
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#include <asm-generic/unaligned.h>
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#include <linux/linkage.h>
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#include <linux/linkage.h>
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#ifdef CONFIG_ARMV7_NONSEC
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#include <asm/armv7.h>
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#include <asm/secure.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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static struct efi_device_path *bootefi_image_path;
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static struct efi_device_path *bootefi_image_path;
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@ -151,34 +147,6 @@ static efi_status_t efi_do_enter(
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return ret;
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return ret;
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}
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}
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#ifdef CONFIG_ARM64
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static efi_status_t efi_run_in_el2(EFIAPI efi_status_t (*entry)(
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efi_handle_t image_handle, struct efi_system_table *st),
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efi_handle_t image_handle, struct efi_system_table *st)
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{
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/* Enable caches again */
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dcache_enable();
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return efi_do_enter(image_handle, st, entry);
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}
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#endif
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#ifdef CONFIG_ARMV7_NONSEC
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static bool is_nonsec;
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static efi_status_t efi_run_in_hyp(EFIAPI efi_status_t (*entry)(
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efi_handle_t image_handle, struct efi_system_table *st),
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efi_handle_t image_handle, struct efi_system_table *st)
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{
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/* Enable caches again */
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dcache_enable();
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is_nonsec = true;
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return efi_do_enter(image_handle, st, entry);
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}
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#endif
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/*
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/*
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* efi_carve_out_dt_rsv() - Carve out DT reserved memory ranges
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* efi_carve_out_dt_rsv() - Carve out DT reserved memory ranges
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*
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*
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@ -358,39 +326,6 @@ static efi_status_t do_bootefi_exec(void *efi,
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goto err_prepare;
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goto err_prepare;
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}
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}
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#ifdef CONFIG_ARM64
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/* On AArch64 we need to make sure we call our payload in < EL3 */
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if (current_el() == 3) {
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smp_kick_all_cpus();
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dcache_disable(); /* flush cache before switch to EL2 */
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/* Move into EL2 and keep running there */
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armv8_switch_to_el2((ulong)entry,
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(ulong)&image_obj->header,
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(ulong)&systab, 0, (ulong)efi_run_in_el2,
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ES_TO_AARCH64);
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/* Should never reach here, efi exits with longjmp */
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while (1) { }
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}
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#endif
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#ifdef CONFIG_ARMV7_NONSEC
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if (armv7_boot_nonsec() && !is_nonsec) {
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dcache_disable(); /* flush cache before switch to HYP */
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armv7_init_nonsec();
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secure_ram_addr(_do_nonsec_entry)(
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efi_run_in_hyp,
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(uintptr_t)entry,
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(uintptr_t)&image_obj->header,
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(uintptr_t)&systab);
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/* Should never reach here, efi exits with longjmp */
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while (1) { }
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}
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#endif
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ret = efi_do_enter(&image_obj->header, &systab, entry);
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ret = efi_do_enter(&image_obj->header, &systab, entry);
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err_prepare:
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err_prepare:
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@ -476,6 +411,8 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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/* Allow unaligned memory access */
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/* Allow unaligned memory access */
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allow_unaligned();
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allow_unaligned();
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switch_to_non_secure_mode();
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/* Initialize EFI drivers */
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/* Initialize EFI drivers */
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r = efi_init_obj_list();
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r = efi_init_obj_list();
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if (r != EFI_SUCCESS) {
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if (r != EFI_SUCCESS) {
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@ -912,6 +912,16 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
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return buf;
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return buf;
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}
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}
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/**
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* switch_to_non_secure_mode() - switch to non-secure mode
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*
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* This routine is overridden by architectures requiring this feature.
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*/
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void __weak switch_to_non_secure_mode(void)
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{
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}
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#else /* USE_HOSTCC */
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#else /* USE_HOSTCC */
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void memmove_wd(void *to, void *from, size_t len, ulong chunksz)
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void memmove_wd(void *to, void *from, size_t len, ulong chunksz)
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@ -82,4 +82,9 @@ int bootm_decomp_image(int comp, ulong load, ulong image_start, int type,
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*/
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*/
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void board_quiesce_devices(void);
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void board_quiesce_devices(void);
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/**
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* switch_to_non_secure_mode() - switch to non-secure mode
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*/
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void switch_to_non_secure_mode(void);
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#endif
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#endif
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