crypto/fsl: SEC driver cleanup for 64 bit and endianness

The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
   endianness before the job is submitted.
2. The read/write of physical addresses to Job Rings will
   be depend on endianness of SEC block as 32 bit low and
   high part of the 64 bit address will vary.
3. The 32 bit low and high part of the 64 bit address in
   descriptor will vary depending on endianness of SEC.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Aneesh Bansal 2015-10-29 22:58:03 +05:30 committed by York Sun
parent f4f0b7403a
commit f59e69cbd3
5 changed files with 109 additions and 24 deletions

View file

@ -194,11 +194,9 @@ struct jr_regs {
struct sg_entry {
#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6)
uint32_t addr_lo; /* Memory Address - lo */
uint16_t addr_hi; /* Memory Address of start of buffer - hi */
uint16_t reserved_zero;
uint32_t addr_hi; /* Memory Address of start of buffer - hi */
#else
uint16_t reserved_zero;
uint16_t addr_hi; /* Memory Address of start of buffer - hi */
uint32_t addr_hi; /* Memory Address of start of buffer - hi */
uint32_t addr_lo; /* Memory Address - lo */
#endif