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stm32mp15: replace CONFIG_TFABOOT when it is possible

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In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced
by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC.

This patch also simplifies the code in cpu.c, stm32mp1_ram.c and
clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and
without TFA) is not supported: the associated initialization code is
present only in SPL.

This cleanup patch is a preliminary step to support SPL load of OP-TEE
in secure world, with SPL in secure world and U-Boot in no-secure world.

Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This commit is contained in:
Patrick Delaunay 2021-10-11 09:52:50 +02:00 • committed by Patrice Chotard
parent 17aeb589fa
commit f42045b2e7
6 changed files with 25 additions and 30 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
arch/arm/mach-stm32mp/bsec.c
View file

@ -295,7 +295,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
u32 tmp_data = 0; u32 tmp_data = 0;
int ret; int ret;
if (IS_ENABLED(CONFIG_TFABOOT)) if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc(STM32_SMC_BSEC, return stm32_smc(STM32_SMC_BSEC,
STM32_SMC_READ_OTP, STM32_SMC_READ_OTP,
otp, 0, val); otp, 0, val);
@ -326,7 +326,7 @@ static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp)
{ {
struct stm32mp_bsec_plat *plat; struct stm32mp_bsec_plat *plat;
if (IS_ENABLED(CONFIG_TFABOOT)) if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc(STM32_SMC_BSEC, return stm32_smc(STM32_SMC_BSEC,
STM32_SMC_READ_SHADOW, STM32_SMC_READ_SHADOW,
otp, 0, val); otp, 0, val);
@ -350,7 +350,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp)
{ {
struct stm32mp_bsec_plat *plat; struct stm32mp_bsec_plat *plat;
if (IS_ENABLED(CONFIG_TFABOOT)) if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc_exec(STM32_SMC_BSEC, return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_PROG_OTP, STM32_SMC_PROG_OTP,
otp, val); otp, val);
@ -365,7 +365,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
{ {
struct stm32mp_bsec_plat *plat; struct stm32mp_bsec_plat *plat;
if (IS_ENABLED(CONFIG_TFABOOT)) if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc_exec(STM32_SMC_BSEC, return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_WRITE_SHADOW, STM32_SMC_WRITE_SHADOW,
otp, val); otp, val);
@ -377,7 +377,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp) static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp)
{ {
if (!IS_ENABLED(CONFIG_TFABOOT)) if (!IS_ENABLED(CONFIG_ARM_SMCCC) || IS_ENABLED(CONFIG_SPL_BUILD))
return -ENOTSUPP; return -ENOTSUPP;
if (val == 1) if (val == 1)

20
arch/arm/mach-stm32mp/cpu.c
View file

@ -93,8 +93,7 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
struct lmb lmb; struct lmb lmb;
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) #if defined(CONFIG_SPL_BUILD)
#ifndef CONFIG_TFABOOT
static void security_init(void) static void security_init(void)
{ {
/* Disable the backup domain write protection */ /* Disable the backup domain write protection */
@ -154,7 +153,6 @@ static void security_init(void)
writel(BIT(0), RCC_MP_AHB5ENSETR); writel(BIT(0), RCC_MP_AHB5ENSETR);
writel(0x0, GPIOZ_SECCFGR); writel(0x0, GPIOZ_SECCFGR);
} }
#endif /* CONFIG_TFABOOT */
/* /*
* Debug init * Debug init
@ -166,7 +164,7 @@ static void dbgmcu_init(void)
* done in TF-A for TRUSTED boot and * done in TF-A for TRUSTED boot and
* DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE
*/ */
if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) { if (bsec_dbgswenable()) {
setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2);
} }
@ -184,10 +182,7 @@ void spl_board_init(void)
if (ret) if (ret)
log_warning("BSEC probe failed: %d\n", ret); log_warning("BSEC probe failed: %d\n", ret);
} }
#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
#if !defined(CONFIG_TFABOOT) && \
(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
/* get bootmode from ROM code boot context: saved in TAMP register */ /* get bootmode from ROM code boot context: saved in TAMP register */
static void update_bootmode(void) static void update_bootmode(void)
{ {
@ -213,7 +208,7 @@ static void update_bootmode(void)
TAMP_BOOT_MODE_MASK, TAMP_BOOT_MODE_MASK,
boot_mode << TAMP_BOOT_MODE_SHIFT); boot_mode << TAMP_BOOT_MODE_SHIFT);
} }
#endif #endif /* defined(CONFIG_SPL_BUILD) */
u32 get_bootmode(void) u32 get_bootmode(void)
{ {
@ -291,11 +286,12 @@ int arch_cpu_init(void)
/* early armv7 timer init: needed for polling */ /* early armv7 timer init: needed for polling */
timer_init(); timer_init();
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) #if defined(CONFIG_SPL_BUILD)
#ifndef CONFIG_TFABOOT
security_init(); security_init();
update_bootmode(); update_bootmode();
#endif #endif
/* reset copro state in SPL, when used, or in U-Boot */
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
/* Reset Coprocessor state unless it wakes up from Standby power mode */ /* Reset Coprocessor state unless it wakes up from Standby power mode */
if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) {
writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE);
@ -308,9 +304,7 @@ int arch_cpu_init(void)
if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) &&
(boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) (boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART)
gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
#if defined(CONFIG_DEBUG_UART) && \ #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_SPL_BUILD)
!defined(CONFIG_TFABOOT) && \
(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
else else
debug_uart_init(); debug_uart_init();
#endif #endif

6
board/st/stm32mp1/stm32mp1.c
View file

@ -658,7 +658,11 @@ int board_init(void)
if (IS_ENABLED(CONFIG_DM_REGULATOR)) if (IS_ENABLED(CONFIG_DM_REGULATOR))
regulators_enable_boot_on(_DEBUG); regulators_enable_boot_on(_DEBUG);
if (!IS_ENABLED(CONFIG_TFABOOT)) /*
* sysconf initialisation done only when U-Boot is running in secure
* done in TF-A for TFABOOT.
*/
if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
sysconf_init(); sysconf_init();
if (CONFIG_IS_ENABLED(LED)) if (CONFIG_IS_ENABLED(LED))

4
drivers/clk/clk_stm32mp1.c
View file

@ -27,12 +27,10 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_TFABOOT #if defined(CONFIG_SPL_BUILD)
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
/* activate clock tree initialization in the driver */ /* activate clock tree initialization in the driver */
#define STM32MP1_CLOCK_TREE_INIT #define STM32MP1_CLOCK_TREE_INIT
#endif #endif
#endif
#define MAX_HSI_HZ 64000000 #define MAX_HSI_HZ 64000000

7
drivers/ram/stm32mp1/stm32mp1_ram.c
View file

@ -202,17 +202,16 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
priv->info.base = STM32_DDR_BASE; priv->info.base = STM32_DDR_BASE;
#if !defined(CONFIG_TFABOOT) && \ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
priv->info.size = 0; priv->info.size = 0;
ret = stm32mp1_ddr_setup(dev); ret = stm32mp1_ddr_setup(dev);
return log_ret(ret); return log_ret(ret);
#else }
ofnode node = stm32mp1_ddr_get_ofnode(dev); ofnode node = stm32mp1_ddr_get_ofnode(dev);
priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0); priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0);
return 0; return 0;
#endif
} }
static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info) static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info)

2
include/configs/stm32mp15_common.h
View file

@ -10,7 +10,7 @@
#include <linux/sizes.h> #include <linux/sizes.h>
#include <asm/arch/stm32.h> #include <asm/arch/stm32.h>
#ifndef CONFIG_TFABOOT #ifdef CONFIG_ARMV7_PSCI
/* PSCI support */ /* PSCI support */
#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE #define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE #define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE