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Coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
parent
5fc56b907d
commit
f15c6515fc
11 changed files with 2440 additions and 54 deletions
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@ -124,4 +124,3 @@ void enable_vbus(void)
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i2c_write(IOEXP_I2C_ADDR, 0, 0, &data, 1);
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i2c_write(IOEXP_I2C_ADDR, 0, 0, &data, 1);
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}
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}
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#endif
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#endif
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@ -45,4 +45,3 @@ distclean: clean
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include $(SRCTREE)/rules.mk
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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sinclude $(obj).depend
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@ -45,4 +45,3 @@ distclean: clean
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include $(SRCTREE)/rules.mk
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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sinclude $(obj).depend
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@ -238,4 +238,3 @@ static void cache_flush(void)
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{
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{
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asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
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asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
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}
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}
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@ -51,7 +51,6 @@ leaving preprocessor symbol "CONFIG_KORAT_PERMANENT" undefined.
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2008-02-22, Larry Johnson <lrj@acm.org>
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2008-02-22, Larry Johnson <lrj@acm.org>
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The CompactFlash(R) controller on the Korat board provides a hi-speed USB
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The CompactFlash(R) controller on the Korat board provides a hi-speed USB
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interface. This may be connected to either a dedicated port on the on-board
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interface. This may be connected to either a dedicated port on the on-board
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USB controller, or to a USB port on the PowerPC 440EPx processor. The U-Boot
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USB controller, or to a USB port on the PowerPC 440EPx processor. The U-Boot
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@ -97,70 +97,70 @@ Implementing AMP(Asymmetric MultiProcessing)
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-------------
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-------------
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1. Build kernel image for core0:
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1. Build kernel image for core0:
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a. $ make 85xx/mpc8572_ds_defconfig
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a. $ make 85xx/mpc8572_ds_defconfig
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b. $ make menuconfig
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b. $ make menuconfig
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- un-select "Processor support"->"Symetric multi-processing support"
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- un-select "Processor support"->"Symetric multi-processing support"
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c. $ make uImage
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c. $ make uImage
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
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2. Build kernel image for core1:
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2. Build kernel image for core1:
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a. $ make 85xx/mpc8572_ds_defconfig
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a. $ make 85xx/mpc8572_ds_defconfig
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b. $ make menuconfig
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b. $ make menuconfig
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- Un-select "Processor support"->"Symetric multi-processing support"
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- Un-select "Processor support"->"Symetric multi-processing support"
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- Select "Advanced setup" -> " Prompt for advanced kernel
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- Select "Advanced setup" -> " Prompt for advanced kernel
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configuration options"
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configuration options"
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- Select "Set physical address where the kernel is loaded" and
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- Select "Set physical address where the kernel is loaded" and
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set it to 0x20000000, asssuming core1 will start from 512MB.
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set it to 0x20000000, asssuming core1 will start from 512MB.
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- Select "Set custom page offset address"
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- Select "Set custom page offset address"
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- Select "Set custom kernel base address"
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- Select "Set custom kernel base address"
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- Select "Set maximum low memory"
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- Select "Set maximum low memory"
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- "Exit" and save the selection.
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- "Exit" and save the selection.
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c. $ make uImage
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c. $ make uImage
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
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3. Create dtb for core0:
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3. Create dtb for core0:
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$ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb
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$ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb
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4. Create dtb for core1:
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4. Create dtb for core1:
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$ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb
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$ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb
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5. Bring up two cores separately:
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5. Bring up two cores separately:
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a. Power on the board, under u-boot prompt:
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a. Power on the board, under u-boot prompt:
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=> setenv <serverip>
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=> setenv <serverip>
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=> setenv <ipaddr>
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=> setenv <ipaddr>
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=> setenv bootargs root=/dev/ram rw console=ttyS0,115200
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=> setenv bootargs root=/dev/ram rw console=ttyS0,115200
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b. Bring up core1's kernel first:
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b. Bring up core1's kernel first:
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=> setenv bootm_low 0x20000000
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=> setenv bootm_low 0x20000000
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=> setenv bootm_size 0x10000000
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=> setenv bootm_size 0x10000000
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=> tftp 21000000 8572/uImage.core1
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=> tftp 21000000 8572/uImage.core1
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=> tftp 22000000 8572/ramdiskfile
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=> tftp 22000000 8572/ramdiskfile
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=> tftp 20c00000 8572/mpc8572ds_core1.dtb
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=> tftp 20c00000 8572/mpc8572ds_core1.dtb
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=> interrupts off
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=> interrupts off
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=> bootm start 21000000 22000000 20c00000
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=> bootm start 21000000 22000000 20c00000
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=> bootm loados
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=> bootm loados
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=> bootm ramdisk
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=> bootm ramdisk
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=> bootm fdt
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=> bootm fdt
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=> fdt boardsetup
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=> fdt boardsetup
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=> fdt chosen $initrd_start $initrd_end
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=> fdt chosen $initrd_start $initrd_end
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=> bootm prep
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=> bootm prep
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=> cpu 1 release $bootm_low - $fdtaddr -
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=> cpu 1 release $bootm_low - $fdtaddr -
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c. Bring up core0's kernel(on the same u-boot console):
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c. Bring up core0's kernel(on the same u-boot console):
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=> setenv bootm_low 0
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=> setenv bootm_low 0
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=> setenv bootm_size 0x20000000
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=> setenv bootm_size 0x20000000
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=> tftp 1000000 8572/uImage.core0
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=> tftp 1000000 8572/uImage.core0
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=> tftp 2000000 8572/ramdiskfile
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=> tftp 2000000 8572/ramdiskfile
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=> tftp c00000 8572/mpc8572ds_core0.dtb
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=> tftp c00000 8572/mpc8572ds_core0.dtb
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=> bootm 1000000 2000000 c00000
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=> bootm 1000000 2000000 c00000
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Please note only core0 will run u-boot, core1 starts kernel directly after
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Please note only core0 will run u-boot, core1 starts kernel directly after
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"cpu release" command is issued.
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"cpu release" command is issued.
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@ -84,4 +84,3 @@ extern int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
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extern int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
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extern int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
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extern void enable_vbus(void);
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extern void enable_vbus(void);
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#endif /* __DAVINCI_USB_H__ */
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#endif /* __DAVINCI_USB_H__ */
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@ -314,4 +314,3 @@ extern inline u16 musb_readw(u32 offset);
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extern inline u8 musb_readb(u32 offset);
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extern inline u8 musb_readb(u32 offset);
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#endif /* __MUSB_HDRC_DEFS_H__ */
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#endif /* __MUSB_HDRC_DEFS_H__ */
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@ -818,8 +818,10 @@ int usb_lowlevel_init(void)
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/* Start the host controller. */
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/* Start the host controller. */
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cmd = ehci_readl(&hcor->or_usbcmd);
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cmd = ehci_readl(&hcor->or_usbcmd);
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/* Philips, Intel, and maybe others need CMD_RUN before the
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/*
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* root hub will detect new devices (why?); NEC doesn't */
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* Philips, Intel, and maybe others need CMD_RUN before the
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* root hub will detect new devices (why?); NEC doesn't
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*/
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cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
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cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
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cmd |= CMD_RUN;
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cmd |= CMD_RUN;
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ehci_writel(&hcor->or_usbcmd, cmd);
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ehci_writel(&hcor->or_usbcmd, cmd);
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@ -81,4 +81,3 @@
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#endif
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#endif
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#endif /* __ASM_ARCH_OMAP_GPMC_H */
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#endif /* __ASM_ARCH_OMAP_GPMC_H */
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