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ARM: DRA72x: Add Silicon ID support

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Add silicon ID code for DRA722 silicon.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
This commit is contained in:
Lokesh Vutla 2014-05-15 11:08:38 +05:30 • committed by Tom Rini
parent a0a37183bd
commit ee77a2389b
3 changed files with 5 additions and 0 deletions
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3
arch/arm/cpu/armv7/omap5/hwinit.c
View file

@ -336,6 +336,9 @@ void init_omap_revision(void)
case DRA752_CONTROL_ID_CODE_ES1_1: case DRA752_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = DRA752_ES1_1; *omap_si_rev = DRA752_ES1_1;
break; break;
case DRA722_CONTROL_ID_CODE_ES1_0:
*omap_si_rev = DRA722_ES1_0;
break;
default: default:
*omap_si_rev = OMAP5430_SILICON_ID_INVALID; *omap_si_rev = OMAP5430_SILICON_ID_INVALID;
} }

1
arch/arm/include/asm/arch-omap5/omap.h
View file

@ -45,6 +45,7 @@
#define OMAP5432_CONTROL_ID_CODE_ES2_0 0x1B99802F #define OMAP5432_CONTROL_ID_CODE_ES2_0 0x1B99802F
#define DRA752_CONTROL_ID_CODE_ES1_0 0x0B99002F #define DRA752_CONTROL_ID_CODE_ES1_0 0x0B99002F
#define DRA752_CONTROL_ID_CODE_ES1_1 0x1B99002F #define DRA752_CONTROL_ID_CODE_ES1_1 0x1B99002F
#define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F
/* UART */ /* UART */
#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000) #define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000)

1
arch/arm/include/asm/omap_common.h
View file

@ -645,6 +645,7 @@ static inline u8 is_dra7xx(void)
/* DRA7XX */ /* DRA7XX */
#define DRA752_ES1_0 0x07520100 #define DRA752_ES1_0 0x07520100
#define DRA752_ES1_1 0x07520110 #define DRA752_ES1_1 0x07520110
#define DRA722_ES1_0 0x07220100
/* /*
* SRAM scratch space entries * SRAM scratch space entries