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arm: dts: corstone1000: enable secondary cores for FVP

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Add the secondary cores nodes in the dts file

Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Rui Miguel Silva <rui.silva@linaro.org>
This commit is contained in:
Harsimran Singh Tungal 2024-06-12 11:04:21 +01:00 • committed by Tom Rini
parent 348385dfa0
commit ee71d159aa
2 changed files with 26 additions and 1 deletions
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25
arch/arm/dts/corstone1000-fvp.dts
View file

@ -49,3 +49,28 @@
clock-names = "smclk", "apb_pclk"; clock-names = "smclk", "apb_pclk";
}; };
}; };
&cpus {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a35";
reg = <0x1>;
enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a35";
reg = <0x2>;
enable-method = "psci";
next-level-cache = <&L2_0>;
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a35";
reg = <0x3>;
enable-method = "psci";
next-level-cache = <&L2_0>;
};
};

2
arch/arm/dts/corstone1000.dtsi
View file

@ -21,7 +21,7 @@
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
cpus { cpus: cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;