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* Patch by Rick Bronson, 16 Mar 2003:
Add support for Atmel AT91RM9200DK w/NAND
* Patches by Robert Schwebel, 19 Mar 2003:
- use arm-linux-gcc as default compiler for ARM
- fix i2c fixup code
- fix missing baudrate setting
- added $loadaddr / CFG_LOAD_ADDR support to loadb
- moved "ignoring trailing characters" _before_ u-boot wants to
print out diagnostics messages; removes bogus characters at the
end of transmission
* Patch by John Zhan, 18 Mar 2003:
Add support for SinoVee Microsystems SC8xx boards
* Patch by Rolf Offermanns, 21 Mar 2003:
ported the dnp1110 related changes from the current armboot cvs to
current u-boot cvs. smc91111 does not work. problem marked in
smc91111.c, grep for "FIXME".
* Patch by Brian Auld, 25 Mar 2003:
Add support for STM flash chips on ebony board
* Add PCI support for MPC8250 Boards (PM825 module)
* Patch by Stefan Roese, 25 Mar 2003:
This commit is contained in:
wdenk
parent
10f670178c
commit
dc7c9a1a52
55 changed files with 6611 additions and 430 deletions
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@ -1,10 +1,11 @@
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/*
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* u-boot/include/linux/mtd/nand.h
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* linux/include/linux/mtd/nand.h
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*
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* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
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* Steven J. Hill <sjhill@cotw.com>
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* Thomas Gleixner <gleixner@autronix.de>
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*
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* $Id: nand.h,v 1.8 2000/10/30 17:16:17 sjhill Exp $
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* $Id: nand.h,v 1.13 2002/04/28 13:40:41 gleixner Exp $
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -23,6 +24,14 @@
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* bat later if I did something naughty.
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* 10-11-2000 SJH Added private NAND flash structure for driver
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* 10-24-2000 SJH Added prototype for 'nand_scan' function
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* 10-29-2001 TG changed nand_chip structure to support
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* hardwarespecific function for accessing control lines
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* 02-21-2002 TG added support for different read/write adress and
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* ready/busy line access function
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* 02-26-2002 TG added chip_delay to nand_chip structure to optimize
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* command delay times for different chips
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* 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
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* defines in jffs2/wbuf.c
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*/
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#ifndef __LINUX_MTD_NAND_H
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#define __LINUX_MTD_NAND_H
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@ -41,6 +50,82 @@
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#define NAND_CMD_ERASE2 0xd0
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#define NAND_CMD_RESET 0xff
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/*
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* Enumeration for NAND flash chip state
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*/
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typedef enum {
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FL_READY,
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FL_READING,
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FL_WRITING,
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FL_ERASING,
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FL_SYNCING
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} nand_state_t;
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/*
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* NAND Private Flash Chip Data
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*
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* Structure overview:
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*
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* IO_ADDR - address to access the 8 I/O lines of the flash device
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*
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* hwcontrol - hardwarespecific function for accesing control-lines
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*
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* dev_ready - hardwarespecific function for accesing device ready/busy line
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*
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* chip_lock - spinlock used to protect access to this structure
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*
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* wq - wait queue to sleep on if a NAND operation is in progress
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*
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* state - give the current state of the NAND device
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*
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* page_shift - number of address bits in a page (column address bits)
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*
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* data_buf - data buffer passed to/from MTD user modules
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*
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* data_cache - data cache for redundant page access and shadow for
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* ECC failure
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*
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* ecc_code_buf - used only for holding calculated or read ECCs for
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* a page read or written when ECC is in use
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*
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* reserved - padding to make structure fall on word boundary if
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* when ECC is in use
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*/
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struct Nand {
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char floor, chip;
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unsigned long curadr;
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unsigned char curmode;
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/* Also some erase/write/pipeline info when we get that far */
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};
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struct nand_chip {
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int page_shift;
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u_char *data_buf;
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u_char *data_cache;
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int cache_page;
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u_char ecc_code_buf[6];
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u_char reserved[2];
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char ChipID; /* Type of DiskOnChip */
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struct Nand *chips;
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int chipshift;
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char* chips_name;
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unsigned long erasesize;
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unsigned long mfr; /* Flash IDs - only one type of flash per device */
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unsigned long id;
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char* name;
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struct NFTLrecord nftl;
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int nftl_found;
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int numchips;
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char page256;
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char pageadrlen;
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unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */
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unsigned long totlen;
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uint oobblock; // Size of OOB blocks (e.g. 512)
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uint oobsize; // Amount of OOB data per block (e.g. 16)
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uint eccsize;
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};
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/*
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* NAND Flash Manufacturer ID Codes
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*/
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@ -84,4 +169,30 @@ struct nand_flash_dev {
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unsigned long erasesize;
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};
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/*
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* Constants for oob configuration
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*/
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#define NAND_NOOB_ECCPOS0 0
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#define NAND_NOOB_ECCPOS1 1
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#define NAND_NOOB_ECCPOS2 2
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#define NAND_NOOB_ECCPOS3 3
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#define NAND_NOOB_ECCPOS4 4
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#define NAND_NOOB_ECCPOS5 5
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#define NAND_NOOB_BADBPOS -1
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#define NAND_NOOB_ECCVPOS -1
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#define NAND_JFFS2_OOB_ECCPOS0 0
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#define NAND_JFFS2_OOB_ECCPOS1 1
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#define NAND_JFFS2_OOB_ECCPOS2 2
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#define NAND_JFFS2_OOB_ECCPOS3 3
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#define NAND_JFFS2_OOB_ECCPOS4 6
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#define NAND_JFFS2_OOB_ECCPOS5 7
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#define NAND_JFFS2_OOB_BADBPOS 5
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#define NAND_JFFS2_OOB_ECCVPOS 4
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#define NAND_JFFS2_OOB8_FSDAPOS 6
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#define NAND_JFFS2_OOB16_FSDAPOS 8
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#define NAND_JFFS2_OOB8_FSDALEN 2
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#define NAND_JFFS2_OOB16_FSDALEN 8
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#endif /* __LINUX_MTD_NAND_H */
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