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ddr: marvell: only assert M_ODT[0] on write for a single CS

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When using only a single DDR chip select only assert M_ODT[0] on write.
Do not assert it on read and do not assert M_ODT[1] at all. Also set
tODT_OFF_WR to 0x9 which contradicts the recommendation from the
functional spec but is what Marvell's binary training blob does and
seems to give better results when ODT is active during writes.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Chris Packham 2018-01-18 17:16:07 +13:00 • committed by Stefan Roese
parent 086ebcd40e
commit dbaf09590d
3 changed files with 13 additions and 8 deletions
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3
drivers/ddr/marvell/a38x/ddr3_init.h
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@ -183,7 +183,8 @@ extern u32 g_znodt_data;
extern u32 g_zpodt_ctrl;
extern u32 g_znodt_ctrl;
extern u32 g_dic;
extern u32 g_odt_config;
extern u32 g_odt_config_2cs;
extern u32 g_odt_config_1cs;
extern u32 g_rtt_nom;
extern u8 debug_training_access;