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https://github.com/u-boot/u-boot.git
synced 2025-04-16 09:54:35 +00:00
common: return type board_get_usable_ram_top
board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This commit is contained in:
parent
b571b3acda
commit
d768dd8855
35 changed files with 35 additions and 35 deletions
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@ -333,7 +333,7 @@ phys_size_t get_effective_memsize(void)
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}
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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ulong top_addr;
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@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
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*/
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#define USABLE_RAM_SIZE 0x80000000ULL
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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unsigned long top = CFG_SYS_SDRAM_BASE + min(gd->ram_size, USABLE_RAM_SIZE);
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@ -216,7 +216,7 @@ int dram_init(void)
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return 0;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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unsigned long top = CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE;
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@ -40,7 +40,7 @@ int dram_init(void)
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return 0;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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phys_size_t size;
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phys_addr_t reg;
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@ -64,7 +64,7 @@ static struct mm_region sunxi_mem_map[] = {
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};
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struct mm_region *mem_map = sunxi_mem_map;
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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/* Some devices (like the EMAC) have a 32-bit DMA limit. */
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if (gd->ram_top > (1ULL << 32))
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@ -403,7 +403,7 @@ int dram_init_banksize(void)
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* This function is called before dram_init_banksize(), so we can't simply
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* return gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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ulong ram_top;
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@ -76,7 +76,7 @@ void board_init_f(ulong dummy)
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}
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#endif /* CONFIG_SPL_BUILD */
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return CFG_SYS_SDRAM_BASE + (256 * 1024 * 1024);
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}
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@ -77,7 +77,7 @@ phys_size_t get_effective_memsize(void)
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return UBOOT_RAM_SIZE_MAX;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
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/* Map a maximum of 256MiB - return not size but address */
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@ -21,7 +21,7 @@ int dram_init_banksize(void)
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return fdtdec_setup_memory_banksize();
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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/*
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* Ensure that we run from first 4GB so that all
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@ -20,7 +20,7 @@ int dram_init_banksize(void)
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return fdtdec_setup_memory_banksize();
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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#ifdef CONFIG_64BIT
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/*
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@ -21,7 +21,7 @@ int dram_init_banksize(void)
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return fdtdec_setup_memory_banksize();
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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/*
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* Ensure that we run from first 4GB so that all
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@ -21,7 +21,7 @@ int dram_init_banksize(void)
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return fdtdec_setup_memory_banksize();
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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/*
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* Ensure that we run from first 4GB so that all
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@ -25,7 +25,7 @@
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#include <asm/arch/pei_data.h>
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#include <asm/arch/pm.h>
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return mrc_common_board_get_usable_ram_top(total_size);
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}
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@ -27,7 +27,7 @@ unsigned int install_e820_map(unsigned int max_entries,
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* address, and how far U-Boot is moved by relocation are set in the global
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* data structure.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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uintptr_t dest_addr = 0;
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int i;
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@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
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* the relocation address, and how far U-Boot is moved by relocation are
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* set in the global data structure.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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struct efi_mem_desc *desc, *end;
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struct efi_entry_memmap *map;
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@ -11,7 +11,7 @@
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DECLARE_GLOBAL_DATA_PTR;
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return (ulong)efi_get_ram_base() + gd->ram_size;
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}
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@ -46,7 +46,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#define CMOS_OFFSET_MRC_SEED_S3 156
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#define CMOS_OFFSET_MRC_SEED_CHK 160
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return mrc_common_board_get_usable_ram_top(total_size);
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}
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@ -72,7 +72,7 @@ int dram_init_banksize(void)
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* the relocation address, and how far U-Boot is moved by relocation are
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* set in the global data structure.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return qemu_get_low_memory_size();
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}
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@ -184,7 +184,7 @@ int dram_init_banksize(void)
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* the relocation address, and how far U-Boot is moved by relocation are
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* set in the global data structure.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return gd->ram_size;
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}
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@ -48,7 +48,7 @@ static struct sbl_memory_map_info *get_memory_map_info(void)
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* @total_size: The memory size that u-boot occupies
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* Return: : The top available memory address lower than 4GB
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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struct sbl_memory_map_info *data;
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int i;
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@ -204,7 +204,7 @@ unsigned int install_e820_map(unsigned int max_entries,
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* address, and how far U-Boot is moved by relocation are set in the global
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* data structure.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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struct sfi_table_simple *sb;
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struct sfi_mem_entry *mentry;
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@ -77,7 +77,7 @@ int x86_cleanup_before_linux(void);
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void x86_enable_caches(void);
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void x86_disable_caches(void);
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int x86_init_cache(void);
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phys_size_t board_get_usable_ram_top(phys_size_t total_size);
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size);
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int default_print_cpuinfo(void);
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/* Set up a UART which can be used with printch(), printhex8(), etc. */
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@ -34,7 +34,7 @@ int dram_init(void)
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* the relocation address, and how far U-Boot is moved by relocation are
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* set in the global data structure.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return fsp_get_usable_lowmem_top(gd->arch.hob_list);
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}
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@ -77,7 +77,7 @@ int dram_init(void)
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return 0;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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if (!ll_boot_init())
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return gd->ram_size;
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@ -183,7 +183,7 @@ int dram_init_banksize(void)
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}
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/* Limit RAM used by U-Boot to the DDR first bank End region */
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return BCM_NS3_MEM_END;
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}
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@ -23,7 +23,7 @@ int dram_init(void)
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return 0;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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DECLARE_GLOBAL_DATA_PTR;
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@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
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static u32 mx53_dram_size[2];
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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/*
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* WARNING: We must override get_effective_memsize() function here
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@ -334,7 +334,7 @@ static void set_fdt_addr(void)
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/*
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* Prevent relocation from stomping on a firmware provided FDT blob.
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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if ((gd->ram_top - fw_dtb_pointer) > SZ_64M)
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return gd->ram_top;
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@ -59,7 +59,7 @@ int dram_init(void)
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return 0;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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#ifdef CONFIG_PHYS_64BIT
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/* Limit RAM used by U-Boot to the DDR low region */
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@ -55,7 +55,7 @@ int dram_init(void)
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return 0;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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#ifdef CONFIG_PHYS_64BIT
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/* Limit RAM used by U-Boot to the DDR low region */
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@ -43,7 +43,7 @@ int dram_init(void)
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return 0;
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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#ifdef CONFIG_PHYS_64BIT
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/* Limit RAM used by U-Boot to the DDR low region */
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@ -37,7 +37,7 @@ int dram_init(void)
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/*
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* Avoid relocated U-Boot clash with Linux reserved-memory on 512 MB SoM
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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return 0x9C000000;
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}
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@ -627,7 +627,7 @@ int embedded_dtb_select(void)
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#endif
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#if defined(CONFIG_LMB)
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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phys_size_t size;
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phys_addr_t reg;
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@ -330,7 +330,7 @@ __weak int mach_cpu_init(void)
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}
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/* Get the top of usable RAM */
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__weak phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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#if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
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/*
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@ -309,7 +309,7 @@ int show_board_info(void);
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* @total_size: monitor length in bytes (size of U-Boot code)
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* Return: uppermost address for U-Boot relocation
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*/
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phys_size_t board_get_usable_ram_top(phys_size_t total_size);
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size);
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int board_early_init_f(void);
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