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arm: include: Remove duplicate newlines
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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7 changed files with 0 additions and 11 deletions
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@ -15,7 +15,6 @@
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#ifndef __ASM_ARM_BYTEORDER_H
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#ifndef __ASM_ARM_BYTEORDER_H
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#define __ASM_ARM_BYTEORDER_H
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#define __ASM_ARM_BYTEORDER_H
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#include <asm/types.h>
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#include <asm/types.h>
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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@ -880,7 +880,6 @@ struct dmm_lisa_map_regs {
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#define RL_FINAL 6
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#define RL_FINAL 6
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#endif
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#endif
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/* Interleaving policies at EMIF level- between banks and Chip Selects */
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/* Interleaving policies at EMIF level- between banks and Chip Selects */
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#define EMIF_INTERLEAVING_POLICY_MAX_INTERLEAVING 0
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#define EMIF_INTERLEAVING_POLICY_MAX_INTERLEAVING 0
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#define EMIF_INTERLEAVING_POLICY_NO_BANK_INTERLEAVING 3
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#define EMIF_INTERLEAVING_POLICY_NO_BANK_INTERLEAVING 3
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@ -913,7 +912,6 @@ struct dmm_lisa_map_regs {
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*/
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*/
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#define READ_IDLE_INTERVAL_NORMAL (50*1000)
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#define READ_IDLE_INTERVAL_NORMAL (50*1000)
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/*
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/*
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* Unless voltage is changing due to DVFS one ZQCS command every 50ms should
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* Unless voltage is changing due to DVFS one ZQCS command every 50ms should
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* be enough. This shoule be enough also in the case when voltage is changing
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* be enough. This shoule be enough also in the case when voltage is changing
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@ -961,7 +959,6 @@ struct dmm_lisa_map_regs {
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#define REG_SR_TIM 0xF
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#define REG_SR_TIM 0xF
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#define REG_PD_TIM 0xF
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#define REG_PD_TIM 0xF
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/* EMIF_PWR_MGMT_CTRL register */
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/* EMIF_PWR_MGMT_CTRL register */
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#define EMIF_PWR_MGMT_CTRL (\
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#define EMIF_PWR_MGMT_CTRL (\
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((REG_CS_TIM << EMIF_REG_CS_TIM_SHIFT) & EMIF_REG_CS_TIM_MASK)|\
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((REG_CS_TIM << EMIF_REG_CS_TIM_SHIFT) & EMIF_REG_CS_TIM_MASK)|\
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@ -4,7 +4,6 @@
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* Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
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* Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
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*/
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*/
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#ifndef __ASM_ARCH_IMX_GPIO_H
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#ifndef __ASM_ARCH_IMX_GPIO_H
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#define __ASM_ARCH_IMX_GPIO_H
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#define __ASM_ARCH_IMX_GPIO_H
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@ -91,7 +91,6 @@ struct mxc_i2c_bus {
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} \
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} \
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};
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};
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#define I2C_PADS_INFO(name) \
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#define I2C_PADS_INFO(name) \
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(is_mx6dq() || is_mx6dqp()) ? &mx6q_##name : &mx6s_##name
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(is_mx6dq() || is_mx6dqp()) ? &mx6q_##name : &mx6s_##name
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#endif
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#endif
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@ -814,7 +814,6 @@ static inline u8 is_dra76x_acd(void)
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#define HS_DEVICE 0x2
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#define HS_DEVICE 0x2
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#define GP_DEVICE 0x3
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#define GP_DEVICE 0x3
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/*
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/*
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* SRAM scratch space entries
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* SRAM scratch space entries
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*/
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*/
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@ -15,7 +15,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
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#define ARM_OPCODE_CONDTEST_PASS 1
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#define ARM_OPCODE_CONDTEST_PASS 1
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#define ARM_OPCODE_CONDTEST_UNCOND 2
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#define ARM_OPCODE_CONDTEST_UNCOND 2
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/*
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/*
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* Assembler opcode byteswap helpers.
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* Assembler opcode byteswap helpers.
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* These are only intended for use by this header: don't use them directly,
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* These are only intended for use by this header: don't use them directly,
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@ -42,7 +41,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
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#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
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#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
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#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
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#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
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/*
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/*
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* Opcode byteswap helpers
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* Opcode byteswap helpers
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*
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*
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@ -94,7 +92,6 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
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#endif /* ! __ASSEMBLY__ */
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#endif /* ! __ASSEMBLY__ */
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#ifdef CONFIG_CPU_ENDIAN_BE8
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#ifdef CONFIG_CPU_ENDIAN_BE8
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#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
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#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
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@ -75,7 +75,6 @@ struct param_struct {
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char commandline[COMMAND_LINE_SIZE];
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char commandline[COMMAND_LINE_SIZE];
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};
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};
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/*
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/*
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* The new way of passing information: a list of tagged entries
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* The new way of passing information: a list of tagged entries
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*/
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*/
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