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spi: Extend the core to ease integration of SPI memory controllers

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Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.

This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Boris Brezillon 2018-08-16 17:30:11 +02:00 • committed by Jagan Teki
parent f86787280b
commit d13f5b254a
5 changed files with 778 additions and 0 deletions
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11
include/spi.h
View file

@ -9,6 +9,8 @@
#ifndef _SPI_H_
#define _SPI_H_
#include <common.h>
/* SPI mode flags */
#define SPI_CPHA BIT(0) /* clock phase */
#define SPI_CPOL BIT(1) /* clock polarity */
@ -402,6 +404,15 @@ struct dm_spi_ops {
int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout,
void *din, unsigned long flags);
/**
* Optimized handlers for SPI memory-like operations.
*
* Optimized/dedicated operations for interactions with SPI memory. This
* field is optional and should only be implemented if the controller
* has native support for memory like operations.
*/
const struct spi_controller_mem_ops *mem_ops;
/**
* Set transfer speed.
* This sets a new speed to be applied for next spi_xfer().