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sysinfo: Add sysinfo driver and data structure for smbios
Add sysinfo driver to retrieve smbios information (Type 4 and 7). So that the smbios library can use it for getting values from the hardware platform instead of device tree. Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
This commit is contained in:
Raymond Mao
Tom Rini
parent
3914a2e0dc
commit
ce562b42ce
4 changed files with 461 additions and 1 deletions
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@ -5,14 +5,240 @@
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*/
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#include <dm.h>
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#include <smbios_plat.h>
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#include <sysinfo.h>
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/* platform information storage */
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struct processor_info processor_info;
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struct cache_info cache_info[SYSINFO_CACHE_LVL_MAX];
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struct sysinfo_plat sysinfo_smbios_p = {
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/* Processor Information */
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.processor = &processor_info,
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/* Cache Information */
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.cache = &cache_info[0],
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};
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/* structure for smbios private data storage */
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struct sysinfo_plat_priv {
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struct processor_info *t4;
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struct smbios_type7 t7[SYSINFO_CACHE_LVL_MAX];
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u16 cache_handles[SYSINFO_CACHE_LVL_MAX];
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u8 cache_level;
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};
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static void smbios_cache_info_dump(struct smbios_type7 *cache_info)
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{
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log_debug("SMBIOS Type 7 (Cache Information):\n");
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log_debug("Cache Configuration: 0x%04x\n", cache_info->config.data);
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log_debug("Maximum Cache Size: %u KB\n", cache_info->max_size.data);
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log_debug("Installed Size: %u KB\n", cache_info->inst_size.data);
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log_debug("Supported SRAM Type: 0x%04x\n",
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cache_info->supp_sram_type.data);
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log_debug("Current SRAM Type: 0x%04x\n",
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cache_info->curr_sram_type.data);
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log_debug("Cache Speed: %u\n", cache_info->speed);
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log_debug("Error Correction Type: %u\n", cache_info->err_corr_type);
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log_debug("System Cache Type: %u\n", cache_info->sys_cache_type);
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log_debug("Associativity: %u\n", cache_info->associativity);
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log_debug("Maximum Cache Size 2: %u KB\n", cache_info->max_size2.data);
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log_debug("Installed Cache Size 2: %u KB\n",
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cache_info->inst_size2.data);
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}
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/* weak function for the platforms not yet supported */
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__weak int sysinfo_get_cache_info(u8 level, struct cache_info *cache_info)
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{
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return -ENOSYS;
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}
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__weak int sysinfo_get_processor_info(struct processor_info *pinfo)
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{
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return -ENOSYS;
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}
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void sysinfo_cache_info_default(struct cache_info *ci)
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{
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memset(ci, 0, sizeof(*ci));
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ci->config.data = SMBIOS_CACHE_LOCATE_UNKNOWN | SMBIOS_CACHE_OP_UND;
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ci->supp_sram_type.fields.unknown = 1;
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ci->curr_sram_type.fields.unknown = 1;
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ci->speed = SMBIOS_CACHE_SPEED_UNKNOWN;
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ci->err_corr_type = SMBIOS_CACHE_ERRCORR_UNKNOWN;
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ci->cache_type = SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN;
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}
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static int sysinfo_plat_detect(struct udevice *dev)
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{
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return 0;
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}
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static int sysinfo_plat_get_str(struct udevice *dev, int id,
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size_t size, char *val)
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{
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struct sysinfo_plat_priv *priv = dev_get_priv(dev);
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const char *str = NULL;
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switch (id) {
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case SYSID_SM_PROCESSOR_MANUFACT:
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str = priv->t4->manufacturer;
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break;
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default:
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break;
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}
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if (!str)
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return -ENOSYS;
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strlcpy(val, str, size);
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return 0;
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}
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static int sysinfo_plat_get_int(struct udevice *dev, int id, int *val)
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{
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struct sysinfo_plat_priv *priv = dev_get_priv(dev);
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u8 i;
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if (id >= SYSID_SM_CACHE_INFO_START &&
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id <= SYSID_SM_CACHE_INFO_END) {
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/* For smbios type 7 */
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for (i = 0; i < priv->cache_level; i++) {
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switch (id - i) {
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case SYSID_SM_CACHE_MAX_SIZE:
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*val = priv->t7[i].max_size.data;
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return 0;
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case SYSID_SM_CACHE_INST_SIZE:
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*val = priv->t7[i].inst_size.data;
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return 0;
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case SYSID_SM_CACHE_SCACHE_TYPE:
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*val = priv->t7[i].sys_cache_type;
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return 0;
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case SYSID_SM_CACHE_ASSOC:
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*val = priv->t7[i].associativity;
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return 0;
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case SYSID_SM_CACHE_MAX_SIZE2:
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*val = priv->t7[i].max_size2.data;
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return 0;
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case SYSID_SM_CACHE_INST_SIZE2:
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*val = priv->t7[i].inst_size2.data;
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return 0;
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default:
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break;
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}
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}
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return -ENOSYS;
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}
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switch (id) {
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case SYSID_SM_PROCESSOR_CORE_CNT:
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*val = priv->t4->core_count;
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break;
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case SYSID_SM_PROCESSOR_CORE_EN:
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*val = priv->t4->core_enabled;
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break;
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case SYSID_SM_PROCESSOR_CHARA:
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*val = priv->t4->characteristics;
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break;
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case SYSID_SM_CACHE_LEVEL:
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if (!priv->cache_level) /* No cache detected */
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return -ENOSYS;
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*val = priv->cache_level - 1;
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break;
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default:
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return -ENOSYS;
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}
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return 0;
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}
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static int sysinfo_plat_get_data(struct udevice *dev, int id, void **buf,
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size_t *size)
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{
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struct sysinfo_plat_priv *priv = dev_get_priv(dev);
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switch (id) {
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case SYSID_SM_PROCESSOR_ID:
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*buf = priv->t4->id;
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*size = sizeof(priv->t4->id);
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break;
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case SYSID_SM_CACHE_HANDLE:
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*buf = &priv->cache_handles[0];
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*size = sizeof(priv->cache_handles);
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int sysinfo_plat_probe(struct udevice *dev)
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{
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struct sysinfo_plat_priv *priv = dev_get_priv(dev);
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struct sysinfo_plat *plat = &sysinfo_smbios_p;
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u8 level;
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if (!sysinfo_get_processor_info(plat->processor))
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priv->t4 = plat->processor;
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for (level = 0; level < SYSINFO_CACHE_LVL_MAX; level++) {
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struct cache_info *pcache = plat->cache + level;
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if (sysinfo_get_cache_info(level, pcache))
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break; /* no more levels */
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/*
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* Fill in the SMBIOS type 7 structure,
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* skip the header members (type, length, handle),
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* and the ones in DT smbios node.
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*/
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priv->t7[level].sys_cache_type = pcache->cache_type;
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priv->t7[level].associativity = pcache->associativity;
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if (pcache->max_size > SMBIOS_CACHE_SIZE_EXT_KB) {
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priv->t7[level].max_size.data = 0xFFFF;
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priv->t7[level].max_size2.fields.size =
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pcache->max_size / 64;
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priv->t7[level].max_size2.fields.granu =
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SMBIOS_CACHE_GRANU_64K;
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} else {
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priv->t7[level].max_size.fields.size = pcache->max_size;
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priv->t7[level].max_size.fields.granu =
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SMBIOS_CACHE_GRANU_1K;
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priv->t7[level].max_size2.data = 0;
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}
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if (pcache->inst_size > SMBIOS_CACHE_SIZE_EXT_KB) {
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priv->t7[level].inst_size.data = 0xFFFF;
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priv->t7[level].inst_size2.fields.size =
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pcache->inst_size / 64;
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priv->t7[level].inst_size2.fields.granu =
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SMBIOS_CACHE_GRANU_64K;
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} else {
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priv->t7[level].inst_size.fields.size =
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pcache->inst_size;
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priv->t7[level].inst_size.fields.granu =
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SMBIOS_CACHE_GRANU_1K;
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priv->t7[level].inst_size2.data = 0;
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}
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smbios_cache_info_dump(&priv->t7[level]);
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}
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if (!level) /* no cache detected */
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return -ENOSYS;
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priv->cache_level = level;
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return 0;
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}
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static const struct udevice_id sysinfo_smbios_ids[] = {
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{ .compatible = "u-boot,sysinfo-smbios" },
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{ /* sentinel */ }
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};
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static const struct sysinfo_ops sysinfo_smbios_ops = {
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.detect = sysinfo_plat_detect,
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.get_str = sysinfo_plat_get_str,
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.get_int = sysinfo_plat_get_int,
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.get_data = sysinfo_plat_get_data,
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};
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U_BOOT_DRIVER(sysinfo_smbios) = {
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@ -20,4 +246,6 @@ U_BOOT_DRIVER(sysinfo_smbios) = {
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.id = UCLASS_SYSINFO,
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.of_match = sysinfo_smbios_ids,
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.ops = &sysinfo_smbios_ops,
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.priv_auto = sizeof(struct sysinfo_plat_priv),
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.probe = sysinfo_plat_probe,
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};
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@ -187,6 +187,66 @@ struct __packed smbios_type4 {
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char eos[SMBIOS_STRUCT_EOS_BYTES];
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};
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union cache_config {
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struct {
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u16 level:3;
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u16 bsocketed:1;
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u16 rsvd0:1;
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u16 locate:2;
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u16 benabled:1;
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u16 opmode:2;
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u16 rsvd1:6;
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} fields;
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u16 data;
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};
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union cache_size_word {
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struct {
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u16 size:15;
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u16 granu:1;
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} fields;
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u16 data;
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};
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union cache_size_dword {
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struct {
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u32 size:31;
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u32 granu:1;
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} fields;
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u32 data;
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};
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union cache_sram_type {
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struct {
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u16 other:1;
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u16 unknown:1;
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u16 nonburst:1;
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u16 burst:1;
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u16 plburst:1;
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u16 sync:1;
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u16 async:1;
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u16 rsvd:9;
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} fields;
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u16 data;
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};
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struct __packed smbios_type7 {
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struct smbios_header hdr;
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u8 socket_design;
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union cache_config config;
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union cache_size_word max_size;
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union cache_size_word inst_size;
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union cache_sram_type supp_sram_type;
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union cache_sram_type curr_sram_type;
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u8 speed;
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u8 err_corr_type;
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u8 sys_cache_type;
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u8 associativity;
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union cache_size_dword max_size2;
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union cache_size_dword inst_size2;
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char eos[SMBIOS_STRUCT_EOS_BYTES];
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};
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struct __packed smbios_type32 {
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u8 type;
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u8 length;
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79
include/smbios_plat.h
Normal file
79
include/smbios_plat.h
Normal file
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@ -0,0 +1,79 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2024 Linaro Limited
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* Author: Raymond Mao <raymond.mao@linaro.org>
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*/
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#ifndef __SMBIOS_PLAT_H
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#define __SMBIOS_PLAT_H
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#include <smbios.h>
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struct cache_info {
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union cache_config config;
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union cache_sram_type supp_sram_type;
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union cache_sram_type curr_sram_type;
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u32 line_size;
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u32 associativity;
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u32 max_size;
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u32 inst_size;
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u8 cache_type;
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u8 speed;
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u8 err_corr_type;
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char *socket_design;
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};
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struct processor_info {
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u32 id[2];
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u16 ext_clock;
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u16 max_speed;
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u16 curr_speed;
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u16 characteristics;
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u16 family2;
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u16 core_count2;
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u16 core_enabled2;
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u16 thread_count2;
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u16 thread_enabled;
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u8 type;
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u8 family;
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u8 voltage;
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u8 status;
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u8 upgrade;
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u8 core_count;
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u8 core_enabled;
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u8 thread_count;
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char *socket_design;
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char *manufacturer;
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char *version;
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char *sn;
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char *asset_tag;
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char *pn;
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};
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struct sysinfo_plat {
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struct processor_info *processor;
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struct cache_info *cache;
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/* add other sysinfo structure here */
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};
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#if defined CONFIG_SYSINFO_SMBIOS
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int sysinfo_get_cache_info(u8 level, struct cache_info *cache_info);
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void sysinfo_cache_info_default(struct cache_info *ci);
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int sysinfo_get_processor_info(struct processor_info *pinfo);
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#else
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static inline int sysinfo_get_cache_info(u8 level,
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struct cache_info *cache_info)
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{
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return -ENOSYS;
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}
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static inline void sysinfo_cache_info_default(struct cache_info *ci)
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{
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}
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static inline int sysinfo_get_processor_info(struct processor_info *pinfo)
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{
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return -ENOSYS;
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}
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#endif
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#endif /* __SMBIOS_PLAT_H */
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@ -11,6 +11,8 @@
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struct udevice;
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#define SYSINFO_CACHE_LVL_MAX 3
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/*
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* This uclass encapsulates hardware methods to gather information about a
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* sysinfo or a specific device such as hard-wired GPIOs on GPIO expanders,
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@ -42,18 +44,109 @@ struct udevice;
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enum sysinfo_id {
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SYSID_NONE,
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/* For SMBIOS tables */
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/* BIOS Information (Type 0) */
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SYSID_SM_BIOS_VENDOR,
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SYSID_SM_BIOS_VER,
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SYSID_SM_BIOS_REL_DATE,
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/* System Information (Type 1) */
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SYSID_SM_SYSTEM_MANUFACTURER,
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SYSID_SM_SYSTEM_PRODUCT,
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SYSID_SM_SYSTEM_VERSION,
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SYSID_SM_SYSTEM_SERIAL,
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SYSID_SM_SYSTEM_WAKEUP,
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SYSID_SM_SYSTEM_SKU,
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SYSID_SM_SYSTEM_FAMILY,
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/* Baseboard (or Module) Information (Type 2) */
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SYSID_SM_BASEBOARD_MANUFACTURER,
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SYSID_SM_BASEBOARD_PRODUCT,
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SYSID_SM_BASEBOARD_VERSION,
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SYSID_SM_BASEBOARD_SERIAL,
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SYSID_SM_BASEBOARD_ASSET_TAG,
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SYSID_SM_BASEBOARD_FEATURE,
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SYSID_SM_BASEBOARD_CHASSIS_LOCAT,
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SYSID_SM_BASEBOARD_TYPE,
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SYSID_SM_BASEBOARD_OBJS_NUM,
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SYSID_SM_BASEBOARD_OBJS_HANDLE,
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/* System Enclosure or Chassis (Type 3) */
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SYSID_SM_ENCLOSURE_MANUFACTURER,
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SYSID_SM_ENCLOSURE_VERSION,
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SYSID_SM_ENCLOSURE_SERIAL,
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SYSID_SM_ENCLOSURE_ASSET_TAG,
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SYSID_SM_ENCLOSURE_TYPE,
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SYSID_SM_ENCLOSURE_BOOTUP,
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SYSID_SM_ENCLOSURE_POW,
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SYSID_SM_ENCLOSURE_THERMAL,
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SYSID_SM_ENCLOSURE_SECURITY,
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SYSID_SM_ENCLOSURE_OEM,
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SYSID_SM_ENCLOSURE_HEIGHT,
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SYSID_SM_ENCLOSURE_POWCORE_NUM,
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SYSID_SM_ENCLOSURE_ELEMENT_CNT,
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SYSID_SM_ENCLOSURE_ELEMENT_LEN,
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SYSID_SM_ENCLOSURE_ELEMENTS,
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SYSID_SM_ENCLOSURE_SKU,
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/* Processor Information (Type 4) */
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SYSID_SM_PROCESSOR_SOCKET,
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SYSID_SM_PROCESSOR_TYPE,
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SYSID_SM_PROCESSOR_MANUFACT,
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SYSID_SM_PROCESSOR_ID,
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SYSID_SM_PROCESSOR_VERSION,
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SYSID_SM_PROCESSOR_VOLTAGE,
|
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SYSID_SM_PROCESSOR_EXT_CLOCK,
|
||||
SYSID_SM_PROCESSOR_MAX_SPEED,
|
||||
SYSID_SM_PROCESSOR_CUR_SPEED,
|
||||
SYSID_SM_PROCESSOR_STATUS,
|
||||
SYSID_SM_PROCESSOR_UPGRADE,
|
||||
SYSID_SM_PROCESSOR_SN,
|
||||
SYSID_SM_PROCESSOR_ASSET_TAG,
|
||||
SYSID_SM_PROCESSOR_PN,
|
||||
SYSID_SM_PROCESSOR_CORE_CNT,
|
||||
SYSID_SM_PROCESSOR_CORE_EN,
|
||||
SYSID_SM_PROCESSOR_THREAD_CNT,
|
||||
SYSID_SM_PROCESSOR_CHARA,
|
||||
SYSID_SM_PROCESSOR_FAMILY,
|
||||
SYSID_SM_PROCESSOR_FAMILY2,
|
||||
SYSID_SM_PROCESSOR_CORE_CNT2,
|
||||
SYSID_SM_PROCESSOR_CORE_EN2,
|
||||
SYSID_SM_PROCESSOR_THREAD_CNT2,
|
||||
SYSID_SM_PROCESSOR_THREAD_EN,
|
||||
|
||||
/*
|
||||
* Cache Information (Type 7)
|
||||
* Each of the id should reserve space for up to
|
||||
* SYSINFO_CACHE_LVL_MAX levels of cache
|
||||
*/
|
||||
SYSID_SM_CACHE_LEVEL,
|
||||
SYSID_SM_CACHE_HANDLE,
|
||||
SYSID_SM_CACHE_INFO_START,
|
||||
SYSID_SM_CACHE_SOCKET = SYSID_SM_CACHE_INFO_START,
|
||||
SYSID_SM_CACHE_CONFIG =
|
||||
SYSID_SM_CACHE_SOCKET + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_MAX_SIZE =
|
||||
SYSID_SM_CACHE_CONFIG + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_INST_SIZE =
|
||||
SYSID_SM_CACHE_MAX_SIZE + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_SUPSRAM_TYPE =
|
||||
SYSID_SM_CACHE_INST_SIZE + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_CURSRAM_TYPE =
|
||||
SYSID_SM_CACHE_SUPSRAM_TYPE + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_SPEED =
|
||||
SYSID_SM_CACHE_CURSRAM_TYPE + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_ERRCOR_TYPE =
|
||||
SYSID_SM_CACHE_SPEED + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_SCACHE_TYPE =
|
||||
SYSID_SM_CACHE_ERRCOR_TYPE + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_ASSOC =
|
||||
SYSID_SM_CACHE_SCACHE_TYPE + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_MAX_SIZE2 =
|
||||
SYSID_SM_CACHE_ASSOC + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_INST_SIZE2 =
|
||||
SYSID_SM_CACHE_MAX_SIZE2 + SYSINFO_CACHE_LVL_MAX,
|
||||
SYSID_SM_CACHE_INFO_END =
|
||||
SYSID_SM_CACHE_INST_SIZE2 + SYSINFO_CACHE_LVL_MAX - 1,
|
||||
|
||||
/* For show_board_info() */
|
||||
SYSID_BOARD_MODEL,
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue