ram: k3-ddrss: drop debug() in timing-sensitive sequence

Those debug() calls might be useful, but beware. They can cause the DDR
controller to hang if we do not run the sequence quickly enough.

They usually are not an issue with upstream U-Boot and the default DDR
config, but they have become troublesome with custom DDR configs.

Drop those debug() statements that shouldn't be present in
time-sensitive code, to avoid anyone else falling into the trap.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
This commit is contained in:
Théo Lebrun 2024-11-15 10:43:15 +01:00 committed by Tom Rini
parent a0c8e3cfba
commit ce05ec4895

View file

@ -216,9 +216,6 @@ static void k3_lpddr4_freq_update(struct k3_ddrss_desc *ddrss)
req_type = readl(ddrss->ddrss_ctrl_mmr +
CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS + ddrss->instance * 0x10) & 0x03;
debug("%s: received freq change req: req type = %d, req no. = %d, instance = %d\n",
__func__, req_type, counter, ddrss->instance);
if (req_type == 1)
clk_set_rate(&ddrss->ddr_clk, ddrss->ddr_freq1);
else if (req_type == 2)
@ -245,8 +242,6 @@ static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd)
{
struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance;
debug("--->>> LPDDR4 Initialization is in progress ... <<<---\n");
switch (ddrss->dram_class) {
case DENALI_CTL_0_DRAM_CLASS_DDR4:
break;