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ARM: renesas: Rename rmobile_get_cpu_rev_*() to renesas_get_cpu_rev_*()

Browse source 
Rename rmobile_get_cpu_rev_*() to renesas_get_cpu_rev_*() because
all the chips are made by Renesas, while only a subset of them is
from the R-Mobile line.

Use the following command to perform the rename:

"
$ git grep -l '\<rmobile_get_cpu_rev_\(integer\|fraction\)\>' | \
  xargs -I {} sed -i 's@\<rmobile_get_cpu_rev_\(integer\|fraction\)\>@renesas_get_cpu_rev_\1@g' {}
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
This commit is contained in:
Marek Vasut 2024-02-27 17:05:46 +01:00 • committed by Tom Rini
parent 6bd3a95b67
commit ca40ed6d7f
16 changed files with 41 additions and 41 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/mach-rmobile/cpu_info-rcar.c
View file

@ -26,7 +26,7 @@ u32 renesas_get_cpu_type(void)
return (rmobile_get_prr() & 0x00007F00) >> 8; return (rmobile_get_prr() & 0x00007F00) >> 8;
} }
u32 rmobile_get_cpu_rev_integer(void) u32 renesas_get_cpu_rev_integer(void)
{ {
const u32 prr = rmobile_get_prr(); const u32 prr = rmobile_get_prr();
const u32 rev = prr & PRR_MASK; const u32 rev = prr & PRR_MASK;
@ -38,7 +38,7 @@ u32 rmobile_get_cpu_rev_integer(void)
return ((prr & 0x000000F0) >> 4) + 1; return ((prr & 0x000000F0) >> 4) + 1;
} }
u32 rmobile_get_cpu_rev_fraction(void) u32 renesas_get_cpu_rev_fraction(void)
{ {
const u32 prr = rmobile_get_prr(); const u32 prr = rmobile_get_prr();
const u32 rev = prr & PRR_MASK; const u32 rev = prr & PRR_MASK;

4
arch/arm/mach-rmobile/cpu_info-rzg2l.c
View file

@ -52,12 +52,12 @@ u32 renesas_get_cpu_type(void)
return get_tfa_info()->cpu_type; return get_tfa_info()->cpu_type;
} }
u32 rmobile_get_cpu_rev_integer(void) u32 renesas_get_cpu_rev_integer(void)
{ {
return (readl(SYSC_LSI_DEVID) >> 28) + 1; return (readl(SYSC_LSI_DEVID) >> 28) + 1;
} }
u32 rmobile_get_cpu_rev_fraction(void) u32 renesas_get_cpu_rev_fraction(void)
{ {
return 0; return 0;
} }

12
arch/arm/mach-rmobile/cpu_info.c
View file

@ -47,14 +47,14 @@ static u32 __rmobile_get_cpu_rev_integer(void)
{ {
return 0; return 0;
} }
u32 rmobile_get_cpu_rev_integer(void) u32 renesas_get_cpu_rev_integer(void)
__attribute__((weak, alias("__rmobile_get_cpu_rev_integer"))); __attribute__((weak, alias("__rmobile_get_cpu_rev_integer")));
static u32 __rmobile_get_cpu_rev_fraction(void) static u32 __rmobile_get_cpu_rev_fraction(void)
{ {
return 0; return 0;
} }
u32 rmobile_get_cpu_rev_fraction(void) u32 renesas_get_cpu_rev_fraction(void)
__attribute__((weak, alias("__rmobile_get_cpu_rev_fraction"))); __attribute__((weak, alias("__rmobile_get_cpu_rev_fraction")));
/* CPU information table */ /* CPU information table */
@ -122,15 +122,15 @@ int print_cpuinfo(void)
int i = rmobile_cpuinfo_idx(); int i = rmobile_cpuinfo_idx();
if (rmobile_cpuinfo[i].cpu_type == RMOBILE_CPU_TYPE_R8A7796 && if (rmobile_cpuinfo[i].cpu_type == RMOBILE_CPU_TYPE_R8A7796 &&
rmobile_get_cpu_rev_integer() == 1 && renesas_get_cpu_rev_integer() == 1 &&
rmobile_get_cpu_rev_fraction() == 1) { renesas_get_cpu_rev_fraction() == 1) {
printf("CPU: Renesas Electronics %s rev 1.1/1.2\n", get_cpu_name(i)); printf("CPU: Renesas Electronics %s rev 1.1/1.2\n", get_cpu_name(i));
return 0; return 0;
} }
printf("CPU: Renesas Electronics %s rev %d.%d\n", printf("CPU: Renesas Electronics %s rev %d.%d\n",
get_cpu_name(i), rmobile_get_cpu_rev_integer(), get_cpu_name(i), renesas_get_cpu_rev_integer(),
rmobile_get_cpu_rev_fraction()); renesas_get_cpu_rev_fraction());
return 0; return 0;
} }

2
arch/arm/mach-rmobile/include/mach/r8a7790.h
View file

@ -28,6 +28,6 @@
#define R8A7790_CUT_ES2X 2 #define R8A7790_CUT_ES2X 2
#define IS_R8A7790_ES2() \ #define IS_R8A7790_ES2() \
(rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X) (renesas_get_cpu_rev_integer() == R8A7790_CUT_ES2X)
#endif /* __ASM_ARCH_R8A7790_H */ #endif /* __ASM_ARCH_R8A7790_H */

2
arch/arm/mach-rmobile/include/mach/r8a7791.h
View file

@ -65,6 +65,6 @@
#define R8A7791_CUT_ES2X 2 #define R8A7791_CUT_ES2X 2
#define IS_R8A7791_ES2() \ #define IS_R8A7791_ES2() \
(rmobile_get_cpu_rev_integer() == R8A7791_CUT_ES2X) (renesas_get_cpu_rev_integer() == R8A7791_CUT_ES2X)
#endif /* __ASM_ARCH_R8A7791_H */ #endif /* __ASM_ARCH_R8A7791_H */

2
arch/arm/mach-rmobile/include/mach/r8a7793.h
View file

@ -71,6 +71,6 @@
#define R8A7793_CUT_ES2X 2 #define R8A7793_CUT_ES2X 2
#define IS_R8A7793_ES2() \ #define IS_R8A7793_ES2() \
(rmobile_get_cpu_rev_integer() == R8A7793_CUT_ES2X) (renesas_get_cpu_rev_integer() == R8A7793_CUT_ES2X)
#endif /* __ASM_ARCH_R8A7793_H */ #endif /* __ASM_ARCH_R8A7793_H */

2
arch/arm/mach-rmobile/include/mach/r8a7794.h
View file

@ -28,6 +28,6 @@
#define R8A7794_CUT_ES2 2 #define R8A7794_CUT_ES2 2
#define IS_R8A7794_ES2() \ #define IS_R8A7794_ES2() \
(rmobile_get_cpu_rev_integer() == R8A7794_CUT_ES2) (renesas_get_cpu_rev_integer() == R8A7794_CUT_ES2)
#endif /* __ASM_ARCH_R8A7794_H */ #endif /* __ASM_ARCH_R8A7794_H */

4
arch/arm/mach-rmobile/include/mach/rmobile.h
View file

@ -49,8 +49,8 @@
const u8 *rzg_get_cpu_name(void); const u8 *rzg_get_cpu_name(void);
u32 renesas_get_cpu_type(void); u32 renesas_get_cpu_type(void);
u32 rmobile_get_cpu_rev_integer(void); u32 renesas_get_cpu_rev_integer(void);
u32 rmobile_get_cpu_rev_fraction(void); u32 renesas_get_cpu_rev_fraction(void);
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_RMOBILE_H */ #endif /* __ASM_ARCH_RMOBILE_H */

2
board/renesas/lager/lager.c
View file

@ -46,7 +46,7 @@ void s_init(void)
writel(0xA5A5A500, &swdt->swtcsra); writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.4GHz */ /* CPU frequency setting. Set to 1.4GHz */
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) { if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0; u32 stat = 0;
u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1) u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT; << PLL0_STC_BIT;

2
board/renesas/lager/qos.c
View file

@ -2419,7 +2419,7 @@ static void qos_init_es2(void)
void qos_init(void) void qos_init(void)
{ {
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
qos_init_es2(); qos_init_es2();
else else
qos_init_es1(); qos_init_es1();

2
board/renesas/stout/qos.c
View file

@ -2421,7 +2421,7 @@ static void qos_init_es2(void)
void qos_init(void) void qos_init(void)
{ {
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
qos_init_es2(); qos_init_es2();
else else
qos_init_es1(); qos_init_es1();

2
board/renesas/stout/stout.c
View file

@ -46,7 +46,7 @@ void s_init(void)
writel(0xA5A5A500, &swdt->swtcsra); writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.4GHz */ /* CPU frequency setting. Set to 1.4GHz */
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) { if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0; u32 stat = 0;
u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1) u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT; << PLL0_STC_BIT;

32
drivers/mmc/renesas-sdhi.c
View file

@ -886,29 +886,29 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */ /* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 1)) || (renesas_get_cpu_rev_integer() <= 1)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) && (renesas_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() <= 2)) || (renesas_get_cpu_rev_fraction() <= 2)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) || (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) && ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) &&
(rmobile_get_cpu_rev_integer() <= 1)) || (renesas_get_cpu_rev_integer() <= 1)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995)) (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
plat->cfg.host_caps &= ~MMC_MODE_HS400; plat->cfg.host_caps &= ~MMC_MODE_HS400;
/* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */ /* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() >= 2)) || (renesas_get_cpu_rev_integer() >= 2)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) && (renesas_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 2)) || (renesas_get_cpu_rev_fraction() == 2)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965)) (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965))
priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7); priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7);
/* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */ /* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */
if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) && (renesas_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() > 2)) { (renesas_get_cpu_rev_fraction() > 2)) {
priv->adjust_hs400_enable = true; priv->adjust_hs400_enable = true;
priv->adjust_hs400_offset = 3; priv->adjust_hs400_offset = 3;
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7); priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
@ -918,7 +918,7 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* M3W+ bad taps */ /* M3W+ bad taps */
if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 3)) (renesas_get_cpu_rev_integer() == 3))
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7); priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
/* M3N can use HS400 with manual adjustment */ /* M3N can use HS400 with manual adjustment */
@ -939,20 +939,20 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* H3 ES1.x, ES2.0 and M3W ES1.[0123] uses 4 tuning taps */ /* H3 ES1.x, ES2.0 and M3W ES1.[0123] uses 4 tuning taps */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 2)) || (renesas_get_cpu_rev_integer() <= 2)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) && (renesas_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() <= 3))) (renesas_get_cpu_rev_fraction() <= 3)))
priv->nrtaps = 4; priv->nrtaps = 4;
else else
priv->nrtaps = 8; priv->nrtaps = 8;
#endif #endif
/* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */ /* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 1)) || (renesas_get_cpu_rev_integer() <= 1)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) && (renesas_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 0))) (renesas_get_cpu_rev_fraction() == 0)))
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD; priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
else else
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2; priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;

4
drivers/pinctrl/renesas/pfc-r8a7790.c
View file

@ -6117,8 +6117,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
static int r8a7790_pinmux_soc_init(struct sh_pfc *pfc) static int r8a7790_pinmux_soc_init(struct sh_pfc *pfc)
{ {
/* Initialize TDSEL on old revisions */ /* Initialize TDSEL on old revisions */
if ((rmobile_get_cpu_rev_integer() == 1) && if ((renesas_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 0)) (renesas_get_cpu_rev_fraction() == 0))
sh_pfc_write(pfc, 0xe6060088, 0x00155554); sh_pfc_write(pfc, 0xe6060088, 0x00155554);
return 0; return 0;

4
drivers/pinctrl/renesas/pfc-r8a7794.c
View file

@ -5818,8 +5818,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
static int r8a7794_pinmux_soc_init(struct sh_pfc *pfc) static int r8a7794_pinmux_soc_init(struct sh_pfc *pfc)
{ {
/* Initialize TDSEL on old revisions */ /* Initialize TDSEL on old revisions */
if ((rmobile_get_cpu_rev_integer() == 1) && if ((renesas_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 0)) (renesas_get_cpu_rev_fraction() == 0))
sh_pfc_write(pfc, 0xe6060068, 0x55555500); sh_pfc_write(pfc, 0xe6060068, 0x55555500);
return 0; return 0;

2
drivers/spi/renesas_rpc_spi.c
View file

@ -212,7 +212,7 @@ static u32 rpc_spi_get_strobe_delay(void)
* 7: On other R-Car Gen3 * 7: On other R-Car Gen3
* 15: On R-Car Gen4 * 15: On R-Car Gen4
*/ */
if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && rmobile_get_cpu_rev_integer() == 1) if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && renesas_get_cpu_rev_integer() == 1)
return RPC_PHYCNT_STRTIM(6); return RPC_PHYCNT_STRTIM(6);
else if (cpu_type == RMOBILE_CPU_TYPE_R8A779F0 || else if (cpu_type == RMOBILE_CPU_TYPE_R8A779F0 ||
cpu_type == RMOBILE_CPU_TYPE_R8A779G0 || cpu_type == RMOBILE_CPU_TYPE_R8A779G0 ||