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dm: doc: Update device tree binding docs for new schema

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Now that Linux has accepted these tags, move U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2023-02-13 08:56:35 -07:00
parent e316fbabbf
commit c8ef3eed61
14 changed files with 30 additions and 30 deletions
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2
doc/device-tree-bindings/chosen.txt
View file

@ -129,7 +129,7 @@ Example
}; };
fs_loader0: fs-loader@0 { fs_loader0: fs-loader@0 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "u-boot,fs-loader"; compatible = "u-boot,fs-loader";
phandlepart = <&mmc 1>; phandlepart = <&mmc 1>;
}; };

2
doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt
View file

@ -54,7 +54,7 @@ Example (for DDR3-1600K and 800MHz)
#include <dt-bindings/memory/rk3368-dmc.h> #include <dt-bindings/memory/rk3368-dmc.h>
dmc: dmc@ff610000 { dmc: dmc@ff610000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "rockchip,rk3368-dmc"; compatible = "rockchip,rk3368-dmc";
reg = <0 0xff610000 0 0x400 reg = <0 0xff610000 0 0x400
0 0xff620000 0 0x400>; 0 0xff620000 0 0x400>;

2
doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt
View file

@ -16,7 +16,7 @@ Required properties:
Example: Example:
dmc: dmc { dmc: dmc {
u-boot,dm-pre-reloc; bootph-all;
compatible = "rockchip,rk3399-dmc"; compatible = "rockchip,rk3399-dmc";
devfreq-events = <&dfi>; devfreq-events = <&dfi>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;

22
doc/device-tree-bindings/clock/st,stm32mp1.txt
View file

@ -251,9 +251,9 @@ Example of clock tree initialization
/ { / {
clocks { clocks {
u-boot,dm-pre-reloc; bootph-all;
clk_hse: clk-hse { clk_hse: clk-hse {
u-boot,dm-pre-reloc; bootph-all;
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <24000000>; clock-frequency = <24000000>;
@ -261,28 +261,28 @@ Example of clock tree initialization
}; };
clk_hsi: clk-hsi { clk_hsi: clk-hsi {
u-boot,dm-pre-reloc; bootph-all;
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <64000000>; clock-frequency = <64000000>;
}; };
clk_lse: clk-lse { clk_lse: clk-lse {
u-boot,dm-pre-reloc; bootph-all;
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
clk_lsi: clk-lsi { clk_lsi: clk-lsi {
u-boot,dm-pre-reloc; bootph-all;
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <32000>; clock-frequency = <32000>;
}; };
clk_csi: clk-csi { clk_csi: clk-csi {
u-boot,dm-pre-reloc; bootph-all;
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <4000000>; clock-frequency = <4000000>;
@ -292,7 +292,7 @@ Example of clock tree initialization
soc { soc {
rcc: rcc@50000000 { rcc: rcc@50000000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "st,stm32mp1-rcc", "syscon"; compatible = "st,stm32mp1-rcc", "syscon";
reg = <0x50000000 0x1000>; reg = <0x50000000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
@ -371,7 +371,7 @@ Example of clock tree initialization
reg = <0>; reg = <0>;
cfg = < 2 80 0 0 0 PQR(1,0,0) >; cfg = < 2 80 0 0 0 PQR(1,0,0) >;
frac = < 0x800 >; frac = < 0x800 >;
u-boot,dm-pre-reloc; bootph-all;
}; };
/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU),
@ -381,7 +381,7 @@ Example of clock tree initialization
reg = <1>; reg = <1>;
cfg = < 2 65 1 0 0 PQR(1,1,1) >; cfg = < 2 65 1 0 0 PQR(1,1,1) >;
frac = < 0x1400 >; frac = < 0x1400 >;
u-boot,dm-pre-reloc; bootph-all;
}; };
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
@ -390,7 +390,7 @@ Example of clock tree initialization
reg = <2>; reg = <2>;
cfg = < 1 33 1 16 36 PQR(1,1,1) >; cfg = < 1 33 1 16 36 PQR(1,1,1) >;
frac = < 0x1a04 >; frac = < 0x1a04 >;
u-boot,dm-pre-reloc; bootph-all;
}; };
/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
@ -398,7 +398,7 @@ Example of clock tree initialization
compatible = "st,stm32mp1-pll"; compatible = "st,stm32mp1-pll";
reg = <3>; reg = <3>;
cfg = < 3 98 5 7 7 PQR(1,1,1) >; cfg = < 3 98 5 7 7 PQR(1,1,1) >;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

6
doc/device-tree-bindings/device.txt
View file

@ -54,7 +54,7 @@ pcie-a0@14,0 {
}; };
p2sb: p2sb@d,0 { p2sb: p2sb@d,0 {
u-boot,dm-pre-reloc; bootph-all;
reg = <0x02006810 0 0 0 0>; reg = <0x02006810 0 0 0 0>;
compatible = "intel,apl-p2sb"; compatible = "intel,apl-p2sb";
early-regs = <IOMAP_P2SB_BAR 0x100000>; early-regs = <IOMAP_P2SB_BAR 0x100000>;
@ -62,12 +62,12 @@ p2sb: p2sb@d,0 {
n { n {
compatible = "intel,apl-pinctrl"; compatible = "intel,apl-pinctrl";
u-boot,dm-pre-reloc; bootph-all;
intel,p2sb-port-id = <PID_GPIO_N>; intel,p2sb-port-id = <PID_GPIO_N>;
acpi,path = "\\_SB.GPO0"; acpi,path = "\\_SB.GPO0";
gpio_n: gpio-n { gpio_n: gpio-n {
compatible = "intel,gpio"; compatible = "intel,gpio";
u-boot,dm-pre-reloc; bootph-all;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
linux-name = "INT3452:00"; linux-name = "INT3452:00";

2
doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
View file

@ -474,7 +474,7 @@ Optional properties:
Example: Example:
&fsp_s { &fsp_s {
u-boot,dm-pre-proper; bootph-some-ram;
fsps,ish-enable = <0>; fsps,ish-enable = <0>;
fsps,enable-sata = <0>; fsps,enable-sata = <0>;

2
doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt
View file

@ -57,7 +57,7 @@ memorycontroller: memorycontroller@0298e000 {
ti,ddr-freq2 = <DDRSS_PLL_FREQUENCY_2>; ti,ddr-freq2 = <DDRSS_PLL_FREQUENCY_2>;
ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>; ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>;
u-boot,dm-spl; bootph-pre-ram;
ti,ctl-data = < ti,ctl-data = <
DDRSS_CTL_00_DATA DDRSS_CTL_00_DATA

2
doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt
View file

@ -42,5 +42,5 @@ Example (AM65x):
reg-names = "ss", "ctl", "phy"; reg-names = "ss", "ctl", "phy";
clocks = <&k3_clks 20 0>; clocks = <&k3_clks 20 0>;
power-domains = <&k3_pds 20>; power-domains = <&k3_pds 20>;
u-boot,dm-spl; bootph-pre-ram;
}; };

8
doc/device-tree-bindings/misc/fs_loader.txt
View file

@ -20,28 +20,28 @@ ubi in device tree source as shown in below:
sata and ubi as shown in below: sata and ubi as shown in below:
Example for mmc: Example for mmc:
fs_loader0: fs-loader@0 { fs_loader0: fs-loader@0 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "u-boot,fs-loader"; compatible = "u-boot,fs-loader";
phandlepart = <&mmc_0 1>; phandlepart = <&mmc_0 1>;
}; };
Example for usb: Example for usb:
fs_loader1: fs-loader@1 { fs_loader1: fs-loader@1 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "u-boot,fs-loader"; compatible = "u-boot,fs-loader";
phandlepart = <&usb0 1>; phandlepart = <&usb0 1>;
}; };
Example for sata: Example for sata:
fs_loader2: fs-loader@2 { fs_loader2: fs-loader@2 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "u-boot,fs-loader"; compatible = "u-boot,fs-loader";
phandlepart = <&sata0 1>; phandlepart = <&sata0 1>;
}; };
Example for ubi: Example for ubi:
fs_loader3: fs-loader@3 { fs_loader3: fs-loader@3 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "u-boot,fs-loader"; compatible = "u-boot,fs-loader";
mtdpart = "UBI", mtdpart = "UBI",
ubivol = "ubi0"; ubivol = "ubi0";

2
doc/device-tree-bindings/net/mdio-mux-reg.txt
View file

@ -16,7 +16,7 @@ Example structure, used on Freescale LS1028A QDS board:
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
fpga@66 { fpga@66 {
#address-cells = <1>; #address-cells = <1>;

4
doc/device-tree-bindings/pci/x86-pci.txt
View file

@ -31,7 +31,7 @@ pci {
compatible = "pci-x86"; compatible = "pci-x86";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
u-boot,dm-pre-reloc; bootph-all;
ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000 0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000
0x01000000 0x0 0x1000 0x1000 0 0xefff>; 0x01000000 0x0 0x1000 0x1000 0 0xefff>;
@ -41,7 +41,7 @@ pci {
serial: serial@18,2 { serial: serial@18,2 {
reg = <0x0200c210 0 0 0 0>; reg = <0x0200c210 0 0 0 0>;
u-boot,dm-pre-reloc; bootph-all;
compatible = "intel,apl-ns16550"; compatible = "intel,apl-ns16550";
early-regs = <0xde000000 0x20>; early-regs = <0xde000000 0x20>;
reg-shift = <2>; reg-shift = <2>;

2
doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt
View file

@ -20,7 +20,7 @@ Example:
pinctrl_0: pinctrl@c0010000 { pinctrl_0: pinctrl@c0010000 {
compatible = "nexell,s5pxx18-pinctrl"; compatible = "nexell,s5pxx18-pinctrl";
reg = <0xc0010000 0xf000>; reg = <0xc0010000 0xf000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
Nexell's pin configuration nodes act as a container for an arbitrary number of Nexell's pin configuration nodes act as a container for an arbitrary number of

2
doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt
View file

@ -249,7 +249,7 @@ memory@2000 {
compatible = "fsl,mpc83xx-mem-controller"; compatible = "fsl,mpc83xx-mem-controller";
reg = <0x2000 0x1000>; reg = <0x2000 0x1000>;
device_type = "memory"; device_type = "memory";
u-boot,dm-pre-reloc; bootph-all;
driver_software_override = <DSO_ENABLE>; driver_software_override = <DSO_ENABLE>;
p_impedance_override = <DSO_P_IMPEDANCE_NOMINAL>; p_impedance_override = <DSO_P_IMPEDANCE_NOMINAL>;

2
doc/device-tree-bindings/video/atmel-hlcdc.txt
View file

@ -15,7 +15,7 @@ Required properties:
Example: Example:
hlcdc: hlcdc@f0000000 { hlcdc: hlcdc@f0000000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "atmel,sama5d2-hlcdc"; compatible = "atmel,sama5d2-hlcdc";
reg = <0xf0000000 0x2000>; reg = <0xf0000000 0x2000>;
clocks = <&lcdc_clk>; clocks = <&lcdc_clk>;