net: dwc_eth_qos: remove use of DWC_NET_PHYADDR

Only two boards in the tree set the macro DWC_NET_PHYADDR. Both have
CONFIG_DM_ETH_PHY=y, so should set the phy address in DT if necessary.

The imx8mp_evk does set the correct address in device tree.

The other board seems to be a copy-paste-adapt from an old
version of the imx8mp_evk config header, given the "#ifdef
CONFIG_DWC_ETH_QOS" block that has been removed from imx8mp_evk header
in commit 127fb45495. Its device tree doesn't even enable (i.e., set
'status = "okay"') the &eqos node. But the other ethernet device,
&fec, does get enabled, and does have a phy sitting at address 4 (and
it also has a corresponding legacy #define CONFIG_FEC_MXC_PHYADDR
4). So I believe it should be completely safe to remove it from there
as well.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Re-apply to top of tree, update imx93_evk.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Rasmus Villemoes 2022-05-12 09:33:07 +02:00 committed by Tom Rini
parent 0c999ce98e
commit c62b74652a
4 changed files with 0 additions and 7 deletions

View file

@ -789,9 +789,6 @@ static int eqos_start(struct udevice *dev)
if (!eqos->phy) { if (!eqos->phy) {
int addr = -1; int addr = -1;
addr = eqos_get_phy_addr(eqos, dev); addr = eqos_get_phy_addr(eqos, dev);
#ifdef DWC_NET_PHYADDR
addr = DWC_NET_PHYADDR;
#endif
eqos->phy = phy_connect(eqos->mii, addr, dev, eqos->phy = phy_connect(eqos->mii, addr, dev,
eqos->config->interface(dev)); eqos->config->interface(dev));
if (!eqos->phy) { if (!eqos->phy) {

View file

@ -24,8 +24,6 @@
#if defined(CONFIG_CMD_NET) #if defined(CONFIG_CMD_NET)
#define CONFIG_FEC_MXC_PHYADDR 1 #define CONFIG_FEC_MXC_PHYADDR 1
#define DWC_NET_PHYADDR 1
#define PHY_ANEG_TIMEOUT 20000 #define PHY_ANEG_TIMEOUT 20000
#endif #endif

View file

@ -42,7 +42,6 @@
#if defined(CONFIG_CMD_NET) #if defined(CONFIG_CMD_NET)
#define CONFIG_FEC_MXC_PHYADDR 4 #define CONFIG_FEC_MXC_PHYADDR 4
#define DWC_NET_PHYADDR 4
#ifdef CONFIG_DWC_ETH_QOS #ifdef CONFIG_DWC_ETH_QOS
#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ #define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */
#endif #endif

View file

@ -138,7 +138,6 @@
#define WDOG_BASE_ADDR WDG3_BASE_ADDR #define WDOG_BASE_ADDR WDG3_BASE_ADDR
#if defined(CONFIG_CMD_NET) #if defined(CONFIG_CMD_NET)
#define DWC_NET_PHYADDR 1
#define PHY_ANEG_TIMEOUT 20000 #define PHY_ANEG_TIMEOUT 20000
#endif #endif