spmi: msm: fix version 5 support

Properly use ch_offset in msm_spmi_write() reg access.

Fixes: f5a2d6b4b0 ("spmi: msm: add arbiter version 5 support")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This commit is contained in:
Neil Armstrong 2024-04-05 10:21:53 +02:00 committed by Caleb Connolly
parent 969e3dd13e
commit c2de620d64
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@ -93,12 +93,16 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
channel = priv->channel_map[usid][pid]; channel = priv->channel_map[usid][pid];
if (priv->arb_ver == V5)
ch_offset = SPMI_V5_RW_CH_OFFSET(channel);
else
ch_offset = SPMI_CH_OFFSET(channel);
/* Disable IRQ mode for the current channel*/ /* Disable IRQ mode for the current channel*/
writel(0x0, writel(0x0, priv->spmi_chnls + ch_offset + SPMI_REG_CONFIG);
priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
/* Write single byte */ /* Write single byte */
writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); writel(val, priv->spmi_chnls + ch_offset + SPMI_REG_WDATA);
/* Prepare write command */ /* Prepare write command */
reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT; reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT;
@ -107,18 +111,13 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT); reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT);
reg |= 1; /* byte count */ reg |= 1; /* byte count */
if (priv->arb_ver == V5)
ch_offset = SPMI_V5_RW_CH_OFFSET(channel);
else
ch_offset = SPMI_CH_OFFSET(channel);
/* Send write command */ /* Send write command */
writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); writel(reg, priv->spmi_chnls + ch_offset + SPMI_REG_CMD0);
/* Wait till CMD DONE status */ /* Wait till CMD DONE status */
reg = 0; reg = 0;
while (!reg) { while (!reg) {
reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) + reg = readl(priv->spmi_chnls + ch_offset +
SPMI_REG_STATUS); SPMI_REG_STATUS);
} }