mirror of
https://github.com/u-boot/u-boot.git
synced 2025-04-15 17:34:43 +00:00
dtoc: Add support for 32 or 64-bit addresses
When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
parent
21d54ac353
commit
c20ee0ed07
13 changed files with 413 additions and 6 deletions
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@ -471,7 +471,7 @@ static int rk3368_clk_probe(struct udevice *dev)
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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struct rk3368_clk_plat *plat = dev_get_platdata(dev);
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priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
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priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
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#endif
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#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
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rkclk_init(priv->cru);
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@ -963,7 +963,7 @@ static int rk3399_clk_probe(struct udevice *dev)
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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struct rk3399_clk_plat *plat = dev_get_platdata(dev);
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priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
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priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
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#endif
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rkclk_init(priv->cru);
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#endif
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@ -1145,7 +1145,7 @@ static int rk3399_pmuclk_probe(struct udevice *dev)
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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struct rk3399_pmuclk_plat *plat = dev_get_platdata(dev);
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priv->pmucru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
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priv->pmucru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
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#endif
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#ifndef CONFIG_SPL_BUILD
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@ -40,7 +40,7 @@ static struct regmap *regmap_alloc_count(int count)
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}
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,
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int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
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struct regmap **mapp)
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{
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struct regmap_range *range;
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@ -27,10 +27,12 @@ typedef phys_size_t fdt_size_t;
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#define FDT_ADDR_T_NONE (-1ULL)
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#define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
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#define fdt_size_to_cpu(reg) be64_to_cpu(reg)
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typedef fdt64_t fdt_val_t;
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#else
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#define FDT_ADDR_T_NONE (-1U)
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#define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
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#define fdt_size_to_cpu(reg) be32_to_cpu(reg)
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typedef fdt32_t fdt_val_t;
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#endif
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/* Information obtained about memory from the FDT */
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@ -69,7 +69,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp);
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* @count: Number of pairs (e.g. 1 if the regmap has a single entry)
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* @mapp: Returns allocated map
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*/
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int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,
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int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
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struct regmap **mapp);
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/**
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@ -8,6 +8,8 @@
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#ifndef __SYSCON_H
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#define __SYSCON_H
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#include <fdtdec.h>
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/**
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* struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS
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*
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@ -28,9 +30,11 @@ struct syscon_ops {
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* We don't support 64-bit machines. If they are so resource-contrained that
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* they need to use OF_PLATDATA, something is horribly wrong with the
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* education of our hardware engineers.
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*
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* Update: 64-bit is now supported and we have an education crisis.
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*/
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struct syscon_base_platdata {
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u32 reg[2];
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fdt_val_t reg[2];
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};
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#endif
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@ -242,6 +242,66 @@ class DtbPlatdata(object):
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self._valid_nodes = []
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return self.scan_node(self._fdt.GetRoot())
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@staticmethod
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def get_num_cells(node):
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"""Get the number of cells in addresses and sizes for this node
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Args:
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node: Node to check
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Returns:
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Tuple:
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Number of address cells for this node
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Number of size cells for this node
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"""
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parent = node.parent
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na, ns = 2, 2
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if parent:
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na_prop = parent.props.get('#address-cells')
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ns_prop = parent.props.get('#size-cells')
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if na_prop:
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na = fdt_util.fdt32_to_cpu(na_prop.value)
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if ns_prop:
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ns = fdt_util.fdt32_to_cpu(ns_prop.value)
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return na, ns
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def scan_reg_sizes(self):
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"""Scan for 64-bit 'reg' properties and update the values
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This finds 'reg' properties with 64-bit data and converts the value to
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an array of 64-values. This allows it to be output in a way that the
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C code can read.
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"""
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for node in self._valid_nodes:
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reg = node.props.get('reg')
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if not reg:
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continue
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na, ns = self.get_num_cells(node)
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total = na + ns
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if reg.type != fdt.TYPE_INT:
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raise ValueError("Node '%s' reg property is not an int")
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if len(reg.value) % total:
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raise ValueError("Node '%s' reg property has %d cells "
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'which is not a multiple of na + ns = %d + %d)' %
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(node.name, len(reg.value), na, ns))
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reg.na = na
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reg.ns = ns
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if na != 1 or ns != 1:
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reg.type = fdt.TYPE_INT64
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i = 0
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new_value = []
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val = reg.value
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if not isinstance(val, list):
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val = [val]
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while i < len(val):
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addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.na)
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i += na
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size = fdt_util.fdt_cells_to_cpu(val[i:], reg.ns)
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i += ns
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new_value += [addr, size]
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reg.value = new_value
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def scan_structs(self):
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"""Scan the device tree building up the C structures we will use.
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@ -450,6 +510,7 @@ def run_steps(args, dtb_file, include_disabled, output):
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plat = DtbPlatdata(dtb_file, include_disabled)
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plat.scan_dtb()
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plat.scan_tree()
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plat.scan_reg_sizes()
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plat.setup_output(output)
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structs = plat.scan_structs()
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plat.scan_phandles()
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27
tools/dtoc/dtoc_test_addr32.dts
Normal file
27
tools/dtoc/dtoc_test_addr32.dts
Normal file
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@ -0,0 +1,27 @@
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/*
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* Test device tree file for dtoc
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*
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* Copyright 2017 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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test1 {
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u-boot,dm-pre-reloc;
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compatible = "test1";
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reg = <0x1234 0x5678>;
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};
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test2 {
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u-boot,dm-pre-reloc;
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compatible = "test2";
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reg = <0x12345678 0x98765432 2 3>;
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};
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};
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33
tools/dtoc/dtoc_test_addr32_64.dts
Normal file
33
tools/dtoc/dtoc_test_addr32_64.dts
Normal file
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@ -0,0 +1,33 @@
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/*
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* Test device tree file for dtoc
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*
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* Copyright 2017 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <2>;
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test1 {
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u-boot,dm-pre-reloc;
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compatible = "test1";
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reg = <0x1234 0x5678 0x0>;
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};
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test2 {
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u-boot,dm-pre-reloc;
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compatible = "test2";
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reg = <0x12345678 0x98765432 0x10987654>;
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};
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test3 {
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u-boot,dm-pre-reloc;
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compatible = "test3";
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reg = <0x12345678 0x98765432 0x10987654 2 0 3>;
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};
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};
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33
tools/dtoc/dtoc_test_addr64.dts
Normal file
33
tools/dtoc/dtoc_test_addr64.dts
Normal file
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@ -0,0 +1,33 @@
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/*
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* Test device tree file for dtoc
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*
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* Copyright 2017 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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test1 {
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u-boot,dm-pre-reloc;
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compatible = "test1";
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reg = /bits/ 64 <0x1234 0x5678>;
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};
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test2 {
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u-boot,dm-pre-reloc;
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compatible = "test2";
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reg = /bits/ 64 <0x1234567890123456 0x9876543210987654>;
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};
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test3 {
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u-boot,dm-pre-reloc;
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compatible = "test3";
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reg = /bits/ 64 <0x1234567890123456 0x9876543210987654 2 3>;
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};
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};
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33
tools/dtoc/dtoc_test_addr64_32.dts
Normal file
33
tools/dtoc/dtoc_test_addr64_32.dts
Normal file
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@ -0,0 +1,33 @@
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/*
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* Test device tree file for dtoc
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*
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* Copyright 2017 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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test1 {
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u-boot,dm-pre-reloc;
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compatible = "test1";
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reg = <0x1234 0x0 0x5678>;
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};
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test2 {
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u-boot,dm-pre-reloc;
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compatible = "test2";
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reg = <0x12345678 0x90123456 0x98765432>;
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};
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test3 {
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u-boot,dm-pre-reloc;
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compatible = "test3";
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reg = <0x12345678 0x90123456 0x98765432 0 2 3>;
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};
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};
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@ -38,6 +38,8 @@ def fdt_cells_to_cpu(val, cells):
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Return:
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A native-endian long value
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"""
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if not cells:
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return 0
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out = long(fdt32_to_cpu(val[0]))
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if cells == 2:
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out = out << 32 | fdt32_to_cpu(val[1])
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@ -270,4 +270,216 @@ U_BOOT_DEVICE(spl_test) = {
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\t.platdata_size\t= sizeof(dtv_spl_test),
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};
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''', data)
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def test_addresses64(self):
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"""Test output from a node with a 'reg' property with na=2, ns=2"""
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dtb_file = get_dtb_file('dtoc_test_addr64.dts')
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output = tools.GetOutputFilename('output')
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dtb_platdata.run_steps(['struct'], dtb_file, False, output)
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with open(output) as infile:
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data = infile.read()
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self.assertEqual('''#include <stdbool.h>
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#include <libfdt.h>
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struct dtd_test1 {
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\tfdt64_t\t\treg[2];
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};
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struct dtd_test2 {
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\tfdt64_t\t\treg[2];
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};
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struct dtd_test3 {
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\tfdt64_t\t\treg[4];
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};
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''', data)
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dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
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with open(output) as infile:
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data = infile.read()
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self.assertEqual('''#include <common.h>
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#include <dm.h>
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#include <dt-structs.h>
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static struct dtd_test1 dtv_test1 = {
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\t.reg\t\t\t= {0x1234, 0x5678},
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};
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U_BOOT_DEVICE(test1) = {
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\t.name\t\t= "test1",
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\t.platdata\t= &dtv_test1,
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\t.platdata_size\t= sizeof(dtv_test1),
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};
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static struct dtd_test2 dtv_test2 = {
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\t.reg\t\t\t= {0x1234567890123456, 0x9876543210987654},
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};
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U_BOOT_DEVICE(test2) = {
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\t.name\t\t= "test2",
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\t.platdata\t= &dtv_test2,
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\t.platdata_size\t= sizeof(dtv_test2),
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};
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static struct dtd_test3 dtv_test3 = {
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\t.reg\t\t\t= {0x1234567890123456, 0x9876543210987654, 0x2, 0x3},
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};
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U_BOOT_DEVICE(test3) = {
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\t.name\t\t= "test3",
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\t.platdata\t= &dtv_test3,
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\t.platdata_size\t= sizeof(dtv_test3),
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};
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''', data)
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def test_addresses32(self):
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"""Test output from a node with a 'reg' property with na=1, ns=1"""
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dtb_file = get_dtb_file('dtoc_test_addr32.dts')
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output = tools.GetOutputFilename('output')
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dtb_platdata.run_steps(['struct'], dtb_file, False, output)
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with open(output) as infile:
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data = infile.read()
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self.assertEqual('''#include <stdbool.h>
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#include <libfdt.h>
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struct dtd_test1 {
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\tfdt32_t\t\treg[2];
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};
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struct dtd_test2 {
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\tfdt32_t\t\treg[4];
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};
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''', data)
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dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
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with open(output) as infile:
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data = infile.read()
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self.assertEqual('''#include <common.h>
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#include <dm.h>
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#include <dt-structs.h>
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static struct dtd_test1 dtv_test1 = {
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\t.reg\t\t\t= {0x1234, 0x5678},
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};
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U_BOOT_DEVICE(test1) = {
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\t.name\t\t= "test1",
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\t.platdata\t= &dtv_test1,
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\t.platdata_size\t= sizeof(dtv_test1),
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};
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static struct dtd_test2 dtv_test2 = {
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\t.reg\t\t\t= {0x12345678, 0x98765432, 0x2, 0x3},
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};
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U_BOOT_DEVICE(test2) = {
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\t.name\t\t= "test2",
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\t.platdata\t= &dtv_test2,
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\t.platdata_size\t= sizeof(dtv_test2),
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};
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''', data)
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def test_addresses64_32(self):
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"""Test output from a node with a 'reg' property with na=2, ns=1"""
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dtb_file = get_dtb_file('dtoc_test_addr64_32.dts')
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output = tools.GetOutputFilename('output')
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dtb_platdata.run_steps(['struct'], dtb_file, False, output)
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with open(output) as infile:
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data = infile.read()
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self.assertEqual('''#include <stdbool.h>
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#include <libfdt.h>
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struct dtd_test1 {
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\tfdt64_t\t\treg[2];
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};
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struct dtd_test2 {
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\tfdt64_t\t\treg[2];
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};
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struct dtd_test3 {
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\tfdt64_t\t\treg[4];
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};
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''', data)
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dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
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with open(output) as infile:
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data = infile.read()
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self.assertEqual('''#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <dt-structs.h>
|
||||
|
||||
static struct dtd_test1 dtv_test1 = {
|
||||
\t.reg\t\t\t= {0x123400000000, 0x5678},
|
||||
};
|
||||
U_BOOT_DEVICE(test1) = {
|
||||
\t.name\t\t= "test1",
|
||||
\t.platdata\t= &dtv_test1,
|
||||
\t.platdata_size\t= sizeof(dtv_test1),
|
||||
};
|
||||
|
||||
static struct dtd_test2 dtv_test2 = {
|
||||
\t.reg\t\t\t= {0x1234567890123456, 0x98765432},
|
||||
};
|
||||
U_BOOT_DEVICE(test2) = {
|
||||
\t.name\t\t= "test2",
|
||||
\t.platdata\t= &dtv_test2,
|
||||
\t.platdata_size\t= sizeof(dtv_test2),
|
||||
};
|
||||
|
||||
static struct dtd_test3 dtv_test3 = {
|
||||
\t.reg\t\t\t= {0x1234567890123456, 0x98765432, 0x2, 0x3},
|
||||
};
|
||||
U_BOOT_DEVICE(test3) = {
|
||||
\t.name\t\t= "test3",
|
||||
\t.platdata\t= &dtv_test3,
|
||||
\t.platdata_size\t= sizeof(dtv_test3),
|
||||
};
|
||||
|
||||
''', data)
|
||||
|
||||
def test_addresses32_64(self):
|
||||
"""Test output from a node with a 'reg' property with na=1, ns=2"""
|
||||
dtb_file = get_dtb_file('dtoc_test_addr32_64.dts')
|
||||
output = tools.GetOutputFilename('output')
|
||||
dtb_platdata.run_steps(['struct'], dtb_file, False, output)
|
||||
with open(output) as infile:
|
||||
data = infile.read()
|
||||
self.assertEqual('''#include <stdbool.h>
|
||||
#include <libfdt.h>
|
||||
struct dtd_test1 {
|
||||
\tfdt64_t\t\treg[2];
|
||||
};
|
||||
struct dtd_test2 {
|
||||
\tfdt64_t\t\treg[2];
|
||||
};
|
||||
struct dtd_test3 {
|
||||
\tfdt64_t\t\treg[4];
|
||||
};
|
||||
''', data)
|
||||
|
||||
dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
|
||||
with open(output) as infile:
|
||||
data = infile.read()
|
||||
self.assertEqual('''#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <dt-structs.h>
|
||||
|
||||
static struct dtd_test1 dtv_test1 = {
|
||||
\t.reg\t\t\t= {0x1234, 0x567800000000},
|
||||
};
|
||||
U_BOOT_DEVICE(test1) = {
|
||||
\t.name\t\t= "test1",
|
||||
\t.platdata\t= &dtv_test1,
|
||||
\t.platdata_size\t= sizeof(dtv_test1),
|
||||
};
|
||||
|
||||
static struct dtd_test2 dtv_test2 = {
|
||||
\t.reg\t\t\t= {0x12345678, 0x9876543210987654},
|
||||
};
|
||||
U_BOOT_DEVICE(test2) = {
|
||||
\t.name\t\t= "test2",
|
||||
\t.platdata\t= &dtv_test2,
|
||||
\t.platdata_size\t= sizeof(dtv_test2),
|
||||
};
|
||||
|
||||
static struct dtd_test3 dtv_test3 = {
|
||||
\t.reg\t\t\t= {0x12345678, 0x9876543210987654, 0x2, 0x3},
|
||||
};
|
||||
U_BOOT_DEVICE(test3) = {
|
||||
\t.name\t\t= "test3",
|
||||
\t.platdata\t= &dtv_test3,
|
||||
\t.platdata_size\t= sizeof(dtv_test3),
|
||||
};
|
||||
|
||||
''', data)
|
||||
|
|
Loading…
Add table
Reference in a new issue