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https://github.com/u-boot/u-boot.git
synced 2025-05-08 19:11:53 +00:00
riscv: Add Zbb support for building U-Boot
This patch adds ISA string to the -march to generate zbb instructions for U-Boot binaries, along with optimized string functions introduced from Linux kernel. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit is contained in:
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03a4504659
commit
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7 changed files with 392 additions and 1 deletions
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@ -187,6 +187,97 @@ config RISCV_ISA_D
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riscv32 ABI from ilp32 to ilp32d and the riscv64 ABI from lp64 to
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lp64d.
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config RISCV_ISA_ZBB
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bool "Zbb extension support for bit manipulation instructions"
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help
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Adds ZBB extension (basic bit manipulation) to the ISA subsets
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that the toolchain is allowed to emit when building U-Boot.
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The Zbb extension provides instructions to accelerate a number
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of bit-specific operations (count bit population, sign extending,
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bitrotation, etc) and enables optimized string routines.
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menu "Use assembly optimized implementation of string routines"
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config USE_ARCH_STRLEN
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bool "Use an assembly optimized implementation of strlen"
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default y
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depends on RISCV_ISA_ZBB
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help
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Enable the generation of an optimized version of strlen using
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Zbb extension.
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config SPL_USE_ARCH_STRLEN
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bool "Use an assembly optimized implementation of strlen for SPL"
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default y if USE_ARCH_STRLEN
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depends on RISCV_ISA_ZBB
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depends on SPL
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help
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Enable the generation of an optimized version of strlen using
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Zbb extension.
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config TPL_USE_ARCH_STRLEN
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bool "Use an assembly optimized implementation of strlen for TPL"
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default y if USE_ARCH_STRLEN
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depends on RISCV_ISA_ZBB
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depends on TPL
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help
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Enable the generation of an optimized version of strlen using
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Zbb extension.
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config USE_ARCH_STRCMP
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bool "Use an assembly optimized implementation of strcmp"
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default y
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depends on RISCV_ISA_ZBB
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help
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Enable the generation of an optimized version of strcmp using
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Zbb extension.
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config SPL_USE_ARCH_STRCMP
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bool "Use an assembly optimized implementation of strcmp for SPL"
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default y if USE_ARCH_STRCMP
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depends on RISCV_ISA_ZBB
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depends on SPL
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help
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Enable the generation of an optimized version of strcmp using
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Zbb extension.
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config TPL_USE_ARCH_STRCMP
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bool "Use an assembly optimized implementation of strcmp for TPL"
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default y if USE_ARCH_STRCMP
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depends on RISCV_ISA_ZBB
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depends on TPL
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help
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Enable the generation of an optimized version of strcmp using
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Zbb extension.
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config USE_ARCH_STRNCMP
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bool "Use an assembly optimized implementation of strncmp"
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default y
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depends on RISCV_ISA_ZBB
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help
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Enable the generation of an optimized version of strncmp using
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Zbb extension.
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config SPL_USE_ARCH_STRNCMP
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bool "Use an assembly optimized implementation of strncmp for SPL"
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default y if USE_ARCH_STRNCMP
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depends on RISCV_ISA_ZBB
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depends on SPL
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help
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Enable the generation of an optimized version of strncmp using
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Zbb extension.
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config TPL_USE_ARCH_STRNCMP
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bool "Use an assembly optimized implementation of strncmp for TPL"
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default y if USE_ARCH_STRNCMP
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depends on RISCV_ISA_ZBB
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depends on TPL
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help
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Enable the generation of an optimized version of strncmp using
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Zbb extension.
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endmenu
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config RISCV_ISA_A
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def_bool y
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@ -24,6 +24,9 @@ endif
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ifeq ($(CONFIG_RISCV_ISA_C),y)
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ARCH_C = c
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endif
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ifeq ($(CONFIG_RISCV_ISA_ZBB),y)
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ARCH_ZBB = _zbb
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endif
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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CMODEL = medlow
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endif
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@ -32,7 +35,7 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
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endif
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RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)
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RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)$(ARCH_ZBB)
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ABI = $(ABI_BASE)$(ABI_D)
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# Newer binutils versions default to ISA spec version 20191213 which moves some
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@ -40,4 +40,22 @@ extern void *memmove(void *, const void *, __kernel_size_t);
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#endif
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extern void *memset(void *, int, __kernel_size_t);
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#undef __HAVE_ARCH_STRLEN
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#if CONFIG_IS_ENABLED(USE_ARCH_STRLEN)
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#define __HAVE_ARCH_STRLEN
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#endif
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extern __kernel_size_t strlen(const char *);
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#undef __HAVE_ARCH_STRCMP
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#if CONFIG_IS_ENABLED(USE_ARCH_STRCMP)
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#define __HAVE_ARCH_STRCMP
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#endif
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extern int strcmp(const char *, const char *);
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#undef __HAVE_ARCH_STRNCMP
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#if CONFIG_IS_ENABLED(USE_ARCH_STRNCMP)
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#define __HAVE_ARCH_STRNCMP
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#endif
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extern int strncmp(const char *, const char *, size_t __kernel_size_t);
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#endif /* __ASM_RISCV_STRING_H */
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@ -42,5 +42,8 @@ extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_STRLEN) += strlen_zbb.o
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_STRCMP) += strcmp_zbb.o
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_STRNCMP) += strncmp_zbb.o
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obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o
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81
arch/riscv/lib/strcmp_zbb.S
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81
arch/riscv/lib/strcmp_zbb.S
Normal file
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@ -0,0 +1,81 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Taken from Linux arch/riscv/lib/strcmp.S
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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ENTRY(__strcmp)
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WEAK(strcmp)
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.option push
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.option arch,+zbb
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/*
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* Returns
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* a0 - comparison result, value like strcmp
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*
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* Parameters
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* a0 - string1
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* a1 - string2
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*
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* Clobbers
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* t0, t1, t2, t3, t4
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*/
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or t2, a0, a1
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li t4, -1
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and t2, t2, SZREG-1
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bnez t2, 3f
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/* Main loop for aligned string. */
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.p2align 3
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1:
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REG_L t0, 0(a0)
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REG_L t1, 0(a1)
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orc.b t3, t0
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bne t3, t4, 2f
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addi a0, a0, SZREG
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addi a1, a1, SZREG
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beq t0, t1, 1b
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/*
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* Words don't match, and no null byte in the first
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* word. Get bytes in big-endian order and compare.
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*/
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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rev8 t0, t0
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rev8 t1, t1
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#endif
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/* Synthesize (t0 >= t1) ? 1 : -1 in a branchless sequence. */
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sltu a0, t0, t1
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neg a0, a0
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ori a0, a0, 1
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ret
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2:
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/*
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* Found a null byte.
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* If words don't match, fall back to simple loop.
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*/
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bne t0, t1, 3f
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/* Otherwise, strings are equal. */
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li a0, 0
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ret
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/* Simple loop for misaligned strings. */
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.p2align 3
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3:
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lbu t0, 0(a0)
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lbu t1, 0(a1)
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addi a0, a0, 1
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addi a1, a1, 1
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bne t0, t1, 4f
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bnez t0, 3b
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4:
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sub a0, t0, t1
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ret
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.option pop
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END(__strcmp)
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101
arch/riscv/lib/strlen_zbb.S
Normal file
101
arch/riscv/lib/strlen_zbb.S
Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Taken from Linux arch/riscv/lib/strlen.S
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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# define CZ ctz
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# define SHIFT srl
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#else
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# define CZ clz
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# define SHIFT sll
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#endif
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ENTRY(__strlen)
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WEAK(strlen)
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.option push
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.option arch,+zbb
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/*
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* Returns
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* a0 - string length
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*
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* Parameters
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* a0 - String to measure
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*
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* Clobbers
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* t0, t1, t2, t3
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*/
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/* Number of irrelevant bytes in the first word. */
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andi t2, a0, SZREG-1
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/* Align pointer. */
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andi t0, a0, -SZREG
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li t3, SZREG
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sub t3, t3, t2
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slli t2, t2, 3
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/* Get the first word. */
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REG_L t1, 0(t0)
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/*
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* Shift away the partial data we loaded to remove the irrelevant bytes
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* preceding the string with the effect of adding NUL bytes at the
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* end of the string's first word.
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*/
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SHIFT t1, t1, t2
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/* Convert non-NUL into 0xff and NUL into 0x00. */
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orc.b t1, t1
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/* Convert non-NUL into 0x00 and NUL into 0xff. */
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not t1, t1
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/*
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* Search for the first set bit (corresponding to a NUL byte in the
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* original chunk).
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*/
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CZ t1, t1
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/*
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* The first chunk is special: compare against the number
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* of valid bytes in this chunk.
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*/
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srli a0, t1, 3
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bgtu t3, a0, 2f
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/* Prepare for the word comparison loop. */
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addi t2, t0, SZREG
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li t3, -1
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/*
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* Our critical loop is 4 instructions and processes data in
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* 4 byte or 8 byte chunks.
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*/
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.p2align 3
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1:
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REG_L t1, SZREG(t0)
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addi t0, t0, SZREG
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orc.b t1, t1
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beq t1, t3, 1b
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not t1, t1
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CZ t1, t1
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srli t1, t1, 3
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/* Get number of processed bytes. */
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sub t2, t0, t2
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/* Add number of characters in the first word. */
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add a0, a0, t2
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/* Add number of characters in the last word. */
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add a0, a0, t1
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2:
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ret
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.option pop
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END(__strlen)
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94
arch/riscv/lib/strncmp_zbb.S
Normal file
94
arch/riscv/lib/strncmp_zbb.S
Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Taken from Linux arch/riscv/lib/strncmp.S
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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ENTRY(__strncmp)
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WEAK(strncmp)
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.option push
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.option arch,+zbb
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/*
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* Returns
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* a0 - comparison result, like strncmp
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*
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* Parameters
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* a0 - string1
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* a1 - string2
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* a2 - number of characters to compare
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*
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* Clobbers
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* t0, t1, t2, t3, t4, t5, t6
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*/
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or t2, a0, a1
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li t5, -1
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and t2, t2, SZREG-1
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add t4, a0, a2
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bnez t2, 3f
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/* Adjust limit for fast-path. */
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andi t6, t4, -SZREG
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/* Main loop for aligned string. */
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.p2align 3
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1:
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bge a0, t6, 3f
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REG_L t0, 0(a0)
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REG_L t1, 0(a1)
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orc.b t3, t0
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bne t3, t5, 2f
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orc.b t3, t1
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bne t3, t5, 2f
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addi a0, a0, SZREG
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addi a1, a1, SZREG
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beq t0, t1, 1b
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/*
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* Words don't match, and no null byte in the first
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* word. Get bytes in big-endian order and compare.
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*/
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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rev8 t0, t0
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rev8 t1, t1
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#endif
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/* Synthesize (t0 >= t1) ? 1 : -1 in a branchless sequence. */
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sltu a0, t0, t1
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neg a0, a0
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ori a0, a0, 1
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ret
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2:
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/*
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* Found a null byte.
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* If words don't match, fall back to simple loop.
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*/
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bne t0, t1, 3f
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/* Otherwise, strings are equal. */
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li a0, 0
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ret
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/* Simple loop for misaligned strings. */
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.p2align 3
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3:
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bge a0, t4, 5f
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lbu t0, 0(a0)
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lbu t1, 0(a1)
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addi a0, a0, 1
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addi a1, a1, 1
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bne t0, t1, 4f
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bnez t0, 3b
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4:
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sub a0, t0, t1
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ret
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5:
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li a0, 0
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ret
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.option pop
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END(__strncmp)
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