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board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled

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As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.

Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().

Also call dram_init_banksize() after every call to
fixup_ddr_driver_for_ecc() is made so that gd->bd is populated
correctly.

Ensure that fixup_ddr_driver_for_ecc() is agnostic to the number of DDR
controllers present.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
This commit is contained in:
Santhosh Kumar K 2025-01-06 14:37:08 +05:30 • committed by Tom Rini
parent 01fa91bd5b
commit bc07851897
15 changed files with 200 additions and 232 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/mach-k3/Makefile
View file

@ -6,7 +6,7 @@
obj-$(CONFIG_ARM64) += arm64/
obj-$(CONFIG_CPU_V7R) += r5/
obj-$(CONFIG_OF_LIBFDT) += common_fdt.o
obj-y += common.o security.o
obj-y += common.o security.o k3-ddr.o
obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
obj-$(CONFIG_SOC_K3_AM625) += am62x/

15
arch/arm/mach-k3/include/mach/k3-ddr.h Normal file
View file

@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/
*/
#ifndef _K3_DDR_H_
#define _K3_DDR_H_
int dram_init(void);
int dram_init_banksize(void);
void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image);
void fixup_memory_node(struct spl_image_info *spl_image);
#endif /* _K3_DDR_H_ */

72
arch/arm/mach-k3/k3-ddr.c Normal file
View file

@ -0,0 +1,72 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/
*/
#include <fdt_support.h>
#include <dm/uclass.h>
#include <k3-ddrss.h>
#include <spl.h>
#include <asm/arch/k3-ddr.h>
__weak int dram_init(void)
{
return 0;
}
__weak int dram_init_banksize(void)
{
return 0;
}
#if defined(CONFIG_SPL_BUILD)
void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
{
struct udevice *dev;
int ret, ctr = 1;
dram_init_banksize();
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
panic("Cannnot get RAM device for ddr size fixup: %d\n", ret);
ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
if (ret)
printf("Error fixing up ddr node for ECC use! %d\n", ret);
ret = uclass_next_device_err(&dev);
while (ret && ret != -ENODEV) {
ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
if (ret)
printf("Error fixing up ddr node %d for ECC use! %d\n", ctr, ret);
ret = uclass_next_device_err(&dev);
ctr++;
}
}
void fixup_memory_node(struct spl_image_info *spl_image)
{
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
int bank;
int ret;
dram_init();
dram_init_banksize();
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
start[bank] = gd->bd->bi_dram[bank].start;
size[bank] = gd->bd->bi_dram[bank].size;
}
ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size,
CONFIG_NR_DRAM_BANKS);
if (ret)
printf("Error fixing up memory node! %d\n", ret);
}
#endif

17
board/ti/am62ax/evm.c
View file

@ -12,6 +12,7 @@
#include <env.h>
#include <fdt_support.h>
#include <spl.h>
#include <asm/arch/k3-ddr.h>
#include "../common/fdt_ops.h"
@ -20,15 +21,17 @@ int board_init(void)
return 0;
}
int dram_init(void)
#if defined(CONFIG_XPL_BUILD)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
if (IS_ENABLED(CONFIG_K3_DDRSS)) {
if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
fixup_ddr_driver_for_ecc(spl_image);
} else {
fixup_memory_node(spl_image);
}
}
#endif
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)

17
board/ti/am62px/evm.c
View file

@ -13,6 +13,7 @@
#include <env.h>
#include <fdt_support.h>
#include <spl.h>
#include <asm/arch/k3-ddr.h>
#include "../common/fdt_ops.h"
struct efi_fw_image fw_images[] = {
@ -53,15 +54,17 @@ int board_init(void)
return 0;
}
int dram_init(void)
#if defined(CONFIG_XPL_BUILD)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
if (IS_ENABLED(CONFIG_K3_DDRSS)) {
if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
fixup_ddr_driver_for_ecc(spl_image);
} else {
fixup_memory_node(spl_image);
}
}
#endif
#if IS_ENABLED(CONFIG_BOARD_LATE_INIT)
int board_late_init(void)

63
board/ti/am62x/evm.c
View file

@ -20,6 +20,7 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <dm/uclass.h>
#include <asm/arch/k3-ddr.h>
#include "../common/fdt_ops.h"
@ -86,11 +87,6 @@ int board_init(void)
return 0;
}
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
}
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
@ -99,13 +95,7 @@ int board_late_init(void)
}
#endif
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
#if defined(CONFIG_XPL_BUILD)
void spl_board_init(void)
{
enable_caches();
@ -114,53 +104,14 @@ void spl_board_init(void)
}
#if defined(CONFIG_K3_AM64_DDRSS)
static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
{
struct udevice *dev;
int ret;
dram_init_banksize();
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
if (ret)
printf("Error fixing up ddr node for ECC use! %d\n", ret);
}
#else
static void fixup_memory_node(struct spl_image_info *spl_image)
{
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
int bank;
int ret;
dram_init();
dram_init_banksize();
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
start[bank] = gd->bd->bi_dram[bank].start;
size[bank] = gd->bd->bi_dram[bank].size;
}
/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size,
CONFIG_NR_DRAM_BANKS);
if (ret)
printf("Error fixing up memory node! %d\n", ret);
}
#endif
void spl_perform_fixups(struct spl_image_info *spl_image)
{
#if defined(CONFIG_K3_AM64_DDRSS)
fixup_ddr_driver_for_ecc(spl_image);
#else
fixup_memory_node(spl_image);
#endif
if (IS_ENABLED(CONFIG_K3_DDRSS)) {
if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
fixup_ddr_driver_for_ecc(spl_image);
} else {
fixup_memory_node(spl_image);
}
}
#endif

73
board/ti/am64x/evm.c
View file

@ -15,6 +15,7 @@
#include <fdt_support.h>
#include <asm/arch/hardware.h>
#include <env.h>
#include <asm/arch/k3-ddr.h>
#include "../common/board_detect.h"
#include "../common/fdt_ops.h"
@ -66,28 +67,6 @@ int board_init(void)
return 0;
}
int dram_init(void)
{
s32 ret;
ret = fdtdec_setup_mem_size_base();
if (ret)
printf("Error setting up mem size and base. %d\n", ret);
return ret;
}
int dram_init_banksize(void)
{
s32 ret;
ret = fdtdec_setup_memory_banksize();
if (ret)
printf("Error setting up memory banksize. %d\n", ret);
return ret;
}
#if defined(CONFIG_SPL_LOAD_FIT)
int board_fit_config_name_match(const char *name)
{
@ -132,52 +111,14 @@ static int fixup_usb_boot(const void *fdt_blob)
}
#endif
#if defined(CONFIG_K3_AM64_DDRSS)
static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
{
struct udevice *dev;
int ret;
dram_init_banksize();
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
if (ret)
printf("Error fixing up ddr node for ECC use! %d\n", ret);
}
#else
static void fixup_memory_node(struct spl_image_info *spl_image)
{
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
int bank;
int ret;
dram_init();
dram_init_banksize();
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
start[bank] = gd->bd->bi_dram[bank].start;
size[bank] = gd->bd->bi_dram[bank].size;
}
/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS);
if (ret)
printf("Error fixing up memory node! %d\n", ret);
}
#endif
void spl_perform_fixups(struct spl_image_info *spl_image)
{
#if defined(CONFIG_K3_AM64_DDRSS)
fixup_ddr_driver_for_ecc(spl_image);
#else
fixup_memory_node(spl_image);
#endif
if (IS_ENABLED(CONFIG_K3_DDRSS)) {
if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
fixup_ddr_driver_for_ecc(spl_image);
} else {
fixup_memory_node(spl_image);
}
#if CONFIG_IS_ENABLED(USB_STORAGE)
fixup_usb_boot(spl_image->fdt_addr);

29
board/ti/am65x/evm.c
View file

@ -20,6 +20,7 @@
#include <env.h>
#include <spl.h>
#include <linux/printk.h>
#include <asm/arch/k3-ddr.h>
#include "../common/board_detect.h"
#include "../common/fdt_ops.h"
@ -49,17 +50,6 @@ int board_init(void)
return 0;
}
int dram_init(void)
{
#ifdef CONFIG_PHYS_64BIT
gd->ram_size = 0x100000000;
#else
gd->ram_size = 0x80000000;
#endif
return 0;
}
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
{
#ifdef CONFIG_PHYS_64BIT
@ -71,23 +61,6 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
return gd->ram_top;
}
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
return 0;
}
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{

1
board/ti/common/Makefile
View file

@ -4,3 +4,4 @@
obj-${CONFIG_TI_I2C_BOARD_DETECT} += board_detect.o
obj-${CONFIG_CMD_EXTENSION} += cape_detect.o
obj-${CONFIG_OF_LIBFDT} += fdt_ops.o
obj-${CONFIG_ARCH_K3} += k3-ddr.o

33
board/ti/common/k3-ddr.c Normal file
View file

@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/
*/
#include <fdt_support.h>
#include <dm/uclass.h>
#include <k3-ddrss.h>
#include <spl.h>
#include "k3-ddr.h"
int dram_init(void)
{
s32 ret;
ret = fdtdec_setup_mem_size_base_lowest();
if (ret)
printf("Error setting up mem size and base. %d\n", ret);
return ret;
}
int dram_init_banksize(void)
{
s32 ret;
ret = fdtdec_setup_memory_banksize();
if (ret)
printf("Error setting up memory banksize. %d\n", ret);
return ret;
}

12
board/ti/common/k3-ddr.h Normal file
View file

@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/
*/
#ifndef __K3_DDR_INIT_H
#define __K3_DDR_INIT_H
int dram_init(void);
int dram_init_banksize(void);
#endif /* __K3_DDR_INIT_H */

29
board/ti/j721e/evm.c
View file

@ -15,6 +15,7 @@
#include <asm/gpio.h>
#include <spl.h>
#include <dm.h>
#include <asm/arch/k3-ddr.h>
#include "../common/board_detect.h"
#include "../common/fdt_ops.h"
@ -77,17 +78,6 @@ int board_init(void)
return 0;
}
int dram_init(void)
{
#ifdef CONFIG_PHYS_64BIT
gd->ram_size = 0x100000000;
#else
gd->ram_size = 0x80000000;
#endif
return 0;
}
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
{
#ifdef CONFIG_PHYS_64BIT
@ -99,23 +89,6 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
return gd->ram_top;
}
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
return 0;
}
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{

35
board/ti/j721s2/evm.c
View file

@ -21,6 +21,7 @@
#include <dm.h>
#include <dm/uclass-internal.h>
#include <dm/root.h>
#include <asm/arch/k3-ddr.h>
#include "../common/board_detect.h"
#include "../common/fdt_ops.h"
@ -32,17 +33,6 @@ int board_init(void)
return 0;
}
int dram_init(void)
{
#ifdef CONFIG_PHYS_64BIT
gd->ram_size = 0x100000000;
#else
gd->ram_size = 0x80000000;
#endif
return 0;
}
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
{
#ifdef CONFIG_PHYS_64BIT
@ -54,22 +44,17 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
return gd->ram_top;
}
int dram_init_banksize(void)
#if defined(CONFIG_XPL_BUILD)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x7fffffff;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x37fffffff;
gd->ram_size = 0x400000000;
#endif
return 0;
if (IS_ENABLED(CONFIG_K3_DDRSS)) {
if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
fixup_ddr_driver_for_ecc(spl_image);
} else {
fixup_memory_node(spl_image);
}
}
#endif
#ifdef CONFIG_TI_I2C_BOARD_DETECT
/*

17
board/ti/j722s/evm.c
View file

@ -12,6 +12,7 @@
#include <env.h>
#include <fdt_support.h>
#include <spl.h>
#include <asm/arch/k3-ddr.h>
#include "../common/fdt_ops.h"
int board_init(void)
@ -19,15 +20,17 @@ int board_init(void)
return 0;
}
int dram_init(void)
#if defined(CONFIG_XPL_BUILD)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
if (IS_ENABLED(CONFIG_K3_DDRSS)) {
if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
fixup_ddr_driver_for_ecc(spl_image);
} else {
fixup_memory_node(spl_image);
}
}
#endif
#if IS_ENABLED(CONFIG_BOARD_LATE_INIT)
int board_late_init(void)

17
board/ti/j784s4/evm.c
View file

@ -10,6 +10,7 @@
#include <efi_loader.h>
#include <init.h>
#include <spl.h>
#include <asm/arch/k3-ddr.h>
#include "../common/fdt_ops.h"
DECLARE_GLOBAL_DATA_PTR;
@ -52,15 +53,17 @@ int board_init(void)
return 0;
}
int dram_init(void)
#if defined(CONFIG_XPL_BUILD)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
if (IS_ENABLED(CONFIG_K3_DDRSS)) {
if (IS_ENABLED(CONFIG_K3_INLINE_ECC))
fixup_ddr_driver_for_ecc(spl_image);
} else {
fixup_memory_node(spl_image);
}
}
#endif
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)