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Code cleanup
This commit is contained in:
Wolfgang Denk
parent
87a5c73d66
commit
b9365a26a1
14 changed files with 130 additions and 132 deletions
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@ -2,7 +2,7 @@
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* linux/include/linux/mtd/nand.h
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*
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* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
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* Steven J. Hill <sjhill@realitydiluted.com>
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* Steven J. Hill <sjhill@realitydiluted.com>
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* Thomas Gleixner <tglx@linutronix.de>
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*
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* $Id: nand.h,v 1.68 2004/11/12 10:40:37 gleixner Exp $
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@ -15,15 +15,15 @@
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* Contains standard defines and IDs for NAND flash devices
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*
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* Changelog:
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* 01-31-2000 DMW Created
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* 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
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* 01-31-2000 DMW Created
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* 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
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* so it can be used by other NAND flash device
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* drivers. I also changed the copyright since none
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* of the original contents of this file are specific
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* to DoC devices. David can whack me with a baseball
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* bat later if I did something naughty.
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* 10-11-2000 SJH Added private NAND flash structure for driver
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* 10-24-2000 SJH Added prototype for 'nand_scan' function
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* 10-11-2000 SJH Added private NAND flash structure for driver
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* 10-24-2000 SJH Added prototype for 'nand_scan' function
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* 10-29-2001 TG changed nand_chip structure to support
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* hardwarespecific function for accessing control lines
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* 02-21-2002 TG added support for different read/write adress and
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@ -36,7 +36,7 @@
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* CONFIG_MTD_NAND_ECC_JFFS2 is not set
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* 08-10-2002 TG extensions to nand_chip structure to support HW-ECC
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*
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* 08-29-2002 tglx nand_chip structure: data_poi for selecting
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* 08-29-2002 tglx nand_chip structure: data_poi for selecting
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* internal / fs-driver buffer
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* support for 6byte/512byte hardware ECC
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* read_ecc, write_ecc extended for different oob-layout
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@ -45,8 +45,8 @@
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* 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL
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* Split manufacturer and device ID structures
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*
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* 02-08-2004 tglx added option field to nand structure for chip anomalities
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* 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
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* 02-08-2004 tglx added option field to nand structure for chip anomalities
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* 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
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* update of nand_chip structure description
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*/
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#ifndef __LINUX_MTD_NAND_H
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@ -75,7 +75,7 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
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* Constants for hardware specific CLE/ALE/NCE function
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*/
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/* Select the chip by setting nCE to low */
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#define NAND_CTL_SETNCE 1
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#define NAND_CTL_SETNCE 1
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/* Deselect the chip by setting nCE to high */
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#define NAND_CTL_CLRNCE 2
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/* Select the command latch by setting CLE to high */
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@ -215,7 +215,7 @@ struct nand_chip;
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#if 0
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/**
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* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
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* @lock: protection lock
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* @lock: protection lock
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* @active: the mtd device which holds the controller currently
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*/
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struct nand_hw_control {
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@ -244,20 +244,20 @@ struct nand_hw_control {
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* is read from the chip status register
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* @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
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* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
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* @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
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* @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
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* @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
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* @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
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* be provided if a hardware ECC is available
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* @erase_cmd: [INTERN] erase command write function, selectable due to AND support
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* @scan_bbt: [REPLACEABLE] function to scan bad block table
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* @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
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* @eccsize: [INTERN] databytes used per ecc-calculation
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* @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
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* @eccsize: [INTERN] databytes used per ecc-calculation
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* @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
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* @eccsteps: [INTERN] number of ecc calculation steps per page
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* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
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* @chip_lock: [INTERN] spinlock used to protect access to this structure and the chip
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* @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
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* @state: [INTERN] the current state of the NAND device
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* @state: [INTERN] the current state of the NAND device
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* @page_shift: [INTERN] number of address bits in a page (column address bits)
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* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
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* @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
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@ -284,7 +284,7 @@ struct nand_hw_control {
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struct nand_chip {
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void __iomem *IO_ADDR_R;
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void __iomem *IO_ADDR_W;
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void __iomem *IO_ADDR_W;
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u_char (*read_byte)(struct mtd_info *mtd);
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void (*write_byte)(struct mtd_info *mtd, u_char byte);
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@ -297,12 +297,12 @@ struct nand_chip {
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void (*select_chip)(struct mtd_info *mtd, int chip);
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int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
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int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
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void (*hwcontrol)(struct mtd_info *mtd, int cmd);
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int (*dev_ready)(struct mtd_info *mtd);
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void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
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int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
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void (*hwcontrol)(struct mtd_info *mtd, int cmd);
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int (*dev_ready)(struct mtd_info *mtd);
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void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
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int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
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int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
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int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
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int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
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void (*enable_hwecc)(struct mtd_info *mtd, int mode);
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void (*erase_cmd)(struct mtd_info *mtd, int page);
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int (*scan_bbt)(struct mtd_info *mtd);
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@ -310,17 +310,17 @@ struct nand_chip {
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int eccsize;
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int eccbytes;
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int eccsteps;
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int chip_delay;
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int chip_delay;
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#if 0
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spinlock_t chip_lock;
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wait_queue_head_t wq;
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nand_state_t state;
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nand_state_t state;
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#endif
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int page_shift;
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int page_shift;
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int phys_erase_shift;
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int bbt_erase_shift;
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int chip_shift;
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u_char *data_buf;
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u_char *data_buf;
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u_char *oob_buf;
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int oobdirty;
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u_char *data_poi;
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@ -335,7 +335,7 @@ struct nand_chip {
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struct nand_bbt_descr *bbt_td;
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struct nand_bbt_descr *bbt_md;
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struct nand_bbt_descr *badblock_pattern;
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struct nand_hw_control *controller;
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struct nand_hw_control *controller;
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void *priv;
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};
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@ -352,14 +352,14 @@ struct nand_chip {
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/**
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* struct nand_flash_dev - NAND Flash Device ID Structure
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*
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* @name: Identify the device type
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* @id: device ID code
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* @pagesize: Pagesize in bytes. Either 256 or 512 or 0
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* @name: Identify the device type
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* @id: device ID code
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* @pagesize: Pagesize in bytes. Either 256 or 512 or 0
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* If the pagesize is 0, then the real pagesize
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* and the eraseize are determined from the
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* extended id bytes in the chip
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* @erasesize: Size of an erase block in the flash device.
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* @chipsize: Total chipsize in Mega Bytes
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* @erasesize: Size of an erase block in the flash device.
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* @chipsize: Total chipsize in Mega Bytes
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* @options: Bitfield to store chip relevant options
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*/
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struct nand_flash_dev {
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@ -374,7 +374,7 @@ struct nand_flash_dev {
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/**
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* struct nand_manufacturers - NAND Flash Manufacturer ID Structure
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* @name: Manufacturer name
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* @id: manufacturer ID code of device.
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* @id: manufacturer ID code of device.
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*/
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struct nand_manufacturers {
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int id;
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@ -398,7 +398,7 @@ extern struct nand_manufacturers nand_manuf_ids[];
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* blocks is reserved at the end of the device where the tables are
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* written.
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* @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
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* bad) block in the stored bbt
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* bad) block in the stored bbt
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* @pattern: pattern to identify bad block table or factory marked good /
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* bad blocks, can be NULL, if len = 0
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*
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@ -412,11 +412,11 @@ struct nand_bbt_descr {
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int pages[NAND_MAX_CHIPS];
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int offs;
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int veroffs;
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uint8_t version[NAND_MAX_CHIPS];
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uint8_t version[NAND_MAX_CHIPS];
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int len;
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int maxblocks;
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int maxblocks;
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int reserved_block_code;
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uint8_t *pattern;
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uint8_t *pattern;
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};
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/* Options for the bad block table descriptors */
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@ -428,7 +428,7 @@ struct nand_bbt_descr {
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#define NAND_BBT_4BIT 0x00000004
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#define NAND_BBT_8BIT 0x00000008
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/* The bad block table is in the last good block of the device */
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#define NAND_BBT_LASTBLOCK 0x00000010
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#define NAND_BBT_LASTBLOCK 0x00000010
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/* The bbt is at the given page, else we must scan for the bbt */
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#define NAND_BBT_ABSPAGE 0x00000020
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/* The bbt is at the given page, else we must scan for the bbt */
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@ -451,7 +451,7 @@ struct nand_bbt_descr {
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#define NAND_BBT_SCAN2NDPAGE 0x00004000
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/* The maximum number of blocks to scan for a bbt */
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#define NAND_BBT_SCAN_MAXBLOCKS 4
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#define NAND_BBT_SCAN_MAXBLOCKS 4
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extern int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd);
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extern int nand_update_bbt (struct mtd_info *mtd, loff_t offs);
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