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global: Migrate CONFIG_PL01x_PORTS to CFG

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Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-12-04 10:13:31 -05:00
parent f410d0ac8a
commit b861574bd9
7 changed files with 7 additions and 7 deletions
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2
README
View file

@ -418,7 +418,7 @@ The following options need to be configured:
If you have Amba PrimeCell PL011 UARTs, set this variable to If you have Amba PrimeCell PL011 UARTs, set this variable to
the clock speed of the UARTs. the clock speed of the UARTs.
CONFIG_PL01x_PORTS CFG_PL01x_PORTS
If you have Amba PrimeCell PL010 or PL011 UARTs on your board, If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
define this to a list of base addresses for each (supported) define this to a list of base addresses for each (supported)

2
drivers/serial/serial_pl01x.c
View file

@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_DM_SERIAL #ifndef CONFIG_DM_SERIAL
static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; static volatile unsigned char *const port[] = CFG_PL01x_PORTS;
static enum pl01x_type pl01x_type __section(".data"); static enum pl01x_type pl01x_type __section(".data");
static struct pl01x_regs *base_regs __section(".data"); static struct pl01x_regs *base_regs __section(".data");
#define NUM_PORTS (sizeof(port)/sizeof(port[0])) #define NUM_PORTS (sizeof(port)/sizeof(port[0]))

2
include/configs/lx2160a_common.h
View file

@ -45,7 +45,7 @@
#define CFG_SYS_SERIAL2 0x21e0000 #define CFG_SYS_SERIAL2 0x21e0000
#define CFG_SYS_SERIAL3 0x21f0000 #define CFG_SYS_SERIAL3 0x21f0000
/*below might needs to be removed*/ /*below might needs to be removed*/
#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ #define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
(void *)CFG_SYS_SERIAL1, \ (void *)CFG_SYS_SERIAL1, \
(void *)CFG_SYS_SERIAL2, \ (void *)CFG_SYS_SERIAL2, \
(void *)CFG_SYS_SERIAL3 } (void *)CFG_SYS_SERIAL3 }

2
include/configs/mxs.h
View file

@ -78,7 +78,7 @@
* Conflicts with AUART driver which can be set by board. * Conflicts with AUART driver which can be set by board.
*/ */
#define CFG_PL011_CLOCK 24000000 #define CFG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } #define CFG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
/* Default baudrate can be overridden by board! */ /* Default baudrate can be overridden by board! */
/* NAND */ /* NAND */

2
include/configs/s5p4418_nanopi2.h
View file

@ -77,7 +77,7 @@
* serial console configuration * serial console configuration
*/ */
#define CFG_PL011_CLOCK 50000000 #define CFG_PL011_CLOCK 50000000
#define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ #define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \
(void *)PHY_BASEADDR_UART1, \ (void *)PHY_BASEADDR_UART1, \
(void *)PHY_BASEADDR_UART2, \ (void *)PHY_BASEADDR_UART2, \
(void *)PHY_BASEADDR_UART3} (void *)PHY_BASEADDR_UART3}

2
include/configs/synquacer.h
View file

@ -32,7 +32,7 @@
/* Serial (pl011) */ /* Serial (pl011) */
#define UART_CLK (62500000) #define UART_CLK (62500000)
#define CFG_PL011_CLOCK UART_CLK #define CFG_PL011_CLOCK UART_CLK
#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)} #define CFG_PL01x_PORTS {(void *)(0x2a400000)}
/* Support MTD */ /* Support MTD */
#define CFG_SYS_FLASH_BASE (0x08000000) #define CFG_SYS_FLASH_BASE (0x08000000)

2
include/configs/vexpress_common.h
View file

@ -117,7 +117,7 @@
/* PL011 Serial Configuration */ /* PL011 Serial Configuration */
#define CFG_PL011_CLOCK 24000000 #define CFG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ #define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
(void *)CFG_SYS_SERIAL1} (void *)CFG_SYS_SERIAL1}
#define CFG_SYS_SERIAL0 V2M_UART0 #define CFG_SYS_SERIAL0 V2M_UART0