mirror of
https://github.com/u-boot/u-boot.git
synced 2025-05-08 10:39:08 +00:00
nand: Try to align the default buffers
The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
parent
057df193b4
commit
b572595ee9
2 changed files with 6 additions and 4 deletions
|
@ -391,9 +391,10 @@ struct nand_ecc_ctrl {
|
|||
* consecutive order.
|
||||
*/
|
||||
struct nand_buffers {
|
||||
uint8_t ecccalc[NAND_MAX_OOBSIZE];
|
||||
uint8_t ecccode[NAND_MAX_OOBSIZE];
|
||||
uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
|
||||
uint8_t ecccalc[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];
|
||||
uint8_t ecccode[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];
|
||||
uint8_t databuf[ALIGN(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE,
|
||||
ARCH_DMA_MINALIGN)];
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue