fpga: Remove all CONFIG_SYS_* fpga related options

All these macros are completely unused by any code.
CONFIG_FPGA is not a bitfield anymore.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
This commit is contained in:
Michal Simek 2013-05-01 18:05:56 +02:00
parent 6631db4773
commit b03b25caea
10 changed files with 6 additions and 60 deletions

View file

@ -27,30 +27,6 @@
#ifndef _XILINX_H_
#define _XILINX_H_
/* Xilinx Model definitions
*********************************************************************/
#define CONFIG_SYS_SPARTAN2 CONFIG_SYS_FPGA_DEV( 0x1 )
#define CONFIG_SYS_VIRTEX_E CONFIG_SYS_FPGA_DEV( 0x2 )
#define CONFIG_SYS_VIRTEX2 CONFIG_SYS_FPGA_DEV( 0x4 )
#define CONFIG_SYS_SPARTAN3 CONFIG_SYS_FPGA_DEV( 0x8 )
#define CONFIG_SYS_ZYNQ CONFIG_SYS_FPGA_DEV(0x10)
#define CONFIG_SYS_XILINX_SPARTAN2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN2)
#define CONFIG_SYS_XILINX_VIRTEX_E (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX_E)
#define CONFIG_SYS_XILINX_VIRTEX2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX2)
#define CONFIG_SYS_XILINX_SPARTAN3 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN3)
#define CONFIG_SYS_XILINX_ZYNQ (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_ZYNQ)
/* XXX - Add new models here */
/* Xilinx Interface definitions
*********************************************************************/
#define CONFIG_SYS_XILINX_IF_SS CONFIG_SYS_FPGA_IF( 0x1 ) /* slave serial */
#define CONFIG_SYS_XILINX_IF_MS CONFIG_SYS_FPGA_IF( 0x2 ) /* master serial */
#define CONFIG_SYS_XILINX_IF_SP CONFIG_SYS_FPGA_IF( 0x4 ) /* slave parallel */
#define CONFIG_SYS_XILINX_IF_JTAG CONFIG_SYS_FPGA_IF( 0x8 ) /* jtag */
#define CONFIG_SYS_XILINX_IF_MSM CONFIG_SYS_FPGA_IF( 0x10 ) /* master selectmap */
#define CONFIG_SYS_XILINX_IF_SSM CONFIG_SYS_FPGA_IF( 0x20 ) /* slave selectmap */
/* Xilinx types
*********************************************************************/
typedef enum { /* typedef Xilinx_iface */