Djam/u-boot
1
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2025-04-24 22:36:05 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

ARC: Cache: Disable IOC by default

Browse source 
We'd like to keep IOC HW at the same state as t is right after reset when we
start Linux kernel so there will be no re-configuration of IOC on the go.

The point is U-Boot doesn't benefit a lot from IOC as it doesn't do a
lot of DMA operations especially on multiple cores simultaneously.

At the same time re-configuration of IOC in run-time might become quite
a tricky experience because we need to make sure there're no DMA
trannsactions in flight otherwise unexpected consequencses might affect
us much later and debugging those kinds of issues will be a real
nightmare.

That said let's make our life easier a little bit.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
Eugeniy Paltsev 2018-01-16 19:20:28 +03:00 • committed by Alexey Brodkin
parent 41cada4d24
commit b0146f9e29
1 changed files with 4 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
arch/arc/lib/cache.c
View file

@ -48,6 +48,9 @@ bool slc_exists __section(".data") = false;
bool ioc_exists __section(".data") = false; bool ioc_exists __section(".data") = false;
bool pae_exists __section(".data") = false; bool pae_exists __section(".data") = false;
/* To force enable IOC set ioc_enable to 'true' */
bool ioc_enable __section(".data") = false;
void read_decode_mmu_bcr(void) void read_decode_mmu_bcr(void)
{ {
/* TODO: should we compare mmu version from BCR and from CONFIG? */ /* TODO: should we compare mmu version from BCR and from CONFIG? */
@ -200,7 +203,7 @@ static void read_decode_cache_bcr_arcv2(void)
} cbcr; } cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER); cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
if (cbcr.fields.c) if (cbcr.fields.c && ioc_enable)
ioc_exists = true; ioc_exists = true;
} }
#endif #endif