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driver/ddr/fsl: Add workaround for A009663
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0 before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE] to the desired value after DDR initialization has completed. When DDR controller is configured to operate in auto-precharge mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -129,6 +129,7 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t;
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#define SDRAM_CFG2_ODT_ONLY_READ 2
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#define SDRAM_CFG2_ODT_ALWAYS 3
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#define SDRAM_INTERVAL_BSTOPRE 0x3FFF
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#define TIMING_CFG_2_CPO_MASK 0x0F800000
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#if defined(CONFIG_SYS_FSL_DDR_VER) && \
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