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reset: stm32: adapt driver for stm32mp1

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- move to livetree and allow to get address to parent
- add stm32mp1 compatible for probe

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Patrick Delaunay 2018-03-12 10:46:14 +01:00 • committed by Tom Rini
parent 8aeba629cc
commit a7519b3324
2 changed files with 31 additions and 7 deletions
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2
drivers/reset/Kconfig
View file

@ -30,7 +30,7 @@ config STI_RESET
config STM32_RESET config STM32_RESET
bool "Enable the STM32 reset" bool "Enable the STM32 reset"
depends on STM32 depends on STM32 || ARCH_STM32MP
help help
Support for reset controllers on STMicroelectronics STM32 family SoCs. Support for reset controllers on STMicroelectronics STM32 family SoCs.
This resset driver is compatible with STM32 F4/F7 and H7 SoCs. This resset driver is compatible with STM32 F4/F7 and H7 SoCs.

28
drivers/reset/stm32-reset.c
View file

@ -11,7 +11,13 @@
#include <reset-uclass.h> #include <reset-uclass.h>
#include <asm/io.h> #include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR; /* reset clear offset for STM32MP RCC */
#define RCC_CL 0x4
enum rcc_type {
RCC_STM32 = 0,
RCC_STM32MP,
};
struct stm32_reset_priv { struct stm32_reset_priv {
fdt_addr_t base; fdt_addr_t base;
@ -35,6 +41,10 @@ static int stm32_reset_assert(struct reset_ctl *reset_ctl)
debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__, debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
reset_ctl->id, bank, offset); reset_ctl->id, bank, offset);
if (dev_get_driver_data(reset_ctl->dev) == RCC_STM32MP)
/* reset assert is done in rcc set register */
writel(BIT(offset), priv->base + bank);
else
setbits_le32(priv->base + bank, BIT(offset)); setbits_le32(priv->base + bank, BIT(offset));
return 0; return 0;
@ -48,6 +58,10 @@ static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__, debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
reset_ctl->id, bank, offset); reset_ctl->id, bank, offset);
if (dev_get_driver_data(reset_ctl->dev) == RCC_STM32MP)
/* reset deassert is done in rcc clr register */
writel(BIT(offset), priv->base + bank + RCC_CL);
else
clrbits_le32(priv->base + bank, BIT(offset)); clrbits_le32(priv->base + bank, BIT(offset));
return 0; return 0;
@ -64,16 +78,26 @@ static int stm32_reset_probe(struct udevice *dev)
{ {
struct stm32_reset_priv *priv = dev_get_priv(dev); struct stm32_reset_priv *priv = dev_get_priv(dev);
priv->base = devfdt_get_addr(dev); priv->base = dev_read_addr(dev);
if (priv->base == FDT_ADDR_T_NONE) {
/* for MFD, get address of parent */
priv->base = dev_read_addr(dev->parent);
if (priv->base == FDT_ADDR_T_NONE) if (priv->base == FDT_ADDR_T_NONE)
return -EINVAL; return -EINVAL;
}
return 0; return 0;
} }
static const struct udevice_id stm32_reset_ids[] = {
{ .compatible = "st,stm32mp1-rcc-rst", .data = RCC_STM32MP },
{ }
};
U_BOOT_DRIVER(stm32_rcc_reset) = { U_BOOT_DRIVER(stm32_rcc_reset) = {
.name = "stm32_rcc_reset", .name = "stm32_rcc_reset",
.id = UCLASS_RESET, .id = UCLASS_RESET,
.of_match = stm32_reset_ids,
.probe = stm32_reset_probe, .probe = stm32_reset_probe,
.priv_auto_alloc_size = sizeof(struct stm32_reset_priv), .priv_auto_alloc_size = sizeof(struct stm32_reset_priv),
.ops = &stm32_reset_ops, .ops = &stm32_reset_ops,