Merge remote-tracking branch 'mpc83xx/next'

Makefile

@@ -486,8 +486,12 @@ $(obj)u-boot.sha1:	$(obj)u-boot.bin
 $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 
+
+
 $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
+		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(or $(CONFIG_SPL_PAD_TO),0) \
+			-O binary $(obj)spl/u-boot-spl \
+			$(obj)spl/u-boot-spl-pad.bin
 		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
 		rm $(obj)spl/u-boot-spl-pad.bin
 

README

@@ -2819,6 +2819,12 @@ FIT uImage format:
 		CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME
 		Filename to read to load U-Boot when reading from FAT
 
+		CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
+		Set this for NAND SPL on PPC mpc83xx targets, so that
+		start.S waits for the rest of the SPL to load before
+		continuing (the hardware starts execution after just
+		loading the first page rather than the full 4K).
+
 		CONFIG_SPL_NAND_BASE
 		Include nand_base.c in the SPL.  Requires
 		CONFIG_SPL_NAND_DRIVERS.
@@ -2876,6 +2882,10 @@ FIT uImage format:
 		CONFIG_SPL_LIBGENERIC_SUPPORT
 		Support for lib/libgeneric.o in SPL binary
 
+		CONFIG_SPL_PAD_TO
+		Linker address to which the SPL should be padded before
+		appending the SPL payload.
+
 		CONFIG_SPL_TARGET
 		Final target image containing SPL and payload.  Some SPLs
 		use an arch-specific makefile fragment instead, for

arch/powerpc/cpu/mpc83xx/Makefile

@@ -27,8 +27,22 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).o
 
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
 START	= start.o
 
+ifdef MINIMAL
+
+COBJS-y	+= spl_minimal.o
+
+else
+
 COBJS-y += traps.o
 COBJS-y += cpu.o
 COBJS-y += cpu_init.o
@@ -51,6 +65,8 @@ COBJS-y += spd_sdram.o
 endif
 COBJS-$(CONFIG_FSL_DDR2) += law.o
 
+endif # not minimal
+
 COBJS	:= $(COBJS-y)
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))

arch/powerpc/cpu/mpc83xx/start.S

@@ -58,7 +58,13 @@
 #define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI)
 #endif
 
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_NAND_SPL) || \
+	(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL))
+#define MINIMAL_SPL
+#endif
+
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NAND_SPL) && \
+	!defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_SYS_FLASHBOOT
 #endif
 
@@ -72,7 +78,7 @@
 	GOT_ENTRY(__bss_start)
 	GOT_ENTRY(__bss_end__)
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 	GOT_ENTRY(_FIXUP_TABLE_)
 	GOT_ENTRY(_start)
 	GOT_ENTRY(_start_of_vectors)
@@ -206,7 +212,8 @@ _start: /* time t 0 */
 	/* Initialise the E300 processor core		*/
 	/*------------------------------------------*/
 
-#ifdef CONFIG_NAND_SPL
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MPC83XX_WAIT_FOR_NAND)) || \
+		defined(CONFIG_NAND_SPL)
 	/* The FCM begins execution after only the first page
 	 * is loaded.  Wait for the rest before branching
 	 * to another flash page.
@@ -292,7 +299,7 @@ in_flash:
 
 	/* NOTREACHED - board_init_f() does not return */
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 /*
  * Vector Table
  */
@@ -467,7 +474,7 @@ int_return:
 	lwz	r1,GPR1(r1)
 	SYNC
 	rfi
-#endif /* !CONFIG_NAND_SPL */
+#endif /* !MINIMAL_SPL */
 
 /*
  * This code initialises the E300 processor core
@@ -724,7 +731,7 @@ setup_bats:
  * Note: requires that all cache bits in
  * HID0 are in the low half word.
  */
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 	.globl	icache_enable
 icache_enable:
 	mfspr	r3, HID0
@@ -753,7 +760,7 @@ icache_status:
 	mfspr	r3, HID0
 	rlwinm	r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
 	blr
-#endif	/* !CONFIG_NAND_SPL */
+#endif	/* !MINIMAL_SPL */
 
 	.globl	dcache_enable
 dcache_enable:
@@ -936,7 +943,7 @@ in_ram:
 	stw	r0,0(r3)
 2:	bdnz	1b
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 	/*
 	 * Now adjust the fixups and the pointers to the fixups
 	 * in case we need to move ourselves again.
@@ -991,7 +998,7 @@ clear_bss:
 	mr	r4, r10		/* Destination Address		*/
 	bl	board_init_r
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 	/*
 	 * Copy exception vector code to low memory
 	 *
@@ -1061,7 +1068,7 @@ trap_init:
 	mtlr	r4			/* restore link register    */
 	blr
 
-#endif /* !CONFIG_NAND_SPL */
+#endif /* !MINIMAL_SPL */
 
 #ifdef CONFIG_SYS_INIT_RAM_LOCK
 lock_ram_in_cache:
@@ -1085,7 +1092,7 @@ lock_ram_in_cache:
 	sync
 	blr
 
-#ifndef CONFIG_NAND_SPL
+#ifndef MINIMAL_SPL
 .globl unlock_ram_in_cache
 unlock_ram_in_cache:
 	/* invalidate the INIT_RAM section */
@@ -1111,7 +1118,7 @@ unlock_ram_in_cache:
 	sync
 	mtspr	HID0, r3		/* no invalidate, unlock */
 	blr
-#endif /* !CONFIG_NAND_SPL */
+#endif /* !MINIMAL_SPL */
 #endif /* CONFIG_SYS_INIT_RAM_LOCK */
 
 #ifdef CONFIG_SYS_FLASHBOOT

arch/powerpc/lib/Makefile

@@ -47,7 +47,8 @@ endif
 endif
 
 ifdef MINIMAL
-COBJS-y += cache.o
+COBJS-y += cache.o time.o
+SOBJS-y += ticks.o
 else
 
 SOBJS-y	+= ppcstring.o

board/ait/cam_enc_4xx/config.mk

@@ -8,7 +8,7 @@
 #
 
 #Provide at least 16MB spacing between us and the Linux Kernel image
-PAD_TO	:= 12320
+CONFIG_SPL_PAD_TO := 12320
 UBL_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/ublimage.cfg
 ifndef CONFIG_SPL_BUILD
 ALL-y += $(obj)u-boot.ubl

board/freescale/mpc8313erdb/mpc8313erdb.c

@@ -31,7 +31,7 @@
 #include <vsc7385.h>
 #include <ns16550.h>
 #include <nand.h>
-#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
 #include <asm/gpio.h>
 #endif
 
@@ -45,7 +45,7 @@ int board_early_init_f(void)
 	if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
 		gd->flags |= GD_FLG_SILENT;
 #endif
-#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
 	mpc83xx_gpio_init_f();
 #endif
 
@@ -54,7 +54,7 @@ int board_early_init_f(void)
 
 int board_early_init_r(void)
 {
-#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
 	mpc83xx_gpio_init_r();
 #endif
 
@@ -67,7 +67,7 @@ int checkboard(void)
 	return 0;
 }
 
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
 static struct pci_region pci_regions[] = {
 	{
 		.bus_start = CONFIG_SYS_PCI1_MEM_BASE,
@@ -140,7 +140,7 @@ void ft_board_setup(void *blob, bd_t *bd)
 #endif
 }
 #endif
-#else /* CONFIG_NAND_SPL */
+#else /* CONFIG_SPL_BUILD */
 void board_init_f(ulong bootflag)
 {
 	board_early_init_f();

boards.cfg

@@ -661,8 +661,8 @@ vme8349                      powerpc     mpc83xx     vme8349             esd
 MPC8308RDB                   powerpc     mpc83xx     mpc8308rdb          freescale
 MPC8313ERDB_33               powerpc     mpc83xx     mpc8313erdb         freescale      -           MPC8313ERDB:SYS_33MHZ
 MPC8313ERDB_66               powerpc     mpc83xx     mpc8313erdb         freescale      -           MPC8313ERDB:SYS_66MHZ
-MPC8313ERDB_NAND_33          powerpc     mpc83xx     mpc8313erdb         freescale      -           MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT
+MPC8313ERDB_NAND_33          powerpc     mpc83xx     mpc8313erdb         freescale      -           MPC8313ERDB:SYS_33MHZ,NAND
-MPC8313ERDB_NAND_66          powerpc     mpc83xx     mpc8313erdb         freescale      -           MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT
+MPC8313ERDB_NAND_66          powerpc     mpc83xx     mpc8313erdb         freescale      -           MPC8313ERDB:SYS_66MHZ,NAND
 MPC8315ERDB                  powerpc     mpc83xx     mpc8315erdb         freescale      -           MPC8315ERDB
 MPC8315ERDB_NAND             powerpc     mpc83xx     mpc8315erdb         freescale      -           MPC8315ERDB:NAND_U_BOOT
 MPC8323ERDB                  powerpc     mpc83xx     mpc8323erdb         freescale

include/configs/MPC8313ERDB.h

@@ -35,6 +35,25 @@
 #define CONFIG_MPC8313		1
 #define CONFIG_MPC8313ERDB	1
 
+#ifdef CONFIG_NAND
+#define CONFIG_SPL
+#define CONFIG_SPL_INIT_MINIMAL
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_NS16550_MIN_FUNCTIONS
+#endif
+
+#define CONFIG_SYS_TEXT_BASE	0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
+#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
+#define CONFIG_SPL_MAX_SIZE	(4 * 1024)
+#define CONFIG_SPL_PAD_TO	0xfff04000
+
 #define CONFIG_SYS_NAND_U_BOOT_SIZE  (512 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST   0x00100000
 #define CONFIG_SYS_NAND_U_BOOT_START 0x00100100
@@ -42,13 +61,11 @@
 #define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
 
-#ifdef CONFIG_NAND_U_BOOT
+#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_TEXT_BASE	0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
-#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
-#ifdef CONFIG_NAND_SPL
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
-#endif /* CONFIG_NAND_SPL */
+#endif
-#endif /* CONFIG_NAND_U_BOOT */
+
+#endif /* CONFIG_NAND */
 
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE	0xFE000000
@@ -87,7 +104,7 @@
 
 #define CONFIG_SYS_IMMR		0xE0000000
 
-#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
 #define CONFIG_DEFAULT_IMMR	CONFIG_SYS_IMMR
 #endif
 
@@ -227,7 +244,7 @@
 #define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (ms) */
 
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && \
-	!defined(CONFIG_NAND_SPL)
+	!defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_RAMBOOT
 #endif
 
@@ -256,7 +273,7 @@
 #define CONFIG_SYS_LBC_MRTPR	0x20000000  /*TODO */
 
 /* drivers/mtd/nand/nand.c */
-#ifdef CONFIG_NAND_SPL
+#if defined(CONFIG_NAND) && defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_NAND_BASE		0xFFF00000
 #else
 #define CONFIG_SYS_NAND_BASE		0xE2800000
@@ -292,7 +309,7 @@
 				| OR_FCM_EHTR)
 				/* 0xFFFF8396 */
 
-#ifdef CONFIG_NAND_U_BOOT
+#ifdef CONFIG_NAND
 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM
 #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM
 #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NOR_BR_PRELIM
@@ -449,7 +466,7 @@
 /*
  * Environment
  */
-#if defined(CONFIG_NAND_U_BOOT)
+#if defined(CONFIG_NAND)
 	#define CONFIG_ENV_IS_IN_NAND	1
 	#define CONFIG_ENV_OFFSET		(512 * 1024)
 	#define CONFIG_ENV_SECT_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
@@ -496,7 +513,7 @@
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_PCI
 
-#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND_U_BOOT)
+#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND)
     #undef CONFIG_CMD_SAVEENV
     #undef CONFIG_CMD_LOADS
 #endif
@@ -570,7 +587,7 @@
 	HRCWH_TSEC2M_IN_RGMII |\
 	HRCWH_BIG_ENDIAN)
 
-#ifdef CONFIG_NAND_SPL
+#ifdef CONFIG_NAND
 #define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\
 		       HRCWH_FROM_0XFFF00100 |\
 		       HRCWH_ROM_LOC_NAND_SP_8BIT |\

nand_spl/board/freescale/mpc8313erdb/Makefile

@@ -1,108 +0,0 @@
-#
-# (C) Copyright 2007
-# Stefan Roese, DENX Software Engineering, sr@denx.de.
-# (C) Copyright 2008 Freescale Semiconductor
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-NAND_SPL := y
-PAD_TO := 0xfff04000
-
-include $(TOPDIR)/config.mk
-
-nandobj	:= $(OBJTREE)/nand_spl/
-
-LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
-	   $(LDFLAGS) $(LDFLAGS_FINAL)
-AFLAGS	+= -DCONFIG_NAND_SPL
-CFLAGS	+= -DCONFIG_NAND_SPL
-
-SOBJS	= start.o ticks.o
-COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
-	  time.o cache.o
-
-SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(nandobj)board/$(BOARDDIR)
-
-ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-all:	$(obj).depend $(ALL)
-
-$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-
-$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-		-Map $(nandobj)u-boot-spl.map \
-		-o $(nandobj)u-boot-spl
-
-$(nandobj)u-boot.lds: $(LDSCRIPT)
-	$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
-
-# create symbolic links for common files
-
-$(obj)start.S:
-	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/start.S $(obj)start.S
-
-$(obj)nand_boot_fsl_elbc.c:
-	ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
-	       $(obj)nand_boot_fsl_elbc.c
-
-$(obj)sdram.c:
-	ln -sf $(SRCTREE)/board/$(BOARDDIR)/sdram.c $(obj)sdram.c
-
-$(obj)$(BOARD).c:
-	ln -sf $(SRCTREE)/board/$(BOARDDIR)/$(BOARD).c $(obj)$(BOARD).c
-
-$(obj)ns16550.c:
-	ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
-
-$(obj)nand_init.c:
-	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
-
-$(obj)cache.c:
-	ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c
-
-$(obj)time.c:
-	ln -sf $(SRCTREE)/arch/powerpc/lib/time.c $(obj)time.c
-
-$(obj)ticks.S:
-	ln -sf $(SRCTREE)/arch/powerpc/lib/ticks.S $(obj)ticks.S
-
-#########################################################################
-
-$(obj)%.o:	$(obj)%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(obj)%.c
-	$(CC) $(CFLAGS) -c -o $@ $<
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################

nand_spl/board/freescale/mpc8315erdb/Makefile

@@ -36,7 +36,7 @@ AFLAGS	+= -DCONFIG_NAND_SPL
 CFLAGS	+= -DCONFIG_NAND_SPL
 
 SOBJS	= start.o ticks.o
-COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
+COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \
 	  time.o cache.o
 
 SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -80,8 +80,8 @@ $(obj)$(BOARD).c:
 $(obj)ns16550.c:
 	ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
 
-$(obj)nand_init.c:
+$(obj)spl_minimal.c:
-	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
+	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)cache.c:
 	ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c

nand_spl/board/sheldon/simpc8313/Makefile

@@ -36,7 +36,7 @@ AFLAGS	+= -DCONFIG_NAND_SPL
 CFLAGS	+= -DCONFIG_NAND_SPL
 
 SOBJS	= start.o ticks.o
-COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
+COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \
 	  time.o cache.o
 
 SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -84,9 +84,9 @@ $(obj)ns16550.c:
 	@rm -f $@
 	ln -s $(SRCTREE)/drivers/serial/ns16550.c $@
 
-$(obj)nand_init.c:
+$(obj)spl_minimal.c:
 	@rm -f $@
-	ln -s $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $@
+	ln -s $(SRCTREE)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $@
 
 $(obj)cache.c:
 	@rm -f $@