mirror of
https://github.com/u-boot/u-boot.git
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ARM: stm32: Switch DHSOM to FMC2 EBI driver
Perform long overdue conversion of ad-hoc FMC2 EBI bus initialization to upstream FMC2 EBI driver. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This commit is contained in:
parent
29e03c98cf
commit
9cccc358c4
6 changed files with 2 additions and 90 deletions
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@ -5,14 +5,6 @@
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#include "stm32mp15xx-dhcom-u-boot.dtsi"
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#include "stm32mp15xx-dhcom-u-boot.dtsi"
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/ {
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aliases {
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/delete-property/ ethernet1;
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};
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};
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/delete-node/ &ks8851;
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&usbotg_hs {
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&usbotg_hs {
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dr_mode = "peripheral";
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dr_mode = "peripheral";
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};
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};
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@ -9,8 +9,6 @@
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#include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
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#include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
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#include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
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#include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
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/delete-node/ &ksz8851;
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/ {
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/ {
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aliases {
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aliases {
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i2c1 = &i2c2;
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i2c1 = &i2c2;
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@ -21,7 +19,6 @@
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spi0 = &qspi;
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spi0 = &qspi;
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usb0 = &usbotg_hs;
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usb0 = &usbotg_hs;
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eeprom0 = &eeprom0;
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eeprom0 = &eeprom0;
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ethernet1 = &ks8851;
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};
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};
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config {
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config {
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@ -30,12 +27,6 @@
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dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
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dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
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dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
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dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
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};
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};
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/* This is actually on FMC2, but we do not have bus driver for that */
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ks8851: ks8851mll@64000000 {
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compatible = "micrel,ks8851-mll";
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reg = <0x64000000 0x20000>;
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};
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};
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};
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ðernet0 {
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ðernet0 {
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@ -74,11 +65,6 @@
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};
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};
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&pinctrl {
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&pinctrl {
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/* These should bound to FMC2 bus driver, but we do not have one */
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pinctrl-0 = <&fmc_pins_b &mco2_pins_a>;
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pinctrl-1 = <&fmc_sleep_pins_b &mco2_sleep_pins_a>;
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pinctrl-names = "default", "sleep";
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mco2_pins_a: mco2-0 {
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mco2_pins_a: mco2-0 {
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pins {
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pins {
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pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
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pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
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@ -5,25 +5,16 @@
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#include "stm32mp15xx-dhcor-u-boot.dtsi"
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#include "stm32mp15xx-dhcor-u-boot.dtsi"
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/delete-node/ &ksz8851;
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/ {
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/ {
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aliases {
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aliases {
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mmc0 = &sdmmc1;
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mmc0 = &sdmmc1;
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mmc1 = &sdmmc2;
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mmc1 = &sdmmc2;
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usb0 = &usbotg_hs;
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usb0 = &usbotg_hs;
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ethernet1 = &ks8851;
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};
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};
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config {
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config {
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dh,board-coding-gpios = <&gpioh 9 0>, <&gpioh 8 0>, <&gpioh 3 0>;
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dh,board-coding-gpios = <&gpioh 9 0>, <&gpioh 8 0>, <&gpioh 3 0>;
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};
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};
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/* This is actually on FMC2, but we do not have bus driver for that */
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ks8851: ks8851mll@64000000 {
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compatible = "micrel,ks8851-mll";
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reg = <0x64000000 0x20000>;
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};
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};
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};
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ðernet0 {
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ðernet0 {
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@ -38,13 +29,6 @@
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};
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};
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};
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};
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&pinctrl {
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/* These should bound to FMC2 bus driver, but we do not have one */
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pinctrl-0 = <&fmc_pins_b>;
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pinctrl-1 = <&fmc_sleep_pins_b>;
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pinctrl-names = "default", "sleep";
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};
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&sdmmc1 {
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&sdmmc1 {
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u-boot,dm-spl;
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u-boot,dm-spl;
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st,use-ckin;
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st,use-ckin;
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@ -527,56 +527,6 @@ static void sysconf_init(void)
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#endif
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#endif
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}
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}
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static void board_init_fmc2(void)
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{
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#define STM32_FMC2_BCR1 0x0
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#define STM32_FMC2_BTR1 0x4
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#define STM32_FMC2_BWTR1 0x104
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#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1)
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#define STM32_FMC2_BCRx_FMCEN BIT(31)
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#define STM32_FMC2_BCRx_WREN BIT(12)
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#define STM32_FMC2_BCRx_RSVD BIT(7)
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#define STM32_FMC2_BCRx_FACCEN BIT(6)
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#define STM32_FMC2_BCRx_MWID(n) ((n) << 4)
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#define STM32_FMC2_BCRx_MTYP(n) ((n) << 2)
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#define STM32_FMC2_BCRx_MUXEN BIT(1)
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#define STM32_FMC2_BCRx_MBKEN BIT(0)
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#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1)
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#define STM32_FMC2_BTRx_DATAHLD(n) ((n) << 30)
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#define STM32_FMC2_BTRx_BUSTURN(n) ((n) << 16)
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#define STM32_FMC2_BTRx_DATAST(n) ((n) << 8)
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#define STM32_FMC2_BTRx_ADDHLD(n) ((n) << 4)
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#define STM32_FMC2_BTRx_ADDSET(n) ((n) << 0)
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#define RCC_MP_AHB6RSTCLRR 0x218
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#define RCC_MP_AHB6RSTCLRR_FMCRST BIT(12)
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#define RCC_MP_AHB6ENSETR 0x19c
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#define RCC_MP_AHB6ENSETR_FMCEN BIT(12)
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const u32 bcr = STM32_FMC2_BCRx_WREN |STM32_FMC2_BCRx_RSVD |
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STM32_FMC2_BCRx_FACCEN | STM32_FMC2_BCRx_MWID(1) |
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STM32_FMC2_BCRx_MTYP(2) | STM32_FMC2_BCRx_MUXEN |
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STM32_FMC2_BCRx_MBKEN;
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const u32 btr = STM32_FMC2_BTRx_DATAHLD(3) |
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STM32_FMC2_BTRx_BUSTURN(2) |
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STM32_FMC2_BTRx_DATAST(0x22) |
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STM32_FMC2_BTRx_ADDHLD(2) |
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STM32_FMC2_BTRx_ADDSET(2);
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/* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
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writel(RCC_MP_AHB6RSTCLRR_FMCRST, STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
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writel(RCC_MP_AHB6ENSETR_FMCEN, STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
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/* KS8851-16MLL -- Muxed mode */
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writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
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writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
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/* AS7C34098 SRAM on X11 -- Muxed mode */
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writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
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writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
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setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, STM32_FMC2_BCRx_FMCEN);
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}
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#ifdef CONFIG_DM_REGULATOR
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#ifdef CONFIG_DM_REGULATOR
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#define STPMIC_NVM_BUCKS_VOUT_SHR 0xfc
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#define STPMIC_NVM_BUCKS_VOUT_SHR 0xfc
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V2 0
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V2 0
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sysconf_init();
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sysconf_init();
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board_init_fmc2();
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return 0;
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return 0;
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}
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}
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@ -108,6 +108,7 @@ CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_STM32F7=y
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CONFIG_SYS_I2C_STM32F7=y
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CONFIG_LED=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_LED_GPIO=y
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CONFIG_STM32_FMC2_EBI=y
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CONFIG_I2C_EEPROM=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_SYS_I2C_STM32F7=y
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CONFIG_SYS_I2C_STM32F7=y
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CONFIG_LED=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_LED_GPIO=y
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CONFIG_STM32_FMC2_EBI=y
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CONFIG_I2C_EEPROM=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x53
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CONFIG_SYS_I2C_EEPROM_ADDR=0x53
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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