Djam/u-boot
1
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2025-04-28 00:11:32 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

configs: starfive: Enable ID EEPROM configuration

Browse source 
Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-By: Leo Yu-Chi Linag  <ycliang@andestech.com>
This commit is contained in:
Yanhong Wang 2023-06-15 17:36:50 +08:00 • committed by Leo Yu-Chi Liang
parent 3421a45fda
commit 99f3a43d1c
2 changed files with 31 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

13
board/starfive/visionfive2/starfive_visionfive2.c
View file

@ -6,7 +6,9 @@
#include <common.h>
#include <asm/io.h>
#include <asm/sections.h>
#include <cpu_func.h>
#include <dm.h>
#include <linux/bitops.h>
#define JH7110_L2_PREFETCHER_BASE_ADDR 0x2030000
@ -38,3 +40,14 @@ int board_init(void)
return 0;
}
void *board_fdt_blob_setup(int *err)
{
*err = 0;
if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
if (gd->arch.firmware_fdt_addr)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
return (ulong *)&_end;
}

19
configs/starfive_visionfive2_defconfig
View file

@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="StarFive #"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x8180000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@ -23,6 +24,7 @@ CONFIG_SPL_OPENSBI_LOAD_ADDR=0x40000000
CONFIG_ARCH_RV64I=y
CONFIG_CMODEL_MEDANY=y
CONFIG_RISCV_SMODE=y
# CONFIG_OF_BOARD_FIXUP is not set
CONFIG_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_QSPI_BOOT=y
@ -34,6 +36,8 @@ CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=5
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x0
CONFIG_SPL_BSS_START_ADDR=0x8040000
@ -45,21 +49,34 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80000000
CONFIG_SYS_SPL_MALLOC_SIZE=0x400000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_SIZE=512
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_TFTPPUT=y
CONFIG_OF_BOARD=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_JH7110=y
# CONFIG_I2C is not set
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SPL_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0X50
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y