soc: versal2: Add SoC driver for AMD Versal Gen 2

Communication is happening via firmware interface (SMC) or via direct
register reading if firmware driver is not available.

Also enable it via defconfig.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/22cf9c765e47ab03dbf2b8363e6626e809113432.1716994063.git.michal.simek@amd.com

configs/amd_versal2_virt_defconfig

@@ -119,6 +119,7 @@ CONFIG_ARM_DCC=y
 CONFIG_PL01X_SERIAL=y
 CONFIG_XILINX_UARTLITE=y
 CONFIG_SOC_DEVICE=y
+CONFIG_SOC_AMD_VERSAL2=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_ZYNQ_SPI=y

drivers/soc/Kconfig

@@ -9,6 +9,14 @@ config SOC_DEVICE
 	  need different parameters or quirks enabled depending on the
 	  specific device variant in use.
 
+config SOC_AMD_VERSAL2
+	bool "Enable SoC Device ID driver for AMD Versal Gen 2"
+	depends on SOC_DEVICE && ARCH_VERSAL2
+	help
+	  Enable this option to select SoC device id driver for AMD Versal Gen 2.
+	  This allows other drivers to verify the SoC familiy & revision using
+	  matching SoC attributes.
+
 config SOC_DEVICE_TI_K3
 	depends on SOC_DEVICE && ARCH_K3
 	bool "Enable SoC Device ID driver for TI K3 SoCs"

drivers/soc/Makefile

@@ -2,6 +2,7 @@
 #
 # Makefile for the U-Boot SOC specific device drivers.
 
+obj-$(CONFIG_SOC_AMD_VERSAL2) += soc_amd_versal2.o
 obj-$(CONFIG_SOC_SAMSUNG) += samsung/
 obj-$(CONFIG_SOC_TI) += ti/
 obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o

drivers/soc/soc_amd_versal2.c

@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AMD Versal Gen 2 SOC driver
+ *
+ * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
+ */
+
+#include <dm.h>
+#include <soc.h>
+#include <zynqmp_firmware.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#include <linux/bitfield.h>
+
+/*
+ * v1 -> 0x10 - ES1
+ * v2 -> 0x20 - Production
+ */
+static const char versal2_family[] = "Versal Gen 2";
+
+struct soc_amd_versal2_priv {
+	const char *family;
+	char revision;
+};
+
+static int soc_amd_versal2_get_family(struct udevice *dev, char *buf, int size)
+{
+	struct soc_amd_versal2_priv *priv = dev_get_priv(dev);
+
+	return snprintf(buf, size, "%s", priv->family);
+}
+
+static int soc_amd_versal2_get_revision(struct udevice *dev, char *buf, int size)
+{
+	struct soc_amd_versal2_priv *priv = dev_get_priv(dev);
+
+	return snprintf(buf, size, "v%d", priv->revision);
+}
+
+static const struct soc_ops soc_amd_versal2_ops = {
+	.get_family = soc_amd_versal2_get_family,
+	.get_revision = soc_amd_versal2_get_revision,
+};
+
+static int soc_amd_versal2_probe(struct udevice *dev)
+{
+	struct soc_amd_versal2_priv *priv = dev_get_priv(dev);
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	int ret;
+
+	priv->family = versal2_family;
+
+	if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
+		ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,
+					ret_payload);
+		if (ret)
+			return ret;
+	} else {
+		ret_payload[2] = readl(PMC_TAP_VERSION);
+		if (!ret_payload[2])
+			return -EINVAL;
+	}
+
+	priv->revision = FIELD_GET(PS_VERSION_MASK, ret_payload[2]);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(soc_amd_versal2) = {
+	.name		= "soc_amd_versal2",
+	.id		= UCLASS_SOC,
+	.ops		= &soc_amd_versal2_ops,
+	.probe		= soc_amd_versal2_probe,
+	.priv_auto	= sizeof(struct soc_amd_versal2_priv),
+	.flags		= DM_FLAG_PRE_RELOC,
+};