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soc: versal2: Add SoC driver for AMD Versal Gen 2
Communication is happening via firmware interface (SMC) or via direct register reading if firmware driver is not available. Also enable it via defconfig. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/22cf9c765e47ab03dbf2b8363e6626e809113432.1716994063.git.michal.simek@amd.com
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4 changed files with 87 additions and 0 deletions
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@ -119,6 +119,7 @@ CONFIG_ARM_DCC=y
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CONFIG_PL01X_SERIAL=y
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CONFIG_XILINX_UARTLITE=y
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CONFIG_SOC_DEVICE=y
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CONFIG_SOC_AMD_VERSAL2=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_ZYNQ_SPI=y
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@ -9,6 +9,14 @@ config SOC_DEVICE
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need different parameters or quirks enabled depending on the
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specific device variant in use.
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config SOC_AMD_VERSAL2
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bool "Enable SoC Device ID driver for AMD Versal Gen 2"
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depends on SOC_DEVICE && ARCH_VERSAL2
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help
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Enable this option to select SoC device id driver for AMD Versal Gen 2.
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This allows other drivers to verify the SoC familiy & revision using
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matching SoC attributes.
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config SOC_DEVICE_TI_K3
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depends on SOC_DEVICE && ARCH_K3
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bool "Enable SoC Device ID driver for TI K3 SoCs"
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@ -2,6 +2,7 @@
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#
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# Makefile for the U-Boot SOC specific device drivers.
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obj-$(CONFIG_SOC_AMD_VERSAL2) += soc_amd_versal2.o
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obj-$(CONFIG_SOC_SAMSUNG) += samsung/
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obj-$(CONFIG_SOC_TI) += ti/
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obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o
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77
drivers/soc/soc_amd_versal2.c
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77
drivers/soc/soc_amd_versal2.c
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@ -0,0 +1,77 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* AMD Versal Gen 2 SOC driver
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*
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* Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
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*/
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#include <dm.h>
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#include <soc.h>
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#include <zynqmp_firmware.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <linux/bitfield.h>
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/*
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* v1 -> 0x10 - ES1
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* v2 -> 0x20 - Production
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*/
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static const char versal2_family[] = "Versal Gen 2";
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struct soc_amd_versal2_priv {
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const char *family;
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char revision;
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};
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static int soc_amd_versal2_get_family(struct udevice *dev, char *buf, int size)
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{
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struct soc_amd_versal2_priv *priv = dev_get_priv(dev);
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return snprintf(buf, size, "%s", priv->family);
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}
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static int soc_amd_versal2_get_revision(struct udevice *dev, char *buf, int size)
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{
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struct soc_amd_versal2_priv *priv = dev_get_priv(dev);
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return snprintf(buf, size, "v%d", priv->revision);
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}
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static const struct soc_ops soc_amd_versal2_ops = {
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.get_family = soc_amd_versal2_get_family,
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.get_revision = soc_amd_versal2_get_revision,
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};
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static int soc_amd_versal2_probe(struct udevice *dev)
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{
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struct soc_amd_versal2_priv *priv = dev_get_priv(dev);
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u32 ret_payload[PAYLOAD_ARG_CNT];
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int ret;
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priv->family = versal2_family;
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if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
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ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,
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ret_payload);
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if (ret)
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return ret;
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} else {
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ret_payload[2] = readl(PMC_TAP_VERSION);
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if (!ret_payload[2])
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return -EINVAL;
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}
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priv->revision = FIELD_GET(PS_VERSION_MASK, ret_payload[2]);
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return 0;
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}
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U_BOOT_DRIVER(soc_amd_versal2) = {
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.name = "soc_amd_versal2",
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.id = UCLASS_SOC,
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.ops = &soc_amd_versal2_ops,
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.probe = soc_amd_versal2_probe,
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.priv_auto = sizeof(struct soc_amd_versal2_priv),
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.flags = DM_FLAG_PRE_RELOC,
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};
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