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ARM: dts: stm32: add eth1 and eth2 support on stm32mp13

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Add both ethernet MACs based on GMAC SNPS IP on stm32mp13.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Christophe Roullier 2024-04-22 01:09:47 +02:00 • committed by Patrice Chotard
parent 196cbe652b
commit 94ee7be1e4
2 changed files with 67 additions and 0 deletions
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37
arch/arm/dts/stm32mp131.dtsi
View file

@ -1328,6 +1328,37 @@
status = "disabled";
};
eth1: eth1@5800a000 {
compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac";
reg = <0x5800a000 0x2000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
<&exti 68 1>;
interrupt-names = "macirq", "eth_wake_irq";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ethstp",
"eth-ck";
clocks = <&rcc ETH1MAC>,
<&rcc ETH1TX>,
<&rcc ETH1RX>,
<&rcc ETH1STP>,
<&rcc ETH1CK_K>;
st,syscon = <&syscfg 0x4 0xff0000>;
snps,mixed-burst;
snps,pbl = <2>;
snps,axi-config = <&stmmac_axi_config_1>;
snps,tso;
status = "disabled";
stmmac_axi_config_1: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
};
usbh_ohci: usb@5800c000 {
compatible = "generic-ohci";
reg = <0x5800c000 0x1000>;
@ -1404,6 +1435,12 @@
ts_cal2: calib@5e {
reg = <0x5e 0x2>;
};
ethernet_mac1_address: mac1@e4 {
reg = <0xe4 0x6>;
};
ethernet_mac2_address: mac2@ea {
reg = <0xea 0x6>;
};
};
/*

30
arch/arm/dts/stm32mp133.dtsi
View file

@ -64,5 +64,35 @@
};
};
};
eth2: eth2@5800e000 {
compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac";
reg = <0x5800e000 0x2000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ethstp",
"eth-ck";
clocks = <&rcc ETH2MAC>,
<&rcc ETH2TX>,
<&rcc ETH2RX>,
<&rcc ETH2STP>,
<&rcc ETH2CK_K>;
st,syscon = <&syscfg 0x4 0xff000000>;
snps,mixed-burst;
snps,pbl = <2>;
snps,axi-config = <&stmmac_axi_config_2>;
snps,tso;
status = "disabled";
stmmac_axi_config_2: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
};
};
};