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board: starfive: support Milk-V Mars board
The differences between the Milk-V Mars board and the VisionFive 2 board are small enough that we can support both using the same U-Boot build. * The model and compatible property are taken from proposed Linux patches. * The EEPROM is atmel,24c02 according to the vendor U-Boot. * The second Ethernet port is not available. usb@10100000 does not exist in U-Boot yet. So we don't have to reflect differences in usage here. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
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0a8b83fb30
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1 changed files with 86 additions and 11 deletions
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@ -27,6 +27,26 @@ struct starfive_vf2_pro {
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const char *value;
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const char *value;
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};
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};
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static const struct starfive_vf2_pro milk_v_mars[] = {
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{"/soc/ethernet@16030000", "starfive,tx-use-rgmii-clk", NULL},
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{"/soc/ethernet@16040000", "starfive,tx-use-rgmii-clk", NULL},
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
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"motorcomm,tx-clk-adj-enabled", NULL},
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
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"motorcomm,tx-clk-100-inverted", NULL},
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
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"motorcomm,tx-clk-1000-inverted", NULL},
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
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"motorcomm,rx-clk-drv-microamp", "3970"},
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
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"motorcomm,rx-data-drv-microamp", "2910"},
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
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"rx-internal-delay-ps", "1900"},
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0",
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"tx-internal-delay-ps", "1500"},
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};
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static const struct starfive_vf2_pro starfive_vera[] = {
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static const struct starfive_vf2_pro starfive_vera[] = {
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0", "rx-internal-delay-ps",
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{"/soc/ethernet@16030000/mdio/ethernet-phy@0", "rx-internal-delay-ps",
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"1900"},
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"1900"},
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@ -67,6 +87,49 @@ static const struct starfive_vf2_pro starfive_verb[] = {
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"tx-internal-delay-ps", "0"},
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"tx-internal-delay-ps", "0"},
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};
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};
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void spl_fdt_fixup_mars(void *fdt)
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{
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static const char compat[] = "milkv,mars\0starfive,jh7110";
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u32 phandle;
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u8 i;
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int offset;
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int ret;
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fdt_setprop(fdt, fdt_path_offset(fdt, "/"), "compatible", compat, sizeof(compat));
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fdt_setprop_string(fdt, fdt_path_offset(fdt, "/"), "model",
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"Milk-V Mars");
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/* gmac0 */
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offset = fdt_path_offset(fdt, "/soc/clock-controller@17000000");
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phandle = fdt_get_phandle(fdt, offset);
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offset = fdt_path_offset(fdt, "/soc/ethernet@16030000");
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fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle);
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fdt_appendprop_u32(fdt, offset, "assigned-clocks", JH7110_AONCLK_GMAC0_TX);
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fdt_setprop_u32(fdt, offset, "assigned-clock-parents", phandle);
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fdt_appendprop_u32(fdt, offset, "assigned-clock-parents",
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JH7110_AONCLK_GMAC0_RMII_RTX);
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/* gmac1 */
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fdt_setprop_string(fdt, fdt_path_offset(fdt, "/soc/ethernet@16040000"),
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"status", "disabled");
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for (i = 0; i < ARRAY_SIZE(milk_v_mars); i++) {
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offset = fdt_path_offset(fdt, milk_v_mars[i].path);
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if (milk_v_mars[i].value)
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ret = fdt_setprop_u32(fdt, offset, milk_v_mars[i].name,
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dectoul(milk_v_mars[i].value, NULL));
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else
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ret = fdt_setprop_empty(fdt, offset, milk_v_mars[i].name);
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if (ret) {
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pr_err("%s set prop %s fail.\n", __func__, milk_v_mars[i].name);
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break;
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}
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}
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}
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void spl_fdt_fixup_version_a(void *fdt)
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void spl_fdt_fixup_version_a(void *fdt)
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{
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{
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static const char compat[] = "starfive,visionfive-2-v1.2a\0starfive,jh7110";
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static const char compat[] = "starfive,visionfive-2-v1.2a\0starfive,jh7110";
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@ -167,22 +230,34 @@ void spl_fdt_fixup_version_b(void *fdt)
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void spl_perform_fixups(struct spl_image_info *spl_image)
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void spl_perform_fixups(struct spl_image_info *spl_image)
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{
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{
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u8 version;
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u8 version;
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const char *product_id;
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version = get_pcb_revision_from_eeprom();
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product_id = get_product_id_from_eeprom();
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switch (version) {
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if (!product_id) {
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case 'a':
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pr_err("Can't read EEPROM\n");
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case 'A':
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return;
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spl_fdt_fixup_version_a(spl_image->fdt_addr);
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}
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break;
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if (!strncmp(product_id, "MARS", 4)) {
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spl_fdt_fixup_mars(spl_image->fdt_addr);
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} else if (!strncmp(product_id, "VF7110", 6)) {
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version = get_pcb_revision_from_eeprom();
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switch (version) {
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case 'a':
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case 'A':
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spl_fdt_fixup_version_a(spl_image->fdt_addr);
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break;
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case 'b':
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case 'b':
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case 'B':
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case 'B':
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default:
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default:
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spl_fdt_fixup_version_b(spl_image->fdt_addr);
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spl_fdt_fixup_version_b(spl_image->fdt_addr);
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break;
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break;
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};
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} else {
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pr_err("Unknown product %s\n", product_id);
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};
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};
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/* Update the memory size which read form eeprom or DT */
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/* Update the memory size which read from eeprom or DT */
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fdt_fixup_memory(spl_image->fdt_addr, 0x40000000, gd->ram_size);
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fdt_fixup_memory(spl_image->fdt_addr, 0x40000000, gd->ram_size);
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}
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}
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