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mxc_i2c: don't disable controller after every transaction
This helps in a multiple bus master environment which is why I also added a wait for bus idle. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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parent
83a1a19038
commit
90a5b70f59
1 changed files with 13 additions and 15 deletions
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@ -192,24 +192,19 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
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}
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}
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/*
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/*
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* Stop the controller
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* Stop I2C transaction
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*/
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*/
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void i2c_imx_stop(void)
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void i2c_imx_stop(void)
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{
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{
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int ret;
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int ret;
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struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
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struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
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unsigned int temp = 0;
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unsigned int temp = readb(&i2c_regs->i2cr);
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/* Stop I2C transaction */
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temp = readb(&i2c_regs->i2cr);
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temp &= ~(I2CR_MSTA | I2CR_MTX);
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temp &= ~(I2CR_MSTA | I2CR_MTX);
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writeb(temp, &i2c_regs->i2cr);
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writeb(temp, &i2c_regs->i2cr);
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ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
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ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
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if (ret < 0)
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if (ret < 0)
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printf("%s:trigger stop failed\n", __func__);
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printf("%s:trigger stop failed\n", __func__);
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/* Disable I2C controller */
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writeb(0, &i2c_regs->i2cr);
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}
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}
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/*
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/*
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@ -223,11 +218,15 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
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int ret;
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int ret;
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/* Enable I2C controller */
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/* Enable I2C controller */
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writeb(0, &i2c_regs->i2sr);
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if (!(readb(&i2c_regs->i2cr) & I2CR_IEN)) {
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writeb(I2CR_IEN, &i2c_regs->i2cr);
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writeb(I2CR_IEN, &i2c_regs->i2cr);
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/* Wait for controller to be stable */
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/* Wait for controller to be stable */
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udelay(50);
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udelay(50);
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}
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writeb(0, &i2c_regs->i2sr);
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ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
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if (ret < 0)
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goto exit;
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/* Start I2C transaction */
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/* Start I2C transaction */
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temp = readb(&i2c_regs->i2cr);
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temp = readb(&i2c_regs->i2cr);
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@ -254,6 +253,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
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return 0;
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return 0;
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exit:
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exit:
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i2c_imx_stop();
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i2c_imx_stop();
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/* Disable I2C controller */
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writeb(0, &i2c_regs->i2cr);
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return ret;
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return ret;
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}
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}
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@ -303,10 +304,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
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* controller from generating another clock cycle
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* controller from generating another clock cycle
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*/
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*/
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if (i == (len - 1)) {
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if (i == (len - 1)) {
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temp = readb(&i2c_regs->i2cr);
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i2c_imx_stop();
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temp &= ~(I2CR_MSTA | I2CR_MTX);
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writeb(temp, &i2c_regs->i2cr);
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wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
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} else if (i == (len - 2)) {
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} else if (i == (len - 2)) {
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temp = readb(&i2c_regs->i2cr);
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temp = readb(&i2c_regs->i2cr);
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temp |= I2CR_TX_NO_AK;
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temp |= I2CR_TX_NO_AK;
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