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Merge tag 'u-boot-imx-master-20241018a' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Browse source 
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22796

- Switch to using upstream DT on DH i.MX8MP DHCOM PDK2/PDK3.
- Add ability to build fallback DTBOs from arch/$(ARCH)/dts.
- Remove fdt_high and initrd_high env variables from imx6-dhcom.
- Add dummy clk for imx8.
- Fix DT corruption in imx8_cpu.
- Improve DDR stability on pico-imx7d.
This commit is contained in:
Tom Rini 2024-10-18 09:05:04 -06:00
commit 8ab2178de0
14 changed files with 78 additions and 504 deletions
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4
Makefile
View file

@ -1384,7 +1384,11 @@ of_list := "$(ext_dtb_list)"
of_list_dirs := $(dir $(EXT_DTB))
else
of_list := $(CONFIG_OF_LIST)
ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),)
of_list_dirs := $(dt_dir) arch/$(ARCH)/dts
else
of_list_dirs := $(dt_dir)
endif
default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE))
endif

2
arch/arm/dts/Makefile
View file

@ -961,8 +961,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo \
imx8mp-dhcom-drc02.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
imx8mp-dhcom-picoitx.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \

158
arch/arm/dts/imx8mp-dhcom-pdk2.dts
View file

@ -1,158 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
*
* DHCOM iMX8MP variant:
* DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
* DHCOM PCB number: 660-100 or newer
* PDK2 PCB number: 516-400 or newer
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy-imx8-pcie.h>
#include "imx8mp-dhcom-som.dtsi"
/ {
model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (2)";
compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
"fsl,imx8mp";
chosen {
stdout-path = &uart1;
};
gpio-keys {
compatible = "gpio-keys";
button-0 {
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */
label = "TA1-GPIO-A";
linux,code = <KEY_A>;
pinctrl-0 = <&pinctrl_dhcom_a>;
pinctrl-names = "default";
wakeup-source;
};
button-1 {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
pinctrl-0 = <&pinctrl_dhcom_b>;
pinctrl-names = "default";
wakeup-source;
};
button-2 {
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
pinctrl-0 = <&pinctrl_dhcom_c>;
pinctrl-names = "default";
wakeup-source;
};
button-3 {
gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */
label = "TA4-GPIO-D";
linux,code = <KEY_D>;
pinctrl-0 = <&pinctrl_dhcom_d>;
pinctrl-names = "default";
wakeup-source;
};
};
led {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* GPIO E */
pinctrl-0 = <&pinctrl_dhcom_e>;
pinctrl-names = "default";
};
led-1 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */
pinctrl-0 = <&pinctrl_dhcom_f>;
pinctrl-names = "default";
};
led-2 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; /* GPIO H */
pinctrl-0 = <&pinctrl_dhcom_h>;
pinctrl-names = "default";
};
led-3 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */
pinctrl-0 = <&pinctrl_dhcom_i>;
pinctrl-names = "default";
};
};
};
&fec { /* Second ethernet */
pinctrl-0 = <&pinctrl_fec_rgmii>;
phy-handle = <&ethphypdk>;
phy-mode = "rgmii";
mdio {
ethphypdk: ethernet-phy@7 { /* KSZ 9021 */
compatible = "ethernet-phy-ieee802.3-c22";
pinctrl-0 = <&pinctrl_ethphy1>;
pinctrl-names = "default";
interrupt-parent = <&gpio4>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
max-speed = <100>;
reg = <7>;
reset-assert-us = <1000>;
reset-deassert-us = <1000>;
reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
rxc-skew-ps = <3000>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
rxdv-skew-ps = <0>;
txc-skew-ps = <3000>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
txen-skew-ps = <0>;
};
};
};
&flexcan1 {
status = "okay";
};
&usb3_1 {
fsl,over-current-active-low;
};
&iomuxc {
/*
* GPIO_A,B,C,D are connected to buttons.
* GPIO_E,F,H,I are connected to LEDs.
* GPIO_M is connected to CLKOUT2.
*/
pinctrl-0 = <&pinctrl_hog_base
&pinctrl_dhcom_g &pinctrl_dhcom_j
&pinctrl_dhcom_k &pinctrl_dhcom_l
&pinctrl_dhcom_int>;
};

317
arch/arm/dts/imx8mp-dhcom-pdk3.dts
View file

@ -1,317 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2023 Marek Vasut <marex@denx.de>
*
* DHCOM iMX8MP variant:
* DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
* DHCOM PCB number: 660-100 or newer
* PDK3 PCB number: 669-100 or newer
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy-imx8-pcie.h>
#include "imx8mp-dhcom-som.dtsi"
/ {
model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (3)";
compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som",
"fsl,imx8mp";
chosen {
stdout-path = &uart1;
};
clk_ext_audio_codec: clock-codec {
#clock-cells = <0>;
clock-frequency = <24000000>;
compatible = "fixed-clock";
};
clk_xtal25: clk-xtal25 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_c_0_hs_ep: endpoint {
remote-endpoint = <&dwc3_0_hs_ep>;
};
};
port@1 {
reg = <1>;
usb_c_0_ss_ep: endpoint {
remote-endpoint = <&ptn5150_in_ep>;
};
};
};
};
gpio-keys {
compatible = "gpio-keys";
button-0 {
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */
label = "TA1-GPIO-A";
linux,code = <KEY_A>;
pinctrl-0 = <&pinctrl_dhcom_a>;
pinctrl-names = "default";
wakeup-source;
};
button-1 {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
pinctrl-0 = <&pinctrl_dhcom_b>;
pinctrl-names = "default";
wakeup-source;
};
button-2 {
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
pinctrl-0 = <&pinctrl_dhcom_c>;
pinctrl-names = "default";
wakeup-source;
};
button-3 {
gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; /* GPIO E */
label = "TA4-GPIO-E";
linux,code = <KEY_E>;
pinctrl-0 = <&pinctrl_dhcom_e>;
pinctrl-names = "default";
wakeup-source;
};
};
led {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
function-enumerator = <0>;
gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>; /* GPIO D */
pinctrl-0 = <&pinctrl_dhcom_d>;
pinctrl-names = "default";
};
led-1 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
function-enumerator = <1>;
gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */
pinctrl-0 = <&pinctrl_dhcom_f>;
pinctrl-names = "default";
};
led-2 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
function-enumerator = <2>;
gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; /* GPIO G */
pinctrl-0 = <&pinctrl_dhcom_g>;
pinctrl-names = "default";
};
led-3 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
function-enumerator = <3>;
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */
pinctrl-0 = <&pinctrl_dhcom_i>;
pinctrl-names = "default";
};
};
reg_avdd: regulator-avdd { /* AUDIO_VDD */
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "AUDIO_VDD";
};
};
&i2c5 {
i2cmux@70 {
compatible = "nxp,pca9540";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2cmuxed0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
typec@3d {
compatible = "nxp,ptn5150";
reg = <0x3d>;
interrupt-parent = <&gpio4>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ptn5150>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ptn5150_in_ep: endpoint {
remote-endpoint = <&usb_c_0_ss_ep>;
};
};
port@1 {
reg = <1>;
ptn5150_out_ep: endpoint {
remote-endpoint = <&dwc3_0_ss_ep>;
};
};
};
};
power-sensor@40 {
compatible = "ti,ina238";
reg = <0x40>;
shunt-resistor = <20000>; /* 0.02 R */
ti,shunt-gain = <1>; /* Drop cca. 40mV */
};
eeprom_board: eeprom@54 {
compatible = "atmel,24c04";
pagesize = <16>;
reg = <0x54>;
};
pcieclk: clk@6b {
compatible = "skyworks,si52144";
reg = <0x6b>;
clocks = <&clk_xtal25>;
#clock-cells = <1>;
};
};
i2cmuxed1: i2c@1 { /* HDMI DDC I2C */
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
&fec { /* Second ethernet */
pinctrl-0 = <&pinctrl_fec_rgmii>;
phy-handle = <&ethphypdk>;
phy-mode = "rgmii-id";
mdio {
ethphypdk: ethernet-phy@7 { /* Micrel KSZ9131RNXI */
compatible = "ethernet-phy-id0022.1642",
"ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio4>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy1>;
pinctrl-names = "default";
reg = <7>;
reset-assert-us = <1000>;
/* RESET_N signal rise time ~100ms */
reset-deassert-us = <120000>;
reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
};
&flexcan1 {
status = "okay";
};
&pcie_phy {
clocks = <&pcieclk 1>;
clock-names = "ref";
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
status = "okay";
};
&pcie {
fsl,max-link-speed = <3>;
reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
&usb_dwc3_0 {
usb-role-switch;
port {
#address-cells = <1>;
#size-cells = <0>;
dwc3_0_hs_ep: endpoint@0 {
reg = <0>;
remote-endpoint = <&usb_c_0_hs_ep>;
};
dwc3_0_ss_ep: endpoint@1 {
reg = <1>;
remote-endpoint = <&ptn5150_out_ep>;
};
};
};
&usb3_1 {
fsl,disable-port-power-control;
fsl,permanently-attached;
};
&usb_dwc3_1 {
/* This port has USB5734 Hub connected to it, PWR/OC pins are unused */
/delete-property/ pinctrl-names;
/delete-property/ pinctrl-0;
};
&iomuxc {
/*
* GPIO_A,B,C,E are connected to buttons.
* GPIO_D,F,G,I are connected to LEDs.
* GPIO_H is connected to USB Hub RESET_N.
* GPIO_M is connected to CLKOUT2.
*/
pinctrl-0 = <&pinctrl_hog_base
&pinctrl_dhcom_h &pinctrl_dhcom_j &pinctrl_dhcom_k
&pinctrl_dhcom_l
&pinctrl_dhcom_int>;
pinctrl_ptn5150: ptn5150grp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x40000000
>;
};
};

10
board/technexion/pico-imx7d/spl.c
View file

@ -89,11 +89,11 @@ static struct ddr_phy ddr_phy_regs_val = {
static struct mx7_calibration calib_param = {
.num_val = 5,
.values = {
0x0E407304,
0x0E447304,
0x0E447306,
0x0E447304,
0x0E447304,
0x0E207304,
0x0E247304,
0x0E247306,
0x0E247304,
0x0E207304,
},
};

6
configs/imx8mp_dhcom_pdk2_defconfig
View file

@ -12,7 +12,7 @@ CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFE0000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-dhcom-pdk2"
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-dhcom-pdk2"
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y
CONFIG_DM_RESET=y
@ -48,7 +48,7 @@ CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset"
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-pdk2.dtb"
CONFIG_DEFAULT_FDT_FILE="freescale/imx8mp-dhcom-pdk2.dtb"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2081
CONFIG_CONSOLE_MUX=y
@ -143,6 +143,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=flash@0:-(sf)"
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_UPSTREAM=y
CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y

6
configs/imx8mp_dhcom_pdk3_defconfig
View file

@ -12,7 +12,7 @@ CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFE0000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-dhcom-pdk3"
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-dhcom-pdk3"
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y
CONFIG_DM_RESET=y
@ -50,7 +50,7 @@ CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gpio clear GPIO1_11 ; sleep 0.1 ; gpio set GPIO1_11 ; sleep 0.1 ; i2c dev 4 && i2c mw 0x70 0 4 && i2c probe 0x2d && i2c mw 0x2d 0xaa55.2 0"
CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-pdk3.dtb"
CONFIG_DEFAULT_FDT_FILE="freescale/imx8mp-dhcom-pdk3.dtb"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2081
CONFIG_CONSOLE_MUX=y
@ -146,6 +146,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=flash@0:-(sf)"
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_UPSTREAM=y
CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y

4
drivers/clk/imx/clk-imx8qm.c
View file

@ -48,6 +48,8 @@ ulong imx8_clk_get_rate(struct clk *clk)
debug("%s(#%lu)\n", __func__, clk->id);
switch (clk->id) {
case IMX8QM_CLK_DUMMY:
return 0;
case IMX8QM_A53_DIV:
resource = SC_R_A53;
pm_clk = SC_PM_CLK_CPU;
@ -264,6 +266,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
debug("%s(#%lu)\n", __func__, clk->id);
switch (clk->id) {
case IMX8QM_CLK_DUMMY:
return 0;
case IMX8QM_I2C0_IPG_CLK:
case IMX8QM_I2C0_CLK:
case IMX8QM_I2C0_DIV:

4
drivers/clk/imx/clk-imx8qxp.c
View file

@ -51,6 +51,8 @@ ulong imx8_clk_get_rate(struct clk *clk)
debug("%s(#%lu)\n", __func__, clk->id);
switch (clk->id) {
case IMX8QXP_CLK_DUMMY:
return 0;
case IMX8QXP_A35_DIV:
resource = SC_R_A35;
pm_clk = SC_PM_CLK_CPU;
@ -248,6 +250,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
debug("%s(#%lu)\n", __func__, clk->id);
switch (clk->id) {
case IMX8QXP_CLK_DUMMY:
return 0;
case IMX8QXP_I2C0_CLK:
case IMX8QXP_I2C0_IPG_CLK:
resource = SC_R_I2C_0;

32
drivers/cpu/imx8_cpu.c
View file

@ -20,10 +20,11 @@
DECLARE_GLOBAL_DATA_PTR;
#define IMX_REV_LEN 4
struct cpu_imx_plat {
const char *name;
const char *rev;
const char *type;
char rev[IMX_REV_LEN];
u32 cpu_rsrc;
u32 cpurev;
u32 freq_mhz;
@ -69,28 +70,29 @@ static const char *get_imx_type_str(u32 imxtype)
}
}
static const char *get_imx_rev_str(u32 rev)
static void get_imx_rev_str(struct cpu_imx_plat *plat, u32 rev)
{
static char revision[4];
if (IS_ENABLED(CONFIG_IMX8)) {
switch (rev) {
case CHIP_REV_A:
return "A";
plat->rev[0] = 'A';
break;
case CHIP_REV_B:
return "B";
plat->rev[0] = 'B';
break;
case CHIP_REV_C:
return "C";
plat->rev[0] = 'C';
break;
default:
return "?";
plat->rev[0] = '?';
break;
}
plat->rev[1] = '\0';
} else {
revision[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4);
revision[1] = '.';
revision[2] = '0' + (rev & 0xf);
revision[3] = '\0';
return revision;
plat->rev[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4);
plat->rev[1] = '.';
plat->rev[2] = '0' + (rev & 0xf);
plat->rev[3] = '\0';
}
}
@ -318,7 +320,7 @@ static int imx_cpu_probe(struct udevice *dev)
set_core_data(dev);
cpurev = get_cpu_rev();
plat->cpurev = cpurev;
plat->rev = get_imx_rev_str(cpurev & 0xFFF);
get_imx_rev_str(plat, cpurev & 0xFFF);
plat->type = get_imx_type_str((cpurev & 0x1FF000) >> 12);
plat->freq_mhz = imx_get_cpu_rate(dev) / 1000000;
plat->mpidr = dev_read_addr(dev);

16
dts/Kconfig
View file

@ -125,6 +125,22 @@ config OF_UPSTREAM_VENDOR
help
Select the vendor to build all devicetree files for.
config OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS
bool "Build local DTBOs as fallback for DTBOs missing upstream"
default n
depends on OF_UPSTREAM
help
Enable building DTBOs from arch/$(ARCH)/dts as a fallback for
DTBOs which are not part of Linux kernel upstream yet. This is
a stopgap measure to expedite OF_UPSTREAM switch for platforms
which already have main DT in Linux kernel upstream, but still
have leftover DTBOs in U-Boot tree.
Do not use this option, upstream your DTs and DTBOs instead.
If the upstreaming is in progress, use with utmost caution.
If unsure, say N.
choice
prompt "Provider of DTB for DT control"
depends on OF_CONTROL

14
dts/Makefile
View file

@ -20,6 +20,12 @@ else
dt_dir := arch/$(ARCH)/dts
endif
ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),)
local_dtbos := local-dtbos
else
local_dtbos :=
endif
ifneq ($(EXT_DTB),)
DTB := $(EXT_DTB)
else
@ -40,7 +46,7 @@ endif
targets += dt.dtb
$(DTB): arch-dtbs
$(DTB): arch-dtbs $(local_dtbos)
$(Q)test -e $@ || ( \
echo >&2; \
echo >&2 "Device Tree Source ($@) is not correctly specified."; \
@ -53,6 +59,12 @@ PHONY += arch-dtbs
arch-dtbs:
$(Q)$(MAKE) $(build)=$(dt_dir) dtbs
ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),)
PHONY += local-dtbos
local-dtbos:
$(Q)$(MAKE) $(build)=arch/$(ARCH)/dts dtbos
endif
ifeq ($(CONFIG_XPL_BUILD),y)
obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o
# support "out-of-tree" build for dtb-spl

3
include/configs/dh_imx6.h
View file

@ -36,10 +36,9 @@
#endif
#define CFG_EXTRA_ENV_SETTINGS \
"bootm_size=0x10000000\0" \
"console=ttymxc0,115200\0" \
"fdt_addr=0x18000000\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"kernel_addr_r=0x10008000\0" \
"fdt_addr_r=0x13000000\0" \
"ramdisk_addr_r=0x18000000\0" \

6
scripts/Makefile.dts
View file

@ -22,4 +22,10 @@ PHONY += dtbs
dtbs: $(addprefix $(obj)/, $(dtb-y))
@:
ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),)
PHONY += dtbos
dtbos: $(addprefix $(obj)/, $(filter-out %.dtb,$(dtb-y)))
@:
endif
clean-files := *.dtb *.dtbo */*.dtb */*.dtbo *_HS