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Merge tag 'u-boot-rockchip-20241026' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

Browse source 
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22993

- New boards:
        rk3566: Hardkernel ODROID-M1S
        rk3588s: Hardkernel ODROID-M2
        rk3588: NanoPC-T6 LTS
- Migrate to use USB_DWC3_GENERIC for rk3328
- Other board level config and dts update
This commit is contained in:
Tom Rini 2024-10-26 08:10:31 -06:00
commit 8963d433eb
64 changed files with 3520 additions and 1103 deletions
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6
arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi
View file

@ -6,6 +6,12 @@
#include "rk3328-u-boot.dtsi"
/ {
leds {
led-0 {
default-state = "on";
};
};
smbios {
compatible = "u-boot,sysinfo-smbios";

5
arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
View file

@ -15,13 +15,8 @@
};
&spi1 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
bootph-pre-ram;
bootph-some-ram;
spi-max-frequency = <10000000>;
};
};

28
arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
View file

@ -1,8 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
* Copyright (c) 2023 Radxa Limited
*/
#include "rk3399-rock-pi-4-u-boot.dtsi"
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
/ {
leds {
led-0 {
default-state = "on";
};
led-1 {
default-state = "on";
};
};
};
&pcfg_pull_none_18ma {
bootph-pre-ram;
@ -14,6 +28,12 @@
bootph-some-ram;
};
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
};
&spi1 {
status = "okay";
@ -25,3 +45,7 @@
spi-max-frequency = <10000000>;
};
};
&vdd_log {
regulator-init-microvolt = <950000>;
};

8
arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
View file

@ -6,6 +6,14 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
/ {
leds {
led-0 {
default-state = "on";
};
};
};
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;

34
arch/arm/dts/rk3566-anbernic-rg353p-u-boot.dtsi Normal file
View file

@ -0,0 +1,34 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
/ {
chosen {
u-boot,spl-boot-order = &sdmmc0, &sdhci;
};
/*
* Adding fixed regulator to work around driver regulator
* requirements. Note that the correct regulator is on by
* default at boot and that saradc regulator gets corrected
* when proper device-tree is loaded.
*/
vcc_1v8_dummy: vcc-1v8-dummy {
bootph-pre-ram;
bootph-some-ram;
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_dummy";
status = "okay";
};
};
&saradc {
bootph-pre-ram;
bootph-some-ram;
vref-supply = <&vcc_1v8_dummy>;
status = "okay";
};

52
arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
View file

@ -1,52 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
/ {
chosen {
u-boot,spl-boot-order = &sdmmc0, &sdhci;
};
};
&dsi_dphy0 {
status = "okay";
};
&dsi0 {
status = "okay";
};
&i2c2 {
pinctrl-0 = <&i2c2m1_xfer>;
pinctrl-names = "default";
status = "okay";
};
&pmucru {
assigned-clocks = <&pmucru SCLK_32K_IOE>;
assigned-clock-parents = <&pmucru CLK_RTC_32K>;
};
/*
* We don't need the clocks, but if they are present they may cause
* probing to fail so we remove them for U-Boot.
*/
&rk817 {
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ clocks;
/delete-property/ clock-names;
};
&sdhci {
pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>,
<&emmc_datastrobe>, <&emmc_rstnout>;
pinctrl-names = "default";
bus-width = <8>;
max-frequency = <200000000>;
mmc-hs200-1_8v;
non-removable;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};

28
arch/arm/dts/rk3566-anbernic-rgxx3.dts
View file

@ -1,28 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3566-anbernic-rgxx3.dtsi"
/ {
/*
* Note this is a pseudo-model that doesn't exist in mainline Linux.
* This model is used for all RGXX3 devices and the board.c file will
* set the correct dtb name for loading mainline Linux automatically.
*/
model = "RGXX3";
compatible = "anbernic,rg-arc-d", "anbernic,rg-arc-s",
"anbernic,rg353m", "anbernic,rg353p",
"anbernic,rg353ps", "anbernic,rg353v",
"anbernic,rg353vs", "anbernic,rg503",
"powkiddy,rgb10max3", "powkiddy,rgb30",
"powkiddy,rk2023", "rockchip,rk3566";
};
&cru {
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
assigned-clock-rates = <32768>, <1200000000>,
<200000000>, <241500000>;
};

3
arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"

8
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
View file

@ -5,6 +5,14 @@
#include "rk356x-u-boot.dtsi"
/ {
leds {
led-1 {
default-state = "on";
};
};
};
&sdhci {
cap-mmc-highspeed;
};

23
arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
View file

@ -2,6 +2,29 @@
#include "rk356x-u-boot.dtsi"
/ {
gpio-leds {
led-0 {
default-state = "on";
};
led-red {
default-state = "on";
gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
};
led-green {
default-state = "on";
gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
};
led-blue {
default-state = "on";
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
};
};
};
&pcie3x1 {
pinctrl-0 = <&pcie30x1_reset_h>;
};

8
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
View file

@ -6,6 +6,14 @@
#include "rk356x-u-boot.dtsi"
/ {
leds {
led-0 {
default-state = "on";
};
};
};
&pcie3x2 {
pinctrl-0 = <&pcie3x2_reset_h>;
};

16
arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
View file

@ -11,20 +11,14 @@
bootph-some-ram;
};
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspim1_pins>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
&saradc {
bootph-pre-ram;
vdd-microvolts = <1800000>;
};
&sfc {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
bootph-pre-ram;
bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};

17
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
View file

@ -6,6 +6,14 @@
#include <dt-bindings/usb/pd.h>
#include "rk3588-u-boot.dtsi"
/ {
leds {
led_rgb_b {
default-state = "on";
};
};
};
&fspim2_pins {
bootph-pre-ram;
bootph-some-ram;
@ -44,18 +52,9 @@
};
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspim2_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
bootph-pre-ram;
bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};

3
arch/arm/dts/rk3588s-odroid-m2-u-boot.dtsi Normal file
View file

@ -0,0 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk3588s-u-boot.dtsi"

8
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
View file

@ -5,6 +5,14 @@
#include "rk3588s-u-boot.dtsi"
/ {
leds {
io-led {
default-state = "on";
};
};
};
&sdhci {
cap-mmc-highspeed;
mmc-hs200-1_8v;

7
arch/arm/include/asm/arch-rockchip/cru_px30.h
View file

@ -464,5 +464,12 @@ enum {
UART0_CLK_SEL_UART0_FRAC,
UART0_DIVNP5_SHIFT = 0,
UART0_DIVNP5_MASK = 0x1f << UART0_DIVNP5_SHIFT,
/* CRU_PMU_CLKSEL5_CON */
CLK_UART_FRAC_NUMERATOR_SHIFT = 16,
CLK_UART_FRAC_NUMERATOR_MASK = 0xffff << CLK_UART_FRAC_NUMERATOR_SHIFT,
CLK_UART_FRAC_DENOMINATOR_SHIFT = 0,
CLK_UART_FRAC_DENOMINATOR_MASK =
0xffff << CLK_UART_FRAC_DENOMINATOR_SHIFT,
};
#endif

2
arch/arm/mach-rockchip/Kconfig
View file

@ -257,7 +257,6 @@ config ROCKCHIP_RK3399
select SPL_SYSCON if SPL
select TPL_NEEDS_SEPARATE_STACK if TPL
select SPL_SEPARATE_BSS
select SPL_SERIAL
select CLK
select FIT
select PINCTRL
@ -288,6 +287,7 @@ config ROCKCHIP_RK3399
imply SPL_DM_SEQ_ALIAS
imply SPL_FIT_SIGNATURE
imply SPL_ROCKCHIP_COMMON_BOARD
imply SPL_SERIAL
imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
imply TPL_CLK
imply TPL_DM

11
arch/arm/mach-rockchip/board.c
View file

@ -472,9 +472,18 @@ __weak int misc_init_r(void)
__weak int board_rng_seed(struct abuf *buf)
{
struct udevice *dev;
size_t len = 0x8;
ulong len = env_get_ulong("rng_seed_size", 10, 64);
u64 *data;
if (len < 64) {
/*
* rng_seed_size should be at least 32 bytes for Linux 5.19+,
* or 64 for older Linux kernel versions
*/
log_warning("Value for rng_seed_size (%lu) too low, Linux kernel RNG may fail to initialize early\n",
len);
}
data = malloc(len);
if (!data) {
printf("Out of memory\n");

6
arch/arm/mach-rockchip/rk3568/Kconfig
View file

@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568
help
Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC.
config TARGET_ODROID_M1S_RK3566
bool "ODROID-M1S"
help
Hardkernel ODROID-M1S single board computer with a RK3566 SoC.
config TARGET_POWKIDDY_X55_RK3566
bool "Powkiddy X55"
help
@ -62,6 +67,7 @@ config TEXT_BASE
source "board/rockchip/evb_rk3568/Kconfig"
source "board/anbernic/rgxx3_rk3566/Kconfig"
source "board/hardkernel/odroid_m1/Kconfig"
source "board/hardkernel/odroid_m1s/Kconfig"
source "board/pine64/quartz64_rk3566/Kconfig"
source "board/powkiddy/x55/Kconfig"
source "board/radxa/zero3-rk3566/Kconfig"

6
arch/arm/mach-rockchip/rk3568/rk3568.c
View file

@ -26,6 +26,8 @@
#define PMU_BASE_ADDR 0xfdd90000
#define PMU_NOC_AUTO_CON0 (0x70)
#define PMU_NOC_AUTO_CON1 (0x74)
#define PMU_PWR_GATE_SFTCON (0xa0)
#define PMU_PD_VO_DWN_ENA BIT(7)
#define EDP_PHY_GRF_BASE 0xfdcb0000
#define EDP_PHY_GRF_CON0 (EDP_PHY_GRF_BASE + 0x00)
#define EDP_PHY_GRF_CON10 (EDP_PHY_GRF_BASE + 0x28)
@ -130,6 +132,10 @@ int arch_cpu_init(void)
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
/* Enable VO power domain for display */
writel((PMU_PD_VO_DWN_ENA << 16),
PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
#endif
return 0;
}

7
arch/arm/mach-rockchip/rk3588/Kconfig
View file

@ -134,6 +134,12 @@ config TARGET_NOVA_RK3588
includes socket for eMMC storage, an SDMMC slot, and a 40-pin
GPIO header for expansion.
config TARGET_ODROID_M2_RK3588S
bool "Hardkernel ODROID-M2"
select BOARD_LATE_INIT
help
Hardkernel ODROID-M2 single board computer with a RK3588S2 SoC.
config TARGET_RK3588_NEU6
bool "Edgeble Neural Compute Module 6(Neu6) SoM"
select BOARD_LATE_INIT
@ -366,6 +372,7 @@ source "board/friendlyelec/cm3588-nas-rk3588/Kconfig"
source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig"
source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig"
source "board/hardkernel/odroid_m2/Kconfig"
source "board/indiedroid/nova/Kconfig"
source "board/pine64/quartzpro64-rk3588/Kconfig"
source "board/turing/turing-rk1-rk3588/Kconfig"

4
board/anbernic/rgxx3_rk3566/MAINTAINERS
View file

@ -4,6 +4,4 @@ S: Maintained
F: board/anbernic/rgxx3_rk3566
F: include/configs/anbernic-rgxx3-rk3566.h
F: configs/anbernic-rgxx3-rk3566_defconfig
F: arch/arm/dts/rk3566-anbernic-rgxx3.dts
F: arch/arm/dts/rk3566-anbernic-rgxx3.dtsi
F: arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
F: arch/arm/dts/rk3566-anbernic-rg353p-u-boot.dtsi

359
board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
View file

@ -11,6 +11,7 @@
#include <dm/lists.h>
#include <env.h>
#include <fdt_support.h>
#include <i2c.h>
#include <linux/delay.h>
#include <mipi_dsi.h>
#include <mmc.h>
@ -19,6 +20,8 @@
#include <stdlib.h>
#include <video_bridge.h>
DECLARE_GLOBAL_DATA_PTR;
#define GPIO0_BASE 0xfdd60000
#define GPIO4_BASE 0xfe770000
#define GPIO_SWPORT_DR_L 0x0000
@ -40,10 +43,12 @@ struct rg3xx_model {
const char *board_name;
const char *fdtfile;
const bool detect_panel;
const bool detect_regulator;
const bool uart_con;
};
enum rgxx3_device_id {
RG353M,
RG353M = 1,
RG353P,
RG353V,
RG503,
@ -61,45 +66,57 @@ static const struct rg3xx_model rg3xx_model_details[] = {
[RG353M] = {
.adc_value = 517, /* Observed average from device */
.board = "rk3566-anbernic-rg353m",
.board_name = "RG353M",
.board_name = "Anbernic RG353M",
/* Device is identical to RG353P. */
.fdtfile = DTB_DIR "rk3566-anbernic-rg353p.dtb",
.detect_panel = 1,
.detect_regulator = 0,
.uart_con = 1,
},
[RG353P] = {
.adc_value = 860, /* Documented value of 860 */
.board = "rk3566-anbernic-rg353p",
.board_name = "RG353P",
.board_name = "Anbernic RG353P",
.fdtfile = DTB_DIR "rk3566-anbernic-rg353p.dtb",
.detect_panel = 1,
.detect_regulator = 0,
.uart_con = 1,
},
[RG353V] = {
.adc_value = 695, /* Observed average from device */
.board = "rk3566-anbernic-rg353v",
.board_name = "RG353V",
.board_name = "Anbernic RG353V",
.fdtfile = DTB_DIR "rk3566-anbernic-rg353v.dtb",
.detect_panel = 1,
.detect_regulator = 0,
.uart_con = 1,
},
[RG503] = {
.adc_value = 1023, /* Observed average from device */
.board = "rk3566-anbernic-rg503",
.board_name = "RG503",
.board_name = "Anbernic RG503",
.fdtfile = DTB_DIR "rk3566-anbernic-rg503.dtb",
.detect_panel = 0,
.detect_regulator = 0,
.uart_con = 1,
},
[RGB30] = {
.adc_value = 383, /* Gathered from second hand information */
.board = "rk3566-powkiddy-rgb30",
.board_name = "RGB30",
.board_name = "Powkiddy RGB30",
.fdtfile = DTB_DIR "rk3566-powkiddy-rgb30.dtb",
.detect_panel = 0,
.detect_regulator = 1,
.uart_con = 0,
},
[RK2023] = {
.adc_value = 635, /* Observed average from device */
.board = "rk3566-powkiddy-rk2023",
.board_name = "RK2023",
.board_name = "Powkiddy RK2023",
.fdtfile = DTB_DIR "rk3566-powkiddy-rk2023.dtb",
.detect_panel = 0,
.detect_regulator = 1,
.uart_con = 0,
},
[RGARCD] = {
.adc_value = 183, /* Observed average from device */
@ -107,6 +124,8 @@ static const struct rg3xx_model rg3xx_model_details[] = {
.board_name = "Anbernic RG ARC-D",
.fdtfile = DTB_DIR "rk3566-anbernic-rg-arc-d.dtb",
.detect_panel = 0,
.detect_regulator = 0,
.uart_con = 1,
},
[RGB10MAX3] = {
.adc_value = 765, /* Observed average from device */
@ -114,21 +133,27 @@ static const struct rg3xx_model rg3xx_model_details[] = {
.board_name = "Powkiddy RGB10MAX3",
.fdtfile = DTB_DIR "rk3566-powkiddy-rgb10max3.dtb",
.detect_panel = 0,
.detect_regulator = 1,
.uart_con = 0,
},
/* Devices with duplicate ADC value */
[RG353PS] = {
.adc_value = 860, /* Observed average from device */
.board = "rk3566-anbernic-rg353ps",
.board_name = "RG353PS",
.board_name = "Anbernic RG353PS",
.fdtfile = DTB_DIR "rk3566-anbernic-rg353ps.dtb",
.detect_panel = 1,
.detect_regulator = 0,
.uart_con = 1,
},
[RG353VS] = {
.adc_value = 695, /* Gathered from second hand information */
.board = "rk3566-anbernic-rg353vs",
.board_name = "RG353VS",
.board_name = "Anbernic RG353VS",
.fdtfile = DTB_DIR "rk3566-anbernic-rg353vs.dtb",
.detect_panel = 1,
.detect_regulator = 0,
.uart_con = 1,
},
[RGARCS] = {
.adc_value = 183, /* Observed average from device */
@ -136,6 +161,8 @@ static const struct rg3xx_model rg3xx_model_details[] = {
.board_name = "Anbernic RG ARC-S",
.fdtfile = DTB_DIR "rk3566-anbernic-rg-arc-s.dtb",
.detect_panel = 0,
.detect_regulator = 0,
.uart_con = 1,
},
};
@ -157,6 +184,22 @@ static const struct rg353_panel rg353_panel_details[] = {
},
};
struct powkiddy_regulators {
const u8 addr;
const char *regulator_compat;
};
static const struct powkiddy_regulators regulator_details[] = {
{
.addr = 0x1c,
.regulator_compat = "tcs,tcs4525",
},
{
.addr = 0x40,
.regulator_compat = "fcs,fan53555",
},
};
/*
* Start LED very early so user knows device is on. Set color
* to red.
@ -164,7 +207,7 @@ static const struct rg353_panel rg353_panel_details[] = {
void spl_board_init(void)
{
/* Set GPIO0_C5, GPIO0_C6, and GPIO0_C7 to output. */
writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | \
writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) |
(GPIO_C7 | GPIO_C6 | GPIO_C5),
(GPIO0_BASE + GPIO_SWPORT_DDR_H));
/* Set GPIO0_C5 and GPIO_C6 to 0 and GPIO0_C7 to 1. */
@ -174,16 +217,22 @@ void spl_board_init(void)
/*
* Buzz the buzzer so the user knows something is going on. Make it
* optional in case PWM is disabled.
* optional in case PWM is disabled or if CONFIG_DM_PWM is not
* enabled.
*/
void __maybe_unused startup_buzz(void)
{
struct udevice *dev;
int err;
err = uclass_get_device(UCLASS_PWM, 0, &dev);
if (!IS_ENABLED(CONFIG_DM_PWM))
return;
/* Probe the PWM controller. */
err = uclass_get_device_by_name(UCLASS_PWM,
"pwm@fe6e0010", &dev);
if (err)
printf("pwm not found\n");
return;
pwm_set_enable(dev, 0, 1);
mdelay(200);
@ -245,6 +294,13 @@ U_BOOT_DRIVER(anbernic_rg353_panel) = {
.plat_auto = sizeof(struct mipi_dsi_panel_plat),
};
/*
* The Anbernic 353 series shipped with 2 distinct displays requiring
* 2 distinct drivers, with no way for a user to know which panel is
* which. This function queries the DSI panel for the panel ID to
* determine which panel is present so the device-tree can be corrected
* automatically.
*/
int rgxx3_detect_display(void)
{
struct udevice *dev;
@ -333,17 +389,48 @@ int rgxx3_detect_display(void)
return 0;
}
/* Detect which Anbernic RGXX3 device we are using so as to load the
* correct devicetree for Linux. Set an environment variable once
* found. The detection depends on the value of ADC channel 1, the
* presence of an eMMC on mmc0, and querying the DSI panel.
/*
* Some of the Powkiddy devices switched the CPU regulator, but users
* are not able to determine this by looking at their hardware.
* Attempt to auto-detect this situation and fixup the device-tree.
*/
int rgxx3_detect_device(void)
int rgxx3_detect_regulator(void)
{
struct udevice *bus;
struct udevice *chip;
u8 val;
int ret;
/* Get the correct i2c bus (i2c0). */
ret = uclass_get_device_by_name(UCLASS_I2C,
"i2c@fdd40000", &bus);
if (ret)
return ret;
/*
* Check for all vdd_cpu regulators and read an arbitrary
* register to confirm it's present.
*/
for (int i = 0; i < ARRAY_SIZE(regulator_details); i++) {
ret = i2c_get_chip(bus, regulator_details[i].addr,
1, &chip);
if (ret)
return ret;
ret = dm_i2c_read(chip, 0, &val, 1);
if (!ret) {
env_set("vdd_cpu", regulator_details[i].regulator_compat);
break;
}
}
return 0;
}
int rgxx3_read_board_id(void)
{
u32 adc_info;
int ret, i;
int board_id = -ENXIO;
struct mmc *mmc;
int ret;
ret = adc_channel_single_shot("saradc@fe720000", 1, &adc_info);
if (ret) {
@ -357,16 +444,32 @@ int rgxx3_detect_device(void)
* design calls for no more than a 1% variance on the
* resistor, so assume a +- value of 15 should be enough.
*/
for (i = 0; i < ARRAY_SIZE(rg3xx_model_details); i++) {
for (int i = 0; i < ARRAY_SIZE(rg3xx_model_details); i++) {
u32 adc_min = rg3xx_model_details[i].adc_value - 15;
u32 adc_max = rg3xx_model_details[i].adc_value + 15;
if (adc_min < adc_info && adc_max > adc_info) {
board_id = i;
break;
}
if (adc_min < adc_info && adc_max > adc_info)
return i;
}
return -ENODEV;
}
/* Detect which Anbernic RGXX3 device we are using so as to load the
* correct devicetree for Linux. Set an environment variable once
* found. The detection depends on the value of ADC channel 1 and the
* presence of an eMMC on mmc0.
*/
int rgxx3_detect_device(void)
{
int ret;
int board_id;
struct mmc *mmc;
board_id = rgxx3_read_board_id();
if (board_id < 0)
return board_id;
/*
* Try to access the eMMC on an RG353V, RG353P, or RG Arc D.
* If it's missing, it's an RG353VS, RG353PS, or RG Arc S.
@ -387,67 +490,97 @@ int rgxx3_detect_device(void)
}
}
if (board_id < 0)
return board_id;
return board_id;
}
env_set("board", rg3xx_model_details[board_id].board);
env_set("board_name",
rg3xx_model_details[board_id].board_name);
env_set("fdtfile", rg3xx_model_details[board_id].fdtfile);
/*
* Check the loaded device tree to set the correct gd->board_type.
* Disable the console if the board doesn't support a console.
*/
int set_gd_value(void)
{
const char *model;
/* Skip panel detection for when it is not needed. */
if (!rg3xx_model_details[board_id].detect_panel)
return 0;
model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
/* Warn but don't fail for errors in auto-detection of the panel. */
ret = rgxx3_detect_display();
if (ret)
printf("Failed to detect panel type\n");
for (int i = 0; i < ARRAY_SIZE(rg3xx_model_details); i++) {
if (strcmp(rg3xx_model_details[i].board_name, model) == 0) {
gd->board_type = i;
if (!rg3xx_model_details[i].uart_con)
gd->flags |= GD_FLG_SILENT |
GD_FLG_DISABLE_CONSOLE;
return 0;
}
}
return 0;
return -ENODEV;
}
int rk_board_late_init(void)
{
int ret;
ret = rgxx3_detect_device();
ret = set_gd_value();
if (ret) {
printf("Unable to detect device type: %d\n", ret);
return ret;
printf("Unable to auto-detect device\n");
goto end;
}
/*
* Change the model number on the RG353M since it uses the same
* tree as the RG353P.
*/
if (gd->board_type == RG353P) {
ret = rgxx3_read_board_id();
if (ret > 0)
gd->board_type = ret;
}
env_set("board", rg3xx_model_details[gd->board_type].board);
env_set("board_name",
rg3xx_model_details[gd->board_type].board_name);
env_set("fdtfile", rg3xx_model_details[gd->board_type].fdtfile);
/*
* Skip panel detection if not needed. Warn but don't fail for
* errors in auto-detection of the panel.
*/
if (rg3xx_model_details[gd->board_type].detect_panel) {
ret = rgxx3_detect_display();
if (ret)
printf("Failed to detect panel type\n");
}
/*
* Skip vdd_cpu regulator detection if not needed. Warn but
* don't fail for errors in auto-detection of regulator.
*/
if (rg3xx_model_details[gd->board_type].detect_regulator) {
ret = rgxx3_detect_regulator();
if (ret)
printf("Unable to detect vdd_cpu regulator\n");
}
end:
/* Turn off red LED and turn on orange LED. */
writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | GPIO_C6,
(GPIO0_BASE + GPIO_SWPORT_DR_H));
if (IS_ENABLED(CONFIG_DM_PWM))
startup_buzz();
startup_buzz();
return 0;
}
int ft_board_setup(void *blob, struct bd_info *bd)
int rgxx3_panel_fixup(void *blob)
{
const struct rg353_panel *panel = NULL;
int node, ret, i;
int node, ret;
char *env;
/* No fixups necessary for the RG503 */
env = env_get("board_name");
if (env && (!strcmp(env, rg3xx_model_details[RG503].board_name)))
return 0;
/* Change the model name of the RG353M */
if (env && (!strcmp(env, rg3xx_model_details[RG353M].board_name)))
fdt_setprop(blob, 0, "model",
rg3xx_model_details[RG353M].board_name,
sizeof(rg3xx_model_details[RG353M].board_name));
env = env_get("panel");
if (!env) {
printf("Can't get panel env\n");
return 0;
return -EINVAL;
}
/*
@ -469,7 +602,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
/* Panels don't match, search by first compatible value. */
for (i = 0; i < ARRAY_SIZE(rg353_panel_details); i++) {
for (int i = 0; i < ARRAY_SIZE(rg353_panel_details); i++) {
if (!strcmp(env, rg353_panel_details[i].panel_compat[0])) {
panel = &rg353_panel_details[i];
break;
@ -489,3 +622,109 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
int rgxx3_regulator_fixup(void *blob)
{
const struct powkiddy_regulators *vdd_cpu = NULL;
int node, ret, i;
char path[] = "/i2c@fdd40000/regulator@00";
char name[] = "regulator@00";
char *env;
env = env_get("vdd_cpu");
if (!env) {
printf("Can't get vdd_cpu env\n");
return -EINVAL;
}
/*
* Find the device we have in our tree, which may or may not
* be present.
*/
for (i = 0; i < ARRAY_SIZE(regulator_details); i++) {
sprintf(path, "/i2c@fdd40000/regulator@%02x",
regulator_details[i].addr);
node = fdt_path_offset(blob, path);
if (node > 0)
break;
printf("Unable to find vdd_cpu\n");
return -ENODEV;
}
node = fdt_path_offset(blob, path);
if (!(node > 0)) {
printf("Can't find the vdd_cpu node\n");
return -ENODEV;
}
ret = fdt_node_check_compatible(blob, node, env);
if (ret < 0)
return -ENODEV;
/* vdd_cpu regulators match, return 0. */
if (!ret)
return 0;
/* Regulators don't match, search by first compatible value. */
for (i = 0; i < ARRAY_SIZE(regulator_details); i++) {
if (!strcmp(env, regulator_details[i].regulator_compat)) {
vdd_cpu = &regulator_details[i];
break;
}
}
if (!vdd_cpu) {
printf("Unable to identify vdd_cpu by compat string\n");
return -ENODEV;
}
/* Set the compatible and reg with the auto-detected values */
fdt_setprop_string(blob, node, "compatible", vdd_cpu->regulator_compat);
fdt_setprop_u32(blob, node, "reg", vdd_cpu->addr);
sprintf(name, "regulator@%02x", vdd_cpu->addr);
fdt_set_name(blob, node, name);
return 0;
}
int ft_board_setup(void *blob, struct bd_info *bd)
{
int ret;
if (gd->board_type == RG353M)
fdt_setprop(blob, 0, "model",
rg3xx_model_details[RG353M].board_name,
sizeof(rg3xx_model_details[RG353M].board_name));
if (rg3xx_model_details[gd->board_type].detect_panel) {
ret = rgxx3_panel_fixup(blob);
if (ret)
printf("Unable to update panel compat\n");
}
if (rg3xx_model_details[gd->board_type].detect_regulator) {
ret = rgxx3_regulator_fixup(blob);
if (ret)
printf("Unable to update vdd_cpu compat\n");
}
return 0;
}
int board_fit_config_name_match(const char *name)
{
int ret;
if (gd->board_type == 0) {
ret = rgxx3_detect_device();
if (ret < 0)
return ret;
gd->board_type = ret;
}
if (strcmp(name, rg3xx_model_details[gd->board_type].fdtfile) == 0)
return 0;
return -ENXIO;
}

3
board/friendlyelec/nanopc-t6-rk3588/Makefile Normal file
View file

@ -0,0 +1,3 @@
# SPDX-License-Identifier: GPL-2.0+
obj-y += nanopc-t6-rk3588.o

59
board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c Normal file
View file

@ -0,0 +1,59 @@
// SPDX-License-Identifier: GPL-2.0+
#include <adc.h>
#include <env.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#define HW_ID_CHANNEL 5
struct board_model {
unsigned int low;
unsigned int high;
const char *fdtfile;
};
static const struct board_model board_models[] = {
{ 348, 528, "rockchip/rk3588-nanopc-t6.dtb" },
{ 1957, 2137, "rockchip/rk3588-nanopc-t6-lts.dtb" },
};
static const struct board_model *get_board_model(void)
{
unsigned int val;
int i, ret;
ret = adc_channel_single_shot("adc@fec10000", HW_ID_CHANNEL, &val);
if (ret)
return NULL;
for (i = 0; i < ARRAY_SIZE(board_models); i++) {
unsigned int min = board_models[i].low;
unsigned int max = board_models[i].high;
if (min <= val && val <= max)
return &board_models[i];
}
return NULL;
}
int rk_board_late_init(void)
{
const struct board_model *model = get_board_model();
if (model)
env_set("fdtfile", model->fdtfile);
return 0;
}
int board_fit_config_name_match(const char *name)
{
const struct board_model *model = get_board_model();
if (model && !strcmp(name, model->fdtfile))
return 0;
return -EINVAL;
}

12
board/hardkernel/odroid_m1s/Kconfig Normal file
View file

@ -0,0 +1,12 @@
if TARGET_ODROID_M1S_RK3566
config SYS_BOARD
default "odroid_m1s"
config SYS_VENDOR
default "hardkernel"
config SYS_CONFIG_NAME
default "odroid_m1"
endif

6
board/hardkernel/odroid_m1s/MAINTAINERS Normal file
View file

@ -0,0 +1,6 @@
ODROID-M1S
M: Jonas Karlman <jonas@kwiboo.se>
S: Maintained
F: board/hardkernel/odroid_m1s/
F: configs/odroid-m1s-rk3566_defconfig
F: arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi

12
board/hardkernel/odroid_m2/Kconfig Normal file
View file

@ -0,0 +1,12 @@
if TARGET_ODROID_M2_RK3588S
config SYS_BOARD
default "odroid_m2"
config SYS_VENDOR
default "hardkernel"
config SYS_CONFIG_NAME
default "odroid_m2"
endif

7
board/hardkernel/odroid_m2/MAINTAINERS Normal file
View file

@ -0,0 +1,7 @@
ODROID-M2
M: Jonas Karlman <jonas@kwiboo.se>
S: Maintained
F: board/hardkernel/odroid_m2/
F: include/configs/odroid_m2.h
F: configs/odroid-m2-rk3588s_defconfig
F: arch/arm/dts/rk3588s-odroid-m2-u-boot.dtsi

3
common/Kconfig
View file

@ -928,6 +928,9 @@ config BOARD_RNG_SEED
new seed for use on subsequent boots, and whether or not the
kernel should account any entropy from the given seed.
Default seed size (64 bytes) can be overridden by a decimal
environment variable rng_seed_size.
endmenu
menu "Update support"

12
configs/anbernic-rgxx3-rk3566_defconfig
View file

@ -3,7 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3"
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-anbernic-rg353p"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
CONFIG_SPL_SERIAL=y
@ -20,8 +20,10 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-anbernic-rgxx3.dtb"
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-anbernic-rg353p.dtb"
CONFIG_DISABLE_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_TYPES=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_RNG_SEED=y
@ -39,16 +41,15 @@ CONFIG_CMD_MMC=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_LIST="rockchip/rk3566-anbernic-rg353p rockchip/rk3566-anbernic-rg353v rockchip/rk3566-anbernic-rg503 rockchip/rk3566-anbernic-rg-arc-d rockchip/rk3566-anbernic-rg353ps rockchip/rk3566-anbernic-rg353vs rockchip/rk3566-anbernic-rg-arc-s rockchip/rk3566-powkiddy-rgb30 rockchip/rk3566-powkiddy-rk2023 rockchip/rk3566-powkiddy-rgb10max3"
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NO_NET=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_ADC=y
CONFIG_SPL_CLK=y
CONFIG_ARM_SMCCC_FEATURES=y
CONFIG_SCMI_FIRMWARE=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
@ -71,6 +72,7 @@ CONFIG_SPL_RAM=y
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
# CONFIG_RNG_SMCCC_TRNG is not set
CONFIG_BAUDRATE=1500000
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y

3
configs/evb-rk3328_defconfig
View file

@ -88,13 +88,12 @@ CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_ROCKUSB=y

12
configs/nanopc-t6-rk3588_defconfig
View file

@ -32,6 +32,7 @@ CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
CONFIG_SPL_ATF=y
CONFIG_CMD_ADC=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@ -43,13 +44,20 @@ CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_LIST="rockchip/rk3588-nanopc-t6 rockchip/rk3588-nanopc-t6-lts"
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_ADC=y
CONFIG_BUTTON=y
CONFIG_BUTTON_ADC=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
@ -69,12 +77,16 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y

3
configs/nanopi-r2c-plus-rk3328_defconfig
View file

@ -94,13 +94,12 @@ CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_ROCKUSB=y

3
configs/nanopi-r2c-rk3328_defconfig
View file

@ -94,13 +94,12 @@ CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_ROCKUSB=y

3
configs/nanopi-r2s-rk3328_defconfig
View file

@ -94,13 +94,12 @@ CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_ROCKUSB=y

93
configs/odroid-m1s-rk3566_defconfig Normal file
View file

@ -0,0 +1,93 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-odroid-m1s"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_ODROID_M1S_RK3566=y
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-odroid-m1s.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_INI=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_CRAMFS=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_AHCI_PCI=y
CONFIG_DWC_AHCI=y
CONFIG_SPL_CLK=y
# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_FS_CRAMFS=y
CONFIG_ERRNO_STR=y

96
configs/odroid-m2-rk3588s_defconfig Normal file
View file

@ -0,0 +1,96 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-odroid-m2"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_ODROID_M2_RK3588S=y
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-odroid-m2.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_INI=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_CRAMFS=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_AHCI_PCI=y
CONFIG_DWC_AHCI=y
CONFIG_SPL_CLK=y
# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_FS_CRAMFS=y
CONFIG_ERRNO_STR=y

3
configs/orangepi-r1-plus-lts-rk3328_defconfig
View file

@ -104,13 +104,12 @@ CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_ROCKUSB=y

3
configs/orangepi-r1-plus-rk3328_defconfig
View file

@ -104,13 +104,12 @@ CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_ROCKUSB=y

2
configs/radxa-cm3-io-rk3566_defconfig
View file

@ -39,6 +39,8 @@ CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y

2
configs/radxa-e25-rk3568_defconfig
View file

@ -44,6 +44,8 @@ CONFIG_DWC_AHCI=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y

2
configs/rock-3a-rk3568_defconfig
View file

@ -53,6 +53,8 @@ CONFIG_AHCI_PCI=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y

2
configs/rock-4c-plus-rk3399_defconfig
View file

@ -47,6 +47,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y

2
configs/rock-4se-rk3399_defconfig
View file

@ -51,6 +51,8 @@ CONFIG_AHCI_PCI=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y

2
configs/rock-pi-4-rk3399_defconfig
View file

@ -52,6 +52,8 @@ CONFIG_AHCI_PCI=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y

2
configs/rock-pi-4c-rk3399_defconfig
View file

@ -52,6 +52,8 @@ CONFIG_AHCI_PCI=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y

2
configs/rock-pi-e-rk3328_defconfig
View file

@ -53,6 +53,8 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PHY_REALTEK=y

2
configs/rock-pi-e-v3-rk3328_defconfig
View file

@ -54,6 +54,8 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PHY_REALTEK=y

2
configs/rock5a-rk3588s_defconfig
View file

@ -39,6 +39,8 @@ CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y

2
configs/rock5b-rk3588_defconfig
View file

@ -57,6 +57,8 @@ CONFIG_SPL_CLK=y
# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y

2
doc/board/rockchip/rockchip.rst
View file

@ -98,6 +98,7 @@ List of mainline supported Rockchip boards:
* rk3566
- Anbernic RGxx3 (anbernic-rgxx3-rk3566)
- Hardkernel ODROID-M1S (odroid-m1s-rk3566)
- Pine64 PineTab2 (pinetab2-rk3566)
- Pine64 Quartz64-A Board (quartz64-a-rk3566)
- Pine64 Quartz64-B Board (quartz64-b-rk3566)
@ -132,6 +133,7 @@ List of mainline supported Rockchip boards:
- FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s)
- FriendlyElec NanoPi R6S (nanopi-r6s-rk3588s)
- Generic RK3588S/RK3588 (generic-rk3588)
- Hardkernel ODROID-M2 (odroid-m2-rk3588s)
- Indiedroid Nova (nova-rk3588s)
- Pine64 QuartzPro64 (quartzpro64-rk3588)
- Radxa ROCK 5 ITX (rock-5-itx-rk3588)

5
doc/usage/environment.rst
View file

@ -323,6 +323,11 @@ netretry
Useful on scripts which control the retry operation
themselves.
rng_seed_size
Size of random value added to device-tree node /chosen/rng-seed.
This variable is given as a decimal number.
If unset, 64 bytes is used as the default.
silent_linux
If set then Linux will be told to boot silently, by
adding 'console=' to its command line. If "yes" it will be

4
drivers/adc/adc-uclass.c
View file

@ -382,7 +382,7 @@ static int adc_vdd_plat_set(struct udevice *dev)
if (!ret)
return adc_vdd_plat_update(dev);
if (ret != -ENOENT)
if (ret != -ENOSYS && ret != -ENOENT)
return ret;
/* No vdd-supply phandle. */
@ -406,7 +406,7 @@ static int adc_vss_plat_set(struct udevice *dev)
if (!ret)
return adc_vss_plat_update(dev);
if (ret != -ENOENT)
if (ret != -ENOSYS && ret != -ENOENT)
return ret;
/* No vss-supply phandle. */

9
drivers/adc/rockchip-saradc.c
View file

@ -241,7 +241,7 @@ int rockchip_saradc_probe(struct udevice *dev)
{
struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
struct rockchip_saradc_priv *priv = dev_get_priv(dev);
struct udevice *vref;
struct udevice *vref = NULL;
struct clk clk;
int vref_uv;
int ret;
@ -259,7 +259,7 @@ int rockchip_saradc_probe(struct udevice *dev)
priv->active_channel = -1;
ret = device_get_supply_regulator(dev, "vref-supply", &vref);
if (ret) {
if (ret && uc_pdata->vdd_microvolts <= 0) {
printf("can't get vref-supply: %d\n", ret);
return ret;
}
@ -267,7 +267,10 @@ int rockchip_saradc_probe(struct udevice *dev)
if (priv->reset)
rockchip_saradc_reset_controller(priv->reset);
vref_uv = regulator_get_value(vref);
if (vref)
vref_uv = regulator_get_value(vref);
else
vref_uv = uc_pdata->vdd_microvolts;
if (vref_uv < 0) {
printf("can't get vref-supply value: %d\n", vref_uv);
return vref_uv;

105
drivers/clk/rockchip/clk_px30.c
View file

@ -1588,6 +1588,105 @@ static ulong px30_pmuclk_set_gpll_rate(struct px30_pmuclk_priv *priv, ulong hz)
return priv->gpll_hz;
}
static ulong px30_pmu_uart0_get_clk(struct px30_pmuclk_priv *priv)
{
struct px30_pmucru *pmucru = priv->pmucru;
u32 clk_div_con;
u32 clk_pll_sel;
ulong pll_rate;
u32 clk_sel;
ulong clk;
u32 con;
con = readl(&pmucru->pmu_clksel_con[3]);
clk_div_con = bitfield_extract_by_mask(con, UART0_DIV_CON_MASK);
clk_pll_sel = bitfield_extract_by_mask(con, UART0_PLL_SEL_MASK);
switch (clk_pll_sel) {
case UART0_PLL_SEL_GPLL:
pll_rate = px30_pmuclk_get_gpll_rate(priv);
break;
case UART0_PLL_SEL_24M:
pll_rate = OSC_HZ;
break;
case UART0_PLL_SEL_480M:
case UART0_PLL_SEL_NPLL:
/* usbphy480M and NPLL clocks, generated by CRU, are not supported yet */
default:
return -ENOENT;
}
clk = DIV_TO_RATE(pll_rate, clk_div_con);
con = readl(&pmucru->pmu_clksel_con[4]);
clk_sel = bitfield_extract_by_mask(con, UART0_CLK_SEL_MASK);
switch (clk_sel) {
case UART0_CLK_SEL_UART0:
return clk;
case UART0_CLK_SEL_UART0_NP5:{
u32 clk_divnp5_div_con;
clk_divnp5_div_con =
bitfield_extract_by_mask(con, UART0_DIVNP5_MASK);
return 2 * (u64) clk / (2 * clk_divnp5_div_con + 3);
}
case UART0_CLK_SEL_UART0_FRAC:{
u32 fracdiv, n, m;
fracdiv = readl(&pmucru->pmu_clksel_con[5]);
n = bitfield_extract_by_mask(fracdiv,
CLK_UART_FRAC_NUMERATOR_MASK);
m = bitfield_extract_by_mask(fracdiv,
CLK_UART_FRAC_DENOMINATOR_MASK);
return (u64) clk * n / m;
}
default:
return -ENOENT;
}
}
static ulong px30_pmu_uart0_set_clk(struct px30_pmuclk_priv *priv, ulong rate)
{
struct px30_pmucru *pmucru = priv->pmucru;
ulong m = 0, n = 0;
ulong gpll_rate;
u32 clk_div_con;
u32 clk_pll_sel;
u32 clk_sel;
gpll_rate = px30_pmuclk_get_gpll_rate(priv);
if (gpll_rate % rate == 0) {
clk_pll_sel = UART0_PLL_SEL_GPLL;
clk_sel = UART0_CLK_SEL_UART0;
clk_div_con = DIV_ROUND_UP(priv->gpll_hz, rate);
} else if (rate == OSC_HZ) {
clk_pll_sel = UART0_PLL_SEL_24M;
clk_sel = UART0_CLK_SEL_UART0;
clk_div_con = 1;
} else {
clk_pll_sel = UART0_PLL_SEL_GPLL;
clk_sel = UART0_CLK_SEL_UART0_FRAC;
clk_div_con = 1;
rational_best_approximation(rate, priv->gpll_hz,
GENMASK(16 - 1, 0),
GENMASK(16 - 1, 0), &m, &n);
}
rk_clrsetreg(&pmucru->pmu_clksel_con[3],
UART0_PLL_SEL_MASK | UART0_DIV_CON_MASK,
clk_pll_sel << UART0_PLL_SEL_SHIFT | (clk_div_con - 1));
rk_clrsetreg(&pmucru->pmu_clksel_con[4], UART0_CLK_SEL_MASK,
clk_sel << UART0_CLK_SEL_SHIFT);
if (m && n) {
u32 fracdiv;
fracdiv = m << CLK_UART_FRAC_NUMERATOR_SHIFT | n;
writel(fracdiv, &pmucru->pmu_clksel_con[5]);
}
return px30_pmu_uart0_get_clk(priv);
}
static ulong px30_pmuclk_get_rate(struct clk *clk)
{
struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev);
@ -1601,6 +1700,9 @@ static ulong px30_pmuclk_get_rate(struct clk *clk)
case PCLK_PMU_PRE:
rate = px30_pclk_pmu_get_pmuclk(priv);
break;
case SCLK_UART0_PMU:
rate = px30_pmu_uart0_get_clk(priv);
break;
default:
return -ENOENT;
}
@ -1621,6 +1723,9 @@ static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate)
case PCLK_PMU_PRE:
ret = px30_pclk_pmu_set_pmuclk(priv, rate);
break;
case SCLK_UART0_PMU:
ret = px30_pmu_uart0_set_clk(priv, rate);
break;
default:
return -ENOENT;
}

663
dts/upstream/src/arm64/rockchip/rk3566-odroid-m1s.dts Normal file
View file

@ -0,0 +1,663 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3566.dtsi"
/ {
model = "Hardkernel ODROID-M1S";
compatible = "hardkernel,odroid-m1s", "rockchip,rk3566";
aliases {
ethernet0 = &gmac1;
mmc0 = &sdhci;
mmc1 = &sdmmc0;
};
chosen {
stdout-path = "serial2:1500000n8";
};
hdmi-con {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pwr_led>, <&sys_led>;
led_pwr: led-0 {
color = <LED_COLOR_ID_RED>;
default-state = "on";
function = LED_FUNCTION_POWER;
gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
led_sys: led-1 {
color = <LED_COLOR_ID_BLUE>;
default-state = "on";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
vcc3v3_lcd: regulator-3v3-vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_pwren>;
regulator-name = "vcc3v3_lcd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_pcie: regulator-3v3-vcc-pcie {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_pwren>;
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_sys: regulator-3v3-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_sys: regulator-5v0-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_usb2_host: regulator-5v0-vcc-usb2-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb2_host_pwren>;
regulator-name = "vcc5v0_usb2_host";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_usb2_otg: regulator-5v0-vcc-usb2-otg {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb2_otg_pwren>;
regulator-name = "vcc5v0_usb2_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_usb3_host: regulator-5v0-vcc-usb3-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_host_pwren>;
regulator-name = "vcc5v0_usb3_host";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "Analog RK809";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk809>;
};
};
};
&combphy1 {
status = "okay";
};
&combphy2 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&cpu1 {
cpu-supply = <&vdd_cpu>;
};
&cpu2 {
cpu-supply = <&vdd_cpu>;
};
&cpu3 {
cpu-supply = <&vdd_cpu>;
};
&gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
clock_in_out = "input";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus
&gmac1m1_clkinout>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&hdmi {
avdd-0v9-supply = <&vdda0v9_image>;
avdd-1v8-supply = <&vcca1v8_image>;
status = "okay";
};
&hdmi_in {
hdmi_in_vp0: endpoint {
remote-endpoint = <&vp0_out_hdmi>;
};
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&hdmi_sound {
status = "okay";
};
&i2c0 {
status = "okay";
vdd_cpu: regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1390000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
#clock-cells = <1>;
clocks = <&cru I2S1_MCLKOUT_TX>;
clock-names = "mclk";
clock-output-names = "rk809-clkout1", "rk809-clkout2";
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
#sound-dai-cells = <0>;
system-power-controller;
wakeup-source;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-name = "vdd_npu";
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-name = "vdda0v9_image";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-name = "vdda_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-name = "vdda0v9_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-name = "vccio_acodec";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-name = "vcc3v3_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-name = "vcca1v8_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-name = "vcca1v8_image";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-name = "vcc3v3_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&i2s0_8ch {
status = "okay";
};
&i2s1_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
&i2s1m0_sdi0
&i2s1m0_sdo0>;
rockchip,trcm-sync-tx-only;
status = "okay";
};
&mdio1 {
rgmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie20_pins>;
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pinctrl {
lcd {
lcd_pwren: lcd-pwren {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
pwr_led: pwr-led {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
sys_led: sys-led {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie20_pins: pcie20-pins {
rockchip,pins =
<1 RK_PB0 4 &pcfg_pull_none>,
<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
<1 RK_PB1 4 &pcfg_pull_none>;
};
pcie_pwren: pcie-pwren {
rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
usb2_host_pwren: usb2-host-pwren {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb2_otg_pwren: usb2-otg-pwren {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb3_host_pwren: usb3-host-pwren {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pmu_io_domains {
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8>;
status = "okay";
};
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
status = "okay";
};
&uart2 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb_host1_xhci {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_host {
phy-supply = <&vcc5v0_usb3_host>;
status = "okay";
};
&usb2phy0_otg {
phy-supply = <&vcc5v0_usb2_otg>;
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb2phy1_host {
phy-supply = <&vcc5v0_usb2_host>;
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc5v0_usb2_host>;
status = "okay";
};
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
status = "okay";
};
&vop_mmu {
status = "okay";
};
&vp0 {
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
remote-endpoint = <&hdmi_in_vp0>;
};
};

2
dts/upstream/src/arm64/rockchip/rk3568-odroid-m1.dts
View file

@ -13,7 +13,7 @@
/ {
model = "Hardkernel ODROID-M1";
compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
compatible = "hardkernel,odroid-m1", "rockchip,rk3568";
aliases {
ethernet0 = &gmac0;

60
dts/upstream/src/arm64/rockchip/rk3588-nanopc-t6-lts.dts Normal file
View file

@ -0,0 +1,60 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
* Copyright (c) 2023 Thomas McKahan
* Copyright (c) 2024 Linaro Ltd.
*
*/
/dts-v1/;
#include "rk3588-nanopc-t6.dtsi"
/ {
model = "FriendlyElec NanoPC-T6 LTS";
compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588";
/* provide power for on-board USB 2.0 hub */
vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&usb20_host_pwren>;
pinctrl-names = "default";
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "vcc5v0_usb20_host";
vin-supply = <&vcc5v0_sys>;
};
};
&pinctrl {
usb {
usb20_host_pwren: usb20-host-pwren {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&u2phy1 {
status = "okay";
};
&u2phy1_otg {
status = "okay";
};
&u2phy2_host {
phy-supply = <&vcc5v0_usb20_host>;
};
&usbdp_phy1 {
status = "okay";
};
&usb_host1_xhci {
dr_mode = "host";
status = "okay";
};

909
dts/upstream/src/arm64/rockchip/rk3588-nanopc-t6.dts
View file

@ -2,175 +2,18 @@
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
* Copyright (c) 2023 Thomas McKahan
* Copyright (c) 2024 Linaro Ltd.
*
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
#include "rk3588-nanopc-t6.dtsi"
/ {
model = "FriendlyElec NanoPC-T6";
compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc;
};
chosen {
stdout-path = "serial2:1500000n8";
};
leds {
compatible = "gpio-leds";
sys_led: led-0 {
gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
label = "system-led";
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
usr_led: led-1 {
gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
label = "user-led";
pinctrl-names = "default";
pinctrl-0 = <&usr_led_pin>;
};
};
sound {
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
simple-audio-card,name = "realtek,rt5616-codec";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
simple-audio-card,hp-pin-name = "Headphones";
simple-audio-card,widgets =
"Headphone", "Headphones",
"Microphone", "Microphone Jack";
simple-audio-card,routing =
"Headphones", "HPOL",
"Headphones", "HPOR",
"MIC1", "Microphone Jack",
"Microphone Jack", "micbias1";
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rt5616>;
};
};
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
/* vcc5v0_sys powers peripherals */
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
/* vcc4v0_sys powers the RK806, RK860's */
vcc4v0_sys: vcc4v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc4v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <4000000>;
regulator-max-microvolt = <4000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc-1v1-nldo-s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc4v0_sys>;
};
vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_pcie20";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vbus5v0_typec: vbus5v0-typec-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_m2_1_pwren>;
regulator-name = "vcc3v3_pcie2x1l0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie30: vcc3v3-pcie30-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_m2_0_pwren>;
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {
compatible = "regulator-fixed";
enable-active-low;
gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>;
regulator-boot-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "vcc3v3_sd_s0";
vin-supply = <&vcc_3v3_s3>;
};
vdd_4g_3v3: vdd-4g-3v3-regulator {
compatible = "regulator-fixed";
enable-active-high;
@ -184,762 +27,14 @@
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&gpio0 {
gpio-line-names = /* GPIO0 A0-A7 */
"", "", "", "",
"", "", "", "",
/* GPIO0 B0-B7 */
"", "", "", "",
"", "", "", "",
/* GPIO0 C0-C7 */
"", "", "", "",
"HEADER_10", "HEADER_08", "HEADER_32", "",
/* GPIO0 D0-D7 */
"", "", "", "",
"", "", "", "";
};
&gpio1 {
gpio-line-names = /* GPIO1 A0-A7 */
"HEADER_27", "HEADER_28", "", "",
"", "", "", "HEADER_15",
/* GPIO1 B0-B7 */
"HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23",
"HEADER_24", "HEADER_22", "", "",
/* GPIO1 C0-C7 */
"", "", "", "",
"", "", "", "",
/* GPIO1 D0-D7 */
"", "", "", "",
"", "", "HEADER_05", "HEADER_03";
};
&gpio2 {
gpio-line-names = /* GPIO2 A0-A7 */
"", "", "", "",
"", "", "", "",
/* GPIO2 B0-B7 */
"", "", "", "",
"", "", "", "",
/* GPIO2 C0-C7 */
"", "CSI1_11", "CSI1_12", "",
"", "", "", "",
/* GPIO2 D0-D7 */
"", "", "", "",
"", "", "", "";
};
&gpio3 {
gpio-line-names = /* GPIO3 A0-A7 */
"HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36",
"HEADER_37", "", "DSI0_12", "",
/* GPIO3 B0-B7 */
"HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16",
"HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12",
/* GPIO3 C0-C7 */
"DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13",
"", "", "", "",
/* GPIO3 D0-D7 */
"", "", "", "",
"", "DSI1_10", "", "";
};
&gpio4 {
gpio-line-names = /* GPIO4 A0-A7 */
"DSI1_08", "DSI1_14", "", "DSI1_12",
"", "", "", "",
/* GPIO4 B0-B7 */
"", "", "", "",
"", "", "", "",
/* GPIO4 C0-C7 */
"", "", "", "",
"CSI0_11", "CSI0_12", "", "",
/* GPIO4 D0-D7 */
"", "", "", "",
"", "", "", "";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
status = "okay";
vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c2 {
status = "okay";
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
rockchip,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c6 {
clock-frequency = <200000>;
status = "okay";
fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&usbc0_int>;
pinctrl-names = "default";
vbus-supply = <&vbus5v0_typec>;
connector {
compatible = "usb-c-connector";
data-role = "dual";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
op-sink-microwatt = <1000000>;
};
};
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
&i2c7 {
clock-frequency = <200000>;
status = "okay";
rt5616: codec@1b {
compatible = "realtek,rt5616";
reg = <0x1b>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
#sound-dai-cells = <0>;
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
port {
rt5616_p0_0: endpoint {
remote-endpoint = <&i2s0_8ch_p0_0>;
};
};
};
/* connected with MIPI-CSI1 */
};
&i2c8 {
pinctrl-0 = <&i2c8m2_xfer>;
};
&i2s0_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s0_lrck
&i2s0_mclk
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
status = "okay";
i2s0_8ch_p0: port {
i2s0_8ch_p0_0: endpoint {
dai-format = "i2s";
mclk-fs = <256>;
remote-endpoint = <&rt5616_p0_0>;
};
};
};
&pcie2x1l0 {
reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_0_rst>;
status = "okay";
};
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_1_rst>;
status = "okay";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_2_rst>;
status = "okay";
};
&pcie30phy {
status = "okay";
};
&pcie3x4 {
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pinctrl {
gpio-leds {
sys_led_pin: sys-led-pin {
rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
usr_led_pin: usr-led-pin {
rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie {
pcie2_0_rst: pcie2-0-rst {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie2_1_rst: pcie2-1-rst {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie2_2_rst: pcie2-2-rst {
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_m2_0_pwren: pcie-m20-pwren {
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_m2_1_pwren: pcie-m21-pwren {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
pin_4g_lte_pwren: 4g-lte-pwren {
rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbc0_int: usbc0-int {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pwm1 {
pinctrl-0 = <&pwm1m1_pins>;
status = "okay";
};
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
};
&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
max-frequency = <200000000>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
no-mmc;
no-sdio;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
};
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
num-cs = <1>;
pmic@0 {
compatible = "rockchip,rk806";
spi-max-frequency = <1000000>;
reg = <0x0>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
system-power-controller;
vcc1-supply = <&vcc4v0_sys>;
vcc2-supply = <&vcc4v0_sys>;
vcc3-supply = <&vcc4v0_sys>;
vcc4-supply = <&vcc4v0_sys>;
vcc5-supply = <&vcc4v0_sys>;
vcc6-supply = <&vcc4v0_sys>;
vcc7-supply = <&vcc4v0_sys>;
vcc8-supply = <&vcc4v0_sys>;
vcc9-supply = <&vcc4v0_sys>;
vcc10-supply = <&vcc4v0_sys>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc4v0_sys>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc4v0_sys>;
gpio-controller;
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun0";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
regulators {
vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_gpu_s0";
regulator-enable-ramp-delay = <400>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_cpu_lit_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_log_s0: dcdc-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_log_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-init-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_vdenc_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <900000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdd2_ddr_s3: dcdc-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd2_ddr_s3";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_2v0_pldo_s3: dcdc-reg7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_2v0_pldo_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2000000>;
};
};
vcc_3v3_s3: dcdc-reg8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_3v3_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vddq_ddr_s0: dcdc-reg9 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vddq_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg10 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avcc_1v8_s0: pldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "avcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s0: pldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avdd_1v2_s0: pldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "avdd_1v2_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3_s0: pldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vcc_3v3_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vccio_sd_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
pldo6_s3: pldo-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "pldo6_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_ddr_pll_s0: nldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_ddr_pll_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
avdd_0v75_s0: nldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "avdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v85_s0: nldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_0v85_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v75_s0: nldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&tsadc {
status = "okay";
};
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
&u2phy2_host {
phy-supply = <&vdd_4g_3v3>;
status = "okay";
};
&u2phy3_host {
status = "okay";
};
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};

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dts/upstream/src/arm64/rockchip/rk3588-nanopc-t6.dtsi Normal file
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@ -0,0 +1,943 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
* Copyright (c) 2023 Thomas McKahan
*
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
/ {
model = "FriendlyElec NanoPC-T6";
compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc;
};
chosen {
stdout-path = "serial2:1500000n8";
};
leds {
compatible = "gpio-leds";
sys_led: led-0 {
gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
label = "system-led";
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&sys_led_pin>;
};
usr_led: led-1 {
gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
label = "user-led";
pinctrl-names = "default";
pinctrl-0 = <&usr_led_pin>;
};
};
sound {
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
simple-audio-card,name = "realtek,rt5616-codec";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
simple-audio-card,hp-pin-name = "Headphones";
simple-audio-card,widgets =
"Headphone", "Headphones",
"Microphone", "Microphone Jack";
simple-audio-card,routing =
"Headphones", "HPOL",
"Headphones", "HPOR",
"MIC1", "Microphone Jack",
"Microphone Jack", "micbias1";
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rt5616>;
};
};
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
/* vcc5v0_sys powers peripherals */
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
/* vcc4v0_sys powers the RK806, RK860's */
vcc4v0_sys: vcc4v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc4v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <4000000>;
regulator-max-microvolt = <4000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc-1v1-nldo-s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc4v0_sys>;
};
vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_pcie20";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vbus5v0_typec: vbus5v0-typec-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_m2_1_pwren>;
regulator-name = "vcc3v3_pcie2x1l0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie30: vcc3v3-pcie30-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_m2_0_pwren>;
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {
compatible = "regulator-fixed";
enable-active-low;
gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>;
regulator-boot-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "vcc3v3_sd_s0";
vin-supply = <&vcc_3v3_s3>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&gpio0 {
gpio-line-names = /* GPIO0 A0-A7 */
"", "", "", "",
"", "", "", "",
/* GPIO0 B0-B7 */
"", "", "", "",
"", "", "", "",
/* GPIO0 C0-C7 */
"", "", "", "",
"HEADER_10", "HEADER_08", "HEADER_32", "",
/* GPIO0 D0-D7 */
"", "", "", "",
"", "", "", "";
};
&gpio1 {
gpio-line-names = /* GPIO1 A0-A7 */
"HEADER_27", "HEADER_28", "", "",
"", "", "", "HEADER_15",
/* GPIO1 B0-B7 */
"HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23",
"HEADER_24", "HEADER_22", "", "",
/* GPIO1 C0-C7 */
"", "", "", "",
"", "", "", "",
/* GPIO1 D0-D7 */
"", "", "", "",
"", "", "HEADER_05", "HEADER_03";
};
&gpio2 {
gpio-line-names = /* GPIO2 A0-A7 */
"", "", "", "",
"", "", "", "",
/* GPIO2 B0-B7 */
"", "", "", "",
"", "", "", "",
/* GPIO2 C0-C7 */
"", "CSI1_11", "CSI1_12", "",
"", "", "", "",
/* GPIO2 D0-D7 */
"", "", "", "",
"", "", "", "";
};
&gpio3 {
gpio-line-names = /* GPIO3 A0-A7 */
"HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36",
"HEADER_37", "", "DSI0_12", "",
/* GPIO3 B0-B7 */
"HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16",
"HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12",
/* GPIO3 C0-C7 */
"DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13",
"", "", "", "",
/* GPIO3 D0-D7 */
"", "", "", "",
"", "DSI1_10", "", "";
};
&gpio4 {
gpio-line-names = /* GPIO4 A0-A7 */
"DSI1_08", "DSI1_14", "", "DSI1_12",
"", "", "", "",
/* GPIO4 B0-B7 */
"", "", "", "",
"", "", "", "",
/* GPIO4 C0-C7 */
"", "", "", "",
"CSI0_11", "CSI0_12", "", "",
/* GPIO4 D0-D7 */
"", "", "", "",
"", "", "", "";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
status = "okay";
vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c2 {
status = "okay";
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
rockchip,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c6 {
clock-frequency = <200000>;
status = "okay";
fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&usbc0_int>;
pinctrl-names = "default";
vbus-supply = <&vbus5v0_typec>;
connector {
compatible = "usb-c-connector";
data-role = "dual";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
op-sink-microwatt = <1000000>;
};
};
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
&i2c7 {
clock-frequency = <200000>;
status = "okay";
rt5616: codec@1b {
compatible = "realtek,rt5616";
reg = <0x1b>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
#sound-dai-cells = <0>;
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
port {
rt5616_p0_0: endpoint {
remote-endpoint = <&i2s0_8ch_p0_0>;
};
};
};
/* connected with MIPI-CSI1 */
};
&i2c8 {
pinctrl-0 = <&i2c8m2_xfer>;
};
&i2s0_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s0_lrck
&i2s0_mclk
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
status = "okay";
i2s0_8ch_p0: port {
i2s0_8ch_p0_0: endpoint {
dai-format = "i2s";
mclk-fs = <256>;
remote-endpoint = <&rt5616_p0_0>;
};
};
};
&pcie2x1l0 {
reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_0_rst>;
status = "okay";
};
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_1_rst>;
status = "okay";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_2_rst>;
status = "okay";
};
&pcie30phy {
status = "okay";
};
&pcie3x4 {
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pinctrl {
gpio-leds {
sys_led_pin: sys-led-pin {
rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
usr_led_pin: usr-led-pin {
rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie {
pcie2_0_rst: pcie2-0-rst {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie2_1_rst: pcie2-1-rst {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie2_2_rst: pcie2-2-rst {
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_m2_0_pwren: pcie-m20-pwren {
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_m2_1_pwren: pcie-m21-pwren {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbc0_int: usbc0-int {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pwm1 {
pinctrl-0 = <&pwm1m1_pins>;
status = "okay";
};
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
};
&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
max-frequency = <200000000>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
no-mmc;
no-sdio;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
};
/* optional on non-LTS, populated on LTS version */
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspim1_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
num-cs = <1>;
pmic@0 {
compatible = "rockchip,rk806";
spi-max-frequency = <1000000>;
reg = <0x0>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
system-power-controller;
vcc1-supply = <&vcc4v0_sys>;
vcc2-supply = <&vcc4v0_sys>;
vcc3-supply = <&vcc4v0_sys>;
vcc4-supply = <&vcc4v0_sys>;
vcc5-supply = <&vcc4v0_sys>;
vcc6-supply = <&vcc4v0_sys>;
vcc7-supply = <&vcc4v0_sys>;
vcc8-supply = <&vcc4v0_sys>;
vcc9-supply = <&vcc4v0_sys>;
vcc10-supply = <&vcc4v0_sys>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc4v0_sys>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc4v0_sys>;
gpio-controller;
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun0";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
regulators {
vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_gpu_s0";
regulator-enable-ramp-delay = <400>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_cpu_lit_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_log_s0: dcdc-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_log_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-init-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_vdenc_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <900000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdd2_ddr_s3: dcdc-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd2_ddr_s3";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_2v0_pldo_s3: dcdc-reg7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-ramp-delay = <12500>;
regulator-name = "vdd_2v0_pldo_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2000000>;
};
};
vcc_3v3_s3: dcdc-reg8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_3v3_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vddq_ddr_s0: dcdc-reg9 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vddq_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg10 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avcc_1v8_s0: pldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "avcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s0: pldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avdd_1v2_s0: pldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "avdd_1v2_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3_s0: pldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vcc_3v3_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-name = "vccio_sd_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
pldo6_s3: pldo-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "pldo6_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_ddr_pll_s0: nldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_ddr_pll_s0";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
avdd_0v75_s0: nldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "avdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v85_s0: nldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdd_0v85_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v75_s0: nldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&tsadc {
status = "okay";
};
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
&u2phy2_host {
status = "okay";
};
&u2phy3_host {
status = "okay";
};
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};

903
dts/upstream/src/arm64/rockchip/rk3588s-odroid-m2.dts Normal file
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@ -0,0 +1,903 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588s.dtsi"
/ {
model = "Hardkernel ODROID-M2";
compatible = "hardkernel,odroid-m2", "rockchip,rk3588s";
aliases {
ethernet0 = &gmac1;
mmc0 = &sdhci;
mmc1 = &sdmmc;
};
chosen {
stdout-path = "serial2:1500000n8";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pwr_led>, <&sys_led>;
led_pwr: led-0 {
color = <LED_COLOR_ID_RED>;
default-state = "on";
function = LED_FUNCTION_POWER;
gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
led_sys: led-1 {
color = <LED_COLOR_ID_BLUE>;
default-state = "on";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
fan: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
cooling-levels = <0 192 224 255>;
fan-supply = <&vcc5v0_sys>;
pwms = <&pwm0 0 22222 0>;
};
vcc_1v1_nldo_s3: regulator-1v1-vcc-nldo-s3 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc4v0_sys>;
};
vcc3v3_lcd: regulator-3v3-vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_pwren>;
regulator-name = "vcc3v3_lcd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc3v3_pcie: regulator-3v3-vcc-pcie {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_pwren>;
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc_3v3_s0: regulator-3v3-vcc-s0 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc4v0_sys: regulator-4v0-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc4v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <4800000>;
regulator-max-microvolt = <4800000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_sys: regulator-5v0-vcc-sys {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_pwren>;
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_usb2_host: regulator-5v0-vcc-usb2-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb2_host_pwren>;
regulator-name = "vcc5v0_usb2_host";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_usb3_host: regulator-5v0-vcc-usb3-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_host_pwren>;
regulator-name = "vcc5v0_usb3_host";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_usb3_typec: regulator-5v0-vcc-usb3-typec {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_typec_pwren>;
regulator-name = "vcc5v0_usb3_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcca: regulator-5v0-vcca {
compatible = "regulator-fixed";
regulator-name = "vcca";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc12v_dcin: regulator-12v0-vcc-dcin {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu_big1_s0>;
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3_s0>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus
&gmac1_clkinout>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_gpu_s0>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
status = "okay";
vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c2 {
status = "okay";
vdd_npu_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_npu_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc4v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c8 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c8m2_xfer>;
status = "okay";
usbc0: usb-typec@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vcc5v0_usb3_typec>;
connector {
compatible = "usb-c-connector";
data-role = "dual";
label = "USB-C";
op-sink-microwatt = <1000000>;
power-role = "dual";
sink-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
try-power-role = "source";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_role_switch: endpoint {
remote-endpoint = <&usb_host0_xhci_role_switch>;
};
};
port@1 {
reg = <1>;
usbc0_orientation_switch: endpoint {
remote-endpoint = <&usbdp_phy0_orientation_switch>;
};
};
port@2 {
reg = <2>;
usbc0_dp_altmode_mux: endpoint {
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
};
};
};
};
};
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pcf8563_int>;
wakeup-source;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id001c.c916";
reg = <1>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
};
&package_thermal {
polling-delay = <1000>;
trips {
package_fan0: package-fan0 {
hysteresis = <2000>;
temperature = <60000>;
type = "active";
};
};
cooling-maps {
map0 {
cooling-device = <&fan 1 THERMAL_NO_LIMIT>;
trip = <&package_fan0>;
};
};
};
&pcie2x1l2 {
pinctrl-names = "default";
pinctrl-0 = <&pcie20x1_pins>;
reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pinctrl {
lcd {
lcd_pwren: lcd-pwren {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
pwr_led: pwr-led {
rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
sys_led: sys-led {
rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie20x1_pins: pcie20x1-pins {
rockchip,pins =
<1 RK_PA0 4 &pcfg_pull_none>,
<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,
<1 RK_PA1 4 &pcfg_pull_none>;
};
pcie_pwren: pcie-pwren {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
regulator {
vcc5v0_pwren: vcc5v0-pwren {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rtc {
pcf8563_int: pcf8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb2_host_pwren: usb2-host-pwren {
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb3_host_pwren: usb3-host-pwren {
rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb3_typec_pwren: usb3-typec-pwren {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbc0_int: usbc0-int {
rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm0 {
pinctrl-names = "default";
pinctrl-0 = <&pwm0m2_pins>;
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8_s0>;
status = "okay";
};
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
no-sd;
no-sdio;
non-removable;
vmmc-supply = <&vcc_3v3_s0>;
vqmmc-supply = <&vcc_1v8_s0>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
max-frequency = <150000000>;
no-mmc;
no-sdio;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
};
&spi2 {
assigned-clocks = <&cru CLK_SPI2>;
assigned-clock-rates = <200000000>;
num-cs = <1>;
pinctrl-names = "default";
pinctrl-0 = <&spi2m2_cs0>, <&spi2m2_pins>;
status = "okay";
pmic@0 {
compatible = "rockchip,rk806";
reg = <0x0>;
#gpio-cells = <2>;
gpio-controller;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
spi-max-frequency = <1000000>;
system-power-controller;
vcc1-supply = <&vcc4v0_sys>;
vcc2-supply = <&vcc4v0_sys>;
vcc3-supply = <&vcc4v0_sys>;
vcc4-supply = <&vcc4v0_sys>;
vcc5-supply = <&vcc4v0_sys>;
vcc6-supply = <&vcc4v0_sys>;
vcc7-supply = <&vcc4v0_sys>;
vcc8-supply = <&vcc4v0_sys>;
vcc9-supply = <&vcc4v0_sys>;
vcc10-supply = <&vcc4v0_sys>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc4v0_sys>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcca>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun0";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
regulators {
vdd_gpu_s0: dcdc-reg1 {
regulator-name = "vdd_gpu_s0";
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-enable-ramp-delay = <400>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: dcdc-reg2 {
regulator-name = "vdd_cpu_lit_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_logic_s0: dcdc-reg3 {
regulator-name = "vdd_logic_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <750000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_vdenc_s0: dcdc-reg4 {
regulator-name = "vdd_vdenc_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg5 {
regulator-name = "vdd_ddr_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <900000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdd2_ddr_s3: dcdc-reg6 {
regulator-name = "vdd2_ddr_s3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_2v0_pldo_s3: dcdc-reg7 {
regulator-name = "vdd_2v0_pldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2000000>;
};
};
vcc_3v3_s3: dcdc-reg8 {
regulator-name = "vcc_3v3_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vddq_ddr_s0: dcdc-reg9 {
regulator-name = "vddq_ddr_s0";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg10 {
regulator-name = "vcc_1v8_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_1v8_s0: pldo-reg1 {
regulator-name = "vcc_1v8_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca_1v8_s0: pldo-reg2 {
regulator-name = "vcca_1v8_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdda_1v2_s0: pldo-reg3 {
regulator-name = "vdda_1v2_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca_3v3_s0: pldo-reg4 {
regulator-name = "vcca_3v3_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-name = "vccio_sd_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3_pldo6: pldo-reg6 {
regulator-name = "vcc_1v8_s3_pldo6";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-name = "vdd_0v75_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdda_ddr_pll_s0: nldo-reg2 {
regulator-name = "vdda_ddr_pll_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdda_0v75_s0: nldo-reg3 {
regulator-name = "vdda_0v75_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <837500>;
regulator-max-microvolt = <837500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v85_s0: nldo-reg4 {
regulator-name = "vdda_0v85_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/* Schematics show not in use */
nldo-reg5 {
};
};
};
};
&tsadc {
status = "okay";
};
&u2phy0 {
status = "okay";
};
&u2phy0_otg {
status = "okay";
};
&u2phy2 {
status = "okay";
};
&u2phy2_host {
phy-supply = <&vcc5v0_usb2_host>;
status = "okay";
};
&u2phy3 {
status = "okay";
};
&u2phy3_host {
phy-supply = <&vcc5v0_usb3_host>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
usb-role-switch;
status = "okay";
port {
usb_host0_xhci_role_switch: endpoint {
remote-endpoint = <&usbc0_role_switch>;
};
};
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb_host2_xhci {
status = "okay";
};
&usbdp_phy0 {
mode-switch;
orientation-switch;
sbu1-dc-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_orientation_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_orientation_switch>;
};
usbdp_phy0_dp_altmode_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&usbc0_dp_altmode_mux>;
};
};
};

11
include/configs/odroid_m2.h Normal file
View file

@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#ifndef __ODROID_M2_H
#define __ODROID_M2_H
#define ROCKCHIP_DEVICE_SETTINGS \
"cramfsaddr=0x0c000000\0"
#include <configs/rk3588_common.h>
#endif

3
include/fdt_support.h
View file

@ -202,7 +202,8 @@ int ft_board_setup(void *blob, struct bd_info *bd);
*
* This function is called if CONFIG_BOARD_RNG_SEED is set, and must
* be provided by the board. It should return, via @buf, some suitable
* seed value to pass to the kernel.
* seed value to pass to the kernel. Seed size could be set in a decimal
* environment variable rng_seed_size and it defaults to 64 bytes.
*
* @param buf A struct abuf for returning the seed and its size.
* @return 0 if ok, negative on error.