mirror of
https://github.com/u-boot/u-boot.git
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imx8m*_venice: move venice to OF_UPSTREAM
Move to imx8m{m,n,p}-venice to OF_UPSTREAM:
- replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the
dt's from the OF_LIST
- handle the fact that dtbs now have a 'freescale/' prefix
- imply OF_UPSTREAM
- remove rudundant files from arch/arm/dts leaving only the
*-u-boot.dtsi files
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
This commit is contained in:
Tim Harvey
Fabio Estevam
parent
e30abefcb5
commit
86b79cf131
33 changed files with 13 additions and 10658 deletions
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@ -1082,15 +1082,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
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imx8mm-phg.dtb \
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imx8mm-phyboard-polis-rdk.dtb \
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imx8mm-phygate-tauri-l.dtb \
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imx8mm-venice.dtb \
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imx8mm-venice-gw71xx-0x.dtb \
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imx8mm-venice-gw72xx-0x.dtb \
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imx8mm-venice-gw73xx-0x.dtb \
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imx8mm-venice-gw7901.dtb \
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imx8mm-venice-gw7902.dtb \
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imx8mm-venice-gw7903.dtb \
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imx8mm-venice-gw7904.dtb \
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imx8mm-venice-gw7905-0x.dtb \
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imx8mm-verdin-wifi-dev.dtb \
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imx8mn-bsh-smm-s2.dtb \
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imx8mn-bsh-smm-s2pro.dtb \
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@ -1098,8 +1089,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
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imx8mq-cm.dtb \
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imx8mn-evk.dtb \
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imx8mn-var-som-symphony.dtb \
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imx8mn-venice.dtb \
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imx8mn-venice-gw7902.dtb \
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imx8mq-evk.dtb \
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imx8mm-beacon-kit.dtb \
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imx8mn-beacon-kit.dtb \
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@ -1119,12 +1108,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
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imx8mp-icore-mx8mp-edimm2.2.dtb \
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imx8mp-msc-sm2s.dtb \
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imx8mp-phyboard-pollux-rdk.dtb \
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imx8mp-venice.dtb \
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imx8mp-venice-gw71xx-2x.dtb \
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imx8mp-venice-gw72xx-2x.dtb \
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imx8mp-venice-gw73xx-2x.dtb \
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imx8mp-venice-gw74xx.dtb \
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imx8mp-venice-gw7905-2x.dtb \
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imx8mp-verdin-wifi-dev.dtb \
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imx8mq-pico-pi.dtb \
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imx8mq-kontron-pitx-imx8m.dtb \
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@ -1,525 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2020 Gateworks Corporation
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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memory@40000000 {
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device_type = "memory";
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reg = <0x0 0x40000000 0 0x80000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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key-user-pb {
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label = "user_pb";
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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key-user-pb1x {
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label = "user_pb1x";
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linux,code = <BTN_1>;
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interrupt-parent = <&gsc>;
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interrupts = <0>;
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};
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key-erased {
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label = "key_erased";
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linux,code = <BTN_2>;
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interrupt-parent = <&gsc>;
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interrupts = <1>;
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};
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key-eeprom-wp {
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label = "eeprom_wp";
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linux,code = <BTN_3>;
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interrupt-parent = <&gsc>;
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interrupts = <2>;
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};
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key-tamper {
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label = "tamper";
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linux,code = <BTN_4>;
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interrupt-parent = <&gsc>;
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interrupts = <5>;
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};
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switch-hold {
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label = "switch_hold";
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linux,code = <BTN_5>;
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interrupt-parent = <&gsc>;
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interrupts = <7>;
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};
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};
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};
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&A53_0 {
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cpu-supply = <&buck3_reg>;
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};
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&A53_1 {
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cpu-supply = <&buck3_reg>;
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};
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&A53_2 {
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cpu-supply = <&buck3_reg>;
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};
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&A53_3 {
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cpu-supply = <&buck3_reg>;
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};
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&ddrc {
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operating-points-v2 = <&ddrc_opp_table>;
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ddrc_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-25M {
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opp-hz = /bits/ 64 <25000000>;
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};
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opp-100M {
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opp-hz = /bits/ 64 <100000000>;
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};
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opp-750M {
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opp-hz = /bits/ 64 <750000000>;
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};
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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gsc: gsc@20 {
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compatible = "gw,gsc";
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reg = <0x20>;
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pinctrl-0 = <&pinctrl_gsc>;
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interrupt-parent = <&gpio2>;
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interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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adc {
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compatible = "gw,gsc-adc";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@6 {
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gw,mode = <0>;
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reg = <0x06>;
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label = "temp";
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};
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channel@8 {
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gw,mode = <1>;
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reg = <0x08>;
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label = "vdd_bat";
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};
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channel@16 {
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gw,mode = <4>;
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reg = <0x16>;
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label = "fan_tach";
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};
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channel@82 {
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gw,mode = <2>;
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reg = <0x82>;
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label = "vdd_vin";
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gw,voltage-divider-ohms = <22100 1000>;
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};
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channel@84 {
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gw,mode = <2>;
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reg = <0x84>;
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label = "vdd_adc1";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@86 {
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gw,mode = <2>;
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reg = <0x86>;
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label = "vdd_adc2";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@88 {
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gw,mode = <2>;
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reg = <0x88>;
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label = "vdd_dram";
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};
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channel@8c {
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gw,mode = <2>;
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reg = <0x8c>;
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label = "vdd_1p2";
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};
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channel@8e {
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gw,mode = <2>;
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reg = <0x8e>;
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label = "vdd_1p0";
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};
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channel@90 {
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gw,mode = <2>;
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reg = <0x90>;
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label = "vdd_2p5";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@92 {
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gw,mode = <2>;
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reg = <0x92>;
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label = "vdd_3p3";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@98 {
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gw,mode = <2>;
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reg = <0x98>;
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label = "vdd_0p95";
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};
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channel@9a {
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gw,mode = <2>;
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reg = <0x9a>;
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label = "vdd_1p8";
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};
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channel@a2 {
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gw,mode = <2>;
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reg = <0xa2>;
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label = "vdd_gsc";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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};
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fan-controller@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "gw,gsc-fan";
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reg = <0x0a>;
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};
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};
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gpio: gpio@23 {
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compatible = "nxp,pca9555";
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reg = <0x23>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gsc>;
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interrupts = <4>;
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};
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eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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pagesize = <16>;
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};
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eeprom@51 {
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compatible = "atmel,24c02";
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reg = <0x51>;
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pagesize = <16>;
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};
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eeprom@52 {
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compatible = "atmel,24c02";
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reg = <0x52>;
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pagesize = <16>;
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};
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eeprom@53 {
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compatible = "atmel,24c02";
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reg = <0x53>;
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pagesize = <16>;
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};
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rtc@68 {
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compatible = "dallas,ds1672";
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reg = <0x68>;
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};
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pmic@69 {
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compatible = "mps,mp5416";
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reg = <0x69>;
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regulators {
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/* vdd_0p95: DRAM/GPU/VPU */
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buck1 {
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regulator-name = "buck1";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-min-microamp = <3800000>;
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regulator-max-microamp = <6800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* vdd_soc */
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buck2 {
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regulator-name = "buck2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <900000>;
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regulator-min-microamp = <2200000>;
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regulator-max-microamp = <5200000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* vdd_arm */
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buck3_reg: buck3 {
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regulator-name = "buck3";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-min-microamp = <3800000>;
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regulator-max-microamp = <6800000>;
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regulator-always-on;
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};
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/* vdd_1p8 */
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buck4 {
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regulator-name = "buck4";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-min-microamp = <2200000>;
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regulator-max-microamp = <5200000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* nvcc_snvs_1p8 */
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ldo1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* vdd_snvs_0p8 */
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ldo2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* vdd_0p9 */
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ldo3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* vdd_1p8 */
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ldo4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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eeprom@52 {
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compatible = "atmel,24c32";
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reg = <0x52>;
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pagesize = <32>;
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};
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};
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/* console */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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/* eMMC */
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
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MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
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MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
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MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
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MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
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MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
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MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
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MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
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MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
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MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
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MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
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MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
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MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
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MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gsc: gscgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2_gpio: i2c2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2020 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mm.dtsi"
|
||||
#include "imx8mm-venice-gw700x.dtsi"
|
||||
#include "imx8mm-venice-gw71xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW71xx-0x i.MX8MM Development Kit";
|
||||
compatible = "gw,imx8mm-gw71xx-0x", "fsl,imx8mm";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,239 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2020 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
usb0 = &usbotg1;
|
||||
usb1 = &usbotg2;
|
||||
};
|
||||
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_usb_otg1_vbus: regulator-usb-otg1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb1_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg1_vbus";
|
||||
gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "", "", "", "", "", "", "pci_usb_sel", "dio0",
|
||||
"", "dio1", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names = "", "", "", "dio2", "dio3", "", "", "pci_wdis#",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&pcie0_refclk>;
|
||||
clock-names = "pcie", "pcie_aux", "pcie_bus";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&clk IMX8MM_CLK_PCIE1_CTRL>;
|
||||
assigned-clock-rates = <10000000>, <250000000>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
|
||||
<&clk IMX8MM_SYS_PLL2_250M>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
dr_mode = "otg";
|
||||
over-current-active-low;
|
||||
vbus-supply = <®_usb_otg1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg2 {
|
||||
dr_mode = "host";
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
|
||||
MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
|
||||
MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
|
||||
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
|
||||
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
|
||||
MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000041 /* DIO2 */
|
||||
MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x40000041 /* DIO2 */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
|
||||
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pcie0grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb1_en: regusb1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x41
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141
|
||||
MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2020 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mm.dtsi"
|
||||
#include "imx8mm-venice-gw700x.dtsi"
|
||||
#include "imx8mm-venice-gw72xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW72xx-0x i.MX8MM Development Kit";
|
||||
compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,400 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2020 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet1 = ð1;
|
||||
usb0 = &usbotg1;
|
||||
usb1 = &usbotg2;
|
||||
};
|
||||
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg1_vbus: regulator-usb-otg1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb1_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg1_vbus";
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usb_otg2_vbus: regulator-usb-otg2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg2_vbus";
|
||||
gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
|
||||
<&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "rs485_term", "mipi_gpio4", "", "",
|
||||
"", "", "pci_usb_sel", "dio0",
|
||||
"", "dio1", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names = "rs485_en", "mipi_gpio3", "rs485_hd", "mipi_gpio2",
|
||||
"mipi_gpio1", "", "", "pci_wdis#",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&pcie0_refclk>;
|
||||
clock-names = "pcie", "pcie_aux", "pcie_bus";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&clk IMX8MM_CLK_PCIE1_CTRL>;
|
||||
assigned-clock-rates = <10000000>, <250000000>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
|
||||
<&clk IMX8MM_SYS_PLL2_250M>;
|
||||
status = "okay";
|
||||
|
||||
pcie@0,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pcie@1,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pcie@2,3 {
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eth1: pcie@5,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&sai3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai3>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
|
||||
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <24576000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* RS232 */
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
dr_mode = "otg";
|
||||
over-current-active-low;
|
||||
vbus-supply = <®_usb_otg1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg2 {
|
||||
dr_mode = "host";
|
||||
disable-over-current;
|
||||
vbus-supply = <®_usb_otg2_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
|
||||
MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
|
||||
MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
|
||||
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
|
||||
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
|
||||
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x40000104 /* RS485_TERM */
|
||||
MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
|
||||
MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x40000104 /* RS485_HALF */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
|
||||
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pcie0grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb1_en: regusb1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41
|
||||
MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb2_en: regusb2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai3: sai3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
|
||||
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
|
||||
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
|
||||
MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0x1d0
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2020 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mm.dtsi"
|
||||
#include "imx8mm-venice-gw700x.dtsi"
|
||||
#include "imx8mm-venice-gw73xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW73xx-0x i.MX8MM Development Kit";
|
||||
compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,452 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2020 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet1 = ð1;
|
||||
usb0 = &usbotg1;
|
||||
usb1 = &usbotg2;
|
||||
};
|
||||
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg1_vbus: regulator-usb-otg1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb1_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg1_vbus";
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usb_otg2_vbus: regulator-usb-otg2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg2_vbus";
|
||||
gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_wifi_en: regulator-wifi-en {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_wl>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wl";
|
||||
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <100>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
|
||||
<&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "rs485_term", "mipi_gpio4", "", "",
|
||||
"", "", "pci_usb_sel", "dio0",
|
||||
"", "dio1", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names = "rs485_en", "mipi_gpio3", "rs485_hd", "mipi_gpio2",
|
||||
"mipi_gpio1", "", "", "pci_wdis#",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&pcie0_refclk>;
|
||||
clock-names = "pcie", "pcie_aux", "pcie_bus";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&clk IMX8MM_CLK_PCIE1_CTRL>;
|
||||
assigned-clock-rates = <10000000>, <250000000>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
|
||||
<&clk IMX8MM_SYS_PLL2_250M>;
|
||||
status = "okay";
|
||||
|
||||
pcie@0,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pcie@1,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pcie@2,4 {
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eth1: pcie@6,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&sai3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai3>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
|
||||
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <24576000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* bluetooth HCI */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
|
||||
cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
|
||||
rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm4330-bt";
|
||||
shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* RS232 */
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
dr_mode = "otg";
|
||||
over-current-active-low;
|
||||
vbus-supply = <®_usb_otg1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg2 {
|
||||
dr_mode = "host";
|
||||
disable-over-current;
|
||||
vbus-supply = <®_usb_otg2_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SDIO WiFi */
|
||||
&usdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_wifi_en>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
|
||||
MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
|
||||
MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
|
||||
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
|
||||
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
|
||||
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x40000104 /* RS485_TERM */
|
||||
MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
|
||||
MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x40000104 /* RS485_HALF */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_bten: btengrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
|
||||
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pcie0grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_wl: regwlgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb1_en: regusb1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41
|
||||
MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb2_en: regusb2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai3: sai3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
|
||||
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
|
||||
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
|
||||
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
|
||||
MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x140
|
||||
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
|
||||
MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0x1d0
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
};
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -1,869 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2022 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
#include "imx8mm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW7903 i.MX8MM board";
|
||||
compatible = "gw,imx8mm-gw7903", "fsl,imx8mm";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &fec1;
|
||||
usb0 = &usbotg1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0x80000000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
key-user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key_erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
key-eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led01_red";
|
||||
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led01_grn";
|
||||
gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-2 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led02_red";
|
||||
gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-3 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led02_grn";
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-4 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led03_red";
|
||||
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-5 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led03_grn";
|
||||
gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-6 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led04_red";
|
||||
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-7 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led04_grn";
|
||||
gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-8 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led05_red";
|
||||
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-9 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led05_grn";
|
||||
gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-a {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led06_red";
|
||||
gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-b {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led06_grn";
|
||||
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&A53_0 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_1 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_2 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_3 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&ddrc {
|
||||
operating-points-v2 = <&ddrc_opp_table>;
|
||||
|
||||
ddrc_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-25M {
|
||||
opp-hz = /bits/ 64 <25000000>;
|
||||
};
|
||||
|
||||
opp-100M {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
|
||||
opp-750M {
|
||||
opp-hz = /bits/ 64 <750000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&fec1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fec1>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
rx-internal-delay-ps = <2000>;
|
||||
tx-internal-delay-ps = <2500>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "", "", "", "", "", "", "", "",
|
||||
"", "", "rs422_en#", "rs485_en#", "rs232_en#", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
gpio-line-names = "dig2_in", "dig2_out#", "dig2_ctl", "", "", "", "dig1_ctl", "",
|
||||
"dig1_out#", "dig1_in", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
gpio-line-names = "", "", "", "", "", "", "", "sim1_det#",
|
||||
"sim2_det#", "sim2_sel", "", "", "pci_wdis#", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
pinctrl-0 = <&pinctrl_gsc>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@6 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x06>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@82 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x82>;
|
||||
label = "vin";
|
||||
gw,voltage-divider-ohms = <22100 1000>;
|
||||
gw,voltage-offset-microvolt = <700000>;
|
||||
};
|
||||
|
||||
channel@84 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x84>;
|
||||
label = "vdd_5p0";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@86 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x86>;
|
||||
label = "vdd_3p3";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@88 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x88>;
|
||||
label = "vdd_0p9";
|
||||
};
|
||||
|
||||
channel@8c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8c>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@8e {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8e>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@90 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x90>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@92 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x92>;
|
||||
label = "vdd_dram";
|
||||
};
|
||||
|
||||
channel@a2 {
|
||||
gw,mode = <2>;
|
||||
reg = <0xa2>;
|
||||
label = "vdd_gsc";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
pinctrl-1 = <&pinctrl_i2c2_gpio>;
|
||||
scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
pmic@4b {
|
||||
compatible = "rohm,bd71847";
|
||||
reg = <0x4b>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
||||
rohm,reset-snvs-powered;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&osc_32k 0>;
|
||||
clock-output-names = "clk-32k-out";
|
||||
|
||||
regulators {
|
||||
/* vdd_soc: 0.805-0.900V (typ=0.8V) */
|
||||
BUCK1 {
|
||||
regulator-name = "buck1";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <1250>;
|
||||
};
|
||||
|
||||
/* vdd_arm: 0.805-1.0V (typ=0.9V) */
|
||||
buck2: BUCK2 {
|
||||
regulator-name = "buck2";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <1250>;
|
||||
rohm,dvs-run-voltage = <1000000>;
|
||||
rohm,dvs-idle-voltage = <900000>;
|
||||
};
|
||||
|
||||
/* vdd_0p9: 0.805-1.0V (typ=0.9V) */
|
||||
BUCK3 {
|
||||
regulator-name = "buck3";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_3p3 */
|
||||
BUCK4 {
|
||||
regulator-name = "buck4";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_1p8 */
|
||||
BUCK5 {
|
||||
regulator-name = "buck5";
|
||||
regulator-min-microvolt = <1605000>;
|
||||
regulator-max-microvolt = <1995000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_dram */
|
||||
BUCK6 {
|
||||
regulator-name = "buck6";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* nvcc_snvs_1p8 */
|
||||
LDO1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1600000>;
|
||||
regulator-max-microvolt = <1900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_snvs_0p8 */
|
||||
LDO2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdda_1p8 */
|
||||
LDO3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
LDO4 {
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
LDO6 {
|
||||
regulator-name = "ldo6";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
pinctrl-1 = <&pinctrl_i2c3_gpio>;
|
||||
scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio5 11 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&pcie0_refclk>;
|
||||
clock-names = "pcie", "pcie_aux", "pcie_bus";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&clk IMX8MM_CLK_PCIE1_CTRL>;
|
||||
assigned-clock-rates = <10000000>, <250000000>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
|
||||
<&clk IMX8MM_SYS_PLL2_250M>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pgc_mipi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* off-board RS232/RS485/RS422 */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
cts-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
|
||||
rts-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
|
||||
dtr-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
dcd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
dr_mode = "host";
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x40000041 /* RS422# */
|
||||
MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x40000041 /* RS485# */
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* RS232# */
|
||||
MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x40000041 /* DIG1_IN */
|
||||
MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* DIG1_OUT */
|
||||
MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40000041 /* DIG1_CTL */
|
||||
MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x40000041 /* DIG2_CTL */
|
||||
MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x40000041 /* DIG2_IN */
|
||||
MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x40000041 /* DIG2_OUT */
|
||||
MX8MM_IOMUXC_ECSPI1_MOSI_GPIO5_IO7 0x40000041 /* SIM1DET# */
|
||||
MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x40000041 /* SIM2DET# */
|
||||
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40000041 /* SIM2SEL */
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x40000041 /* PCI_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec1: fec1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
|
||||
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
|
||||
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
|
||||
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
|
||||
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
|
||||
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
|
||||
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
|
||||
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
|
||||
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x19 /* IRQ# */
|
||||
MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gsc: gscgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2_gpio: i2c2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3_gpio: i2c3gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
|
||||
MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x19
|
||||
MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19
|
||||
MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x19
|
||||
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
|
||||
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x19
|
||||
MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
|
||||
MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19
|
||||
MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x19
|
||||
MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x19
|
||||
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
|
||||
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pciegrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140
|
||||
MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x140
|
||||
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x140
|
||||
MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x140
|
||||
MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,928 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2022 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
#include "imx8mm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW7904 i.MX8MM board";
|
||||
compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0x80000000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-0 {
|
||||
label = "user_pb";
|
||||
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
key-1 {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-2 {
|
||||
label = "key_erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
key-3 {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
key-4 {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led01_grn";
|
||||
gpios = <&gpioled 0 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led01_yel";
|
||||
gpios = <&gpioled 1 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-2 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led02_grn";
|
||||
gpios = <&gpioled 2 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-3 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led02_yel";
|
||||
gpios = <&gpioled 3 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-4 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led03_grn";
|
||||
gpios = <&gpioled 4 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-5 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led03_yel";
|
||||
gpios = <&gpioled 5 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-6 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led04_grn";
|
||||
gpios = <&gpioled 6 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-7 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led04_yel";
|
||||
gpios = <&gpioled 7 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-8 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led05_grn";
|
||||
gpios = <&gpioled 8 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-9 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led05_yel";
|
||||
gpios = <&gpioled 9 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-10 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led06_grn";
|
||||
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-11 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led06_red";
|
||||
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-12 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led07_grn";
|
||||
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-13 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
label = "led07_red";
|
||||
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-14 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led08_grn";
|
||||
gpios = <&gpioled 10 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-15 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led08_yel";
|
||||
gpios = <&gpioled 11 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-16 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led09_grn";
|
||||
gpios = <&gpioled 12 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-17 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led09_yel";
|
||||
gpios = <&gpioled 13 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-18 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "led10_grn";
|
||||
gpios = <&gpioled 14 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-19 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
label = "led10_yel";
|
||||
gpios = <&gpioled 15 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&A53_0 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_1 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_2 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_3 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&ddrc {
|
||||
operating-points-v2 = <&ddrc_opp_table>;
|
||||
|
||||
ddrc_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-25M {
|
||||
opp-hz = /bits/ 64 <25000000>;
|
||||
};
|
||||
|
||||
opp-100M {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
|
||||
opp-750M {
|
||||
opp-hz = /bits/ 64 <750000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&fec1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fec1>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "rs232_en#", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
gpio-line-names = "", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "pci_wdis#", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
pinctrl-0 = <&pinctrl_gsc>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@6 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x06>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@82 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x82>;
|
||||
label = "vin";
|
||||
gw,voltage-divider-ohms = <22100 1000>;
|
||||
gw,voltage-offset-microvolt = <700000>;
|
||||
};
|
||||
|
||||
channel@84 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x84>;
|
||||
label = "vdd_5p0";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@86 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x86>;
|
||||
label = "vdd_3p3";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@88 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x88>;
|
||||
label = "vdd_0p9";
|
||||
};
|
||||
|
||||
channel@8c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8c>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@8e {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8e>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@90 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x90>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@92 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x92>;
|
||||
label = "vdd_dram";
|
||||
};
|
||||
|
||||
channel@a2 {
|
||||
gw,mode = <2>;
|
||||
reg = <0xa2>;
|
||||
label = "vdd_gsc";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
pinctrl-1 = <&pinctrl_i2c2_gpio>;
|
||||
scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
pmic@4b {
|
||||
compatible = "rohm,bd71847";
|
||||
reg = <0x4b>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
||||
rohm,reset-snvs-powered;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&osc_32k 0>;
|
||||
clock-output-names = "clk-32k-out";
|
||||
|
||||
regulators {
|
||||
/* vdd_soc: 0.805-0.900V (typ=0.8V) */
|
||||
BUCK1 {
|
||||
regulator-name = "buck1";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <1250>;
|
||||
};
|
||||
|
||||
/* vdd_arm: 0.805-1.0V (typ=0.9V) */
|
||||
buck2: BUCK2 {
|
||||
regulator-name = "buck2";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <1250>;
|
||||
rohm,dvs-run-voltage = <1000000>;
|
||||
rohm,dvs-idle-voltage = <900000>;
|
||||
};
|
||||
|
||||
/* vdd_0p9: 0.805-1.0V (typ=0.9V) */
|
||||
BUCK3 {
|
||||
regulator-name = "buck3";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_3p3 */
|
||||
BUCK4 {
|
||||
regulator-name = "buck4";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_1p8 */
|
||||
BUCK5 {
|
||||
regulator-name = "buck5";
|
||||
regulator-min-microvolt = <1605000>;
|
||||
regulator-max-microvolt = <1995000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_dram */
|
||||
BUCK6 {
|
||||
regulator-name = "buck6";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* nvcc_snvs_1p8 */
|
||||
LDO1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1600000>;
|
||||
regulator-max-microvolt = <1900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_snvs_0p8 */
|
||||
LDO2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdda_1p8 */
|
||||
LDO3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
LDO4 {
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
LDO6 {
|
||||
regulator-name = "ldo6";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
pinctrl-1 = <&pinctrl_i2c3_gpio>;
|
||||
scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c4>;
|
||||
pinctrl-1 = <&pinctrl_i2c4_gpio>;
|
||||
scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
gpioled: gpio@27 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x27>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio5 11 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&pcie0_refclk>;
|
||||
clock-names = "pcie", "pcie_aux", "pcie_bus";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
|
||||
<&clk IMX8MM_CLK_PCIE1_CTRL>;
|
||||
assigned-clock-rates = <10000000>, <250000000>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
|
||||
<&clk IMX8MM_SYS_PLL2_250M>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pgc_mipi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* off-board RS232 */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board RS232 */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
dr_mode = "host";
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* RS232# */
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x40000041 /* PCI_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec1: fec1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
|
||||
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
|
||||
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
|
||||
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
|
||||
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
|
||||
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
|
||||
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
|
||||
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
|
||||
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x19 /* IRQ# */
|
||||
MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x40000019
|
||||
MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000019
|
||||
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x40000019
|
||||
MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x40000019
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gsc: gscgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2_gpio: i2c2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3_gpio: i2c3gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4: i2c4grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4_gpio: i2c4gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x400001c3
|
||||
MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pciegrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,28 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mm.dtsi"
|
||||
#include "imx8mm-venice-gw700x.dtsi"
|
||||
#include "imx8mm-venice-gw7905.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW7905-0x i.MX8MM Development Kit";
|
||||
compatible = "gateworks,imx8mm-gw7905-0x", "fsl,imx8mm";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
||||
/* Disable SOM interfaces not used on baseboard */
|
||||
&fec1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usdhc1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1,303 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_usb2_vbus: regulator-usb2-vbus {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb2_vbus";
|
||||
gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usdhc2_vmmc: regulator-usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "SD2_3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names =
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "gpioa", "gpiob", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names =
|
||||
"", "", "", "pci_usb_sel",
|
||||
"", "", "", "pci_wdis#",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
gpio-line-names =
|
||||
"", "", "", "",
|
||||
"gpioc", "gpiod", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x52>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB1 - Type C front panel SINK port J14 */
|
||||
&usbotg1 {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB2 4-port USB3.0 HUB:
|
||||
* P1 - USBC connector (host only)
|
||||
* P2 - USB2 test connector
|
||||
* P3 - miniPCIe full card
|
||||
* P4 - miniPCIe half card
|
||||
*/
|
||||
&usbotg2 {
|
||||
dr_mode = "host";
|
||||
vbus-supply = <®_usb2_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_usdhc2_vmmc>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000040 /* GPIOA */
|
||||
MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x40000040 /* GPIOB */
|
||||
MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000106 /* PCI_USBSEL */
|
||||
MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000106 /* PCIE_WDIS# */
|
||||
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000040 /* GPIOD */
|
||||
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */
|
||||
MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x6 /* LEDR */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2
|
||||
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pciegrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x106
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x106
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb2_en: regusb2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x6 /* USBHUB_RST# (ext p/u) */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x140
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x140
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x140
|
||||
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,169 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright 2021 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice i.MX8MM board";
|
||||
compatible = "gw,imx8mm-venice", "fsl,imx8mm";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0x80000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
|
||||
sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x52>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/* console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
|
||||
assigned-clock-rates = <400000000>;
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1grp-gpio-grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
|
||||
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,980 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2021 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
|
||||
#include "imx8mn.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW7902 i.MX8MN board";
|
||||
compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";
|
||||
|
||||
aliases {
|
||||
usb0 = &usbotg1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0x80000000>;
|
||||
};
|
||||
|
||||
can20m: can20m {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <20000000>;
|
||||
clock-output-names = "can20m";
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
key-user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key_erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
key-eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
key-tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "panel1";
|
||||
gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "panel2";
|
||||
gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-2 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "panel3";
|
||||
gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-3 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "panel4";
|
||||
gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-4 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
label = "panel5";
|
||||
gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb1_vbus: regulator-usb1 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb1>;
|
||||
regulator-name = "usb_usb1_vbus";
|
||||
gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_wifi: regulator-wifi {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_wl>;
|
||||
regulator-name = "wifi";
|
||||
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <100>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
&A53_0 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_1 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_2 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_3 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&ddrc {
|
||||
operating-points-v2 = <&ddrc_opp_table>;
|
||||
|
||||
ddrc_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-25M {
|
||||
opp-hz = /bits/ 64 <25000000>;
|
||||
};
|
||||
|
||||
opp-100M {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
|
||||
opp-750M {
|
||||
opp-hz = /bits/ 64 <750000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ecspi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
can@0 {
|
||||
compatible = "microchip,mcp2515";
|
||||
reg = <0>;
|
||||
clocks = <&can20m>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&disp_blk_ctrl {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fec1>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "", "", "", "", "", "", "", "",
|
||||
"m2_pwr_en", "", "", "", "", "m2_reset", "", "m2_wdis#",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
gpio-line-names = "", "", "", "", "", "", "", "",
|
||||
"uart2_en#", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names = "", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "app_gpio1", "vdd_4p0_en", "uart1_rs485",
|
||||
"", "uart1_term", "uart1_half", "app_gpio2",
|
||||
"mipi_gpio1", "", "", "";
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
gpio-line-names = "", "", "", "mipi_gpio4",
|
||||
"mipi_gpio3", "mipi_gpio2", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "",
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpu {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
pinctrl-0 = <&pinctrl_gsc>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@6 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x06>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@82 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x82>;
|
||||
label = "vin";
|
||||
gw,voltage-divider-ohms = <22100 1000>;
|
||||
gw,voltage-offset-microvolt = <700000>;
|
||||
};
|
||||
|
||||
channel@84 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x84>;
|
||||
label = "vin_4p0";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@86 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x86>;
|
||||
label = "vdd_3p3";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@88 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x88>;
|
||||
label = "vdd_0p9";
|
||||
};
|
||||
|
||||
channel@8c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8c>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@8e {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8e>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@90 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x90>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@92 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x92>;
|
||||
label = "vdd_dram";
|
||||
};
|
||||
|
||||
channel@98 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x98>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@9a {
|
||||
gw,mode = <2>;
|
||||
reg = <0x9a>;
|
||||
label = "vdd_2p5";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@9c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x9c>;
|
||||
label = "vdd_5p0";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@a2 {
|
||||
gw,mode = <2>;
|
||||
reg = <0xa2>;
|
||||
label = "vdd_gsc";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
pmic@4b {
|
||||
compatible = "rohm,bd71847";
|
||||
reg = <0x4b>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
|
||||
rohm,reset-snvs-powered;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&osc_32k 0>;
|
||||
clock-output-names = "clk-32k-out";
|
||||
|
||||
regulators {
|
||||
/* vdd_soc: 0.805-0.900V (typ=0.8V) */
|
||||
BUCK1 {
|
||||
regulator-name = "buck1";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <1250>;
|
||||
};
|
||||
|
||||
/* vdd_arm: 0.805-1.0V (typ=0.9V) */
|
||||
buck2: BUCK2 {
|
||||
regulator-name = "buck2";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <1250>;
|
||||
rohm,dvs-run-voltage = <1000000>;
|
||||
rohm,dvs-idle-voltage = <900000>;
|
||||
};
|
||||
|
||||
/* vdd_0p9: 0.805-1.0V (typ=0.9V) */
|
||||
BUCK3 {
|
||||
regulator-name = "buck3";
|
||||
regulator-min-microvolt = <700000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_3p3 */
|
||||
BUCK4 {
|
||||
regulator-name = "buck4";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_1p8 */
|
||||
BUCK5 {
|
||||
regulator-name = "buck5";
|
||||
regulator-min-microvolt = <1605000>;
|
||||
regulator-max-microvolt = <1995000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_dram */
|
||||
BUCK6 {
|
||||
regulator-name = "buck6";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* nvcc_snvs_1p8 */
|
||||
LDO1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1600000>;
|
||||
regulator-max-microvolt = <1900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd_snvs_0p8 */
|
||||
LDO2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdda_1p8 */
|
||||
LDO3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
LDO4 {
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
LDO6 {
|
||||
regulator-name = "ldo6";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
pinctrl-1 = <&pinctrl_i2c2_gpio>;
|
||||
scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
compatible = "st,lis2de12";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
pinctrl-1 = <&pinctrl_i2c3_gpio>;
|
||||
scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c4 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c4>;
|
||||
pinctrl-1 = <&pinctrl_i2c4_gpio>;
|
||||
scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pgc_gpumix {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&sai3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai3>;
|
||||
assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
|
||||
assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <24576000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* RS232/RS485/RS422 selectable */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* RS232 console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* bluetooth HCI */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
|
||||
rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm4330-bt";
|
||||
shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
dr_mode = "host";
|
||||
vbus-supply = <®_usb1_vbus>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SDIO WiFi */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_wifi>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
|
||||
MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x40000041 /* M2_PWR_EN */
|
||||
MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */
|
||||
MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
|
||||
MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
|
||||
MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */
|
||||
MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x40000041 /* VDD_4P0_EN */
|
||||
MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */
|
||||
MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */
|
||||
MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */
|
||||
MX8MN_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */
|
||||
MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */
|
||||
MX8MN_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec1: fec1grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3
|
||||
MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
|
||||
MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
|
||||
MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
|
||||
MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
|
||||
MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
|
||||
MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
|
||||
MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
|
||||
MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
|
||||
MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
|
||||
MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
|
||||
MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MN_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */
|
||||
MX8MN_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gsc: gscgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3
|
||||
MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
|
||||
MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2_gpio: i2c2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3
|
||||
MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3_gpio: i2c3gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001c3
|
||||
MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4: i2c4grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
|
||||
MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4_gpio: i2c4gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20 0x400001c3
|
||||
MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19
|
||||
MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19
|
||||
MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19
|
||||
MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19
|
||||
MX8MN_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_wl: regwlgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb1: regusb1grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai3: sai3grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
|
||||
MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
|
||||
MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
|
||||
MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
|
||||
MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi1: spi1grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
|
||||
MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
|
||||
MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
|
||||
MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40
|
||||
MX8MN_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
|
||||
MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
|
||||
MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
|
||||
MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
||||
MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1_gpio: uart1gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */
|
||||
MX8MN_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */
|
||||
MX8MN_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
|
||||
MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3_gpio: uart3_gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
|
||||
MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
|
||||
MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */
|
||||
MX8MN_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
|
||||
MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
|
||||
MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
|
||||
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
||||
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
||||
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,169 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright 2022 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mn.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice i.MX8MM board";
|
||||
compatible = "gw,imx8mn-venice", "fsl,imx8mn";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0x80000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
|
||||
sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x52>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/* console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
assigned-clocks = <&clk IMX8MN_CLK_USDHC3_ROOT>;
|
||||
assigned-clock-rates = <400000000>;
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1grp-gpio-grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3
|
||||
MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
|
||||
MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
|
||||
MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
|
||||
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
|
||||
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
|
||||
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,587 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet0 = &eqos;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0x80000000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
key-user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key_erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
key-eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
key-tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&A53_0 {
|
||||
cpu-supply = <&buck3_reg>;
|
||||
};
|
||||
|
||||
&A53_1 {
|
||||
cpu-supply = <&buck3_reg>;
|
||||
};
|
||||
|
||||
&A53_2 {
|
||||
cpu-supply = <&buck3_reg>;
|
||||
};
|
||||
|
||||
&A53_3 {
|
||||
cpu-supply = <&buck3_reg>;
|
||||
};
|
||||
|
||||
&eqos {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_eqos>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
pinctrl-0 = <&pinctrl_ethphy0>;
|
||||
pinctrl-names = "default";
|
||||
reg = <0x0>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
pinctrl-0 = <&pinctrl_gsc>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@6 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x06>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <3>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@16 {
|
||||
gw,mode = <4>;
|
||||
reg = <0x16>;
|
||||
label = "fan_tach";
|
||||
};
|
||||
|
||||
channel@82 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x82>;
|
||||
label = "vdd_vin";
|
||||
gw,voltage-divider-ohms = <22100 1000>;
|
||||
};
|
||||
|
||||
channel@84 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x84>;
|
||||
label = "vdd_adc1";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@86 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x86>;
|
||||
label = "vdd_adc2";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@88 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x88>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@8c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8c>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@8e {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8e>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
|
||||
channel@90 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x90>;
|
||||
label = "vdd_3p3";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@92 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x92>;
|
||||
label = "vdd_dram";
|
||||
};
|
||||
|
||||
channel@98 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x98>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@9a {
|
||||
gw,mode = <2>;
|
||||
reg = <0x9a>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@a2 {
|
||||
gw,mode = <2>;
|
||||
reg = <0xa2>;
|
||||
label = "vdd_gsc";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
};
|
||||
|
||||
fan-controller@0 {
|
||||
compatible = "gw,gsc-fan";
|
||||
reg = <0x0a>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
|
||||
pmic@69 {
|
||||
compatible = "mps,mp5416";
|
||||
reg = <0x69>;
|
||||
|
||||
regulators {
|
||||
/* vdd_soc */
|
||||
buck1 {
|
||||
regulator-name = "buck1";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* vdd_dram */
|
||||
buck2 {
|
||||
regulator-name = "buck2";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* vdd_arm */
|
||||
buck3_reg: buck3 {
|
||||
regulator-name = "buck3";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* vdd_1p8 */
|
||||
buck4 {
|
||||
regulator-name = "buck4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* OUT2: nvcc_snvs_1p8 */
|
||||
ldo1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* OUT3: vdd_1p0 */
|
||||
ldo2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* OUT4: vdd_2p5 */
|
||||
ldo3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* OUT5: vdd_3p3 */
|
||||
ldo4 {
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
pinctrl-1 = <&pinctrl_i2c2_gpio>;
|
||||
scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x52>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
pinctrl-1 = <&pinctrl_i2c3_gpio>;
|
||||
scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board */
|
||||
&usdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_eqos: eqosgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
|
||||
MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2
|
||||
MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90
|
||||
MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90
|
||||
MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90
|
||||
MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90
|
||||
MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
|
||||
MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90
|
||||
MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
|
||||
MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
|
||||
MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
|
||||
MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
|
||||
MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
|
||||
MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ethphy0: ethphy0grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x140 /* RST# */
|
||||
MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x150 /* IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gsc: gscgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x150 /* IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x400001c2
|
||||
MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2_gpio: i2c2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0x400001c2
|
||||
MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3_gpio: i2c3gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c2
|
||||
MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp.dtsi"
|
||||
#include "imx8mp-venice-gw702x.dtsi"
|
||||
#include "imx8mp-venice-gw71xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW71xx-2x i.MX8MP Development Kit";
|
||||
compatible = "gateworks,imx8mp-gw71xx-2x", "fsl,imx8mp";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,236 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names =
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"dio1", "", "", "dio0",
|
||||
"", "", "pci_usb_sel", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"dio3", "", "dio2", "",
|
||||
"pci_wdis#", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB1 Type-C front panel */
|
||||
&usb3_0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>;
|
||||
fsl,over-current-active-low;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
/* dual role is implemented but not a full featured OTG */
|
||||
adp-disable;
|
||||
hnp-disable;
|
||||
srp-disable;
|
||||
dr_mode = "otg";
|
||||
usb-role-switch;
|
||||
role-switch-default-mode = "peripheral";
|
||||
status = "okay";
|
||||
|
||||
connector {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbcon1>;
|
||||
compatible = "gpio-usb-b-connector", "usb-b-connector";
|
||||
type = "micro";
|
||||
label = "Type-C";
|
||||
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* USB2 - MiniPCIe socket */
|
||||
&usb3_1 {
|
||||
fsl,permanently-attached;
|
||||
fsl,disable-port-power-control;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
|
||||
MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
|
||||
MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
|
||||
MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000146 /* DIO2 */
|
||||
MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40000146 /* DIO3 */
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
|
||||
MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pcie0grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usb1: usb1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbcon1: usbcon1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp.dtsi"
|
||||
#include "imx8mp-venice-gw702x.dtsi"
|
||||
#include "imx8mp-venice-gw72xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW72xx-2x i.MX8MP Development Kit";
|
||||
compatible = "gateworks,imx8mp-gw72xx-2x", "fsl,imx8mp";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,378 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_usb1_vbus: regulator-usb1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb1_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb1_vbus";
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usb2_vbus: regulator-usb2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb2_vbus";
|
||||
gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_3V3_SD";
|
||||
enable-active-high;
|
||||
gpio = <&gpio2 19 0>; /* SD2_RESET */
|
||||
off-on-delay-us = <12000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
startup-delay-us = <100>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
|
||||
<&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names =
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"dio1", "", "", "dio0",
|
||||
"", "", "pci_usb_sel", "",
|
||||
"", "", "", "",
|
||||
"", "", "rs485_en", "rs485_term",
|
||||
"", "", "", "rs485_half",
|
||||
"pci_wdis#", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* RS232 */
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB1 - OTG */
|
||||
&usb3_0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>;
|
||||
fsl,over-current-active-low;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
vbus-supply = <®_usb1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
/* dual role is implemented but not a full featured OTG */
|
||||
adp-disable;
|
||||
hnp-disable;
|
||||
srp-disable;
|
||||
dr_mode = "otg";
|
||||
usb-role-switch;
|
||||
role-switch-default-mode = "peripheral";
|
||||
status = "okay";
|
||||
|
||||
connector {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbcon1>;
|
||||
compatible = "gpio-usb-b-connector", "usb-b-connector";
|
||||
type = "micro";
|
||||
label = "otg";
|
||||
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* USB2 - USB3.0 Hub */
|
||||
&usb3_1 {
|
||||
fsl,permanently-attached;
|
||||
fsl,disable-port-power-control;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy1 {
|
||||
vbus-supply = <®_usb2_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_usdhc2_vmmc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
|
||||
MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
|
||||
MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
|
||||
MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */
|
||||
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */
|
||||
MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
|
||||
MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pcie0grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb1_en: regusb1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* USB1_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usb1: usb1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbcon1: usbcon1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb2_en: regusb2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
||||
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp.dtsi"
|
||||
#include "imx8mp-venice-gw702x.dtsi"
|
||||
#include "imx8mp-venice-gw73xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW73xx-2x i.MX8MP Development Kit";
|
||||
compatible = "gateworks,imx8mp-gw73xx-2x", "fsl,imx8mp";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,421 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_usb1_vbus: regulator-usb1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb1_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb1_vbus";
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usb2_vbus: regulator-usb2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb2_vbus";
|
||||
gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_wifi_en: regulator-wifi-en {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_wl>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wl";
|
||||
gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <100>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_3V3_SD";
|
||||
enable-active-high;
|
||||
gpio = <&gpio2 19 0>; /* SD2_RESET */
|
||||
off-on-delay-us = <12000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
startup-delay-us = <100>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
|
||||
<&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
tpm@1 {
|
||||
compatible = "tcg,tpm_tis-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <36000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names =
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"dio1", "", "", "dio0",
|
||||
"", "", "pci_usb_sel", "",
|
||||
"", "", "", "",
|
||||
"", "", "rs485_en", "rs485_term",
|
||||
"", "", "", "rs485_half",
|
||||
"pci_wdis#", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* bluetooth HCI */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
|
||||
cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
|
||||
rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm4330-bt";
|
||||
shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* RS232 */
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB1 - OTG */
|
||||
&usb3_0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>;
|
||||
fsl,over-current-active-low;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
vbus-supply = <®_usb1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
/* dual role is implemented but not a full featured OTG */
|
||||
adp-disable;
|
||||
hnp-disable;
|
||||
srp-disable;
|
||||
dr_mode = "otg";
|
||||
usb-role-switch;
|
||||
role-switch-default-mode = "peripheral";
|
||||
status = "okay";
|
||||
|
||||
connector {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbcon1>;
|
||||
compatible = "gpio-usb-b-connector", "usb-b-connector";
|
||||
type = "micro";
|
||||
label = "otg";
|
||||
id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* USB2 - USB3.0 Hub */
|
||||
&usb3_1 {
|
||||
fsl,permanently-attached;
|
||||
fsl,disable-port-power-control;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy1 {
|
||||
vbus-supply = <®_usb2_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SDIO WiFi */
|
||||
&usdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_wifi_en>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_usdhc2_vmmc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
|
||||
MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
|
||||
MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
|
||||
MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */
|
||||
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */
|
||||
MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_bten: btengrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x146
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
|
||||
MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pcie0grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_wl: regwlgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x146
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb1_en: regusb1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* USB1_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usb1: usb1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbcon1: usbcon1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb2_en: regusb2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
||||
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
|
||||
MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140
|
||||
MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
||||
>;
|
||||
};
|
||||
};
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,28 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp.dtsi"
|
||||
#include "imx8mp-venice-gw702x.dtsi"
|
||||
#include "imx8mp-venice-gw7905.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice GW7905-2x i.MX8MP Development Kit";
|
||||
compatible = "gateworks,imx8mp-gw7905-2x", "fsl,imx8mp";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
};
|
||||
|
||||
/* Disable SOM interfaces not used on baseboard */
|
||||
&eqos {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usdhc1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1,309 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
/ {
|
||||
led-controller {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_refclk: pcie0-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_usb2_vbus: regulator-usb2-vbus {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb2_vbus";
|
||||
gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usdhc2_vmmc: regulator-usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "SD2_3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names =
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "gpioa", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names =
|
||||
"", "gpiod", "", "",
|
||||
"gpiob", "gpioc", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "pci_usb_sel", "",
|
||||
"pci_wdis#", "", "", "";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x52>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
fsl,clkreq-unsupported;
|
||||
clocks = <&pcie0_refclk>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie0>;
|
||||
reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB1 - Type C front panel SINK port J14 */
|
||||
&usb3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB2 4-port USB3.0 HUB:
|
||||
* P1 - USBC connector (host only)
|
||||
* P2 - USB2 test connector
|
||||
* P3 - miniPCIe full card
|
||||
* P4 - miniPCIe half card
|
||||
*/
|
||||
&usb3_phy1 {
|
||||
vbus-supply = <®_usb2_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_1 {
|
||||
fsl,permanently-attached;
|
||||
fsl,disable-port-power-control;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* microSD */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_usdhc2_vmmc>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x40000040 /* GPIOA */
|
||||
MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x40000040 /* GPIOD */
|
||||
MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04 0x40000040 /* GPIOB */
|
||||
MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x40000040 /* GPIOC */
|
||||
MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000106 /* PCI_USBSEL */
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCI_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x6 /* LEDG */
|
||||
MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x6 /* LEDR */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie0: pciegrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x106
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb2_en: regusb2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x6 /* USBHUB_RST# (ext p/u) */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
|
||||
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,183 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2022 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Venice i.MX8MP board";
|
||||
compatible = "gateworks,imx8mp-venice", "fsl,imx8mp";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0x80000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
|
||||
sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x52>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
|
||||
assigned-clock-rates = <400000000>;
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_gpio: i2c1grp-gpio-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x400001c3
|
||||
MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x49
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -119,6 +119,7 @@ config TARGET_IMX8MM_VENICE
|
|||
select FSL_CAAM
|
||||
select ARCH_MISC_INIT
|
||||
select SPL_CRYPTO if SPL
|
||||
imply OF_UPSTREAM
|
||||
|
||||
config TARGET_KONTRON_MX8MM
|
||||
bool "Kontron Electronics N80xx"
|
||||
|
|
@ -167,6 +168,7 @@ config TARGET_IMX8MN_VENICE
|
|||
select FSL_CAAM
|
||||
select ARCH_MISC_INIT
|
||||
select SPL_CRYPTO if SPL
|
||||
imply OF_UPSTREAM
|
||||
|
||||
config TARGET_IMX8MP_DATA_MODUL_EDM_SBC
|
||||
bool "Data Modul eDM SBC i.MX8M Plus"
|
||||
|
|
@ -227,6 +229,7 @@ config TARGET_IMX8MP_VENICE
|
|||
select FSL_CAAM
|
||||
select ARCH_MISC_INIT
|
||||
select SPL_CRYPTO if SPL
|
||||
imply OF_UPSTREAM
|
||||
|
||||
config TARGET_PICO_IMX8MQ
|
||||
bool "Support Technexion Pico iMX8MQ"
|
||||
|
|
|
|||
|
|
@ -25,12 +25,13 @@ int board_phys_sdram_size(phys_size_t *size)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int board_fit_config_name_match(const char *name)
|
||||
int board_fit_config_name_match(const char *path)
|
||||
{
|
||||
int i = 0;
|
||||
const char *dtb;
|
||||
const char *name = path + strlen("freescale/");
|
||||
static char init;
|
||||
const char *dtb;
|
||||
char buf[32];
|
||||
int i = 0;
|
||||
|
||||
do {
|
||||
dtb = eeprom_get_dtb_name(i++, buf, sizeof(buf));
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|||
CONFIG_ENV_SIZE=0x8000
|
||||
CONFIG_ENV_OFFSET=0x3f0000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-venice"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-venice-gw71xx-0x"
|
||||
CONFIG_SPL_TEXT_BASE=0x7E1000
|
||||
CONFIG_TARGET_IMX8MM_VENICE=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
|
@ -73,7 +73,7 @@ CONFIG_CMD_EXT4_WRITE=y
|
|||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_LIST="imx8mm-venice imx8mm-venice-gw71xx-0x imx8mm-venice-gw72xx-0x imx8mm-venice-gw73xx-0x imx8mm-venice-gw7901 imx8mm-venice-gw7902 imx8mm-venice-gw7903 imx8mm-venice-gw7904 imx8mm-venice-gw7905-0x"
|
||||
CONFIG_OF_LIST="freescale/imx8mm-venice-gw71xx-0x freescale/imx8mm-venice-gw72xx-0x freescale/imx8mm-venice-gw73xx-0x freescale/imx8mm-venice-gw7901 freescale/imx8mm-venice-gw7902 freescale/imx8mm-venice-gw7903 freescale/imx8mm-venice-gw7904 freescale/imx8mm-venice-gw7905-0x"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_SYS_MMC_ENV_DEV=2
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|||
CONFIG_ENV_SIZE=0x8000
|
||||
CONFIG_ENV_OFFSET=0x3f0000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="imx8mn-venice"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-venice-gw7902"
|
||||
CONFIG_SPL_TEXT_BASE=0x912000
|
||||
CONFIG_TARGET_IMX8MN_VENICE=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
|
@ -76,7 +76,7 @@ CONFIG_CMD_EXT4_WRITE=y
|
|||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_LIST="imx8mn-venice imx8mn-venice-gw7902"
|
||||
CONFIG_OF_LIST="freescale/imx8mn-venice-gw7902"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_SYS_MMC_ENV_DEV=2
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|||
CONFIG_ENV_SIZE=0x8000
|
||||
CONFIG_ENV_OFFSET=0x3f0000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-venice"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-venice-gw71xx-2x"
|
||||
CONFIG_SPL_TEXT_BASE=0x920000
|
||||
CONFIG_TARGET_IMX8MP_VENICE=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
|
@ -75,7 +75,7 @@ CONFIG_CMD_EXT4_WRITE=y
|
|||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_LIST="imx8mp-venice imx8mp-venice-gw71xx-2x imx8mp-venice-gw72xx-2x imx8mp-venice-gw73xx-2x imx8mp-venice-gw74xx imx8mp-venice-gw7905-2x"
|
||||
CONFIG_OF_LIST="freescale/imx8mp-venice-gw71xx-2x freescale/imx8mp-venice-gw72xx-2x freescale/imx8mp-venice-gw73xx-2x freescale/imx8mp-venice-gw74xx freescale/imx8mp-venice-gw7905-2x"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_SYS_MMC_ENV_DEV=2
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue