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crypto: aspeed: fix polling RSA status wrong issue

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Check interrupt status to see if RSA engine is completed. After completion
of the task, write-clear the status to finish operation.
Add missing register base for completion.

Fixes: 89c36cca0b ("crypto: aspeed: Add AST2600 ACRY support")
Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
This commit is contained in:
Neal Liu 2022-02-15 18:14:40 +08:00 • committed by Tom Rini
parent 5d90836cb5
commit 829b41171b
1 changed files with 1 additions and 1 deletions
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2
drivers/crypto/aspeed/aspeed_acry.c
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@ -103,7 +103,7 @@ static int aspeed_acry_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t
while (1) { while (1) {
reg = readl(acry->base + ACRY_RSA_INT_STS); reg = readl(acry->base + ACRY_RSA_INT_STS);
if ((reg & ACRY_RSA_INT_STS_RSA_READY) && (reg & ACRY_RSA_INT_STS_RSA_CMPLT)) { if ((reg & ACRY_RSA_INT_STS_RSA_READY) && (reg & ACRY_RSA_INT_STS_RSA_CMPLT)) {
writel(reg, ACRY_RSA_INT_STS); writel(reg, acry->base + ACRY_RSA_INT_STS);
break; break;
} }
udelay(20); udelay(20);