From 9c2f454647b32335d5fb2263347df730a69a596d Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Tue, 31 Jan 2023 16:11:09 +0100 Subject: [PATCH 001/148] ARM: tegra: Enable poweroff command on Jetson TX1 and Jetson Nano This command is useful to power off the system from within U-Boot. Signed-off-by: Thierry Reding Signed-off-by: Tom --- configs/p2371-2180_defconfig | 1 + configs/p3450-0000_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 2543a2d11f8..dd773266d6e 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index e280be8f2ec..f8dbedf7f53 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y From e55448c780d9052cc8cc40dc70619b28b731f4e4 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Tue, 31 Jan 2023 16:11:10 +0100 Subject: [PATCH 002/148] ARM: tegra: Enable poweroff command on Jetson TX2 This command is useful to power off the system from within U-Boot. Signed-off-by: Thierry Reding Signed-off-by: Tom --- configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index e3b978eb1ed..125134db59d 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index c99a24eef40..5ffff2c99ff 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y From da880bf7c18041e598def664c641705208359dfa Mon Sep 17 00:00:00 2001 From: Tomasz Maciej Nowak Date: Thu, 30 Mar 2023 20:24:22 +0200 Subject: [PATCH 003/148] ARM: dts: trimslice: sync SPI node with Linux dts After "spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode" series flash speed and mode wasn't passed to driver anymore, which resulted in: Loading Environment from SPIFlash... tegra20_sflash spi@7000c380: Invalid chip select 0:0 (err=-19) *** Warning - spi_flash_probe_bus_cs() failed, using default environment Fix it by syncing SPI node of affected device dts with Linux kernel dts. The changed SPI bus frequency doesn't influence stability of read/write operations. Ref: https://patchwork.ozlabs.org/project/uboot/cover/20220518064648.1843664-1-patrice.chotard@foss.st.com Signed-off-by: Tomasz Maciej Nowak Signed-off-by: Tom --- arch/arm/dts/tegra20-trimslice.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts index e19001ee2bd..fa942d26078 100644 --- a/arch/arm/dts/tegra20-trimslice.dts +++ b/arch/arm/dts/tegra20-trimslice.dts @@ -27,7 +27,13 @@ spi@7000c380 { status = "okay"; - spi-max-frequency = <25000000>; + spi-max-frequency = <48000000>; + + flash@0 { + compatible = "winbond,w25q80bl", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <48000000>; + }; }; pcie@80003000 { From 12b3887088866f68cd4846e85c69a90eec43c1bf Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 30 Jun 2023 10:29:00 +0300 Subject: [PATCH 004/148] configs: tegra-common-post: add GPIO keyboard as STDIN device GPIO keyboard is used on many newly upstreamed devices. Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Thierry Reding --- include/configs/tegra-common-post.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 991ffbb7dff..2d5095639ac 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -35,6 +35,12 @@ #define STDIN_KBD_USB "" #endif +#ifdef CONFIG_BUTTON_KEYBOARD +#define STDIN_BTN_KBD ",button-kbd" +#else +#define STDIN_BTN_KBD "" +#endif + #ifdef CONFIG_VIDEO #define STDOUT_VIDEO ",vidconsole" #else @@ -48,7 +54,7 @@ #endif #define TEGRA_DEVICE_SETTINGS \ - "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \ + "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC STDIN_BTN_KBD "\0" \ "stdout=serial" STDOUT_VIDEO "\0" \ "stderr=serial" STDOUT_VIDEO "\0" \ "" From c8cd4db6f1c1eab526b93d640e13697fce0ebe42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonas=20Schw=C3=B6bel?= Date: Fri, 30 Jun 2023 10:29:01 +0300 Subject: [PATCH 005/148] configs: tegra-common-post: make PXE and DHCP boot targets optional MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Disabling the network related features in defconfig causes build to fail so make them optional. Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Jonas Schwöbel Signed-off-by: Svyatoslav Ryhel Signed-off-by: Thierry Reding --- include/configs/tegra-common-post.h | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 2d5095639ac..0d0965ecce2 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -8,9 +8,21 @@ #define __TEGRA_COMMON_POST_H #if IS_ENABLED(CONFIG_CMD_USB) -# define BOOT_TARGET_USB(func) func(USB, usb, 0) +#define BOOT_TARGET_USB(func) func(USB, usb, 0) #else -# define BOOT_TARGET_USB(func) +#define BOOT_TARGET_USB(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) && CONFIG_IS_ENABLED(CMD_PXE) +#define BOOT_TARGET_PXE(func) func(PXE, pxe, na) +#else +#define BOOT_TARGET_PXE(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) +#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) +#else +#define BOOT_TARGET_DHCP(func) #endif #ifndef BOOT_TARGET_DEVICES @@ -18,8 +30,8 @@ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ BOOT_TARGET_USB(func) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) #endif #include From d83721f1d4a18f576e66264ac5a1812b9a82f008 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 30 Jun 2023 10:29:02 +0300 Subject: [PATCH 006/148] ARM: tegra: add SoC UID calculation function This is a small tool for calculation of SoC UID based on the same Linux function. It can be further used for generation of device unique data like mac address or exposing it as serial number. Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Thierry Reding --- arch/arm/include/asm/arch-tegra/fuse.h | 7 ++ arch/arm/mach-tegra/Makefile | 4 + arch/arm/mach-tegra/fuse.c | 151 +++++++++++++++++++++++++ 3 files changed, 162 insertions(+) create mode 100644 arch/arm/mach-tegra/fuse.c diff --git a/arch/arm/include/asm/arch-tegra/fuse.h b/arch/arm/include/asm/arch-tegra/fuse.h index 5b8e0bd8d16..f3f2ad8e3f2 100644 --- a/arch/arm/include/asm/arch-tegra/fuse.h +++ b/arch/arm/include/asm/arch-tegra/fuse.h @@ -19,4 +19,11 @@ struct fuse_regs { u32 security_mode; /* 0x1A0: FUSE_SECURITY_MODE */ }; +/** + * Calculate SoC UID + * + * Return: uid if ok, 0 on error + */ +unsigned long long tegra_chip_uid(void); + #endif /* ifndef _FUSE_H_ */ diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 9147050b323..a5733b0bf6b 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -32,6 +32,10 @@ endif obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o obj-y += pmc.o +ifndef CONFIG_TEGRA186 +obj-y += fuse.o +endif + obj-$(CONFIG_TEGRA20) += tegra20/ obj-$(CONFIG_TEGRA30) += tegra30/ obj-$(CONFIG_TEGRA114) += tegra114/ diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c new file mode 100644 index 00000000000..83bd5055384 --- /dev/null +++ b/arch/arm/mach-tegra/fuse.c @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2012-2013 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "cpu.h" + +#define FUSE_UID_LOW 0x108 +#define FUSE_UID_HIGH 0x10c + +#define FUSE_VENDOR_CODE 0x200 +#define FUSE_FAB_CODE 0x204 +#define FUSE_LOT_CODE_0 0x208 +#define FUSE_LOT_CODE_1 0x20c +#define FUSE_WAFER_ID 0x210 +#define FUSE_X_COORDINATE 0x214 +#define FUSE_Y_COORDINATE 0x218 + +#define FUSE_VENDOR_CODE_MASK 0xf +#define FUSE_FAB_CODE_MASK 0x3f +#define FUSE_WAFER_ID_MASK 0x3f +#define FUSE_X_COORDINATE_MASK 0x1ff +#define FUSE_Y_COORDINATE_MASK 0x1ff + +static u32 tegra_fuse_readl(unsigned long offset) +{ + return readl(NV_PA_FUSE_BASE + offset); +} + +static void tegra_fuse_init(void) +{ + u32 reg; + + /* + * Performed by downstream and is not + * documented by TRM. Whithout setting + * this bit fuse region will not work. + */ + reg = readl_relaxed(NV_PA_CLK_RST_BASE + 0x48); + reg |= BIT(28); + writel(reg, NV_PA_CLK_RST_BASE + 0x48); + + clock_enable(PERIPH_ID_FUSE); + udelay(2); + reset_set_enable(PERIPH_ID_FUSE, 0); +} + +unsigned long long tegra_chip_uid(void) +{ + u64 uid = 0ull; + u32 reg; + u32 cid; + u32 vendor; + u32 fab; + u32 lot; + u32 wafer; + u32 x; + u32 y; + u32 i; + + tegra_fuse_init(); + + /* This used to be so much easier in prior chips. Unfortunately, there + is no one-stop shopping for the unique id anymore. It must be + constructed from various bits of information burned into the fuses + during the manufacturing process. The 64-bit unique id is formed + by concatenating several bit fields. The notation used for the + various fields is with the UID composed + thusly: + + Where: + Field Bits Position Data + ------- ---- -------- ---------------------------------------- + CID 4 60 Chip id + VENDOR 4 56 Vendor code + FAB 6 50 FAB code + LOT 26 24 Lot code (5-digit base-36-coded-decimal, + re-encoded to 26 bits binary) + WAFER 6 18 Wafer id + X 9 9 Wafer X-coordinate + Y 9 0 Wafer Y-coordinate + ------- ---- + Total 64 + */ + + switch (tegra_get_chip()) { + case CHIPID_TEGRA20: + /* T20 has simple calculation */ + return ((unsigned long long)tegra_fuse_readl(FUSE_UID_HIGH) << 32ull) | + (unsigned long long)tegra_fuse_readl(FUSE_UID_LOW); + case CHIPID_TEGRA30: + /* T30 chip id is 0 */ + cid = 0; + break; + case CHIPID_TEGRA114: + /* T11x chip id is 1 */ + cid = 1; + break; + case CHIPID_TEGRA124: + /* T12x chip id is 3 */ + cid = 3; + break; + case CHIPID_TEGRA210: + /* T210 chip id is 5 */ + cid = 5; + default: + return 0; + } + + vendor = tegra_fuse_readl(FUSE_VENDOR_CODE) & FUSE_VENDOR_CODE_MASK; + fab = tegra_fuse_readl(FUSE_FAB_CODE) & FUSE_FAB_CODE_MASK; + + /* Lot code must be re-encoded from a 5 digit base-36 'BCD' number + to a binary number. */ + lot = 0; + reg = tegra_fuse_readl(FUSE_LOT_CODE_0) << 2; + + for (i = 0; i < 5; ++i) { + u32 digit = (reg & 0xFC000000) >> 26; + lot *= 36; + lot += digit; + reg <<= 6; + } + + wafer = tegra_fuse_readl(FUSE_WAFER_ID) & FUSE_WAFER_ID_MASK; + x = tegra_fuse_readl(FUSE_X_COORDINATE) & FUSE_X_COORDINATE_MASK; + y = tegra_fuse_readl(FUSE_Y_COORDINATE) & FUSE_Y_COORDINATE_MASK; + + uid = ((unsigned long long)cid << 60ull) + | ((unsigned long long)vendor << 56ull) + | ((unsigned long long)fab << 50ull) + | ((unsigned long long)lot << 24ull) + | ((unsigned long long)wafer << 18ull) + | ((unsigned long long)x << 9ull) + | ((unsigned long long)y << 0ull); + + return uid; +} From 15be9a7b3b08fa11d046162aaeb899e5d726cb90 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 30 Jun 2023 10:29:03 +0300 Subject: [PATCH 007/148] board: asus: transformer: add ASUS Transformer T30 family support The ASUS Transformer T30 family are 2-in-1 detachable tablets and AiO developed by ASUS that run the Android operating system (TF600T runs Windows RT and P1801-T runs Android and Windows). The T30 Transformers feature a 10.1-inch display (apart P1801-T), an Nvidia Tegra 3 quad-core chip, 1/2 GB of RAM, and 16/32 GB of storage. Transformers board derives from Nvidia Cardhu development board. This patch brings support for 7 known Transformer devices: - ASUS Transformer Prime TF201 - ASUS Transformer Pad TF300T/TF300TG/TF300TL - ASUS VivoTab RT TF600T (Windows RT based) - ASUS Transformer Infinity TF700T - ASUS Portable AiO P1801-T Tested-by: Andreas Westman Dorcsak # all devices Signed-off-by: Svyatoslav Ryhel Signed-off-by: Thierry Reding --- arch/arm/dts/Makefile | 7 + arch/arm/dts/tegra30-asus-p1801-t.dts | 18 + arch/arm/dts/tegra30-asus-tf201.dts | 9 + arch/arm/dts/tegra30-asus-tf300t.dts | 18 + arch/arm/dts/tegra30-asus-tf300tg.dts | 9 + arch/arm/dts/tegra30-asus-tf300tl.dts | 9 + arch/arm/dts/tegra30-asus-tf600t.dts | 89 +++++ arch/arm/dts/tegra30-asus-tf700t.dts | 13 + arch/arm/dts/tegra30-asus-transformer.dtsi | 211 ++++++++++ arch/arm/mach-tegra/tegra30/Kconfig | 5 + board/asus/transformer-t30/Kconfig | 23 ++ board/asus/transformer-t30/MAINTAINERS | 15 + board/asus/transformer-t30/Makefile | 11 + .../pinmux-config-transformer.h | 365 ++++++++++++++++++ .../transformer-t30/transformer-t30-spl.c | 41 ++ board/asus/transformer-t30/transformer-t30.c | 201 ++++++++++ configs/p1801-t.config | 2 + configs/tf201.config | 2 + configs/tf300t.config | 2 + configs/tf300tg.config | 2 + configs/tf300tl.config | 2 + configs/tf600t.config | 4 + configs/tf700t.config | 2 + configs/transformer_t30_defconfig | 85 ++++ doc/board/asus/index.rst | 9 + doc/board/asus/transformer_t30.rst | 116 ++++++ doc/board/index.rst | 1 + include/configs/transformer-common.h | 94 +++++ include/configs/transformer-t30.h | 23 ++ 29 files changed, 1388 insertions(+) create mode 100644 arch/arm/dts/tegra30-asus-p1801-t.dts create mode 100644 arch/arm/dts/tegra30-asus-tf201.dts create mode 100644 arch/arm/dts/tegra30-asus-tf300t.dts create mode 100644 arch/arm/dts/tegra30-asus-tf300tg.dts create mode 100644 arch/arm/dts/tegra30-asus-tf300tl.dts create mode 100644 arch/arm/dts/tegra30-asus-tf600t.dts create mode 100644 arch/arm/dts/tegra30-asus-tf700t.dts create mode 100644 arch/arm/dts/tegra30-asus-transformer.dtsi create mode 100644 board/asus/transformer-t30/Kconfig create mode 100644 board/asus/transformer-t30/MAINTAINERS create mode 100644 board/asus/transformer-t30/Makefile create mode 100644 board/asus/transformer-t30/pinmux-config-transformer.h create mode 100644 board/asus/transformer-t30/transformer-t30-spl.c create mode 100644 board/asus/transformer-t30/transformer-t30.c create mode 100644 configs/p1801-t.config create mode 100644 configs/tf201.config create mode 100644 configs/tf300t.config create mode 100644 configs/tf300tg.config create mode 100644 configs/tf300tl.config create mode 100644 configs/tf600t.config create mode 100644 configs/tf700t.config create mode 100644 configs/transformer_t30_defconfig create mode 100644 doc/board/asus/index.rst create mode 100644 doc/board/asus/transformer_t30.rst create mode 100644 include/configs/transformer-common.h create mode 100644 include/configs/transformer-t30.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 480269fa606..c87729d45ef 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -237,6 +237,13 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra20-ventana.dtb \ tegra20-colibri.dtb \ tegra30-apalis.dtb \ + tegra30-asus-p1801-t.dtb \ + tegra30-asus-tf201.dtb \ + tegra30-asus-tf300t.dtb \ + tegra30-asus-tf300tg.dtb \ + tegra30-asus-tf300tl.dtb \ + tegra30-asus-tf600t.dtb \ + tegra30-asus-tf700t.dtb \ tegra30-beaver.dtb \ tegra30-cardhu.dtb \ tegra30-colibri.dtb \ diff --git a/arch/arm/dts/tegra30-asus-p1801-t.dts b/arch/arm/dts/tegra30-asus-p1801-t.dts new file mode 100644 index 00000000000..4b2dc61713c --- /dev/null +++ b/arch/arm/dts/tegra30-asus-p1801-t.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-transformer.dtsi" + +/ { + model = "ASUS Portable AiO P1801-T"; + compatible = "asus,p1801-t", "nvidia,tegra30"; + + /delete-node/ host1x@50000000; + /delete-node/ pwm@7000a000; + + /delete-node/ backlight; + /delete-node/ panel; + + /delete-node/ regulator-pnl; + /delete-node/ regulator-bl; +}; diff --git a/arch/arm/dts/tegra30-asus-tf201.dts b/arch/arm/dts/tegra30-asus-tf201.dts new file mode 100644 index 00000000000..54f359ef960 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-tf201.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-transformer.dtsi" + +/ { + model = "ASUS Transformer Prime TF201"; + compatible = "asus,tf201", "nvidia,tegra30"; +}; diff --git a/arch/arm/dts/tegra30-asus-tf300t.dts b/arch/arm/dts/tegra30-asus-tf300t.dts new file mode 100644 index 00000000000..db08488420e --- /dev/null +++ b/arch/arm/dts/tegra30-asus-tf300t.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-transformer.dtsi" + +/ { + model = "ASUS Transformer Pad TF300T"; + compatible = "asus,tf300t", "nvidia,tegra30"; + + gpio@6000d000 { + volume-buttons-hog { + gpio-hog; + gpios = , + ; + output-low; + }; + }; +}; diff --git a/arch/arm/dts/tegra30-asus-tf300tg.dts b/arch/arm/dts/tegra30-asus-tf300tg.dts new file mode 100644 index 00000000000..6f42182c99d --- /dev/null +++ b/arch/arm/dts/tegra30-asus-tf300tg.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-transformer.dtsi" + +/ { + model = "ASUS Transformer Pad 3G TF300TG"; + compatible = "asus,tf300tg", "nvidia,tegra30"; +}; diff --git a/arch/arm/dts/tegra30-asus-tf300tl.dts b/arch/arm/dts/tegra30-asus-tf300tl.dts new file mode 100644 index 00000000000..242f79170c4 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-tf300tl.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-transformer.dtsi" + +/ { + model = "ASUS Transformer Pad LTE TF300TL"; + compatible = "asus,tf300tl", "nvidia,tegra30"; +}; diff --git a/arch/arm/dts/tegra30-asus-tf600t.dts b/arch/arm/dts/tegra30-asus-tf600t.dts new file mode 100644 index 00000000000..c9b8f4fa140 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-tf600t.dts @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-transformer.dtsi" + +/ { + model = "ASUS VivoTab RT TF600T"; + compatible = "asus,tf600t", "nvidia,tegra30"; + + aliases { + spi0 = &spi4; + }; + + /delete-node/ host1x@50000000; + + pmic_i2c: i2c@7000d000 { + /* Texas Instruments TPS659110 PMIC */ + pmic: tps65911@2d { + regulators { + vdd_1v2_bl: vdd1 { + regulator-name = "vdd_1v2_backlight"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + ti,regulator-ext-sleep-control = <8>; + }; + + /delete-node/ ldo2; + /delete-node/ ldo3; + + /* uSD slot VDDIO */ + vddio_usd: ldo5 { + regulator-name = "vddio_sdmmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + avdd_dsi_csi: ldo6 { + regulator-name = "avdd_dsi_csi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + }; + }; + }; + + spi4: spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + + spi-flash@1 { + compatible = "winbond,w25q32", "jedec,spi-nor"; + reg = <1>; + spi-max-frequency = <20000000>; + }; + }; + + backlight { + power-supply = <&vdd_1v2_bl>; + }; + + gpio-keys { + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + /delete-node/ panel; + + vdd_usd: regulator-usd { + compatible = "regulator-fixed"; + regulator-name = "vdd_usd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + /delete-node/ regulator-pnl; + /delete-node/ regulator-bl; +}; diff --git a/arch/arm/dts/tegra30-asus-tf700t.dts b/arch/arm/dts/tegra30-asus-tf700t.dts new file mode 100644 index 00000000000..d530527c9f8 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-tf700t.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-transformer.dtsi" + +/ { + model = "ASUS Transformer Infinity TF700T"; + compatible = "asus,tf700t", "nvidia,tegra30"; + + /delete-node/ host1x@50000000; + + /delete-node/ panel; +}; diff --git a/arch/arm/dts/tegra30-asus-transformer.dtsi b/arch/arm/dts/tegra30-asus-transformer.dtsi new file mode 100644 index 00000000000..4eee1df084c --- /dev/null +++ b/arch/arm/dts/tegra30-asus-transformer.dtsi @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +#include "tegra30.dtsi" + +/ { + chosen { + stdout-path = &uarta; + }; + + aliases { + i2c0 = &pwr_i2c; + i2c1 = &gen1_i2c; + + mmc0 = &sdmmc4; /* eMMC */ + mmc1 = &sdmmc1; /* uSD slot */ + + rtc0 = &pmic; + rtc1 = "/rtc@7000e000"; + + usb0 = &usb1; + usb1 = &usb3; /* Dock USB */ + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + host1x@50000000 { + dc@54200000 { + rgb { + status = "okay"; + + nvidia,panel = <&panel>; + }; + }; + }; + + uarta: serial@70006000 { + status = "okay"; + }; + + pwm: pwm@7000a000 { + status = "okay"; + }; + + gen1_i2c: i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + pwr_i2c: i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + /* Texas Instruments TPS659110 PMIC */ + pmic: tps65911@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + regulators { + /* eMMC VDD */ + vcore_emmc: ldo1 { + regulator-name = "vdd_emmc_core"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* uSD slot VDD */ + vdd_usd: ldo2 { + regulator-name = "vdd_usd"; + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + }; + + /* uSD slot VDDIO */ + vddio_usd: ldo3 { + regulator-name = "vddio_usd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3100000>; + }; + }; + }; + }; + + sdmmc1: sdhci@78000000 { + status = "okay"; + bus-width = <4>; + + cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; + power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>; + + vmmc-supply = <&vdd_usd>; + vqmmc-supply = <&vddio_usd>; + }; + + sdmmc4: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + /* USB via ASUS connector */ + usb1: usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + }; + + /* Dock's USB port */ + usb3: usb@7d008000 { + status = "okay"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + + enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + power-supply = <&vdd_5v0_bl>; + pwms = <&pwm 0 4000000>; + + brightness-levels = <1 35 70 105 140 175 210 255>; + default-brightness-level = <5>; + }; + + /* PMIC has a built-in 32KHz oscillator which is used by PMC */ + clk32k_in: clock-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "pmic-oscillator"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel: panel { + compatible = "simple-panel"; + + power-supply = <&vdd_pnl_reg>; + enable-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>; + + backlight = <&backlight>; + + display-timings { + timing@0 { + /* 1280x800@60Hz */ + clock-frequency = <68000000>; + + hactive = <1280>; + hfront-porch = <48>; + hback-porch = <18>; + hsync-len = <30>; + + vactive = <800>; + vfront-porch = <3>; + vback-porch = <12>; + vsync-len = <5>; + }; + }; + }; + + vdd_pnl_reg: regulator-pnl { + compatible = "regulator-fixed"; + regulator-name = "vdd_panel"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vdd_5v0_bl: regulator-bl { + compatible = "regulator-fixed"; + regulator-name = "vdd_5v0_bl"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + gpio = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; diff --git a/arch/arm/mach-tegra/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig index 85b8ce294f2..4f78d0ba973 100644 --- a/arch/arm/mach-tegra/tegra30/Kconfig +++ b/arch/arm/mach-tegra/tegra30/Kconfig @@ -24,6 +24,10 @@ config TARGET_TEC_NG bool "Avionic Design TEC-NG board" select BOARD_LATE_INIT +config TARGET_TRANSFORMER_T30 + bool "Asus Tegra30 Transformer board" + select BOARD_LATE_INIT + endchoice config SYS_SOC @@ -34,5 +38,6 @@ source "board/nvidia/beaver/Kconfig" source "board/nvidia/cardhu/Kconfig" source "board/toradex/colibri_t30/Kconfig" source "board/avionic-design/tec-ng/Kconfig" +source "board/asus/transformer-t30/Kconfig" endif diff --git a/board/asus/transformer-t30/Kconfig b/board/asus/transformer-t30/Kconfig new file mode 100644 index 00000000000..3c36f4ada20 --- /dev/null +++ b/board/asus/transformer-t30/Kconfig @@ -0,0 +1,23 @@ +if TARGET_TRANSFORMER_T30 + +config SYS_BOARD + default "transformer-t30" + +config SYS_VENDOR + default "asus" + +config SYS_CONFIG_NAME + default "transformer-t30" + +config TRANSFORMER_SPI_BOOT + bool "Enable support for SPI based flash" + select TEGRA20_SLINK + select DM_SPI_FLASH + select SPI_FLASH_WINBOND + default n + help + Tegra 3 based Transformers with Windows RT have core + boot sequence (BCT and EBT) on separate SPI FLASH + memory with 4MB size. + +endif diff --git a/board/asus/transformer-t30/MAINTAINERS b/board/asus/transformer-t30/MAINTAINERS new file mode 100644 index 00000000000..c6c15323b28 --- /dev/null +++ b/board/asus/transformer-t30/MAINTAINERS @@ -0,0 +1,15 @@ +TRANSFORMER BOARD +M: Svyatoslav Ryhel +S: Maintained +F: board/asus/transformer-t30/ +F: configs/p1801-t.config +F: configs/tf201.config +F: configs/tf300t.config +F: configs/tf300tg.config +F: configs/tf300tl.config +F: configs/tf600t.config +F: configs/tf700t.config +F: configs/transformer_t30_defconfig +F: doc/board/asus/transformer_t30.rst +F: include/configs/transformer-common.h +F: include/configs/transformer-t30.h diff --git a/board/asus/transformer-t30/Makefile b/board/asus/transformer-t30/Makefile new file mode 100644 index 00000000000..c083f2289ba --- /dev/null +++ b/board/asus/transformer-t30/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010-2012 +# NVIDIA Corporation +# +# (C) Copyright 2021 +# Svyatoslav Ryhel + +obj-$(CONFIG_SPL_BUILD) += transformer-t30-spl.o + +obj-y += transformer-t30.o diff --git a/board/asus/transformer-t30/pinmux-config-transformer.h b/board/asus/transformer-t30/pinmux-config-transformer.h new file mode 100644 index 00000000000..96ff45d3750 --- /dev/null +++ b/board/asus/transformer-t30/pinmux-config-transformer.h @@ -0,0 +1,365 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * + * Copyright (c) 2021, Svyatoslav Ryhel. + */ + +#ifndef _PINMUX_CONFIG_TRANSFORMER_H_ +#define _PINMUX_CONFIG_TRANSFORMER_H_ + +#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_##_od, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ + } + +#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ + { \ + .drvgrp = PMUX_DRVGRP_##_drvgrp, \ + .slwf = _slwf, \ + .slwr = _slwr, \ + .drvup = _drvup, \ + .drvdn = _drvdn, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ + } + +static struct pmux_pingrp_config transformer_pinmux_common[] = { + /* SDMMC1 pinmux */ + DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT), + + /* SDMMC3 pinmux */ + DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP, NORMAL, INPUT), + + /* SDMMC4 pinmux */ + LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD1, DOWN, NORMAL, INPUT, DISABLE, DISABLE), + + /* I2C pinmux */ + I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* HDMI-CEC pinmux */ + DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT), + + /* ULPI pinmux */ + DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, DOWN, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA2_PO3, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA3_PO4, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA4_PO5, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA5_PO6, UARTA, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA6_PO7, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA7_PO0, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_CLK_PY0, UARTD, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_DIR_PY1, UARTD, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_NXT_PY2, UARTD, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_STP_PY3, UARTD, NORMAL, TRISTATE, OUTPUT), + + /* DAP3 pinmux */ + DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(PV0, RSVD1, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(PV2, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PV3, RSVD1, NORMAL, TRISTATE, OUTPUT), + + /* CLK2 pinmux */ + DEFAULT_PINMUX(CLK2_OUT_PW5, EXTPERIPH2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP, NORMAL, NORMAL, INPUT), + + /* LCD pinmux */ + DEFAULT_PINMUX(LCD_PWR1_PC1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(LCD_SDIN_PZ2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(LCD_CS0_N_PN4, DISPLAYA, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(LCD_DC0_PN6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SCK_PZ4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D2_PE2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D6_PE6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D8_PF0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D14_PF6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D15_PF7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D18_PM2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D19_PM3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D21_PM5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D22_PM6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D23_PM7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS1_N_PW0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_DC1_PD2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT, NORMAL, TRISTATE, OUTPUT), + + /* VI-group pinmux */ + LV_PINMUX(VI_D0_PT4, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D4_PL2, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D6_PL4, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D10_PT2, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D11_PT3, RSVD1, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_PCLK_PT0, RSVD1, UP, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_MCLK_PT1, VI, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_HSYNC_PD7, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_VSYNC_PD6, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* UART-B pinmux */ + DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT), + + /* UART-C pinmux */ + DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT), + + /* U-gpio group pinmux */ + DEFAULT_PINMUX(PU0, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU1, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PU2, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU3, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PU4, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(PU5, PWM2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU6, RSVD1, DOWN, NORMAL, INPUT), + + /* DAP4 pinmux */ + DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT), + + /* CLK3 pinmux */ + DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(CLK3_REQ_PEE1, DEV3, NORMAL, TRISTATE, INPUT), + + DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, UP, NORMAL, INPUT), + + DEFAULT_PINMUX(PCC1, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PBB0, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB7, I2S4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PCC2, I2S4, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, NORMAL, NORMAL, OUTPUT), + + /* KBC keys */ + DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW2_PR2, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW3_PR3, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW4_PR4, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW6_PR6, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW7_PR7, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW9_PS1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW10_PS2, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW11_PS3, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW12_PS4, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW13_PS5, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW14_PS6, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW15_PS7, KBC, UP, NORMAL, INPUT), + + DEFAULT_PINMUX(KB_COL0_PQ0, KBC, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL2_PQ2, RSVD4, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL3_PQ3, RSVD4, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL4_PQ4, RSVD4, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL5_PQ5, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL7_PQ7, KBC, NORMAL, TRISTATE, INPUT), + + /* CLK */ + DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT), + + /* DAP1 pinmux */ + DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, TRISTATE, INPUT), + + /* CLK1 pinmux */ + DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, INPUT), + + /* SPDIF pinmux */ + DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, TRISTATE, OUTPUT), + + /* DAP2 pinmux */ + DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT), + + /* SPI pinmux */ + DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SPI1_MISO_PX7, SPI1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SPI2_SCK_PX2, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, UP, NORMAL, INPUT), + + /* PEX pinmux */ + DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT), + + /* GMI pinmux */ + DEFAULT_PINMUX(GMI_WP_N_PC7, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_WAIT_PI7, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_ADV_N_PK0, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD0_PG0, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD1_PG1, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD2_PG2, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD3_PG3, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD4_PG4, NAND, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD5_PG5, NAND, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD6_PG6, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD7_PG7, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD8_PH0, PWM0, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD9_PH1, PWM1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD10_PH2, NAND, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD11_PH3, NAND, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD12_PH4, NAND, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD13_PH5, NAND, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD14_PH6, NAND, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD15_PH7, NAND, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_A16_PJ7, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A17_PB0, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A18_PB1, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A19_PK7, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_WR_N_PI0, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_OE_N_PI1, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_DQS_PI2, NAND, NORMAL, TRISTATE, OUTPUT), +}; + +static struct pmux_pingrp_config tf700t_mipi_pinmux[] = { + DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_DC1_PD2, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PBB7, I2S4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW7_PR7, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_CS4_N_PK2, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, UP, TRISTATE, INPUT), +}; + +static struct pmux_drvgrp_config transformer_padctrl[] = { + /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ + DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \ + SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE), +}; +#endif /* _PINMUX_CONFIG_TRANSFORMER_H_ */ diff --git a/board/asus/transformer-t30/transformer-t30-spl.c b/board/asus/transformer-t30/transformer-t30-spl.c new file mode 100644 index 00000000000..89819b2b921 --- /dev/null +++ b/board/asus/transformer-t30/transformer-t30-spl.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 Transformers SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +#define TPS65911_I2C_ADDR (0x2D << 1) +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62361B_I2C_ADDR (0x60 << 1) +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, TPS62361B_SET3_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/asus/transformer-t30/transformer-t30.c b/board/asus/transformer-t30/transformer-t30.c new file mode 100644 index 00000000000..b6fd19d28e4 --- /dev/null +++ b/board/asus/transformer-t30/transformer-t30.c @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +/* T30 Transformers derive from Cardhu board */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pinmux-config-transformer.h" + +#define TPS65911_I2C_ADDRESS 0x2D + +#define TPS65911_VDD1 0x21 +#define TPS65911_VDD1_OP 0x22 +#define TPS65911_LDO1 0x30 +#define TPS65911_LDO2 0x31 +#define TPS65911_LDO3 0x37 +#define TPS65911_LDO5 0x32 +#define TPS65911_LDO6 0x35 + +#define TPS65911_GPIO0 0x60 +#define TPS65911_GPIO6 0x66 +#define TPS65911_GPIO7 0x67 +#define TPS65911_GPIO8 0x68 + +#define TPS65911_DEVCTRL 0x3F +#define DEVCTRL_PWR_OFF_MASK BIT(7) +#define DEVCTRL_DEV_ON_MASK BIT(2) +#define DEVCTRL_DEV_OFF_MASK BIT(0) + +#ifdef CONFIG_CMD_POWEROFF +int do_poweroff(struct cmd_tbl *cmdtp, int flag, + int argc, char *const argv[]) +{ + struct udevice *dev; + uchar data_buffer[1]; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return 0; + } + + ret = dm_i2c_read(dev, TPS65911_DEVCTRL, data_buffer, 1); + if (ret) + return ret; + + data_buffer[0] |= DEVCTRL_PWR_OFF_MASK; + + ret = dm_i2c_write(dev, TPS65911_DEVCTRL, data_buffer, 1); + if (ret) + return ret; + + data_buffer[0] |= DEVCTRL_DEV_OFF_MASK; + data_buffer[0] &= ~DEVCTRL_DEV_ON_MASK; + + ret = dm_i2c_write(dev, TPS65911_DEVCTRL, data_buffer, 1); + if (ret) + return ret; + + // wait some time and then print error + mdelay(5000); + printf("Failed to power off!!!\n"); + return 1; +} +#endif + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_config_pingrp_table(transformer_pinmux_common, + ARRAY_SIZE(transformer_pinmux_common)); + + pinmux_config_drvgrp_table(transformer_padctrl, + ARRAY_SIZE(transformer_padctrl)); + + if (of_machine_is_compatible("asus,tf700t")) { + pinmux_config_pingrp_table(tf700t_mipi_pinmux, + ARRAY_SIZE(tf700t_mipi_pinmux)); + } +} + +#ifdef CONFIG_MMC_SDHCI_TEGRA +static void tps65911_voltage_init(void) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return; + } + + /* TPS659110: LDO1_REG = 3.3v, ACTIVE to SDMMC4 */ + ret = dm_i2c_reg_write(dev, TPS65911_LDO1, 0xc9); + if (ret) + log_debug("vcore_emmc set failed: %d\n", ret); + + if (of_machine_is_compatible("asus,tf600t")) { + /* TPS659110: VDD1_REG = 1.2v, ACTIVE to backlight */ + ret = dm_i2c_reg_write(dev, TPS65911_VDD1_OP, 0x33); + if (ret) + log_debug("vdd_bl set failed: %d\n", ret); + + ret = dm_i2c_reg_write(dev, TPS65911_VDD1, 0x0d); + if (ret) + log_debug("vdd_bl enable failed: %d\n", ret); + + /* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 VIO */ + ret = dm_i2c_reg_write(dev, TPS65911_LDO5, 0x65); + if (ret) + log_debug("vdd_usd set failed: %d\n", ret); + + /* TPS659110: LDO6_REG = 1.2v, ACTIVE to MIPI */ + ret = dm_i2c_reg_write(dev, TPS65911_LDO6, 0x11); + if (ret) + log_debug("vdd_mipi set failed: %d\n", ret); + } else { + /* TPS659110: LDO2_REG = 3.1v, ACTIVE to SDMMC1 */ + ret = dm_i2c_reg_write(dev, TPS65911_LDO2, 0xb9); + if (ret) + log_debug("vdd_usd set failed: %d\n", ret); + + /* TPS659110: LDO3_REG = 3.1v, ACTIVE to SDMMC1 VIO */ + ret = dm_i2c_reg_write(dev, TPS65911_LDO3, 0x5d); + if (ret) + log_debug("vddio_usd set failed: %d\n", ret); + } + + /* TPS659110: GPIO0_REG output high to VDD_5V0_SBY */ + ret = dm_i2c_reg_write(dev, TPS65911_GPIO0, 0x07); + if (ret) + log_debug("vdd_5v0_sby set failed: %d\n", ret); + + /* TPS659110: GPIO6_REG output high to VDD_3V3_SYS */ + ret = dm_i2c_reg_write(dev, TPS65911_GPIO6, 0x07); + if (ret) + log_debug("vdd_3v3_sys set failed: %d\n", ret); + + /* TPS659110: GPIO7_REG output high to VDD_1V5_DDR */ + ret = dm_i2c_reg_write(dev, TPS65911_GPIO7, 0x07); + if (ret) + log_debug("vdd_1v5_ddr set failed: %d\n", ret); + + /* TPS659110: GPIO8_REG pull_down output high to VDD_5V0_SYS */ + ret = dm_i2c_reg_write(dev, TPS65911_GPIO8, 0x0f); + if (ret) + log_debug("vdd_5v0_sys set failed: %d\n", ret); +} + +/* + * Routine: pin_mux_mmc + * Description: setup the MMC muxes, power rails, etc. + */ +void pin_mux_mmc(void) +{ + /* Bring up uSD and eMMC power */ + tps65911_voltage_init(); +} +#endif /* MMC */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ + /* Remove TrustZone nodes */ + fdt_del_node_and_alias(blob, "/firmware"); + fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000"); + + return 0; +} +#endif + +void nvidia_board_late_init(void) +{ + char serialno_str[17]; + + /* Set chip id as serialno */ + sprintf(serialno_str, "%016llx", tegra_chip_uid()); + env_set("serial#", serialno_str); + env_set("platform", "Tegra 3 T30"); +} diff --git a/configs/p1801-t.config b/configs/p1801-t.config new file mode 100644 index 00000000000..fab2912132c --- /dev/null +++ b/configs/p1801-t.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-p1801-t" +CONFIG_USB_GADGET_PRODUCT_NUM=0x4cb0 diff --git a/configs/tf201.config b/configs/tf201.config new file mode 100644 index 00000000000..296743b7748 --- /dev/null +++ b/configs/tf201.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf201" +CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/configs/tf300t.config b/configs/tf300t.config new file mode 100644 index 00000000000..32a92fe76fa --- /dev/null +++ b/configs/tf300t.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300t" +CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/configs/tf300tg.config b/configs/tf300tg.config new file mode 100644 index 00000000000..1396294f6de --- /dev/null +++ b/configs/tf300tg.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300tg" +CONFIG_USB_GADGET_PRODUCT_NUM=0x4c80 diff --git a/configs/tf300tl.config b/configs/tf300tl.config new file mode 100644 index 00000000000..3db033c8df4 --- /dev/null +++ b/configs/tf300tl.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300tl" +CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/configs/tf600t.config b/configs/tf600t.config new file mode 100644 index 00000000000..89d8db4eb1c --- /dev/null +++ b/configs/tf600t.config @@ -0,0 +1,4 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf600t" +CONFIG_TRANSFORMER_SPI_BOOT=y +CONFIG_BOOTCOMMAND="setenv gpio_button 222; if run check_button; then poweroff; fi; setenv gpio_button 132; if run check_button; then echo Starting SPI flash update ...; run update_spi; fi; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;" +CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/configs/tf700t.config b/configs/tf700t.config new file mode 100644 index 00000000000..066c884d082 --- /dev/null +++ b/configs/tf700t.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf700t" +CONFIG_USB_GADGET_PRODUCT_NUM=0x4c90 diff --git a/configs/transformer_t30_defconfig b/configs/transformer_t30_defconfig new file mode 100644 index 00000000000..6fe6f2548dc --- /dev/null +++ b/configs/transformer_t30_defconfig @@ -0,0 +1,85 @@ +CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y +CONFIG_ARCH_TEGRA=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y +CONFIG_TEXT_BASE=0x80110000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x3000 +CONFIG_ENV_OFFSET=0xFFFFD000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf201" +CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_SYS_PROMPT="Tegra30 (Transformer) # " +CONFIG_SPL_STACK=0x800ffffc +CONFIG_TEGRA30=y +CONFIG_TARGET_TRANSFORMER_T30=y +CONFIG_CMD_EBTUPDATE=y +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTDELAY=0 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv gpio_button 150; if run check_button; then poweroff; fi; setenv gpio_button 131; if run check_button; then bootmenu; fi; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_UMS_ABORT_KEYED=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_PAUSE=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_SPL_DM=y +CONFIG_BUTTON=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_GPIO_HOG=y +CONFIG_SYS_I2C_TEGRA=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_GPIO=y +CONFIG_BUTTON_KEYBOARD=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="ASUS" +CONFIG_USB_GADGET_VENDOR_NUM=0x0b05 +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_VIDEO_TEGRA20=y +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set diff --git a/doc/board/asus/index.rst b/doc/board/asus/index.rst new file mode 100644 index 00000000000..c59571c8b3a --- /dev/null +++ b/doc/board/asus/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +ASUS +==== + +.. toctree:: + :maxdepth: 2 + + transformer_t30 diff --git a/doc/board/asus/transformer_t30.rst b/doc/board/asus/transformer_t30.rst new file mode 100644 index 00000000000..b6b61015409 --- /dev/null +++ b/doc/board/asus/transformer_t30.rst @@ -0,0 +1,116 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the ASUS Transformer device family +============================================= + +``DISCLAMER!`` Moving your ASUS Transformer to use U-Boot +assumes replacement of the vendor ASUS bootloader. Vendor +android firmwares will no longer be able to run on the device. +This replacement IS reversible. + +Quick Start +----------- + +- Build U-Boot +- Pack U-Boot into repart-block +- Flash repart-block into the eMMC +- Flash repart-block into TF600T SPI flash +- Boot +- Self Upgrading + +Build U-Boot +------------ + +Device support is implemented by applying config fragment +to a generic board defconfig. Valid fragments are ``tf201.config``, +``tf300t.config``, ``tf300tg.config``, ``tf300tl.config``, +``tf700t.config``, ``tf600t.config`` and ``p1801-t.config``. + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-linux-gnueabi- + $ make transformer_t30_defconfig tf201.config # For TF201 + $ make + +After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin`` +image, ready for flashing (but check the next section for additional +adjustments). + +Pack U-Boot into repar-block +---------------------------- + +``DISCLAMER!`` All questions related to re-crypt work should be asked +in re-crypt repo issues. NOT HERE! + +re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in +form usable by device. This process is required only on the first +installation or to recover the device in case of a failed update. +You need to know your tablet's individual SBK to continue. + +.. code-block:: bash + + $ git clone https://github.com/clamor-s/re-crypt.git + $ cd re-crypt # place your u-boot-dtb-regra.bin here + $ ./re-crypt.sh -d tf201 -k deadbeefdeadc0dedeadd00dfee1dead + +Script will produce you a `repart-block.bin` ready to flash. + +Flash repart-block into the eMMC +-------------------------------- + +``DISCLAMER!`` All questions related to NvFlash should be asked +in the proper place. NOT HERE! Flashing repart-block will erase +all your eMMC, so make a backup before! + +``repart-block.bin`` contains BCT and bootloader in encrypted state +in form which can just be written RAW at the start of eMMC. + +.. code-block:: bash + + $ wheelie --blob blob.bin + $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin + +Flash repart-block into TF600T SPI flash +---------------------------------------- + +Unlike other transformers TF600T uses separate 4 MB SPI flash which +contains all data required for boot. It is flashed from within u-boot +itself preloaded into RAM using fusee gelee. After creating your +``repart-block.bin`` you have to place it on a 1st partition of microSD +card formated in fat. Then insert this microSD card into your tablet +and boot it using fusee gelee and u-boot which was included into +repart-block.bin, while booting you must hold volume down button. +Process should take less then a minute, if everything goes correct, +on microSD will appear ``spi-flash-backup.bin`` file, which is dump of +your spi flash content and can be used to restore UEFI, do not loose it, +tablet will power itself off. + +Self-updating of u-boot is performed by placing ``u-boot-dtb-tegra.bin`` +on 1st partition of microSD, inserting it into tablet and booting with +pressed volume down button. + +Boot +---- + +After flashing ``repart-block.bin`` the device should reboot and turn +itself off. This is normal behavior if no boot configuration is +found. + +To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD +and then on eMMC. Additionally if Volume Down button is pressed +while booting device will enter bootmenu. Bootmenu contains entries +to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot +RCM, poweroff, enter U-Boot console and update bootloader (check next +chapter). + +Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC +and allows the user to use/partition it in any way the user desires. + +Self Upgrading +-------------- + +Place your ``u-boot-dtb-tegra.bin`` on the first partition of the +MicroSD card and insert it into the tablet. Enter bootmenu, choose +update bootloader option with Power button and U-Boot should update +itself. Once the process is completed, U-Boot will ask to press any +button to reboot. diff --git a/doc/board/index.rst b/doc/board/index.rst index 9ef25b10915..d28d8e18745 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -14,6 +14,7 @@ Board-specific doc anbernic/index apple/index armltd/index + asus/index atmel/index beacon/index broadcom/index diff --git a/include/configs/transformer-common.h b/include/configs/transformer-common.h new file mode 100644 index 00000000000..dcdda1ec5b4 --- /dev/null +++ b/include/configs/transformer-common.h @@ -0,0 +1,94 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2022, Svyatoslav Ryhel . + */ + +#ifndef __TRANSFORMER_COMMON_H +#define __TRANSFORMER_COMMON_H + +/* High-level configuration options */ +#define CFG_TEGRA_BOARD_STRING "ASUS Transformer" + +#define TRANSFORMER_FLASH_UBOOT \ + "flash_uboot=echo Preparing RAM;" \ + "mw ${kernel_addr_r} 0 ${boot_block_size_r};" \ + "mw ${ramdisk_addr_r} 0 ${boot_block_size_r};" \ + "echo Reading BCT;" \ + "mmc dev 0 1;" \ + "mmc read ${kernel_addr_r} 0 ${boot_block_size};" \ + "echo Reading bootloader;" \ + "if load mmc 1:1 ${ramdisk_addr_r} ${bootloader_file};" \ + "then echo Calculating bootloader size;" \ + "size mmc 1:1 ${bootloader_file};" \ + "ebtupdate ${kernel_addr_r} ${ramdisk_addr_r} ${filesize};" \ + "echo Writing bootloader to eMMC;" \ + "mmc dev 0 1;" \ + "mmc write ${kernel_addr_r} 0 ${boot_block_size};" \ + "mmc dev 0 2;" \ + "mmc write ${ramdisk_addr_r} 0 ${boot_block_size};" \ + "echo Bootloader written successfully;" \ + "pause 'Press ANY key to reboot device...'; reset;" \ + "else echo Reading bootloader failed;" \ + "pause 'Press ANY key to return to bootmenu...'; bootmenu; fi\0" + +#define TRANSFORMER_FLASH_SPI \ + "update_spi=sf probe 0:1;" \ + "echo Dumping current SPI flash content ...;" \ + "sf read ${kernel_addr_r} 0x0 ${spi_size};" \ + "if fatwrite mmc 1:1 ${kernel_addr_r} spi-flash-backup.bin ${spi_size};" \ + "then echo SPI flash content was successfully written into spi-flash-backup.bin;" \ + "echo Reading SPI flash binary;" \ + "if load mmc 1:1 ${kernel_addr_r} repart-block.bin;" \ + "then echo Writing bootloader into SPI flash;" \ + "sf probe 0:1;" \ + "sf update ${kernel_addr_r} 0x0 ${spi_size};" \ + "poweroff;" \ + "else echo Preparing RAM;" \ + "mw ${kernel_addr_r} 0 ${boot_block_size_r};" \ + "mw ${ramdisk_addr_r} 0 ${boot_block_size_r};" \ + "echo Reading BCT;" \ + "sf read ${kernel_addr_r} 0x0 ${boot_block_size_r};" \ + "echo Reading bootloader;" \ + "if load mmc 1:1 ${ramdisk_addr_r} ${bootloader_file};" \ + "then echo Calculating bootloader size;" \ + "size mmc 1:1 ${bootloader_file};" \ + "ebtupdate ${kernel_addr_r} ${ramdisk_addr_r} ${filesize};" \ + "echo Writing bootloader into SPI flash;" \ + "sf probe 0:1;" \ + "sf update ${kernel_addr_r} 0x0 ${boot_block_size_r};" \ + "sf update ${ramdisk_addr_r} ${boot_block_size_r} ${boot_block_size_r};" \ + "echo Bootloader written successfully; poweroff;" \ + "else echo Reading bootloader failed;" \ + "poweroff; fi;" \ + "fi;" \ + "else echo SPI flash backup FAILED! Aborting ...;" \ + "poweroff; fi\0" + +#define TRANSFORMER_REFRESH_USB \ + "refresh_usb=usb start; usb reset; usb tree; usb info;" \ + "pause 'Press ANY key to return to bootmenu...'; bootmenu\0" + +#define TRANSFORMER_BOOTMENU \ + TRANSFORMER_FLASH_UBOOT \ + TRANSFORMER_FLASH_SPI \ + TRANSFORMER_REFRESH_USB \ + "bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu\0" \ + "bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu\0" \ + "bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu\0" \ + "bootmenu_3=update bootloader=run flash_uboot\0" \ + "bootmenu_4=refresh USB=run refresh_usb\0" \ + "bootmenu_5=reboot RCM=enterrcm\0" \ + "bootmenu_6=reboot=reset\0" \ + "bootmenu_7=power off=poweroff\0" \ + "bootmenu_delay=-1\0" + +#define BOARD_EXTRA_ENV_SETTINGS \ + "spi_size=0x400000\0" \ + "boot_block_size_r=0x200000\0" \ + "boot_block_size=0x1000\0" \ + "check_button=gpio input ${gpio_button}; test $? -eq 0;\0" \ + "bootloader_file=u-boot-dtb-tegra.bin\0" \ + "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ + TRANSFORMER_BOOTMENU + +#endif /* __CONFIG_H */ diff --git a/include/configs/transformer-t30.h b/include/configs/transformer-t30.h new file mode 100644 index 00000000000..d2a16f12c18 --- /dev/null +++ b/include/configs/transformer-t30.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2010,2012 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#include "tegra30-common.h" +#include "transformer-common.h" + +/* Board-specific serial config */ +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ From 855ffdfa650aa54edf2bfdd99da50cd6255453b8 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 30 Jun 2023 10:29:04 +0300 Subject: [PATCH 008/148] board: asus: grouper: add Google Nexus 7 (2012) support Nexus 7 is a mini tablet computer co-developed by Google and Asus that runs the Android operating system. The Nexus 7 features a 7" display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 8/16 GB of internal storage. This patch brings support for all 3 known ASUS/Google devices: - Nexus 7 (2012) E1565 - Nexus 7 (2012) PM269 - Nexus 7 (2012) 3G - tilapia Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # ASUS Grouper E1565 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Thierry Reding --- arch/arm/dts/Makefile | 3 + arch/arm/dts/tegra30-asus-grouper-common.dtsi | 157 ++++++++ .../dts/tegra30-asus-nexus7-grouper-E1565.dts | 43 +++ .../dts/tegra30-asus-nexus7-grouper-PM269.dts | 36 ++ .../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 62 +++ arch/arm/mach-tegra/tegra30/Kconfig | 5 + board/asus/grouper/Kconfig | 22 ++ board/asus/grouper/MAINTAINERS | 10 + board/asus/grouper/Makefile | 14 + board/asus/grouper/grouper-spl-max.c | 45 +++ board/asus/grouper/grouper-spl-ti.c | 41 ++ board/asus/grouper/grouper.c | 202 ++++++++++ board/asus/grouper/pinmux-config-grouper.h | 362 ++++++++++++++++++ configs/grouper_E1565.config | 2 + configs/grouper_PM269.config | 2 + configs/grouper_common_defconfig | 84 ++++ configs/tilapia.config | 3 + doc/board/asus/grouper_common.rst | 94 +++++ doc/board/asus/index.rst | 1 + include/configs/grouper.h | 61 +++ 20 files changed, 1249 insertions(+) create mode 100644 arch/arm/dts/tegra30-asus-grouper-common.dtsi create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts create mode 100644 arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts create mode 100644 board/asus/grouper/Kconfig create mode 100644 board/asus/grouper/MAINTAINERS create mode 100644 board/asus/grouper/Makefile create mode 100644 board/asus/grouper/grouper-spl-max.c create mode 100644 board/asus/grouper/grouper-spl-ti.c create mode 100644 board/asus/grouper/grouper.c create mode 100644 board/asus/grouper/pinmux-config-grouper.h create mode 100644 configs/grouper_E1565.config create mode 100644 configs/grouper_PM269.config create mode 100644 configs/grouper_common_defconfig create mode 100644 configs/tilapia.config create mode 100644 doc/board/asus/grouper_common.rst create mode 100644 include/configs/grouper.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c87729d45ef..f2b4044a017 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -237,6 +237,9 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra20-ventana.dtb \ tegra20-colibri.dtb \ tegra30-apalis.dtb \ + tegra30-asus-nexus7-grouper-PM269.dtb \ + tegra30-asus-nexus7-grouper-E1565.dtb \ + tegra30-asus-nexus7-tilapia-E1565.dtb \ tegra30-asus-p1801-t.dtb \ tegra30-asus-tf201.dtb \ tegra30-asus-tf300t.dtb \ diff --git a/arch/arm/dts/tegra30-asus-grouper-common.dtsi b/arch/arm/dts/tegra30-asus-grouper-common.dtsi new file mode 100644 index 00000000000..4fa980f24f9 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-grouper-common.dtsi @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +#include "tegra30.dtsi" + +/ { + chosen { + stdout-path = &uarta; + }; + + aliases { + i2c0 = &pwr_i2c; + + mmc0 = &sdmmc4; /* eMMC */ + + rtc0 = &pmic; + rtc1 = "/rtc@7000e000"; + + usb0 = &usb1; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + host1x@50000000 { + dc@54200000 { + nvidia,180-rotation; + rgb { + status = "okay"; + + nvidia,panel = <&panel>; + }; + }; + }; + + gpio@6000d000 { + volume-buttons-hog { + gpio-hog; + gpios = , + ; + output-low; + }; + }; + + uarta: serial@70006000 { + status = "okay"; + }; + + pwm: pwm@7000a000 { + status = "okay"; + }; + + pwr_i2c: i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + }; + + sdmmc4: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + usb1: usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + + enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + power-supply = <&vdd_5v0_bl>; + pwms = <&pwm 0 50000>; + + brightness-levels = <1 35 70 105 140 175 210 255>; + default-brightness-level = <5>; + }; + + /* PMIC has a built-in 32KHz oscillator which is used by PMC */ + clk32k_in: clock-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "pmic-oscillator"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel: panel { + compatible = "simple-panel"; + + power-supply = <&vdd_pnl_reg>; + enable-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>; + + backlight = <&backlight>; + + display-timings { + timing@0 { + /* 1280x800@60Hz */ + clock-frequency = <68000000>; + + hactive = <800>; + hfront-porch = <24>; + hback-porch = <32>; + hsync-len = <24>; + + vactive = <1280>; + vfront-porch = <5>; + vback-porch = <32>; + vsync-len = <1>; + }; + }; + }; + + vdd_pnl_reg: regulator-pnl { + compatible = "regulator-fixed"; + regulator-name = "vdd_panel"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vdd_5v0_bl: regulator-bl { + compatible = "regulator-fixed"; + regulator-name = "vdd_5v0_bl"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + gpio = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; diff --git a/arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts b/arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts new file mode 100644 index 00000000000..a98d3e21455 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-grouper-common.dtsi" + +/ { + model = "ASUS Google Nexus 7 (Project Nakasi / ME370T) E1565"; + compatible = "asus,grouper", "nvidia,tegra30"; + + i2c@7000d000 { + pmic: max77663@3c { + compatible = "maxim,max77663"; + reg = <0x3c>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + + system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + regulators { + vdd_1v8: sd2 { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + /* eMMC VDD */ + vcore_emmc: ldo3 { + regulator-name = "vcore_emmc"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts b/arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts new file mode 100644 index 00000000000..44ea218a472 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-grouper-common.dtsi" + +/ { + model = "ASUS Google Nexus 7 (Project Nakasi / ME370T) PM269"; + compatible = "asus,grouper", "nvidia,tegra30"; + + i2c@7000d000 { + /* Texas Instruments TPS659110 PMIC */ + pmic: tps65911@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + regulators { + /* eMMC VDD */ + vcore_emmc: ldo1 { + regulator-name = "vdd_emmc_core"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts b/arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts new file mode 100644 index 00000000000..812d5a1ba70 --- /dev/null +++ b/arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-asus-grouper-common.dtsi" + +/ { + model = "ASUS Google Nexus 7 (Project Bach / ME370TG) E1565"; + compatible = "asus,tilapia", "nvidia,tegra30"; + + i2c@7000d000 { + pmic: max77663@3c { + compatible = "maxim,max77663"; + reg = <0x3c>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + + system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + regulators { + vdd_1v8: sd2 { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + /* eMMC VDD */ + vcore_emmc: ldo3 { + regulator-name = "vcore_emmc"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + }; + }; + }; + }; + + panel { + display-timings { + timing@0 { + /* 1280x800@60Hz */ + clock-frequency = <81750000>; + + hactive = <800>; + hfront-porch = <64>; + hback-porch = <128>; + hsync-len = <64>; + + vactive = <1280>; + vfront-porch = <5>; + vback-porch = <2>; + vsync-len = <1>; + }; + }; + }; +}; diff --git a/arch/arm/mach-tegra/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig index 4f78d0ba973..6cbb73ebeef 100644 --- a/arch/arm/mach-tegra/tegra30/Kconfig +++ b/arch/arm/mach-tegra/tegra30/Kconfig @@ -20,6 +20,10 @@ config TARGET_COLIBRI_T30 bool "Toradex Colibri T30 board" select BOARD_LATE_INIT +config TARGET_GROUPER + bool "Asus and Google Grouper board" + select BOARD_LATE_INIT + config TARGET_TEC_NG bool "Avionic Design TEC-NG board" select BOARD_LATE_INIT @@ -37,6 +41,7 @@ source "board/toradex/apalis_t30/Kconfig" source "board/nvidia/beaver/Kconfig" source "board/nvidia/cardhu/Kconfig" source "board/toradex/colibri_t30/Kconfig" +source "board/asus/grouper/Kconfig" source "board/avionic-design/tec-ng/Kconfig" source "board/asus/transformer-t30/Kconfig" diff --git a/board/asus/grouper/Kconfig b/board/asus/grouper/Kconfig new file mode 100644 index 00000000000..912c6c5fbae --- /dev/null +++ b/board/asus/grouper/Kconfig @@ -0,0 +1,22 @@ +if TARGET_GROUPER + +config SYS_BOARD + default "grouper" + +config SYS_VENDOR + default "asus" + +config SYS_CONFIG_NAME + default "grouper" + +config GROUPER_TPS65911 + bool "Enable support TI TPS65911 PMIC" + select CMD_POWEROFF + default n + +config GROUPER_MAX77663 + bool "Enable support MAXIM MAX77663 PMIC" + select CMD_POWEROFF + default n + +endif diff --git a/board/asus/grouper/MAINTAINERS b/board/asus/grouper/MAINTAINERS new file mode 100644 index 00000000000..18b4f0641f4 --- /dev/null +++ b/board/asus/grouper/MAINTAINERS @@ -0,0 +1,10 @@ +GROUPER BOARD +M: Svyatoslav Ryhel +S: Maintained +F: board/asus/grouper/ +F: configs/grouper_E1565.config +F: configs/grouper_PM269.config +F: configs/tilapia.config +F: configs/grouper_common_defconfig +F: doc/board/asus/grouper_common.rst +F: include/configs/grouper.h diff --git a/board/asus/grouper/Makefile b/board/asus/grouper/Makefile new file mode 100644 index 00000000000..e4a477a3669 --- /dev/null +++ b/board/asus/grouper/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010-2012 +# NVIDIA Corporation +# +# (C) Copyright 2021 +# Svyatoslav Ryhel + +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_GROUPER_MAX77663) += grouper-spl-max.o +obj-$(CONFIG_GROUPER_TPS65911) += grouper-spl-ti.o +endif + +obj-y += grouper.o diff --git a/board/asus/grouper/grouper-spl-max.c b/board/asus/grouper/grouper-spl-max.c new file mode 100644 index 00000000000..844383766a7 --- /dev/null +++ b/board/asus/grouper/grouper-spl-max.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 Grouper MAX SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +#define MAX77663_I2C_ADDR (0x3C << 1) + +#define MAX77663_REG_SD0 0x16 +#define MAX77663_REG_SD0_DATA (0x2100 | MAX77663_REG_SD0) +#define MAX77663_REG_SD1 0x17 +#define MAX77663_REG_SD1_DATA (0x3000 | MAX77663_REG_SD1) +#define MAX77663_REG_LDO4 0x2B +#define MAX77663_REG_LDO4_DATA (0xE000 | MAX77663_REG_LDO4) + +#define MAX77663_REG_GPIO4 0x3A +#define MAX77663_REG_GPIO4_DATA (0x0100 | MAX77663_REG_GPIO4) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_SD1_DATA); + + udelay(1000); + + /* Bring up VDD_CPU to 1.0125V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_SD0_DATA); + udelay(1000); + + /* Bring up VDD_RTC to 1.200V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_LDO4_DATA); + udelay(10 * 1000); + + /* Set 32k-out gpio state */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_GPIO4_DATA); +} diff --git a/board/asus/grouper/grouper-spl-ti.c b/board/asus/grouper/grouper-spl-ti.c new file mode 100644 index 00000000000..e5b78f01215 --- /dev/null +++ b/board/asus/grouper/grouper-spl-ti.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 Grouper TI SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +#define TPS65911_I2C_ADDR (0x2D << 1) +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62361B_I2C_ADDR (0x60 << 1) +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, TPS62361B_SET3_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/asus/grouper/grouper.c b/board/asus/grouper/grouper.c new file mode 100644 index 00000000000..2769313e681 --- /dev/null +++ b/board/asus/grouper/grouper.c @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pinmux-config-grouper.h" + +#define TPS65911_I2C_ADDRESS 0x2D + +#define TPS65911_REG_LDO1 0x30 +#define TPS65911_REG_DEVCTRL 0x3F +#define DEVCTRL_PWR_OFF_MASK BIT(7) +#define DEVCTRL_DEV_ON_MASK BIT(2) +#define DEVCTRL_DEV_OFF_MASK BIT(0) + +#define MAX77663_I2C_ADDRESS 0x3C + +#define MAX77663_REG_SD2 0x18 +#define MAX77663_REG_LDO3 0x29 +#define MAX77663_REG_ONOFF_CFG1 0x41 +#define ONOFF_PWR_OFF BIT(1) + +#ifdef CONFIG_CMD_POWEROFF +#ifdef CONFIG_GROUPER_TPS65911 +int do_poweroff(struct cmd_tbl *cmdtp, + int flag, int argc, char *const argv[]) +{ + struct udevice *dev; + uchar data_buffer[1]; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return 0; + } + + ret = dm_i2c_read(dev, TPS65911_REG_DEVCTRL, data_buffer, 1); + if (ret) + return ret; + + data_buffer[0] |= DEVCTRL_PWR_OFF_MASK; + + ret = dm_i2c_write(dev, TPS65911_REG_DEVCTRL, data_buffer, 1); + if (ret) + return ret; + + data_buffer[0] |= DEVCTRL_DEV_OFF_MASK; + data_buffer[0] &= ~DEVCTRL_DEV_ON_MASK; + + ret = dm_i2c_write(dev, TPS65911_REG_DEVCTRL, data_buffer, 1); + if (ret) + return ret; + + // wait some time and then print error + mdelay(5000); + + printf("Failed to power off!!!\n"); + return 1; +} +#endif /* CONFIG_GROUPER_TPS65911 */ + +#ifdef CONFIG_GROUPER_MAX77663 +int do_poweroff(struct cmd_tbl *cmdtp, + int flag, int argc, char *const argv[]) +{ + struct udevice *dev; + uchar data_buffer[1]; + int ret; + + ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return 0; + } + + ret = dm_i2c_read(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1); + if (ret) + return ret; + + data_buffer[0] |= ONOFF_PWR_OFF; + + ret = dm_i2c_write(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1); + if (ret) + return ret; + + // wait some time and then print error + mdelay(5000); + + printf("Failed to power off!!!\n"); + return 1; +} +#endif /* CONFIG_GROUPER_MAX77663 */ +#endif /* CONFIG_CMD_POWEROFF */ + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_config_pingrp_table(grouper_pinmux_common, + ARRAY_SIZE(grouper_pinmux_common)); + + pinmux_config_drvgrp_table(grouper_padctrl, + ARRAY_SIZE(grouper_padctrl)); +} + +#ifdef CONFIG_MMC_SDHCI_TEGRA +static void __maybe_unused tps65911_voltage_init(void) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return; + } + + /* TPS659110: LDO1_REG = 3.3v, ACTIVE to SDMMC4 */ + ret = dm_i2c_reg_write(dev, TPS65911_REG_LDO1, 0xC9); + if (ret) + log_debug("vcore_emmc set failed: %d\n", ret); +} + +static void __maybe_unused max77663_voltage_init(void) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return; + } + + /* 0x60 for 1.8v, bit7:0 = voltage */ + ret = dm_i2c_reg_write(dev, MAX77663_REG_SD2, 0x60); + if (ret) + log_debug("vdd_1v8_vio set failed: %d\n", ret); + + /* 0xEC for 3.00v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO3, 0xEC); + if (ret) + log_debug("vcore_emmc set failed: %d\n", ret); +} + +/* + * Routine: pin_mux_mmc + * Description: setup the MMC muxes, power rails, etc. + */ +void pin_mux_mmc(void) +{ +#ifdef CONFIG_GROUPER_MAX77663 + /* Bring up eMMC power on MAX PMIC */ + max77663_voltage_init(); +#endif + +#ifdef CONFIG_GROUPER_TPS65911 + /* Bring up eMMC power on TI PMIC */ + tps65911_voltage_init(); +#endif +} +#endif /* MMC */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ + /* Remove TrustZone nodes */ + fdt_del_node_and_alias(blob, "/firmware"); + fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000"); + + return 0; +} +#endif + +void nvidia_board_late_init(void) +{ + char serialno_str[17]; + + /* Set chip id as serialno */ + sprintf(serialno_str, "%016llx", tegra_chip_uid()); + env_set("serial#", serialno_str); + env_set("platform", "Tegra 3 T30"); +} diff --git a/board/asus/grouper/pinmux-config-grouper.h b/board/asus/grouper/pinmux-config-grouper.h new file mode 100644 index 00000000000..98134f74f1a --- /dev/null +++ b/board/asus/grouper/pinmux-config-grouper.h @@ -0,0 +1,362 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + */ + +#ifndef _PINMUX_CONFIG_GROUPER_H_ +#define _PINMUX_CONFIG_GROUPER_H_ + +#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_##_od, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ + } + +#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ + { \ + .drvgrp = PMUX_DRVGRP_##_drvgrp, \ + .slwf = _slwf, \ + .slwr = _slwr, \ + .drvup = _drvup, \ + .drvdn = _drvdn, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ + } + +static struct pmux_pingrp_config grouper_pinmux_common[] = { + /* SDMMC1 pinmux */ + DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT), + + /* SDMMC3 pinmux */ + DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP, NORMAL, INPUT), + + /* SDMMC4 pinmux */ + LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD2, DOWN, NORMAL, INPUT, DISABLE, DISABLE), + + /* I2C pinmux */ + I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* HDMI-CEC pinmux */ + DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT), + + /* ULPI pinmux */ + DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, DOWN, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA2_PO3, UARTA, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA3_PO4, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA4_PO5, UARTA, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA5_PO6, UARTA, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA6_PO7, UARTA, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA7_PO0, UARTA, UP, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_CLK_PY0, ULPI, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_DIR_PY1, ULPI, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_NXT_PY2, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_STP_PY3, RSVD1, NORMAL, TRISTATE, OUTPUT), + + /* DAP3 pinmux */ + DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, DOWN, TRISTATE, INPUT), + + DEFAULT_PINMUX(PV0, RSVD1, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PV2, OWR, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(PV3, RSVD1, NORMAL, TRISTATE, INPUT), + + /* CLK2 pinmux */ + DEFAULT_PINMUX(CLK2_OUT_PW5, EXTPERIPH2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP, NORMAL, NORMAL, INPUT), + + /* LCD pinmux */ + DEFAULT_PINMUX(LCD_PWR1_PC1, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_SDIN_PZ2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, UP, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS0_N_PN4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_DC0_PN6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SCK_PZ4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D2_PE2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D6_PE6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D8_PF0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D14_PF6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D15_PF7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D18_PM2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D19_PM3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D21_PM5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D22_PM6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D23_PM7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS1_N_PW0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_DC1_PD2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT, NORMAL, NORMAL, OUTPUT), + + /* VI-group pinmux */ + LV_PINMUX(VI_D0_PT4, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D1_PD5, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D2_PL0, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D3_PL1, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D4_PL2, VI, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D5_PL3, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D6_PL4, VI, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D7_PL5, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D8_PL6, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D9_PL7, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D10_PT2, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D11_PT3, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_PCLK_PT0, SDMMC2, UP, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_MCLK_PT1, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_HSYNC_PD7, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_VSYNC_PD6, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE), + + /* UART-B pinmux */ + DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT), + + /* UART-C pinmux */ + DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT), + + /* U-gpio group pinmux */ + DEFAULT_PINMUX(PU0, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU1, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PU2, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU3, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU4, PWM1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PU5, PWM2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU6, RSVD4, NORMAL, NORMAL, INPUT), + + /* DAP4 pinmux */ + DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT), + + /* CLK3 pinmux */ + DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(CLK3_REQ_PEE1, DEV3, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, DOWN, NORMAL, INPUT), + + DEFAULT_PINMUX(PCC1, RSVD2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB0, RSVD2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB7, I2S4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PCC2, I2S4, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, UP, NORMAL, INPUT), + + /* KBC keys */ + DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW1_PR1, KBC, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(KB_ROW2_PR2, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW3_PR3, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW4_PR4, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW7_PR7, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW8_PS0, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW9_PS1, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW10_PS2, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW11_PS3, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW12_PS4, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW13_PS5, KBC, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(KB_ROW14_PS6, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW15_PS7, KBC, NORMAL, NORMAL, OUTPUT), + + DEFAULT_PINMUX(KB_COL0_PQ0, KBC, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(KB_COL1_PQ1, KBC, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(KB_COL2_PQ2, RSVD4, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL3_PQ3, RSVD4, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL4_PQ4, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL5_PQ5, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL7_PQ7, KBC, NORMAL, TRISTATE, INPUT), + + /* CLK */ + DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT), + + /* DAP1 pinmux */ + DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT), + + /* CLK1 pinmux */ + DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, INPUT), + + /* SPDIF pinmux */ + DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT), + + /* DAP2 pinmux */ + DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT), + + /* SPI pinmux */ + DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI1_MISO_PX7, SPI1, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI2_MISO_PX1, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI2_SCK_PX2, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI2_CS2_N_PW3, SPI2, NORMAL, NORMAL, INPUT), + + /* PEX pinmux */ + DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, OUTPUT), + + /* GMI pinmux */ + DEFAULT_PINMUX(GMI_WP_N_PC7, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_WAIT_PI7, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_ADV_N_PK0, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_CS0_N_PJ0, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_CS1_N_PJ2, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_CS6_N_PI3, GMI, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD0_PG0, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD1_PG1, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD2_PG2, RSVD1, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD3_PG3, RSVD1, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD4_PG4, NAND, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD5_PG5, NAND, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD6_PG6, RSVD1, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD7_PG7, RSVD1, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD8_PH0, PWM0, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD9_PH1, RSVD4, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD10_PH2, PWM2, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD11_PH3, PWM3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD12_PH4, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD13_PH5, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_AD14_PH6, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD15_PH7, RSVD1, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_A16_PJ7, UARTD, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A18_PB1, UARTD, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A19_PK7, UARTD, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_WR_N_PI0, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_OE_N_PI1, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GMI_DQS_PI2, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_RST_N_PI4, NAND, UP, NORMAL, OUTPUT), +}; + +static struct pmux_drvgrp_config grouper_padctrl[] = { + /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ + DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \ + SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE), +}; +#endif /* _PINMUX_CONFIG_GROUPER_H_ */ diff --git a/configs/grouper_E1565.config b/configs/grouper_E1565.config new file mode 100644 index 00000000000..4d8d5263fa9 --- /dev/null +++ b/configs/grouper_E1565.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-grouper-E1565" +CONFIG_GROUPER_MAX77663=y diff --git a/configs/grouper_PM269.config b/configs/grouper_PM269.config new file mode 100644 index 00000000000..fc768b20517 --- /dev/null +++ b/configs/grouper_PM269.config @@ -0,0 +1,2 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-grouper-PM269" +CONFIG_GROUPER_TPS65911=y diff --git a/configs/grouper_common_defconfig b/configs/grouper_common_defconfig new file mode 100644 index 00000000000..8dc88851f5a --- /dev/null +++ b/configs/grouper_common_defconfig @@ -0,0 +1,84 @@ +CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y +CONFIG_ARCH_TEGRA=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y +CONFIG_TEXT_BASE=0x80110000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x3000 +CONFIG_ENV_OFFSET=0xFFFFD000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-grouper-E1565" +CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_SYS_PROMPT="Tegra30 (Grouper) # " +CONFIG_SPL_STACK=0x800ffffc +CONFIG_TEGRA30=y +CONFIG_TARGET_GROUPER=y +CONFIG_CMD_EBTUPDATE=y +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTDELAY=0 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_UMS_ABORT_KEYED=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_PAUSE=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_SPL_DM=y +CONFIG_BUTTON=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_GPIO_HOG=y +CONFIG_SYS_I2C_TEGRA=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_GPIO=y +CONFIG_BUTTON_KEYBOARD=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="ASUS Google" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4e41 +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_VIDEO_TEGRA20=y +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set diff --git a/configs/tilapia.config b/configs/tilapia.config new file mode 100644 index 00000000000..1fb0633e3a7 --- /dev/null +++ b/configs/tilapia.config @@ -0,0 +1,3 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-tilapia-E1565" +CONFIG_GROUPER_MAX77663=y +CONFIG_SYS_PROMPT="Tegra30 (Tilapia) # " diff --git a/doc/board/asus/grouper_common.rst b/doc/board/asus/grouper_common.rst new file mode 100644 index 00000000000..2e4450b40e0 --- /dev/null +++ b/doc/board/asus/grouper_common.rst @@ -0,0 +1,94 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the ASUS/Google Nexus 7 (2012) +========================================= + +``DISCLAMER!`` Moving your ASUS/Google Nexus 7 (2012) to use +U-Boot assumes replacement of the vendor ASUS bootloader. Vendor +android firmwares will no longer be able to run on the device. +This replacement IS reversible. + +Quick Start +----------- + +- Build U-Boot +- Pack U-Boot into repart-block +- Flash repart-block into the eMMC +- Boot +- Self Upgrading + +Build U-Boot +------------ + +Device support is implemented by applying config fragment to a generic +board defconfig. Valid fragments are ``grouper_E1565.config``, +``grouper_PM269.config`` and ``tilapia.config``. + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-linux-gnueabi- + $ make grouper_common_defconfig grouper_E1565.config # For maxim based grouper + $ make + +After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin`` +image, ready for flashing (but check the next section for additional +adjustments). + +Pack U-Boot into repar-block +---------------------------- + +``DISCLAMER!`` All questions related to re-crypt work should be asked +in re-crypt repo issues. NOT HERE! + +re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in +form usable by device. This process is required only on the first +installation or to recover the device in case of a failed update. +You need to know your tablet's individual SBK to continue. + +.. code-block:: bash + + $ git clone https://github.com/clamor-s/re-crypt.git + $ cd re-crypt # place your u-boot-dtb-regra.bin here + $ ./re-crypt.sh -d grouper -k deadbeefdeadc0dedeadd00dfee1dead + +Script will produce you a ``repart-block.bin`` ready to flash. + +Flash repart-block into the eMMC +-------------------------------- + +``DISCLAMER!`` All questions related to NvFlash should be asked +in the proper place. NOT HERE! Flashing repart-block will erase +all your eMMC, so make a backup before! + +``repart-block.bin`` contains BCT and bootloader in encrypted state +in form which can just be written RAW at the start of eMMC. + +.. code-block:: bash + + $ wheelie --blob blob.bin + $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin + +Boot +---- + +After flashing ``repart-block.bin`` the device should reboot and turn +itself off. This is normal behavior if no boot configuration is +found. + +To boot Linux, U-Boot will look for an ``extlinux.conf`` configuration +on eMMC. Additionally if Volume Down button is pressed while booting +device will enter bootmenu. Bootmenu contains entries to mount eMMC as +mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot +console and update bootloader (check next chapter). + +Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC +and allows the user to use/partition it in any way the user desires. + +Self Upgrading +-------------- + +Place your ``u-boot-dtb-tegra.bin`` on the first partition of the +eMMC (using ability of u-boot to mount it). Enter bootmenu, choose +update bootloader option with Power button and U-Boot should update +itself. Once the process is completed, U-Boot will ask to press any +button to reboot. diff --git a/doc/board/asus/index.rst b/doc/board/asus/index.rst index c59571c8b3a..87e535fe34f 100644 --- a/doc/board/asus/index.rst +++ b/doc/board/asus/index.rst @@ -6,4 +6,5 @@ ASUS .. toctree:: :maxdepth: 2 + grouper_common transformer_t30 diff --git a/include/configs/grouper.h b/include/configs/grouper.h new file mode 100644 index 00000000000..93304ddc6e8 --- /dev/null +++ b/include/configs/grouper.h @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#include "tegra30-common.h" + +/* High-level configuration options */ +#define CFG_TEGRA_BOARD_STRING "ASUS Google Nexus 7 (2012)" + +#define GROUPER_FLASH_UBOOT \ + "flash_uboot=echo Preparing RAM;" \ + "mw ${kernel_addr_r} 0 ${boot_block_size_r};" \ + "mw ${ramdisk_addr_r} 0 ${boot_block_size_r};" \ + "echo Reading BCT;" \ + "mmc dev 0 1;" \ + "mmc read ${kernel_addr_r} 0 ${boot_block_size};" \ + "echo Reading bootloader;" \ + "if load mmc 0:1 ${ramdisk_addr_r} ${bootloader_file};" \ + "then echo Calculating bootloader size;" \ + "size mmc 0:1 ${bootloader_file};" \ + "ebtupdate ${kernel_addr_r} ${ramdisk_addr_r} ${filesize};" \ + "echo Writing bootloader to eMMC;" \ + "mmc dev 0 1;" \ + "mmc write ${kernel_addr_r} 0 ${boot_block_size};" \ + "mmc dev 0 2;" \ + "mmc write ${ramdisk_addr_r} 0 ${boot_block_size};" \ + "echo Bootloader written successfully;" \ + "pause 'Press ANY key to reboot device...'; reset;" \ + "else echo Reading bootloader failed;" \ + "pause 'Press ANY key to return to bootmenu...'; bootmenu; fi\0" + +#define GROUPER_BOOTMENU \ + GROUPER_FLASH_UBOOT \ + "bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu\0" \ + "bootmenu_1=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu\0" \ + "bootmenu_2=update bootloader=run flash_uboot\0" \ + "bootmenu_3=reboot RCM=enterrcm\0" \ + "bootmenu_4=reboot=reset\0" \ + "bootmenu_5=power off=poweroff\0" \ + "bootmenu_delay=-1\0" + +#define BOARD_EXTRA_ENV_SETTINGS \ + "boot_block_size_r=0x200000\0" \ + "boot_block_size=0x1000\0" \ + "bootloader_file=u-boot-dtb-tegra.bin\0" \ + "check_button=gpio input 131; test $? -eq 0;\0" \ + "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ + GROUPER_BOOTMENU + +/* Board-specific serial config */ +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ From 623a8c812e127c4f008dfbb60f29edc8c7d94e09 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 30 Jun 2023 10:29:05 +0300 Subject: [PATCH 009/148] board: lg: x3: add Optimus 4X HD and Optimus Vu support LG X3 is a development board based on Nvidia Tegra 3 SoC on base of which Optimus 4X HD and Optimus Vu were created. Both smartphones feature a 4.7" and 5" panels respectively, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 16/32 GB of internal storage. Optimux 4X HD additionally has a micro SD slot. Tested-by: Andreas Westman Dorcsak # LG P880 T30 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Thierry Reding --- arch/arm/dts/Makefile | 2 + arch/arm/dts/tegra30-lg-p880.dts | 40 +++ arch/arm/dts/tegra30-lg-p895.dts | 50 ++++ arch/arm/dts/tegra30-lg-x3.dtsi | 180 +++++++++++ arch/arm/mach-tegra/tegra30/Kconfig | 5 + board/lg/x3-t30/Kconfig | 26 ++ board/lg/x3-t30/MAINTAINERS | 9 + board/lg/x3-t30/Makefile | 11 + board/lg/x3-t30/pinmux-config-x3.h | 449 ++++++++++++++++++++++++++++ board/lg/x3-t30/x3-t30-spl.c | 48 +++ board/lg/x3-t30/x3-t30.c | 176 +++++++++++ configs/p880.config | 4 + configs/p895.config | 4 + configs/x3_t30_defconfig | 88 ++++++ doc/board/index.rst | 1 + doc/board/lg/index.rst | 9 + doc/board/lg/x3_t30.rst | 93 ++++++ include/configs/x3-t30.h | 77 +++++ 18 files changed, 1272 insertions(+) create mode 100644 arch/arm/dts/tegra30-lg-p880.dts create mode 100644 arch/arm/dts/tegra30-lg-p895.dts create mode 100644 arch/arm/dts/tegra30-lg-x3.dtsi create mode 100644 board/lg/x3-t30/Kconfig create mode 100644 board/lg/x3-t30/MAINTAINERS create mode 100644 board/lg/x3-t30/Makefile create mode 100644 board/lg/x3-t30/pinmux-config-x3.h create mode 100644 board/lg/x3-t30/x3-t30-spl.c create mode 100644 board/lg/x3-t30/x3-t30.c create mode 100644 configs/p880.config create mode 100644 configs/p895.config create mode 100644 configs/x3_t30_defconfig create mode 100644 doc/board/lg/index.rst create mode 100644 doc/board/lg/x3_t30.rst create mode 100644 include/configs/x3-t30.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f2b4044a017..f31cabc27b3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -250,6 +250,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra30-beaver.dtb \ tegra30-cardhu.dtb \ tegra30-colibri.dtb \ + tegra30-lg-p880.dtb \ + tegra30-lg-p895.dtb \ tegra30-tec-ng.dtb \ tegra114-dalmore.dtb \ tegra124-apalis.dtb \ diff --git a/arch/arm/dts/tegra30-lg-p880.dts b/arch/arm/dts/tegra30-lg-p880.dts new file mode 100644 index 00000000000..81d364310d0 --- /dev/null +++ b/arch/arm/dts/tegra30-lg-p880.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-lg-x3.dtsi" + +/ { + model = "LG Optimus 4X HD"; + compatible = "lge,p880", "nvidia,tegra30"; + + aliases { + mmc1 = &sdmmc3; /* uSD slot */ + }; + + sdmmc3: sdhci@78000400 { + status = "okay"; + bus-width = <4>; + + cd-gpios = <&gpio TEGRA_GPIO(W, 5) GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vdd_usd>; + vqmmc-supply = <&vdd_1v8_vio>; + }; + + gpio-keys { + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(O, 7) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel: panel { + compatible = "jdi,dx12d100vm0eaa"; + + enable-gpios = <&gpio TEGRA_GPIO(Y, 0) GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; + + backlight = <&backlight>; + }; +}; diff --git a/arch/arm/dts/tegra30-lg-p895.dts b/arch/arm/dts/tegra30-lg-p895.dts new file mode 100644 index 00000000000..074205d5a98 --- /dev/null +++ b/arch/arm/dts/tegra30-lg-p895.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra30-lg-x3.dtsi" + +/ { + model = "LG Optimus Vu"; + compatible = "lge,p895", "nvidia,tegra30"; + + gpio-keys { + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel: panel { + compatible = "hitachi,tx13d100vm0eaa"; + + reset-gpios = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; + + renesas,gamma = <3>; + renesas,inversion; + renesas,contrast; + + vcc-supply = <&vcc_3v0_lcd>; + iovcc-supply = <&iovcc_1v8_lcd>; + + backlight = <&backlight>; + }; + + vcc_3v0_lcd: regulator-lcd { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v0_lcd"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + gpio = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + iovcc_1v8_lcd: regulator-lcdvio { + compatible = "regulator-fixed"; + regulator-name = "iovcc_1v8_lcd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio TEGRA_GPIO(Y, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; diff --git a/arch/arm/dts/tegra30-lg-x3.dtsi b/arch/arm/dts/tegra30-lg-x3.dtsi new file mode 100644 index 00000000000..922e39915e5 --- /dev/null +++ b/arch/arm/dts/tegra30-lg-x3.dtsi @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +#include "tegra30.dtsi" + +/ { + chosen { + stdout-path = &uartd; + }; + + aliases { + i2c0 = &pwr_i2c; + i2c1 = &gen2_i2c; + + mmc0 = &sdmmc4; /* eMMC */ + + rtc0 = &pmic; + rtc1 = "/rtc@7000e000"; + + spi0 = &dsi_spi; + + usb0 = µ_usb; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + host1x@50000000 { + dc@54200000 { + rgb { + status = "okay"; + + nvidia,panel = <&bridge>; + }; + }; + }; + + uartd: serial@70006300 { + status = "okay"; + }; + + gen2_i2c: i2c@7000c400 { + status = "okay"; + clock-frequency = <400000>; + + backlight: lm3533@36 { + compatible = "ti,lm3533"; + reg = <0x36>; + + enable-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>; + default-brightness-level = <128>; + }; + + muic@44 { + compatible = "maxim,max14526-muic"; + reg = <0x44>; + + maxim,ap-usb; + + usif-gpios = <&gpio TEGRA_GPIO(Y, 3) GPIO_ACTIVE_HIGH>; + dp2t-gpios = <&gpio TEGRA_GPIO(CC, 2) GPIO_ACTIVE_HIGH>; + }; + }; + + pwr_i2c: i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + pmic: max77663@1c { + compatible = "maxim,max77663"; + reg = <0x1c>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + + #gpio-cells = <2>; + gpio-controller; + + system-power-controller; + + regulators { + vdd_1v8_vio: sd2 { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_usd: ldo3 { + regulator-name = "vdd_sdmmc3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + + vcore_emmc: ldo5 { + regulator-name = "vdd_ddr_rx"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + + dsi_spi: spi@7000dc00 { + status = "okay"; + spi-max-frequency = <25000000>; + + bridge: bridge-spi@2 { + compatible = "solomon,ssd2825"; + reg = <2>; + + spi-cpol; + spi-cpha; + + spi-max-frequency = <1000000>; + + power-gpios = <&gpio TEGRA_GPIO(B, 1) GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio TEGRA_GPIO(O, 2) GPIO_ACTIVE_HIGH>; + + clocks = <&ssd2825_refclk>; + clock-names = "tx_clk"; + + panel = <&panel>; + }; + }; + + sdmmc4: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + + vmmc-supply = <&vcore_emmc>; + vqmmc-supply = <&vdd_1v8_vio>; + }; + + micro_usb: usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + }; + + /* PMIC has a built-in 32KHz oscillator which is used by PMC */ + clk32k_in: clock-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "pmic-oscillator"; + }; + + ssd2825_refclk: clock-ssd2825 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "ssd2825-refclk"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(O, 4) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; diff --git a/arch/arm/mach-tegra/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig index 6cbb73ebeef..9b1df21d281 100644 --- a/arch/arm/mach-tegra/tegra30/Kconfig +++ b/arch/arm/mach-tegra/tegra30/Kconfig @@ -32,6 +32,10 @@ config TARGET_TRANSFORMER_T30 bool "Asus Tegra30 Transformer board" select BOARD_LATE_INIT +config TARGET_X3_T30 + bool "LG X3 Tegra30 board" + select BOARD_LATE_INIT + endchoice config SYS_SOC @@ -44,5 +48,6 @@ source "board/toradex/colibri_t30/Kconfig" source "board/asus/grouper/Kconfig" source "board/avionic-design/tec-ng/Kconfig" source "board/asus/transformer-t30/Kconfig" +source "board/lg/x3-t30/Kconfig" endif diff --git a/board/lg/x3-t30/Kconfig b/board/lg/x3-t30/Kconfig new file mode 100644 index 00000000000..20ea4f5f324 --- /dev/null +++ b/board/lg/x3-t30/Kconfig @@ -0,0 +1,26 @@ +if TARGET_X3_T30 + +config SYS_BOARD + default "x3-t30" + +config SYS_VENDOR + default "lg" + +config SYS_CONFIG_NAME + default "x3-t30" + +config DEVICE_P880 + bool "Enable support for LG Optimus 4X HD" + default n + help + LG Optimus 4X HD derives from x3 board but has slight + differences. + +config DEVICE_P895 + bool "Enable support for LG Optimus Vu" + default n + help + LG Optimus Vu derives from x3 board but has slight + differences. + +endif diff --git a/board/lg/x3-t30/MAINTAINERS b/board/lg/x3-t30/MAINTAINERS new file mode 100644 index 00000000000..0ad29563e92 --- /dev/null +++ b/board/lg/x3-t30/MAINTAINERS @@ -0,0 +1,9 @@ +X3 BOARD +M: Svyatoslav Ryhel +S: Maintained +F: board/lg/x3-t30/ +F: configs/p880.config +F: configs/p895.config +F: configs/x3_t30_defconfig +F: doc/board/lg/x3_t30.rst +F: include/configs/x3-t30.h diff --git a/board/lg/x3-t30/Makefile b/board/lg/x3-t30/Makefile new file mode 100644 index 00000000000..3eeb132f3c6 --- /dev/null +++ b/board/lg/x3-t30/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010-2012 +# NVIDIA Corporation +# +# (C) Copyright 2021 +# Svyatoslav Ryhel + +obj-$(CONFIG_SPL_BUILD) += x3-t30-spl.o + +obj-y += x3-t30.o diff --git a/board/lg/x3-t30/pinmux-config-x3.h b/board/lg/x3-t30/pinmux-config-x3.h new file mode 100644 index 00000000000..cdb28095f3c --- /dev/null +++ b/board/lg/x3-t30/pinmux-config-x3.h @@ -0,0 +1,449 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * + * Copyright (c) 2021, Svyatoslav Ryhel. + */ + +#ifndef _PINMUX_CONFIG_X3_H_ +#define _PINMUX_CONFIG_X3_H_ + +#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_##_od, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ + } + +static struct pmux_pingrp_config tegra3_x3_pinmux_common[] = { + /* SDMMC1 pinmux */ + DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT), + + /* SDMMC3 pinmux */ +// DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT0_PB7, RSVD1, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT1_PB6, RSVD1, NORMAL, NORMAL, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT2_PB5, RSVD1, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT3_PB4, RSVD1, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(SDMMC3_DAT7_PD4, RSVD2, NORMAL, TRISTATE, INPUT), // device specific + + /* SDMMC4 pinmux */ + LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), +// LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), // device specific + LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD2, DOWN, NORMAL, INPUT, DISABLE, DISABLE), + + /* I2C1 pinmux */ + I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* I2C2 pinmux */ + I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, UP, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, UP, NORMAL, INPUT, DISABLE, ENABLE), + + /* I2C3 pinmux */ + I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* I2C4 pinmux */ + I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* Power I2C pinmux */ + I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* HDMI-CEC pinmux */ + DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT), + + /* ULPI pinmux */ + DEFAULT_PINMUX(ULPI_DATA0_PO1, SPI3, UP, TRISTATE, OUTPUT), + DEFAULT_PINMUX(ULPI_DATA1_PO2, SPI3, UP, NORMAL, OUTPUT), // LCD_BRIDGE_RESET_N + DEFAULT_PINMUX(ULPI_DATA2_PO3, SPI3, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_DATA3_PO4, SPI3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA4_PO5, ULPI, UP, NORMAL, INPUT), +// DEFAULT_PINMUX(ULPI_DATA5_PO6, SPI2, UP, TRISTATE, INPUT), // unconfigured +// DEFAULT_PINMUX(ULPI_DATA6_PO7, SPI2, UP, NORMAL, INPUT), // device specific +// DEFAULT_PINMUX(ULPI_DATA7_PO0, SPI2, UP, NORMAL, INPUT), // unconfigured + DEFAULT_PINMUX(ULPI_CLK_PY0, RSVD2, DOWN, NORMAL, OUTPUT), // LCD_EN + DEFAULT_PINMUX(ULPI_DIR_PY1, RSVD2, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(ULPI_NXT_PY2, RSVD2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT), + + /* DAP3 pinmux */ + DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(PV0, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PV3, RSVD2, DOWN, NORMAL, INPUT), + + /* CLK2 pinmux */ + DEFAULT_PINMUX(CLK2_OUT_PW5, RSVD2, UP, NORMAL, INPUT), + DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP, NORMAL, NORMAL, OUTPUT), + + /* LCD pinmux */ + DEFAULT_PINMUX(LCD_PWR1_PC1, DISPLAYA, NORMAL, NORMAL, OUTPUT), +// DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, DOWN, TRISTATE, OUTPUT), // unconfigured + DEFAULT_PINMUX(LCD_SDIN_PZ2, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_SDI + DEFAULT_PINMUX(LCD_SDOUT_PN5, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_SDO + DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS0_N_PN4, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_CS + DEFAULT_PINMUX(LCD_DC0_PN6, RSVD3, NORMAL, NORMAL, OUTPUT), // LCD_CP_EN / BL + DEFAULT_PINMUX(LCD_SCK_PZ4, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_SCL + DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT), // LCD_RGB_PCLK + DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT), // LCD_RGB_HSYNC + DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT), // LCD_RGB_VSYNC + DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D2_PE2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D6_PE6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D8_PF0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D14_PF6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D15_PF7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D18_PM2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D19_PM3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D21_PM5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D22_PM6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D23_PM7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS1_N_PW0, RSVD4, UP, NORMAL, OUTPUT), // LCD_RESET_N + DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, TRISTATE, OUTPUT), // LCD_MAKER_ID + DEFAULT_PINMUX(LCD_DC1_PD2, RSVD3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(CRT_HSYNC_PV6, RSVD2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CRT_VSYNC_PV7, RSVD2, NORMAL, NORMAL, INPUT), + + /* VI-group pinmux */ + LV_PINMUX(VI_D0_PT4, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D4_PL2, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D6_PL4, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D10_PT2, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D11_PT3, RSVD2, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_PCLK_PT0, RSVD1, UP, TRISTATE, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_MCLK_PT1, VI, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_HSYNC_PD7, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_VSYNC_PD6, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* UART-B pinmux */ +// DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT), // device specific +// DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT), // device specific + DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT), + + /* UART-C pinmux */ + DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT), + + /* PU-gpio group pinmux */ +// DEFAULT_PINMUX(PU0, UARTA, NORMAL, NORMAL, OUTPUT), // device specific +// DEFAULT_PINMUX(PU1, UARTA, NORMAL, NORMAL, INPUT), // device specific +// DEFAULT_PINMUX(PU2, RSVD1, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(PU3, PWM0, NORMAL, TRISTATE, INPUT), // device specific +// DEFAULT_PINMUX(PU4, PWM1, NORMAL, TRISTATE, INPUT), // device specific + DEFAULT_PINMUX(PU5, RSVD4, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(PU6, PWM3, DOWN, NORMAL, INPUT), + + /* DAP4 pinmux */ + DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT), + + /* CLK3 pinmux */ + DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), // MIPI_BRIDGE_CLK + DEFAULT_PINMUX(CLK3_REQ_PEE1, DEV3, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT2, UP, NORMAL, INPUT), + + DEFAULT_PINMUX(PCC1, RSVD3, NORMAL, NORMAL, OUTPUT), +// DEFAULT_PINMUX(PBB0, RSVD2, NORMAL, NORMAL, OUTPUT), // device specific + DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB7, I2S4, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PCC2, RSVD3, NORMAL, NORMAL, OUTPUT), + + DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, NORMAL, NORMAL, OUTPUT), + + /* KBC keys */ + DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW2_PR2, RSVD4, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW3_PR3, RSVD3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW4_PR4, RSVD4, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW5_PR5, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW6_PR6, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW7_PR7, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW9_PS1, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW10_PS2, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW11_PS3, KBC, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW12_PS4, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW13_PS5, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW14_PS6, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW15_PS7, KBC, DOWN, NORMAL, INPUT), + + DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL1_PQ1, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL3_PQ3, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL4_PQ4, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL5_PQ5, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL7_PQ7, KBC, UP, NORMAL, INPUT), + + /* CLK */ + DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, INPUT), +// DEFAULT_PINMUX(CORE_PWR_REQ, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured +// DEFAULT_PINMUX(CPU_PWR_REQ, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured +// DEFAULT_PINMUX(PWR_INT_N, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured +// DEFAULT_PINMUX(CLK_32K_IN, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured + DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT), + + /* DAP1 pinmux */ + DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT), + + /* CLK1 pinmux */ + DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, DOWN, NORMAL, INPUT), + + /* SPDIF pinmux */ + DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, NORMAL, OUTPUT), +// DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, DOWN, NORMAL, OUTPUT), // device specific + + /* DAP2 pinmux */ + DEFAULT_PINMUX(DAP2_FS_PA2, HDA, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DIN_PA4, HDA, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DOUT_PA5, HDA, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_SCLK_PA3, HDA, DOWN, NORMAL, INPUT), + + /* SPI pinmux */ + DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI2, NORMAL, NORMAL, OUTPUT), +// DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, NORMAL, OUTPUT), // device specific +// DEFAULT_PINMUX(SPI1_CS0_N_PX6, GMI, NORMAL, NORMAL, INPUT), // device specific + DEFAULT_PINMUX(SPI1_MISO_PX7, RSVD4, NORMAL, NORMAL, OUTPUT), + + DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(SPI2_MISO_PX1, GMI, NORMAL, NORMAL, OUTPUT), +// DEFAULT_PINMUX(SPI2_CS0_N_PX3, SPI6, UP, NORMAL, INPUT), // unconfigured +// DEFAULT_PINMUX(SPI2_SCK_PX2, SPI6, UP, NORMAL, INPUT), // unconfigured + DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, NORMAL, NORMAL, INPUT), +// DEFAULT_PINMUX(SPI2_CS2_N_PW3, SPI2, UP, TRISTATE, INPUT), // unconfigured + + /* PEX pinmux */ + DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, TRISTATE, INPUT), + + /* GMI pinmux */ + DEFAULT_PINMUX(GMI_WP_N_PC7, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_WAIT_PI7, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_ADV_N_PK0, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CLK_PK1, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS0_N_PJ0, GMI, UP, TRISTATE, INPUT), // LCD_RGB_DE + DEFAULT_PINMUX(GMI_CS1_N_PJ2, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, NORMAL, OUTPUT), +// DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD4, UP, NORMAL, INPUT), // device specific + DEFAULT_PINMUX(GMI_CS6_N_PI3, GMI, UP, NORMAL, INPUT), +// DEFAULT_PINMUX(GMI_CS7_N_PI6, GMI, UP, NORMAL, INPUT), // device specific + DEFAULT_PINMUX(GMI_AD0_PG0, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD1_PG1, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD2_PG2, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD3_PG3, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD4_PG4, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD5_PG5, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD6_PG6, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD7_PG7, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_AD8_PH0, GMI, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD9_PH1, GMI, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD10_PH2, GMI, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD11_PH3, PWM3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD12_PH4, RSVD4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD13_PH5, RSVD4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD14_PH6, GMI, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD15_PH7, GMI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_A16_PJ7, UARTD, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A18_PB1, UARTD, DOWN, NORMAL, OUTPUT), // RGB_IC_EN + DEFAULT_PINMUX(GMI_A19_PK7, UARTD, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_WR_N_PI0, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_OE_N_PI1, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_DQS_PI2, GMI, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_RST_N_PI4, GMI, UP, NORMAL, INPUT), +}; + +#ifdef CONFIG_DEVICE_P880 +static struct pmux_pingrp_config tegra3_p880_pinmux[] = { + /* SDMMC3 pinmux */ + DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP, TRISTATE, INPUT), + + /* SDMMC4 pinmux */ + LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + + /* ULPI pinmux */ + DEFAULT_PINMUX(ULPI_DATA6_PO7, SPI2, NORMAL, NORMAL, INPUT), + + /* UART-B pinmux */ + DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, UP, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, UP, NORMAL, OUTPUT), + + /* GPIO group pinmux */ + DEFAULT_PINMUX(PU0, UARTA, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(PU1, UARTA, UP, NORMAL, INPUT), + DEFAULT_PINMUX(PU2, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU3, UARTA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PU4, PWM1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB0, I2S4, NORMAL, TRISTATE, INPUT), + + /* SPDIF pinmux */ + DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, UP, TRISTATE, OUTPUT), + + /* SPI pinmux */ + DEFAULT_PINMUX(SPI1_SCK_PX5, SPI2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT), + + /* GMI pinmux */ + DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS7_N_PI6, GMI, DOWN, NORMAL, OUTPUT), +}; +#endif /* CONFIG_DEVICE_P880 */ + +#ifdef CONFIG_DEVICE_P895 +static struct pmux_pingrp_config tegra3_p895_pinmux[] = { + /* SDMMC3 pinmux */ + DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT0_PB7, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT1_PB6, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT2_PB5, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT3_PB4, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT7_PD4, RSVD2, NORMAL, TRISTATE, INPUT), + + /* SDMMC4 pinmux */ + LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* ULPI pinmux */ + DEFAULT_PINMUX(ULPI_DATA6_PO7, SPI2, UP, NORMAL, INPUT), + + /* UART-B pinmux */ + DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT), + + /* Gpio group pinmux */ + DEFAULT_PINMUX(PU0, UARTA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PU1, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU2, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PU3, PWM0, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PU4, PWM1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(PBB0, RSVD2, NORMAL, NORMAL, OUTPUT), // LCD_EN_3V0 + + /* SPDIF pinmux */ + DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, DOWN, NORMAL, OUTPUT), + + /* SPI pinmux */ + DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SPI1_CS0_N_PX6, GMI, NORMAL, NORMAL, INPUT), + + /* GMI pinmux */ + DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS7_N_PI6, GMI, UP, NORMAL, INPUT), +}; +#endif /* CONFIG_DEVICE_P895 */ +#endif /* _PINMUX_CONFIG_X3_H_ */ diff --git a/board/lg/x3-t30/x3-t30-spl.c b/board/lg/x3-t30/x3-t30-spl.c new file mode 100644 index 00000000000..864f2de45f1 --- /dev/null +++ b/board/lg/x3-t30/x3-t30-spl.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 LGE X3 SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +#define MAX77663_I2C_ADDR (0x1C << 1) + +#define MAX77663_REG_SD0 0x16 +#define MAX77663_REG_SD0_DATA (0x2100 | MAX77663_REG_SD0) +#define MAX77663_REG_SD1 0x17 +#define MAX77663_REG_SD1_DATA (0x3000 | MAX77663_REG_SD1) +#define MAX77663_REG_LDO4 0x2B +#define MAX77663_REG_LDO4_DATA (0xE000 | MAX77663_REG_LDO4) + +#define MAX77663_REG_GPIO1 0x37 +#define MAX77663_REG_GPIO1_DATA (0x0800 | MAX77663_REG_GPIO1) +#define MAX77663_REG_GPIO4 0x3A +#define MAX77663_REG_GPIO4_DATA (0x0100 | MAX77663_REG_GPIO4) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_SD1_DATA); + + udelay(1000); + + /* Bring up VDD_CPU to 1.0125V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_SD0_DATA); + udelay(1000); + + /* Bring up VDD_RTC to 1.200V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_LDO4_DATA); + udelay(10 * 1000); + + /* Set GPIO4 and GPIO1 states */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_GPIO4_DATA); + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_GPIO1_DATA); +} diff --git a/board/lg/x3-t30/x3-t30.c b/board/lg/x3-t30/x3-t30.c new file mode 100644 index 00000000000..594563cf52d --- /dev/null +++ b/board/lg/x3-t30/x3-t30.c @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pinmux-config-x3.h" + +#define MAX77663_I2C_ADDR 0x1C + +#define MAX77663_REG_SD2 0x18 +#define MAX77663_REG_LDO2 0x27 +#define MAX77663_REG_LDO3 0x29 +#define MAX77663_REG_LDO5 0x2D +#define MAX77663_REG_ONOFF_CFG1 0x41 +#define ONOFF_PWR_OFF BIT(1) + +#ifdef CONFIG_CMD_POWEROFF +int do_poweroff(struct cmd_tbl *cmdtp, int flag, + int argc, char *const argv[]) +{ + struct udevice *dev; + uchar data_buffer[1]; + int ret; + + ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDR, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return 0; + } + + ret = dm_i2c_read(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1); + if (ret) + return ret; + + data_buffer[0] |= ONOFF_PWR_OFF; + + ret = dm_i2c_write(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1); + if (ret) + return ret; + + /* wait some time and then print error */ + mdelay(5000); + + printf("Failed to power off!!!\n"); + return 1; +} +#endif + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_config_pingrp_table(tegra3_x3_pinmux_common, + ARRAY_SIZE(tegra3_x3_pinmux_common)); + +#ifdef CONFIG_DEVICE_P880 + pinmux_config_pingrp_table(tegra3_p880_pinmux, + ARRAY_SIZE(tegra3_p880_pinmux)); +#endif + +#ifdef CONFIG_DEVICE_P895 + pinmux_config_pingrp_table(tegra3_p895_pinmux, + ARRAY_SIZE(tegra3_p895_pinmux)); +#endif +} + +#ifdef CONFIG_MMC_SDHCI_TEGRA +static void max77663_voltage_init(void) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDR, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return; + } + + /* 0x60 for 1.8v, bit7:0 = voltage */ + ret = dm_i2c_reg_write(dev, MAX77663_REG_SD2, 0x60); + if (ret) + log_debug("vdd_1v8_vio set failed: %d\n", ret); + + /* 0xF2 for 3.30v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO2, 0xF2); + if (ret) + log_debug("avdd_usb set failed: %d\n", ret); + + /* 0xEC for 3.00v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO3, 0xEC); + if (ret) + log_debug("vdd_usd set failed: %d\n", ret); + + /* 0xE9 for 2.85v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ + ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO5, 0xE9); + if (ret) + log_debug("vcore_emmc set failed: %d\n", ret); +} + +/* + * Routine: pin_mux_mmc + * Description: setup the MMC muxes, power rails, etc. + */ +void pin_mux_mmc(void) +{ + /* Bring up uSD and eMMC power */ + max77663_voltage_init(); +} +#endif /* MMC */ + +int nvidia_board_init(void) +{ + /* Set up panel bridge clocks */ + clock_start_periph_pll(PERIPH_ID_EXTPERIPH3, CLOCK_ID_PERIPH, + 24 * 1000000); + clock_external_output(3); + + return 0; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ + /* First 3 bytes refer to LG vendor */ + u8 btmacaddr[6] = { 0x00, 0x00, 0x00, 0xD0, 0xC9, 0x88 }; + + /* Generate device 3 bytes based on chip sd */ + u64 bt_device = tegra_chip_uid() >> 24ull; + + btmacaddr[0] = (bt_device >> 1 & 0x0F) | + (bt_device >> 5 & 0xF0); + btmacaddr[1] = (bt_device >> 11 & 0x0F) | + (bt_device >> 17 & 0xF0); + btmacaddr[2] = (bt_device >> 23 & 0x0F) | + (bt_device >> 29 & 0xF0); + + /* Set BT MAC address */ + fdt_find_and_setprop(blob, "/serial@70006200/bluetooth", + "local-bd-address", btmacaddr, 6, 1); + + /* Remove TrustZone nodes */ + fdt_del_node_and_alias(blob, "/firmware"); + fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000"); + + return 0; +} +#endif + +void nvidia_board_late_init(void) +{ + char serialno_str[17]; + + /* Set chip id as serialno */ + sprintf(serialno_str, "%016llx", tegra_chip_uid()); + env_set("serial#", serialno_str); + env_set("platform", "Tegra 3 T30"); +} diff --git a/configs/p880.config b/configs/p880.config new file mode 100644 index 00000000000..1a47b5f7692 --- /dev/null +++ b/configs/p880.config @@ -0,0 +1,4 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-lg-p880" +CONFIG_DEVICE_P880=y +CONFIG_SYS_PROMPT="Tegra30 (P880) # " +CONFIG_VIDEO_LCD_RENESAS_R69328=y diff --git a/configs/p895.config b/configs/p895.config new file mode 100644 index 00000000000..019a5662d62 --- /dev/null +++ b/configs/p895.config @@ -0,0 +1,4 @@ +CONFIG_DEFAULT_DEVICE_TREE="tegra30-lg-p895" +CONFIG_DEVICE_P895=y +CONFIG_SYS_PROMPT="Tegra30 (P895) # " +CONFIG_VIDEO_LCD_RENESAS_R61307=y diff --git a/configs/x3_t30_defconfig b/configs/x3_t30_defconfig new file mode 100644 index 00000000000..540c43096d8 --- /dev/null +++ b/configs/x3_t30_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y +CONFIG_ARCH_TEGRA=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y +CONFIG_TEXT_BASE=0x80110000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x3000 +CONFIG_ENV_OFFSET=0xFFFFD000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-lg-p880" +CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_SYS_PROMPT="Tegra30 (x3) # " +CONFIG_SPL_STACK=0x800ffffc +CONFIG_TEGRA30=y +CONFIG_TARGET_X3_T30=y +CONFIG_TEGRA_ENABLE_UARTD=y +CONFIG_CMD_EBTUPDATE=y +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTDELAY=0 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_UMS_ABORT_KEYED=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_PAUSE=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_SPL_DM=y +CONFIG_BUTTON=y +CONFIG_EXTCON=y +CONFIG_EXTCON_MAX14526=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_SYS_I2C_TEGRA=y +CONFIG_BUTTON_KEYBOARD=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_TEGRA20_SLINK=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="LG" +CONFIG_USB_GADGET_VENDOR_NUM=0x1004 +CONFIG_USB_GADGET_PRODUCT_NUM=0x7100 +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_BACKLIGHT_LM3533=y +CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825=y +CONFIG_VIDEO_TEGRA20=y +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set diff --git a/doc/board/index.rst b/doc/board/index.rst index d28d8e18745..3cfec7caec7 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -28,6 +28,7 @@ Board-specific doc highbank/index intel/index kontron/index + lg/index mediatek/index microchip/index nokia/index diff --git a/doc/board/lg/index.rst b/doc/board/lg/index.rst new file mode 100644 index 00000000000..3af3681e0bb --- /dev/null +++ b/doc/board/lg/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +LG +== + +.. toctree:: + :maxdepth: 2 + + x3_t30 diff --git a/doc/board/lg/x3_t30.rst b/doc/board/lg/x3_t30.rst new file mode 100644 index 00000000000..5c564aabc6a --- /dev/null +++ b/doc/board/lg/x3_t30.rst @@ -0,0 +1,93 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the LG X3 T30 device family +====================================== + +``DISCLAMER!`` Moving your LG P880 or P895 to use U-Boot +assumes replacement of the vendor LG bootloader. Vendor +android firmwares will no longer be able to run on the +device. This replacement IS reversible. + +Quick Start +----------- + +- Build U-Boot +- Pack U-Boot into repart-block +- Flash repart-block into the eMMC +- Boot +- Self Upgrading + +Build U-Boot +------------ + +Device support is implemented by applying config fragment to a generic +board defconfig. Valid fragments are ``p880.config`` and ``p895.config``. + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-linux-gnueabi- + $ make x3_t30_defconfig p895.config # For LG Optimus Vu + $ make + +After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin`` +image, ready for flashing (but check the next section for additional +adjustments). + +Pack U-Boot into repar-block +---------------------------- + +``DISCLAMER!`` All questions related to re-crypt work should be +asked in re-crypt repo issues. NOT HERE! + +re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in +form usable by device. This process is required only on the first +installation or to recover the device in case of a failed update. + +.. code-block:: bash + + $ git clone https://github.com/clamor-s/re-crypt.git + $ cd re-crypt # place your u-boot-dtb-regra.bin here + $ ./re-crypt.sh -d p895 + +Script will produce you a ``repart-block.bin`` ready to flash. + +Flash repart-block into the eMMC +-------------------------------- + +``DISCLAMER!`` All questions related to NvFlash should be asked +in the proper place. NOT HERE! Flashing repart-block will erase +all your eMMC, so make a backup before! + +``repart-block.bin`` contains BCT and bootloader in encrypted state +in form which can just be written RAW at the start of eMMC. + +.. code-block:: bash + + $ wheelie --blob blob.bin + $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin + +Boot +---- + +After flashing ``repart-block.bin`` the device should reboot and turn +itself off. This is normal behavior if no boot configuration is +found. + +To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD +and then on eMMC. Additionally if Volume Down button is pressed +while booting device will enter bootmenu. Bootmenu contains entries +to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot +RCM, poweroff, enter U-Boot console and update bootloader (check next +chapter). + +Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC +and allows the user to use/partition it in any way the user desires. + +Self Upgrading +-------------- + +Place your ``u-boot-dtb-tegra.bin`` on the first partition of the +eMMC (using ability of u-boot to mount it). Enter bootmenu, choose +update bootloader option with Power button and U-Boot should update +itself. Once the process is completed, U-Boot will ask to press any +button to reboot. diff --git a/include/configs/x3-t30.h b/include/configs/x3-t30.h new file mode 100644 index 00000000000..d29ea700b2e --- /dev/null +++ b/include/configs/x3-t30.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2010,2012 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#include "tegra30-common.h" + +#define CFG_TEGRA_BOARD_STRING "LG X3 Board" + +#ifdef CONFIG_DEVICE_P880 +/* High-level configuration options */ +#undef CFG_TEGRA_BOARD_STRING +#define CFG_TEGRA_BOARD_STRING "LG Optimus 4X HD" +#endif + +#ifdef CONFIG_DEVICE_P895 +/* High-level configuration options */ +#undef CFG_TEGRA_BOARD_STRING +#define CFG_TEGRA_BOARD_STRING "LG Optimus Vu" +#endif + +#define X3_FLASH_UBOOT \ + "flash_uboot=echo Preparing RAM;" \ + "mw ${kernel_addr_r} 0 ${boot_block_size_r};" \ + "mw ${ramdisk_addr_r} 0 ${boot_block_size_r};" \ + "echo Reading BCT;" \ + "mmc dev 0 1;" \ + "mmc read ${kernel_addr_r} 0 ${boot_block_size};" \ + "echo Reading bootloader;" \ + "if load mmc 0:1 ${ramdisk_addr_r} ${bootloader_file};" \ + "then echo Calculating bootloader size;" \ + "size mmc 0:1 ${bootloader_file};" \ + "ebtupdate ${kernel_addr_r} ${ramdisk_addr_r} ${filesize};" \ + "echo Writing bootloader to eMMC;" \ + "mmc dev 0 1;" \ + "mmc write ${kernel_addr_r} 0 ${boot_block_size};" \ + "mmc dev 0 2;" \ + "mmc write ${ramdisk_addr_r} 0 ${boot_block_size};" \ + "echo Bootloader written successfully;" \ + "pause 'Press ANY key to reboot device...'; reset;" \ + "else echo Reading bootloader failed;" \ + "pause 'Press ANY key to return to bootmenu...'; bootmenu; fi\0" + +#define X3_BOOTMENU \ + X3_FLASH_UBOOT \ + "bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu\0" \ + "bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu\0" \ + "bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu\0" \ + "bootmenu_3=update bootloader=run flash_uboot\0" \ + "bootmenu_4=reboot RCM=enterrcm\0" \ + "bootmenu_5=reboot=reset\0" \ + "bootmenu_6=power off=poweroff\0" \ + "bootmenu_delay=-1\0" + +#define BOARD_EXTRA_ENV_SETTINGS \ + "boot_block_size_r=0x200000\0" \ + "boot_block_size=0x1000\0" \ + "bootloader_file=u-boot-dtb-tegra.bin\0" \ + "check_button=gpio input 116; test $? -eq 0\0" \ + "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ + X3_BOOTMENU + +/* Board-specific serial config */ +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ From bdf9dead86f06c7d6980c399a4a6339430b531ec Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 30 Jun 2023 10:29:06 +0300 Subject: [PATCH 010/148] board: htc: endeavoru: add One X support The HTC One X is a touchscreen-based, slate-sized smartphone designed and manufactured by HTC that runs the Android operating system. The One X features a 4.7" display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and non-extendable 32 GB of internal storage. UART-A is default debug port. Tested-by: Andreas Westman Dorcsak Tested-by: Ion Agorria Tested-by: Svyatoslav Ryhel Signed-off-by: Svyatoslav Ryhel Signed-off-by: Thierry Reding --- arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra30-htc-endeavoru.dts | 166 ++++++++ arch/arm/mach-tegra/tegra30/Kconfig | 5 + board/htc/endeavoru/Kconfig | 12 + board/htc/endeavoru/MAINTAINERS | 7 + board/htc/endeavoru/Makefile | 11 + board/htc/endeavoru/endeavoru-spl.c | 47 +++ board/htc/endeavoru/endeavoru.c | 116 ++++++ board/htc/endeavoru/pinmux-config-endeavoru.h | 362 ++++++++++++++++++ configs/endeavoru_defconfig | 84 ++++ doc/board/htc/endeavoru.rst | 89 +++++ doc/board/htc/index.rst | 9 + doc/board/index.rst | 1 + include/configs/endeavoru.h | 65 ++++ 14 files changed, 975 insertions(+) create mode 100644 arch/arm/dts/tegra30-htc-endeavoru.dts create mode 100644 board/htc/endeavoru/Kconfig create mode 100644 board/htc/endeavoru/MAINTAINERS create mode 100644 board/htc/endeavoru/Makefile create mode 100644 board/htc/endeavoru/endeavoru-spl.c create mode 100644 board/htc/endeavoru/endeavoru.c create mode 100644 board/htc/endeavoru/pinmux-config-endeavoru.h create mode 100644 configs/endeavoru_defconfig create mode 100644 doc/board/htc/endeavoru.rst create mode 100644 doc/board/htc/index.rst create mode 100644 include/configs/endeavoru.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f31cabc27b3..3de10ec9217 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -250,6 +250,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra30-beaver.dtb \ tegra30-cardhu.dtb \ tegra30-colibri.dtb \ + tegra30-htc-endeavoru.dtb \ tegra30-lg-p880.dtb \ tegra30-lg-p895.dtb \ tegra30-tec-ng.dtb \ diff --git a/arch/arm/dts/tegra30-htc-endeavoru.dts b/arch/arm/dts/tegra30-htc-endeavoru.dts new file mode 100644 index 00000000000..c55e193d1d7 --- /dev/null +++ b/arch/arm/dts/tegra30-htc-endeavoru.dts @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +/* This dts file describes the HTC One X smartphone */ +/* CPU Speedo ID 4, Soc Speedo ID 1, CPU Process: 1, Core Process: 0 */ + +#include + +#include "tegra30.dtsi" + +/ { + model = "HTC One X"; + compatible = "htc,endeavoru", "nvidia,tegra30"; + + chosen { + stdout-path = &uarta; + }; + + aliases { + i2c0 = &pwr_i2c; + + mmc0 = &sdmmc4; /* eMMC */ + + rtc0 = &pmic; + rtc1 = "/rtc@7000e000"; + + usb0 = µ_usb; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + host1x@50000000 { + dc@54200000 { + clocks = <&tegra_car TEGRA30_CLK_DISP1>, + <&tegra_car TEGRA30_CLK_PLL_D_OUT0>; + + rgb { + status = "okay"; + + nvidia,panel = <&dsia>; + }; + }; + + dsia: dsi@54300000 { + status = "okay"; + + avdd-dsi-csi-supply = <&avdd_dsi_csi>; + + panel = <&panel>; + }; + }; + + uarta: serial@70006000 { + status = "okay"; + }; + + pwr_i2c: i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + + /* Texas Instruments TPS80032 PMIC */ + pmic: tps80032@48 { + compatible = "ti,tps80032"; + reg = <0x48>; + + regulators { + /* DSI VDD */ + avdd_dsi_csi: ldo1 { + regulator-name = "avdd_dsi_csi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + }; + }; + }; + + sdmmc4: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + micro_usb: usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + }; + + backlight: backlight { + compatible = "nvidia,tegra-pwm-backlight"; + + nvidia,pwm-source = <1>; + nvidia,default-brightness = <0x8E>; + }; + + /* PMIC has a built-in 32KHz oscillator which is used by PMC */ + clk32k_in: clock-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "pmic-oscillator"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + panel: panel { + compatible = "htc,edge-panel"; + + reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>; + + vdd-supply = <&vdd_3v3_panel>; + vddio-supply = <&vdd_1v8_panel>; + + backlight = <&backlight>; + }; + + vcore_emmc: regulator-emmc { + compatible = "regulator-fixed"; + regulator-name = "vdd_2v85_sdmmc"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + gpio = <&gpio TEGRA_GPIO(M, 3) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vdd_3v3_panel: regulator-lcm { + compatible = "regulator-fixed"; + regulator-name = "v_lcm_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vdd_1v8_panel: regulator-lcmio { + compatible = "regulator-fixed"; + regulator-name = "v_lcmio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; diff --git a/arch/arm/mach-tegra/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig index 9b1df21d281..3e478b3b7b3 100644 --- a/arch/arm/mach-tegra/tegra30/Kconfig +++ b/arch/arm/mach-tegra/tegra30/Kconfig @@ -20,6 +20,10 @@ config TARGET_COLIBRI_T30 bool "Toradex Colibri T30 board" select BOARD_LATE_INIT +config TARGET_ENDEAVORU + bool "HTC Endeavoru T30 board" + select BOARD_LATE_INIT + config TARGET_GROUPER bool "Asus and Google Grouper board" select BOARD_LATE_INIT @@ -45,6 +49,7 @@ source "board/toradex/apalis_t30/Kconfig" source "board/nvidia/beaver/Kconfig" source "board/nvidia/cardhu/Kconfig" source "board/toradex/colibri_t30/Kconfig" +source "board/htc/endeavoru/Kconfig" source "board/asus/grouper/Kconfig" source "board/avionic-design/tec-ng/Kconfig" source "board/asus/transformer-t30/Kconfig" diff --git a/board/htc/endeavoru/Kconfig b/board/htc/endeavoru/Kconfig new file mode 100644 index 00000000000..0b72c4a687d --- /dev/null +++ b/board/htc/endeavoru/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ENDEAVORU + +config SYS_BOARD + default "endeavoru" + +config SYS_VENDOR + default "htc" + +config SYS_CONFIG_NAME + default "endeavoru" + +endif diff --git a/board/htc/endeavoru/MAINTAINERS b/board/htc/endeavoru/MAINTAINERS new file mode 100644 index 00000000000..85f439f4672 --- /dev/null +++ b/board/htc/endeavoru/MAINTAINERS @@ -0,0 +1,7 @@ +ENDEAVORU BOARD +M: Svyatoslav Ryhel +S: Maintained +F: board/htc/endeavoru/ +F: configs/endeavoru_defconfig +F: doc/board/htc/endeavoru.rst +F: include/configs/endeavoru.h diff --git a/board/htc/endeavoru/Makefile b/board/htc/endeavoru/Makefile new file mode 100644 index 00000000000..0c6ba4af3b1 --- /dev/null +++ b/board/htc/endeavoru/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010-2012 +# NVIDIA Corporation +# +# (C) Copyright 2021 +# Svyatoslav Ryhel + +obj-$(CONFIG_SPL_BUILD) += endeavoru-spl.o + +obj-y += endeavoru.o diff --git a/board/htc/endeavoru/endeavoru-spl.c b/board/htc/endeavoru/endeavoru-spl.c new file mode 100644 index 00000000000..7921ff1a733 --- /dev/null +++ b/board/htc/endeavoru/endeavoru-spl.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 HTC Endeavoru SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +/* + * Endeavoru uses TPS80032 PMIC with SMPS1 and SMPS2 in strandard + * mode with zero offset. + */ + +#define TPS80032_DVS_I2C_ADDR (0x12 << 1) +#define TPS80032_SMPS1_CFG_VOLTAGE_REG 0x56 +#define TPS80032_SMPS2_CFG_VOLTAGE_REG 0x5C +#define TPS80032_SMPS1_CFG_VOLTAGE_DATA (0x2100 | TPS80032_SMPS1_CFG_VOLTAGE_REG) +#define TPS80032_SMPS2_CFG_VOLTAGE_DATA (0x3000 | TPS80032_SMPS2_CFG_VOLTAGE_REG) + +#define TPS80032_CTL1_I2C_ADDR (0x48 << 1) +#define TPS80032_SMPS1_CFG_STATE_REG 0x54 +#define TPS80032_SMPS2_CFG_STATE_REG 0x5A +#define TPS80032_SMPS1_CFG_STATE_DATA (0x0100 | TPS80032_SMPS1_CFG_STATE_REG) +#define TPS80032_SMPS2_CFG_STATE_DATA (0x0100 | TPS80032_SMPS2_CFG_STATE_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS80032_DVS_I2C_ADDR, TPS80032_SMPS2_CFG_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS80032_CTL1_I2C_ADDR, TPS80032_SMPS2_CFG_STATE_DATA); + + udelay(1000); + + /* Bring up VDD_CPU to 1.0125V. */ + tegra_i2c_ll_write(TPS80032_DVS_I2C_ADDR, TPS80032_SMPS1_CFG_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS80032_CTL1_I2C_ADDR, TPS80032_SMPS1_CFG_STATE_DATA); + udelay(10 * 1000); +} diff --git a/board/htc/endeavoru/endeavoru.c b/board/htc/endeavoru/endeavoru.c new file mode 100644 index 00000000000..1d92870f91a --- /dev/null +++ b/board/htc/endeavoru/endeavoru.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pinmux-config-endeavoru.h" + +#define TPS80032_CTL1_I2C_ADDR 0x48 +#define TPS80032_PHOENIX_DEV_ON 0x25 +#define DEVOFF BIT(0) +#define TPS80032_LDO1_CFG_STATE 0x9E +#define TPS80032_LDO1_CFG_VOLTAGE 0x9F + +#ifdef CONFIG_CMD_POWEROFF +int do_poweroff(struct cmd_tbl *cmdtp, int flag, + int argc, char *const argv[]) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS80032_CTL1_I2C_ADDR, 1, &dev); + if (ret) { + log_debug("cannot find PMIC I2C chip\n"); + return 0; + } + + ret = dm_i2c_reg_write(dev, TPS80032_PHOENIX_DEV_ON, DEVOFF); + if (ret) + return ret; + + // wait some time and then print error + mdelay(5000); + + printf("Failed to power off!!!\n"); + return 1; +} +#endif + +/* + * Routine: pinmux_init + * Description: Do individual peripheral pinmux configs + */ +void pinmux_init(void) +{ + pinmux_config_pingrp_table(endeavoru_pinmux_common, + ARRAY_SIZE(endeavoru_pinmux_common)); +} + +#ifdef CONFIG_MMC_SDHCI_TEGRA +static void tps80032_voltage_init(void) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS80032_CTL1_I2C_ADDR, 1, &dev); + if (ret) + log_debug("cannot find PMIC I2C chip\n"); + + /* TPS80032: LDO1_REG = 1.2v to DSI */ + ret = dm_i2c_reg_write(dev, TPS80032_LDO1_CFG_VOLTAGE, 0x03); + if (ret) + log_debug("avdd_dsi_csi voltage set failed: %d\n", ret); + + /* TPS80032: LDO1_REG enable */ + ret = dm_i2c_reg_write(dev, TPS80032_LDO1_CFG_STATE, 0x01); + if (ret) + log_debug("avdd_dsi_csi enable failed: %d\n", ret); +} + +/* + * Routine: pin_mux_mmc + * Description: setup the MMC muxes, power rails, etc. + */ +void pin_mux_mmc(void) +{ + /* Bring up DSI power */ + tps80032_voltage_init(); +} +#endif /* MMC */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ + /* Remove TrustZone nodes */ + fdt_del_node_and_alias(blob, "/firmware"); + fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000"); + + return 0; +} +#endif + +void nvidia_board_late_init(void) +{ + char serialno_str[17]; + + /* Set chip id as serialno */ + sprintf(serialno_str, "%016llx", tegra_chip_uid()); + env_set("serial#", serialno_str); + env_set("platform", "Tegra 3 T30"); +} diff --git a/board/htc/endeavoru/pinmux-config-endeavoru.h b/board/htc/endeavoru/pinmux-config-endeavoru.h new file mode 100644 index 00000000000..a00c5c988f1 --- /dev/null +++ b/board/htc/endeavoru/pinmux-config-endeavoru.h @@ -0,0 +1,362 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * + * Copyright (c) 2022, Svyatoslav Ryhel. + */ + +#ifndef _PINMUX_CONFIG_ENDEAVORU_H_ +#define _PINMUX_CONFIG_ENDEAVORU_H_ + +#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_##_od, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \ + { \ + .pingrp = PMUX_PINGRP_##_pingrp, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_DEFAULT, \ + .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ + } + +#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ + { \ + .drvgrp = PMUX_DRVGRP_##_drvgrp, \ + .slwf = _slwf, \ + .slwr = _slwr, \ + .drvup = _drvup, \ + .drvdn = _drvdn, \ + .lpmd = PMUX_LPMD_##_lpmd, \ + .schmt = PMUX_SCHMT_##_schmt, \ + .hsm = PMUX_HSM_##_hsm, \ + } + +static struct pmux_pingrp_config endeavoru_pinmux_common[] = { + /* SDMMC1 pinmux */ + DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT3_PY4, UARTE, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SDMMC1_DAT2_PY5, UARTE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT1_PY6, RSVD2, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT), + + /* SDMMC3 pinmux */ + DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT6_PD3, INVALID, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT7_PD4, INVALID, NORMAL, NORMAL, INPUT), + + /* SDMMC4 pinmux */ + LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* I2C pinmux */ + I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* HDMI pinmux */ + DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT), + + /* ULPI pinmux */ + DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA2_PO3, SPI3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA3_PO4, HSI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA4_PO5, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA6_PO7, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA7_PO0, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_CLK_PY0, RSVD2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(ULPI_DIR_PY1, RSVD2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(ULPI_NXT_PY2, ULPI, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(ULPI_STP_PY3, ULPI, NORMAL, NORMAL, INPUT), + + /* DAP3 pinmux */ + DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT), + + /* PV-gpio group pinmux */ + DEFAULT_PINMUX(PV0, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PV2, RSVD2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PV3, RSVD2, NORMAL, NORMAL, OUTPUT), + + /* CLK2 pinmux */ + DEFAULT_PINMUX(CLK2_OUT_PW5, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CLK2_REQ_PCC5, RSVD4, NORMAL, NORMAL, OUTPUT), + + /* LCD pinmux */ + DEFAULT_PINMUX(LCD_PWR1_PC1, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_SDIN_PZ2, DISPLAYA, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS0_N_PN4, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_DC0_PN6, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SCK_PZ4, DISPLAYA, UP, TRISTATE, OUTPUT), + DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D2_PE2, RSVD3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D6_PE6, RSVD3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D8_PF0, RSVD4, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D14_PF6, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D15_PF7, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D18_PM2, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D19_PM3, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_D21_PM5, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_D22_PM6, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_D23_PM7, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS1_N_PW0, RSVD4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(LCD_DC1_PD2, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CRT_VSYNC_PV7, RSVD4, NORMAL, NORMAL, OUTPUT), + + /* VI-group pinmux */ + LV_PINMUX(VI_D0_PT4, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D4_PL2, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D6_PL4, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D10_PT2, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_D11_PT3, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_PCLK_PT0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_MCLK_PT1, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_VSYNC_PD6, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + LV_PINMUX(VI_HSYNC_PD7, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* UART-2 pinmux */ + DEFAULT_PINMUX(UART2_RXD_PC3, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_TXD_PC2, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_RTS_N_PJ6, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(UART2_CTS_N_PJ5, SPI4, NORMAL, NORMAL, INPUT), + + /* UART-3 pinmux */ + DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT), + + /* PU-gpio group pinmux */ + DEFAULT_PINMUX(PU0, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU1, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU2, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU3, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU4, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PU5, RSVD4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(PU6, PWM3, UP, TRISTATE, INPUT), + + /* DAP4 pinmux */ + DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DOUT_PP6, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(DAP4_SCLK_PP7, RSVD4, NORMAL, NORMAL, OUTPUT), + + /* CLK3 pinmux */ + DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(CLK3_REQ_PEE1, RSVD4, NORMAL, TRISTATE, INPUT), + + /* GMI pinmux */ + DEFAULT_PINMUX(GMI_WP_N_PC7, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_WAIT_PI7, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_ADV_N_PK0, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CLK_PK1, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS0_N_PJ0, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS1_N_PJ2, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS6_N_PI3, NAND, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD0_PG0, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD1_PG1, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD2_PG2, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD3_PG3, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD4_PG4, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD5_PG5, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD6_PG6, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD7_PG7, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD8_PH0, PWM0, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD9_PH1, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD10_PH2, NAND, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD11_PH3, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD12_PH4, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD13_PH5, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD14_PH6, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD15_PH7, NAND, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_A16_PJ7, UARTD, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A18_PB1, UARTD, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_A19_PK7, UARTD, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_WR_N_PI0, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_OE_N_PI1, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_DQS_PI2, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_RST_N_PI4, RSVD4, UP, TRISTATE, INPUT), + + DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(PCC1, RSVD3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB0, RSVD3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PBB7, RSVD3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PCC2, RSVD3, UP, NORMAL, INPUT), + + DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, UP, NORMAL, INPUT), + + /* KBC keys */ + DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW1_PR1, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW2_PR2, RSVD4, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW3_PR3, RSVD3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW4_PR4, RSVD4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW7_PR7, KBC, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW9_PS1, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW10_PS2, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW11_PS3, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW12_PS4, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW13_PS5, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW14_PS6, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW15_PS7, KBC, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL4_PQ4, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL5_PQ5, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL6_PQ6, KBC, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL7_PQ7, KBC, NORMAL, NORMAL, INPUT), + + /* CLK */ + DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(OWR, OWR, UP, NORMAL, INPUT), + + /* DAP1 pinmux */ + DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, TRISTATE, OUTPUT), + + /* CLK1 pinmux */ + DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(CLK1_OUT_PW4, RSVD4, NORMAL, NORMAL, INPUT), + + /* SPDIF pinmux */ + DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, TRISTATE, OUTPUT), + + /* DAP2 pinmux */ + DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, DOWN, NORMAL, INPUT), + + /* SPI pinmux */ + DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SPI2_MISO_PX1, SPI2, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI2_CS0_N_PX3, SPI2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SPI2_SCK_PX2, SPI2, NORMAL, NORMAL, OUTPUT), + + DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SPI2_CS2_N_PW3, SPI2, UP, TRISTATE, INPUT), + + DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI1_SCK_PX5, SPI2, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SPI1_MISO_PX7, RSVD4, NORMAL, NORMAL, OUTPUT), + + /* PEX pinmux */ + DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT), +}; + +#endif /* _PINMUX_CONFIG_TRANSFORMER_H_ */ diff --git a/configs/endeavoru_defconfig b/configs/endeavoru_defconfig new file mode 100644 index 00000000000..38f26f2dcc5 --- /dev/null +++ b/configs/endeavoru_defconfig @@ -0,0 +1,84 @@ +CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y +CONFIG_ARCH_TEGRA=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y +CONFIG_TEXT_BASE=0x80110000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x3000 +CONFIG_ENV_OFFSET=0xFFFFD000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-htc-endeavoru" +CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_SYS_PROMPT="Tegra30 (Endeavoru) # " +CONFIG_SPL_STACK=0x800ffffc +CONFIG_TEGRA30=y +CONFIG_TARGET_ENDEAVORU=y +CONFIG_CMD_EBTUPDATE=y +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTDELAY=0 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_UMS_ABORT_KEYED=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_PAUSE=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_SPL_DM=y +CONFIG_BUTTON=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_SYS_I2C_TEGRA=y +CONFIG_BUTTON_KEYBOARD=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="HTC" +CONFIG_USB_GADGET_VENDOR_NUM=0x0bb4 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0c02 +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_VIDEO_LCD_ENDEAVORU=y +CONFIG_VIDEO_DSI_TEGRA30=y +CONFIG_TEGRA_BACKLIGHT_PWM=y +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set diff --git a/doc/board/htc/endeavoru.rst b/doc/board/htc/endeavoru.rst new file mode 100644 index 00000000000..950c713f2fa --- /dev/null +++ b/doc/board/htc/endeavoru.rst @@ -0,0 +1,89 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the HTC One X (endeavoru) +==================================== + +``DISCLAMER!`` Moving your HTC ONe X to use U-Boot assumes +replacement of the vendor hboot. Vendor android firmwares +will no longer be able to run on the device. +This replacement IS reversible. + +Quick Start +----------- + +- Build U-Boot +- Pack U-Boot into repart-block +- Flash repart-block into the eMMC +- Boot +- Self Upgrading + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-linux-gnueabi- + $ make endeavoru_defconfig + $ make + +After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin`` +image, ready for flashing (but check the next section for additional +adjustments). + +Pack U-Boot into repar-block +---------------------------- + +``DISCLAMER!`` All questions related to re-crypt work should be +asked in re-crypt repo issues. NOT HERE! + +re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in +form usable by device. This process is required only on the first +installation or to recover the device in case of a failed update. + +.. code-block:: bash + + $ git clone https://github.com/clamor-s/re-crypt.git + $ cd re-crypt # place your u-boot-dtb-regra.bin here + $ ./re-crypt.sh -d endeavoru + +Script will produce you a ``repart-block.bin`` ready to flash. + +Flash repart-block into the eMMC +-------------------------------- + +``DISCLAMER!`` All questions related to NvFlash should be asked +in the proper place. NOT HERE! Flashing repart-block will erase +all your eMMC, so make a backup before! + +``repart-block.bin`` contains BCT and bootloader in encrypted state +in form which can just be written RAW at the start of eMMC. + +.. code-block:: bash + + $ wheelie --blob blob.bin + $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin + +Boot +---- + +After flashing ``repart-block.bin`` the device should reboot and turn +itself off. This is normal behavior if no boot configuration is +found. + +To boot Linux, U-Boot will look for an ``extlinux.conf`` configuration +on eMMC. Additionally if Volume Down button is pressed while booting +device will enter bootmenu. Bootmenu contains entries to mount eMMC as +mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot +console and update bootloader (check next chapter). + +Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC +and allows the user to use/partition it in any way the user desires. + +Self Upgrading +-------------- + +Place your ``u-boot-dtb-tegra.bin`` on the first partition of the +eMMC (using ability of u-boot to mount it). Enter bootmenu, choose +update bootloader option with Power button and U-Boot should update +itself. Once the process is completed, U-Boot will ask to press any +button to reboot. diff --git a/doc/board/htc/index.rst b/doc/board/htc/index.rst new file mode 100644 index 00000000000..955c9b9e03d --- /dev/null +++ b/doc/board/htc/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +HTC +=== + +.. toctree:: + :maxdepth: 2 + + endeavoru diff --git a/doc/board/index.rst b/doc/board/index.rst index 3cfec7caec7..2e11dbb06f5 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -26,6 +26,7 @@ Board-specific doc gateworks/index google/index highbank/index + htc/index intel/index kontron/index lg/index diff --git a/include/configs/endeavoru.h b/include/configs/endeavoru.h new file mode 100644 index 00000000000..46c582e963e --- /dev/null +++ b/include/configs/endeavoru.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2010,2012 + * NVIDIA Corporation + * + * (C) Copyright 2022 + * Svyatoslav Ryhel + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#include "tegra30-common.h" + +/* High-level configuration options */ +#define CFG_TEGRA_BOARD_STRING "HTC One X" + +#define ENDEAVORU_FLASH_UBOOT \ + "flash_uboot=echo Preparing RAM;" \ + "mw ${kernel_addr_r} 0 ${boot_block_size_r};" \ + "mw ${ramdisk_addr_r} 0 ${boot_block_size_r};" \ + "echo Reading BCT;" \ + "mmc dev 0 1;" \ + "mmc read ${kernel_addr_r} 0 ${boot_block_size};" \ + "echo Reading bootloader;" \ + "if load mmc 0:1 ${ramdisk_addr_r} ${bootloader_file};" \ + "then echo Calculating bootloader size;" \ + "size mmc 0:1 ${bootloader_file};" \ + "ebtupdate ${kernel_addr_r} ${ramdisk_addr_r} ${filesize};" \ + "echo Writing bootloader to eMMC;" \ + "mmc dev 0 1;" \ + "mmc write ${kernel_addr_r} 0 ${boot_block_size};" \ + "mmc dev 0 2;" \ + "mmc write ${ramdisk_addr_r} 0 ${boot_block_size};" \ + "echo Bootloader written successfully;" \ + "pause 'Press ANY key to reboot device...'; reset;" \ + "else echo Reading bootloader failed;" \ + "pause 'Press ANY key to return to bootmenu...'; bootmenu; fi\0" + +#define ENDEAVORU_BOOTMENU \ + ENDEAVORU_FLASH_UBOOT \ + "bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu\0" \ + "bootmenu_1=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu\0" \ + "bootmenu_2=update bootloader=run flash_uboot\0" \ + "bootmenu_3=reboot RCM=enterrcm\0" \ + "bootmenu_4=reboot=reset\0" \ + "bootmenu_5=power off=poweroff\0" \ + "bootmenu_delay=-1\0" + +#define BOARD_EXTRA_ENV_SETTINGS \ + "boot_block_size_r=0x200000\0" \ + "boot_block_size=0x1000\0" \ + "bootloader_file=u-boot-dtb-tegra.bin\0" \ + "check_button=gpio input 179; test $? -eq 0\0" \ + "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ + ENDEAVORU_BOOTMENU + +/* Board-specific serial config */ +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ From d99873517907b806fe35f5a009c2b729c39d5808 Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:37 +0100 Subject: [PATCH 011/148] arm64: smccc: add support for SMCCCv1.2 x0-x17 registers add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi Reviewed-by: Ilias Apalodimas Reviewed-by: Jens Wiklander Reviewed-by: Simon Glass Cc: Tom Rini --- arch/arm/cpu/armv8/smccc-call.S | 57 ++++++++++++++++++++++++++++++++- arch/arm/lib/asm-offsets.c | 16 +++++++++ include/linux/arm-smccc.h | 45 ++++++++++++++++++++++++++ 3 files changed, 117 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index dc92b28777c..93f66d33668 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -1,7 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015, Linaro Limited - */ + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi +*/ #include #include #include @@ -45,3 +49,54 @@ ENDPROC(__arm_smccc_smc) ENTRY(__arm_smccc_hvc) SMCCC hvc ENDPROC(__arm_smccc_hvc) + +#ifdef CONFIG_ARM64 + + .macro SMCCC_1_2 instr + /* Save `res` and free a GPR that won't be clobbered */ + stp x1, x19, [sp, #-16]! + + /* Ensure `args` won't be clobbered while loading regs in next step */ + mov x19, x0 + + /* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */ + ldp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] + ldp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] + ldp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] + ldp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] + ldp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] + ldp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] + ldp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] + ldp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] + ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + + \instr #0 + + /* Load the `res` from the stack */ + ldr x19, [sp] + + /* Store the registers x0 - x17 into the result structure */ + stp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] + stp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] + stp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] + stp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] + stp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] + stp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] + stp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] + stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] + stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + + /* Restore original x19 */ + ldp xzr, x19, [sp], #16 + ret + .endm + +/* + * void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, + * struct arm_smccc_1_2_regs *res); + */ +ENTRY(arm_smccc_1_2_smc) + SMCCC_1_2 smc +ENDPROC(arm_smccc_1_2_smc) + +#endif diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index 6de0ce91524..181a8ac4c27 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -9,6 +9,11 @@ * generate asm statements containing #defines, * compile this file to assembler, and then extract the * #defines from the assembly-language output. + * + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi */ #include @@ -90,6 +95,17 @@ int main(void) DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); +#ifdef CONFIG_ARM64 + DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS, offsetof(struct arm_smccc_1_2_regs, a0)); + DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS, offsetof(struct arm_smccc_1_2_regs, a2)); + DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS, offsetof(struct arm_smccc_1_2_regs, a4)); + DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS, offsetof(struct arm_smccc_1_2_regs, a6)); + DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS, offsetof(struct arm_smccc_1_2_regs, a8)); + DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS, offsetof(struct arm_smccc_1_2_regs, a10)); + DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS, offsetof(struct arm_smccc_1_2_regs, a12)); + DEFINE(ARM_SMCCC_1_2_REGS_X14_OFFS, offsetof(struct arm_smccc_1_2_regs, a14)); + DEFINE(ARM_SMCCC_1_2_REGS_X16_OFFS, offsetof(struct arm_smccc_1_2_regs, a16)); +#endif #endif return 0; diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index e1d09884a1c..f44e9e8f930 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -1,6 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015, Linaro Limited + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi */ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H @@ -70,6 +74,47 @@ struct arm_smccc_res { unsigned long a3; }; +#ifdef CONFIG_ARM64 +/** + * struct arm_smccc_1_2_regs - Arguments for or Results from SMC call + * @a0-a17 argument values from registers 0 to 17 + */ +struct arm_smccc_1_2_regs { + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; + unsigned long a4; + unsigned long a5; + unsigned long a6; + unsigned long a7; + unsigned long a8; + unsigned long a9; + unsigned long a10; + unsigned long a11; + unsigned long a12; + unsigned long a13; + unsigned long a14; + unsigned long a15; + unsigned long a16; + unsigned long a17; +}; + +/** + * arm_smccc_1_2_smc() - make SMC calls + * @args: arguments passed via struct arm_smccc_1_2_regs + * @res: result values via struct arm_smccc_1_2_regs + * + * This function is used to make SMC calls following SMC Calling Convention + * v1.2 or above. The content of the supplied param are copied from the + * structure to registers prior to the SMC instruction. The return values + * are updated with the content from registers on return from the SMC + * instruction. + */ +asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, + struct arm_smccc_1_2_regs *res); +#endif + /** * struct arm_smccc_quirk - Contains quirk information * @id: quirk identification From 7048f26ccb181fc106a995e7e170b219087769f5 Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:38 +0100 Subject: [PATCH 012/148] lib: uuid: introduce uuid_str_to_le_bin function convert UUID string to little endian binary data Signed-off-by: Abdellatif El Khlifi Reviewed-by: Simon Glass Cc: Tom Rini Cc: Ilias Apalodimas Cc: Jens Wiklander --- include/uuid.h | 15 +++++++++++++++ lib/uuid.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/include/uuid.h b/include/uuid.h index 4a4883d3b5b..89b93e642b7 100644 --- a/include/uuid.h +++ b/include/uuid.h @@ -2,6 +2,10 @@ /* * Copyright (C) 2014 Samsung Electronics * Przemyslaw Marczak + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi */ #ifndef __UUID_H__ #define __UUID_H__ @@ -44,4 +48,15 @@ int uuid_guid_get_bin(const char *guid_str, unsigned char *guid_bin); const char *uuid_guid_get_str(const unsigned char *guid_bin); void gen_rand_uuid(unsigned char *uuid_bin); void gen_rand_uuid_str(char *uuid_str, int str_format); + +/** + * uuid_str_to_le_bin() - Convert string UUID to little endian binary data. + * @uuid_str: pointer to UUID string + * @uuid_bin: pointer to allocated array for little endian output [16B] + * Return: + * uuid_bin filled with little endian UUID data + * On success 0 is returned. Otherwise, failure code. + */ +int uuid_str_to_le_bin(const char *uuid_str, unsigned char *uuid_bin); + #endif diff --git a/lib/uuid.c b/lib/uuid.c index ab30fbf9152..d0187007d0e 100644 --- a/lib/uuid.c +++ b/lib/uuid.c @@ -1,6 +1,10 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2011 Calxeda, Inc. + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi */ #include @@ -354,6 +358,50 @@ int uuid_str_to_bin(const char *uuid_str, unsigned char *uuid_bin, return 0; } +/** + * uuid_str_to_le_bin() - Convert string UUID to little endian binary data. + * @uuid_str: pointer to UUID string + * @uuid_bin: pointer to allocated array for little endian output [16B] + * + * UUID string is 36 characters (36 bytes): + * + * xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx + * + * where x is a hexadecimal character. Fields are separated by '-'s. + * When converting to a little endian binary UUID, the string fields are reversed. + * + * Return: + * + * uuid_bin filled with little endian UUID data + * On success 0 is returned. Otherwise, failure code. + */ +int uuid_str_to_le_bin(const char *uuid_str, unsigned char *uuid_bin) +{ + u16 tmp16; + u32 tmp32; + u64 tmp64; + + if (!uuid_str_valid(uuid_str) || !uuid_bin) + return -EINVAL; + + tmp32 = cpu_to_le32(hextoul(uuid_str, NULL)); + memcpy(uuid_bin, &tmp32, 4); + + tmp16 = cpu_to_le16(hextoul(uuid_str + 9, NULL)); + memcpy(uuid_bin + 4, &tmp16, 2); + + tmp16 = cpu_to_le16(hextoul(uuid_str + 14, NULL)); + memcpy(uuid_bin + 6, &tmp16, 2); + + tmp16 = cpu_to_le16(hextoul(uuid_str + 19, NULL)); + memcpy(uuid_bin + 8, &tmp16, 2); + + tmp64 = cpu_to_le64(simple_strtoull(uuid_str + 24, NULL, 16)); + memcpy(uuid_bin + 10, &tmp64, 6); + + return 0; +} + /* * uuid_bin_to_str() - convert big endian binary data to string UUID or GUID. * From b83dc8df6471f472340b88f1e3f3230e836b1fa9 Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:39 +0100 Subject: [PATCH 013/148] lib: uuid: introduce testcase for uuid_str_to_le_bin provide a test case Signed-off-by: Abdellatif El Khlifi Reviewed-by: Simon Glass Cc: Tom Rini --- MAINTAINERS | 5 +++++ test/lib/Makefile | 1 + test/lib/uuid.c | 41 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 47 insertions(+) create mode 100644 test/lib/uuid.c diff --git a/MAINTAINERS b/MAINTAINERS index 2db052961b2..830c556ddb5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1605,6 +1605,11 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-usb.git topic-xhci F: drivers/usb/host/xhci* F: include/usb/xhci.h +UUID testing +M: Abdellatif El Khlifi +S: Maintained +F: test/lib/uuid.c + VIDEO M: Anatolij Gustschin S: Maintained diff --git a/test/lib/Makefile b/test/lib/Makefile index e0bd9e04e8f..e75a263e6a4 100644 --- a/test/lib/Makefile +++ b/test/lib/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_AES) += test_aes.o obj-$(CONFIG_GETOPT) += getopt.o obj-$(CONFIG_CRC8) += test_crc8.o obj-$(CONFIG_UT_LIB_CRYPT) += test_crypt.o +obj-$(CONFIG_LIB_UUID) += uuid.o else obj-$(CONFIG_SANDBOX) += kconfig_spl.o endif diff --git a/test/lib/uuid.c b/test/lib/uuid.c new file mode 100644 index 00000000000..e24331a1366 --- /dev/null +++ b/test/lib/uuid.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Functional tests for UCLASS_FFA class + * + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#include +#include +#include +#include +#include + +/* test UUID */ +#define TEST_SVC_UUID "ed32d533-4209-99e6-2d72-cdd998a79cc0" + +#define UUID_SIZE 16 + +/* The UUID binary data (little-endian format) */ +static const u8 ref_uuid_bin[UUID_SIZE] = { + 0x33, 0xd5, 0x32, 0xed, + 0x09, 0x42, 0xe6, 0x99, + 0x72, 0x2d, 0xc0, 0x9c, + 0xa7, 0x98, 0xd9, 0xcd +}; + +static int lib_test_uuid_to_le(struct unit_test_state *uts) +{ + const char *uuid_str = TEST_SVC_UUID; + u8 ret_uuid_bin[UUID_SIZE] = {0}; + + ut_assertok(uuid_str_to_le_bin(uuid_str, ret_uuid_bin)); + ut_asserteq_mem(ref_uuid_bin, ret_uuid_bin, UUID_SIZE); + + return 0; +} + +LIB_TEST(lib_test_uuid_to_le, 0); From 39d383bdace4b39b10665c7df2f1ef17399f6f1e Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:40 +0100 Subject: [PATCH 014/148] arm_ffa: introduce Arm FF-A support Add Arm FF-A support implementing Arm Firmware Framework for Armv8-A v1.0 The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1] describes interfaces (ABIs) that standardize communication between the Secure World and Normal World leveraging TrustZone technology. This driver uses 64-bit registers as per SMCCCv1.2 spec and comes on top of the SMCCC layer. The driver provides the FF-A ABIs needed for querying the FF-A framework from the secure world. The driver uses SMC32 calling convention which means using the first 32-bit data of the Xn registers. All supported ABIs come with their 32-bit version except FFA_RXTX_MAP which has 64-bit version supported. Both 32-bit and 64-bit direct messaging are supported which allows both 32-bit and 64-bit clients to use the FF-A bus. FF-A is a discoverable bus and similar to architecture features. FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed by the PSCI driver. Clients are able to probe then use the FF-A bus by calling the DM class searching APIs (e.g: uclass_first_device). The Secure World is considered as one entity to communicate with using the FF-A bus. FF-A communication is handled by one device and one instance (the bus). This FF-A driver takes care of all the interactions between Normal world and Secure World. The driver exports its operations to be used by upper layers. Exported operations: - ffa_partition_info_get - ffa_sync_send_receive - ffa_rxtx_unmap Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c). Arm specific methods are implemented in the Arm driver (arm-ffa.c). For more details please refer to the driver documentation [2]. [1]: https://developer.arm.com/documentation/den0077/latest/ [2]: doc/arch/arm64.ffa.rst Signed-off-by: Abdellatif El Khlifi Reviewed-by: Simon Glass Reviewed-by: Ilias Apalodimas Cc: Tom Rini Cc: Jens Wiklander Cc: Heinrich Schuchardt --- MAINTAINERS | 8 + doc/arch/arm64.ffa.rst | 236 ++++ doc/arch/index.rst | 1 + drivers/Makefile | 1 + drivers/firmware/Kconfig | 1 + drivers/firmware/arm-ffa/Kconfig | 36 + drivers/firmware/arm-ffa/Makefile | 8 + drivers/firmware/arm-ffa/arm-ffa-uclass.c | 1065 +++++++++++++++++ drivers/firmware/arm-ffa/arm-ffa.c | 104 ++ .../firmware/arm-ffa/sandbox_arm_ffa_priv.h | 14 + include/arm_ffa.h | 213 ++++ include/arm_ffa_priv.h | 246 ++++ include/dm/uclass-id.h | 6 + 13 files changed, 1939 insertions(+) create mode 100644 doc/arch/arm64.ffa.rst create mode 100644 drivers/firmware/arm-ffa/Kconfig create mode 100644 drivers/firmware/arm-ffa/Makefile create mode 100644 drivers/firmware/arm-ffa/arm-ffa-uclass.c create mode 100644 drivers/firmware/arm-ffa/arm-ffa.c create mode 100644 drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h create mode 100644 include/arm_ffa.h create mode 100644 include/arm_ffa_priv.h diff --git a/MAINTAINERS b/MAINTAINERS index 830c556ddb5..fcca162dee2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -266,6 +266,14 @@ F: drivers/net/cortina_ni.h F: drivers/net/phy/ca_phy.c F: configs/cortina_presidio-asic-pnand_defconfig +ARM FF-A +M: Abdellatif El Khlifi +S: Maintained +F: doc/arch/arm64.ffa.rst +F: drivers/firmware/arm-ffa/ +F: include/arm_ffa.h +F: include/sandbox_arm_ffa.h + ARM FREESCALE IMX M: Stefano Babic M: Fabio Estevam diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst new file mode 100644 index 00000000000..df189487741 --- /dev/null +++ b/doc/arch/arm64.ffa.rst @@ -0,0 +1,236 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Arm FF-A Support +================ + +Summary +------- + +FF-A stands for Firmware Framework for Arm A-profile processors. + +FF-A specifies interfaces that enable a pair of software execution environments aka partitions to +communicate with each other. A partition could be a VM in the Normal or Secure world, an +application in S-EL0, or a Trusted OS in S-EL1. + +The U-Boot FF-A support (the bus) implements the interfaces to communicate +with partitions in the Secure world aka Secure partitions (SPs). + +The FF-A support specifically focuses on communicating with SPs that +isolate portions of EFI runtime services that must run in a protected +environment which is inaccessible by the Host OS or Hypervisor. +Examples of such services are set/get variables. + +The FF-A support uses the SMC ABIs defined by the FF-A specification to: + +- Discover the presence of SPs of interest +- Access an SP's service through communication protocols + e.g. EFI MM communication protocol + +At this stage of development only EFI boot-time services are supported. +Runtime support will be added in future developments. + +The U-Boot FF-A support provides the following parts: + +- A Uclass driver providing generic FF-A methods. +- An Arm FF-A device driver providing Arm-specific methods and reusing the Uclass methods. + +FF-A and SMC specifications +------------------------------------------- + +The current implementation of the U-Boot FF-A support relies on +`FF-A v1.0 specification`_ and uses SMC32 calling convention which +means using the first 32-bit data of the Xn registers. + +At this stage we only need the FF-A v1.0 features. + +The FF-A support has been tested with OP-TEE which supports SMC32 calling +convention. + +Hypervisors are supported if they are configured to trap SMC calls. + +The FF-A support uses 64-bit registers as per `SMC Calling Convention v1.2 specification`_. + +Supported hardware +-------------------------------- + +Aarch64 plaforms + +Configuration +---------------------- + +CONFIG_ARM_FFA_TRANSPORT + Enables the FF-A support. Turn this on if you want to use FF-A + communication. + When using an Arm 64-bit platform, the Arm FF-A driver will be used. + +FF-A ABIs under the hood +--------------------------------------- + +Invoking an FF-A ABI involves providing to the secure world/hypervisor the +expected arguments from the ABI. + +On an Arm 64-bit platform, the ABI arguments are stored in x0 to x7 registers. +Then, an SMC instruction is executed. + +At the secure side level or hypervisor the ABI is handled at a higher exception +level and the arguments are read and processed. + +The response is put back through x0 to x7 registers and control is given back +to the U-Boot Arm FF-A driver (non-secure world). + +The driver reads the response and processes it accordingly. + +This methodology applies to all the FF-A ABIs. + +FF-A bus discovery on Arm 64-bit platforms +--------------------------------------------- + +When CONFIG_ARM_FFA_TRANSPORT is enabled, the FF-A bus is considered as +an architecture feature and discovered using ARM_SMCCC_FEATURES mechanism. +This discovery mechanism is performed by the PSCI driver. + +The PSCI driver comes with a PSCI device tree node which is the root node for all +architecture features including FF-A bus. + +:: + + => dm tree + + Class Index Probed Driver Name + ----------------------------------------------------------- + ... + firmware 0 [ + ] psci |-- psci + ffa 0 [ ] arm_ffa | `-- arm_ffa + ... + +The PSCI driver is bound to the PSCI device and when probed it tries to discover +the architecture features by calling a callback the features drivers provide. + +In case of FF-A, the callback is arm_ffa_is_supported() which tries to discover the +FF-A framework by querying the FF-A framework version from secure world using +FFA_VERSION ABI. When discovery is successful, the ARM_SMCCC_FEATURES +mechanism creates a U-Boot device for the FF-A bus and binds the Arm FF-A driver +with the device using device_bind_driver(). + +At this stage the FF-A bus is registered with the DM and can be interacted with using +the DM APIs. + +Clients are able to probe then use the FF-A bus by calling uclass_first_device(). + +When calling uclass_first_device(), the FF-A driver is probed and ends up calling +ffa_do_probe() provided by the Uclass which does the following: + + - saving the FF-A framework version in uc_priv + - querying from secure world the u-boot endpoint ID + - querying from secure world the supported features of FFA_RXTX_MAP + - mapping the RX/TX buffers + - querying from secure world all the partitions information + +When one of the above actions fails, probing fails and the driver stays not active +and can be probed again if needed. + +Requirements for clients +------------------------------------- + +When using the FF-A bus with EFI, clients must query the SPs they are looking for +during EFI boot-time mode using the service UUID. + +The RX/TX buffers are only available at EFI boot-time. Querying partitions is +done at boot time and data is cached for future use. + +RX/TX buffers should be unmapped before EFI runtime mode starts. +The driver provides a bus operation for that called ffa_rxtx_unmap(). + +The user should call ffa_rxtx_unmap() to unmap the RX/TX buffers when required +(e.g: at efi_exit_boot_services()). + +The Linux kernel allocates its own RX/TX buffers. To be able to register these kernel buffers +with secure world, the U-Boot's RX/TX buffers should be unmapped before EFI runtime starts. + +When invoking FF-A direct messaging, clients should specify which ABI protocol +they want to use (32-bit vs 64-bit). Selecting the protocol means using +the 32-bit or 64-bit version of FFA_MSG_SEND_DIRECT_{REQ, RESP}. +The calling convention between U-Boot and the secure world stays the same: SMC32. + +Requirements for user drivers +------------------------------------- + +Users who want to implement their custom FF-A device driver while reusing the FF-A Uclass can do so +by implementing their own invoke_ffa_fn() in the user driver. + +The bus driver layer +------------------------------ + +FF-A support comes on top of the SMCCC layer and is implemented by the FF-A Uclass drivers/firmware/arm-ffa/arm-ffa-uclass.c + +The following features are provided: + +- Support for the 32-bit version of the following ABIs: + + - FFA_VERSION + - FFA_ID_GET + - FFA_FEATURES + - FFA_PARTITION_INFO_GET + - FFA_RXTX_UNMAP + - FFA_RX_RELEASE + - FFA_RUN + - FFA_ERROR + - FFA_SUCCESS + - FFA_INTERRUPT + - FFA_MSG_SEND_DIRECT_REQ + - FFA_MSG_SEND_DIRECT_RESP + +- Support for the 64-bit version of the following ABIs: + + - FFA_RXTX_MAP + - FFA_MSG_SEND_DIRECT_REQ + - FFA_MSG_SEND_DIRECT_RESP + +- Processing the received data from the secure world/hypervisor and caching it + +- Hiding from upper layers the FF-A protocol and registers details. Upper + layers focus on exchanged data, FF-A support takes care of how to transport + that to the secure world/hypervisor using FF-A + +- FF-A support provides driver operations to be used by upper layers: + + - ffa_partition_info_get + - ffa_sync_send_receive + - ffa_rxtx_unmap + +- FF-A bus discovery makes sure FF-A framework is responsive and compatible + with the driver + +- FF-A bus can be compiled and used without EFI + +Example of boot logs with FF-A enabled +-------------------------------------- + +For example, when using FF-A with Corstone-1000 the logs are as follows: + +:: + + U-Boot 2023.01 (May 10 2023 - 11:08:07 +0000) corstone1000 aarch64 + + DRAM: 2 GiB + Arm FF-A framework discovery + FF-A driver 1.0 + FF-A framework 1.0 + FF-A versions are compatible + ... + FF-A driver 1.0 + FF-A framework 1.0 + FF-A versions are compatible + EFI: MM partition ID 0x8003 + ... + EFI stub: Booting Linux Kernel... + ... + Linux version 6.1.9-yocto-standard (oe-user@oe-host) (aarch64-poky-linux-musl-gcc (GCC) 12.2.0, GNU ld (GNU Binutils) 2.40.202301193 + Machine model: ARM Corstone1000 FPGA MPS3 board + +Contributors +------------ + * Abdellatif El Khlifi + +.. _`FF-A v1.0 specification`: https://documentation-service.arm.com/static/5fb7e8a6ca04df4095c1d65e +.. _`SMC Calling Convention v1.2 specification`: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6 diff --git a/doc/arch/index.rst b/doc/arch/index.rst index b8da4b8c8e5..2f916f4026c 100644 --- a/doc/arch/index.rst +++ b/doc/arch/index.rst @@ -8,6 +8,7 @@ Architecture-specific doc arc arm64 + arm64.ffa m68k mips nios2 diff --git a/drivers/Makefile b/drivers/Makefile index 3bc6d279d7c..2e38c7552cc 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -115,6 +115,7 @@ obj-y += iommu/ obj-y += smem/ obj-y += thermal/ obj-$(CONFIG_TEE) += tee/ +obj-$(CONFIG_ARM_FFA_TRANSPORT) += firmware/arm-ffa/ obj-y += axi/ obj-y += ufs/ obj-$(CONFIG_W1) += w1/ diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index eae1c8ddc9f..8789b1ea141 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -45,4 +45,5 @@ config ARM_SMCCC_FEATURES the PSCI driver is always probed and binds dirvers registered to the Arm SMCCC services if any and reported as supported by the SMCCC firmware. +source "drivers/firmware/arm-ffa/Kconfig" source "drivers/firmware/scmi/Kconfig" diff --git a/drivers/firmware/arm-ffa/Kconfig b/drivers/firmware/arm-ffa/Kconfig new file mode 100644 index 00000000000..9200c8028b8 --- /dev/null +++ b/drivers/firmware/arm-ffa/Kconfig @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0 + +config ARM_FFA_TRANSPORT + bool "Enable Arm Firmware Framework for Armv8-A driver" + depends on DM && ARM64 + select ARM_SMCCC + select ARM_SMCCC_FEATURES + select LIB_UUID + select DEVRES + help + The Firmware Framework for Arm A-profile processors (FF-A) + describes interfaces (ABIs) that standardize communication + between the Secure World and Normal World leveraging TrustZone + technology. + + The FF-A support in U-Boot is based on FF-A specification v1.0 and uses SMC32 + calling convention. + + FF-A specification: + + https://developer.arm.com/documentation/den0077/a/?lang=en + + In U-Boot FF-A design, FF-A is considered as a discoverable bus. + FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed + by the PSCI driver. + The Secure World is considered as one entity to communicate with + using the FF-A bus. + FF-A communication is handled by one device and one instance (the bus). + The FF-A support on U-Boot takes care of all the interactions between Normal + world and Secure World. + + Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c). + Arm specific methods are implemented in the Arm driver (arm-ffa.c). + + For more details about the FF-A support, please refer to doc/arch/arm64.ffa.rst + diff --git a/drivers/firmware/arm-ffa/Makefile b/drivers/firmware/arm-ffa/Makefile new file mode 100644 index 00000000000..11b17662853 --- /dev/null +++ b/drivers/firmware/arm-ffa/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright 2022-2023 Arm Limited and/or its affiliates +# +# Authors: +# Abdellatif El Khlifi + +obj-y += arm-ffa-uclass.o arm-ffa.o diff --git a/drivers/firmware/arm-ffa/arm-ffa-uclass.c b/drivers/firmware/arm-ffa/arm-ffa-uclass.c new file mode 100644 index 00000000000..ffa9d81fa74 --- /dev/null +++ b/drivers/firmware/arm-ffa/arm-ffa-uclass.c @@ -0,0 +1,1065 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* Error mapping declarations */ + +int ffa_to_std_errmap[MAX_NUMBER_FFA_ERR] = { + [NOT_SUPPORTED] = -EOPNOTSUPP, + [INVALID_PARAMETERS] = -EINVAL, + [NO_MEMORY] = -ENOMEM, + [BUSY] = -EBUSY, + [INTERRUPTED] = -EINTR, + [DENIED] = -EACCES, + [RETRY] = -EAGAIN, + [ABORTED] = -ECANCELED, +}; + +static struct ffa_abi_errmap err_msg_map[FFA_ERRMAP_COUNT] = { + [FFA_ID_TO_ERRMAP_ID(FFA_VERSION)] = { + { + [NOT_SUPPORTED] = + "NOT_SUPPORTED: A Firmware Framework implementation does not exist", + }, + }, + [FFA_ID_TO_ERRMAP_ID(FFA_ID_GET)] = { + { + [NOT_SUPPORTED] = + "NOT_SUPPORTED: This function is not implemented at this FF-A instance", + }, + }, + [FFA_ID_TO_ERRMAP_ID(FFA_FEATURES)] = { + { + [NOT_SUPPORTED] = + "NOT_SUPPORTED: FFA_RXTX_MAP is not implemented at this FF-A instance", + }, + }, + [FFA_ID_TO_ERRMAP_ID(FFA_PARTITION_INFO_GET)] = { + { + [NOT_SUPPORTED] = + "NOT_SUPPORTED: This function is not implemented at this FF-A instance", + [INVALID_PARAMETERS] = + "INVALID_PARAMETERS: Unrecognized UUID", + [NO_MEMORY] = + "NO_MEMORY: Results cannot fit in RX buffer of the caller", + [BUSY] = + "BUSY: RX buffer of the caller is not free", + [DENIED] = + "DENIED: Callee is not in a state to handle this request", + }, + }, + [FFA_ID_TO_ERRMAP_ID(FFA_RXTX_UNMAP)] = { + { + [NOT_SUPPORTED] = + "NOT_SUPPORTED: FFA_RXTX_UNMAP is not implemented at this FF-A instance", + [INVALID_PARAMETERS] = + "INVALID_PARAMETERS: No buffer pair registered on behalf of the caller", + }, + }, + [FFA_ID_TO_ERRMAP_ID(FFA_RX_RELEASE)] = { + { + [NOT_SUPPORTED] = + "NOT_SUPPORTED: FFA_RX_RELEASE is not implemented at this FF-A instance", + [DENIED] = + "DENIED: Caller did not have ownership of the RX buffer", + }, + }, + [FFA_ID_TO_ERRMAP_ID(FFA_RXTX_MAP)] = { + { + [NOT_SUPPORTED] = + "NOT_SUPPORTED: This function is not implemented at this FF-A instance", + [INVALID_PARAMETERS] = + "INVALID_PARAMETERS: Field(s) in input parameters incorrectly encoded", + [NO_MEMORY] = + "NO_MEMORY: Not enough memory", + [DENIED] = + "DENIED: Buffer pair already registered", + }, + }, +}; + +/** + * ffa_to_std_errno() - convert FF-A error code to standard error code + * @ffa_errno: Error code returned by the FF-A ABI + * + * Map the given FF-A error code as specified + * by the spec to a u-boot standard error code. + * + * Return: + * + * The standard error code on success. . Otherwise, failure + */ +static int ffa_to_std_errno(int ffa_errno) +{ + int err_idx = -ffa_errno; + + /* Map the FF-A error code to the standard u-boot error code */ + if (err_idx > 0 && err_idx < MAX_NUMBER_FFA_ERR) + return ffa_to_std_errmap[err_idx]; + return -EINVAL; +} + +/** + * ffa_print_error_log() - print the error log corresponding to the selected FF-A ABI + * @ffa_id: FF-A ABI ID + * @ffa_errno: Error code returned by the FF-A ABI + * + * Map the FF-A error code to the error log relevant to the + * selected FF-A ABI. Then the error log is printed. + * + * Return: + * + * 0 on success. . Otherwise, failure + */ +static int ffa_print_error_log(u32 ffa_id, int ffa_errno) +{ + int err_idx = -ffa_errno, abi_idx = 0; + + /* Map the FF-A error code to the corresponding error log */ + + if (err_idx <= 0 || err_idx >= MAX_NUMBER_FFA_ERR) + return -EINVAL; + + if (ffa_id < FFA_FIRST_ID || ffa_id > FFA_LAST_ID) + return -EINVAL; + + abi_idx = FFA_ID_TO_ERRMAP_ID(ffa_id); + if (abi_idx < 0 || abi_idx >= FFA_ERRMAP_COUNT) + return -EINVAL; + + if (!err_msg_map[abi_idx].err_str[err_idx]) + return -EINVAL; + + log_err("%s\n", err_msg_map[abi_idx].err_str[err_idx]); + + return 0; +} + +/* FF-A ABIs implementation (U-Boot side) */ + +/** + * invoke_ffa_fn() - SMC wrapper + * @args: FF-A ABI arguments to be copied to Xn registers + * @res: FF-A ABI return data to be copied from Xn registers + * + * Calls low level SMC implementation. + * This function should be implemented by the user driver. + */ +void __weak invoke_ffa_fn(ffa_value_t args, ffa_value_t *res) +{ +} + +/** + * ffa_get_version_hdlr() - FFA_VERSION handler function + * @dev: The FF-A bus device + * + * Implement FFA_VERSION FF-A function + * to get from the secure world the FF-A framework version + * FFA_VERSION is used to discover the FF-A framework. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_get_version_hdlr(struct udevice *dev) +{ + u16 major, minor; + ffa_value_t res = {0}; + int ffa_errno; + struct ffa_priv *uc_priv; + + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_32(FFA_VERSION), .a1 = FFA_VERSION_1_0, + }, &res); + + ffa_errno = res.a0; + if (ffa_errno < 0) { + ffa_print_error_log(FFA_VERSION, ffa_errno); + return ffa_to_std_errno(ffa_errno); + } + + major = GET_FFA_MAJOR_VERSION(res.a0); + minor = GET_FFA_MINOR_VERSION(res.a0); + + log_info("FF-A driver %d.%d\nFF-A framework %d.%d\n", + FFA_MAJOR_VERSION, FFA_MINOR_VERSION, major, minor); + + if (major == FFA_MAJOR_VERSION && minor >= FFA_MINOR_VERSION) { + log_info("FF-A versions are compatible\n"); + + if (dev) { + uc_priv = dev_get_uclass_priv(dev); + if (uc_priv) + uc_priv->fwk_version = res.a0; + } + + return 0; + } + + log_err("versions are incompatible\nExpected: %d.%d , Found: %d.%d\n", + FFA_MAJOR_VERSION, FFA_MINOR_VERSION, major, minor); + + return -EPROTONOSUPPORT; +} + +/** + * ffa_get_endpoint_id() - FFA_ID_GET handler function + * @dev: The FF-A bus device + * + * Implement FFA_ID_GET FF-A function + * to get from the secure world u-boot endpoint ID + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int ffa_get_endpoint_id(struct udevice *dev) +{ + ffa_value_t res = {0}; + int ffa_errno; + struct ffa_priv *uc_priv = dev_get_uclass_priv(dev); + + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_32(FFA_ID_GET), + }, &res); + + if (res.a0 == FFA_SMC_32(FFA_SUCCESS)) { + uc_priv->id = GET_SELF_ENDPOINT_ID((u32)res.a2); + log_debug("FF-A endpoint ID is %u\n", uc_priv->id); + + return 0; + } + + ffa_errno = res.a2; + + ffa_print_error_log(FFA_ID_GET, ffa_errno); + + return ffa_to_std_errno(ffa_errno); +} + +/** + * ffa_set_rxtx_buffers_pages_cnt() - set the minimum number of pages in each of the RX/TX buffers + * @dev: The FF-A bus device + * @prop_field: properties field obtained from FFA_FEATURES ABI + * + * Set the minimum number of pages in each of the RX/TX buffers in uc_priv + * + * Return: + * + * rxtx_min_pages field contains the returned number of pages + * 0 on success. Otherwise, failure + */ +static int ffa_set_rxtx_buffers_pages_cnt(struct udevice *dev, u32 prop_field) +{ + struct ffa_priv *uc_priv = dev_get_uclass_priv(dev); + + switch (prop_field) { + case RXTX_4K: + uc_priv->pair.rxtx_min_pages = 1; + break; + case RXTX_16K: + uc_priv->pair.rxtx_min_pages = 4; + break; + case RXTX_64K: + uc_priv->pair.rxtx_min_pages = 16; + break; + default: + log_err("RX/TX buffer size not supported\n"); + return -EINVAL; + } + + return 0; +} + +/** + * ffa_get_rxtx_map_features_hdlr() - FFA_FEATURES handler function with FFA_RXTX_MAP argument + * @dev: The FF-A bus device + * + * Implement FFA_FEATURES FF-A function to retrieve the FFA_RXTX_MAP features + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int ffa_get_rxtx_map_features_hdlr(struct udevice *dev) +{ + ffa_value_t res = {0}; + int ffa_errno; + + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_32(FFA_FEATURES), + .a1 = FFA_SMC_64(FFA_RXTX_MAP), + }, &res); + + if (res.a0 == FFA_SMC_32(FFA_SUCCESS)) + return ffa_set_rxtx_buffers_pages_cnt(dev, res.a2); + + ffa_errno = res.a2; + ffa_print_error_log(FFA_FEATURES, ffa_errno); + + return ffa_to_std_errno(ffa_errno); +} + +/** + * ffa_free_rxtx_buffers() - free the RX/TX buffers + * @dev: The FF-A bus device + * + * Free the RX/TX buffers + */ +static void ffa_free_rxtx_buffers(struct udevice *dev) +{ + struct ffa_priv *uc_priv = dev_get_uclass_priv(dev); + + log_debug("Freeing FF-A RX/TX buffers\n"); + + if (uc_priv->pair.rxbuf) { + free(uc_priv->pair.rxbuf); + uc_priv->pair.rxbuf = NULL; + } + + if (uc_priv->pair.txbuf) { + free(uc_priv->pair.txbuf); + uc_priv->pair.txbuf = NULL; + } +} + +/** + * ffa_alloc_rxtx_buffers() - allocate the RX/TX buffers + * @dev: The FF-A bus device + * + * Used by ffa_map_rxtx_buffers to allocate + * the RX/TX buffers before mapping them. The allocated memory is physically + * contiguous since memalign ends up calling malloc which allocates + * contiguous memory in u-boot. + * The size of the memory allocated is the minimum allowed. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int ffa_alloc_rxtx_buffers(struct udevice *dev) +{ + u64 bytes; + struct ffa_priv *uc_priv = dev_get_uclass_priv(dev); + + log_debug("Using %lu 4KB page(s) for FF-A RX/TX buffers size\n", + uc_priv->pair.rxtx_min_pages); + + bytes = uc_priv->pair.rxtx_min_pages * SZ_4K; + + /* + * The alignment of the RX and TX buffers must be equal + * to the larger translation granule size + * Assumption: Memory allocated with memalign is always physically contiguous + */ + + uc_priv->pair.rxbuf = memalign(bytes, bytes); + if (!uc_priv->pair.rxbuf) { + log_err("failure to allocate RX buffer\n"); + return -ENOBUFS; + } + + log_debug("FF-A RX buffer at virtual address %p\n", uc_priv->pair.rxbuf); + + uc_priv->pair.txbuf = memalign(bytes, bytes); + if (!uc_priv->pair.txbuf) { + free(uc_priv->pair.rxbuf); + uc_priv->pair.rxbuf = NULL; + log_err("failure to allocate the TX buffer\n"); + return -ENOBUFS; + } + + log_debug("FF-A TX buffer at virtual address %p\n", uc_priv->pair.txbuf); + + /* Make sure the buffers are cleared before use */ + memset(uc_priv->pair.rxbuf, 0, bytes); + memset(uc_priv->pair.txbuf, 0, bytes); + + return 0; +} + +/** + * ffa_map_rxtx_buffers_hdlr() - FFA_RXTX_MAP handler function + * @dev: The FF-A bus device + * + * Implement FFA_RXTX_MAP FF-A function to map the RX/TX buffers + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int ffa_map_rxtx_buffers_hdlr(struct udevice *dev) +{ + int ret; + ffa_value_t res = {0}; + int ffa_errno; + struct ffa_priv *uc_priv = dev_get_uclass_priv(dev); + + ret = ffa_alloc_rxtx_buffers(dev); + if (ret) + return ret; + + /* + * we need to pass the physical addresses of the RX/TX buffers + * in u-boot physical/virtual mapping is 1:1 + * no need to convert from virtual to physical + */ + + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_64(FFA_RXTX_MAP), + .a1 = map_to_sysmem(uc_priv->pair.txbuf), + .a2 = map_to_sysmem(uc_priv->pair.rxbuf), + .a3 = uc_priv->pair.rxtx_min_pages, + }, &res); + + if (res.a0 == FFA_SMC_32(FFA_SUCCESS)) { + log_debug("FF-A RX/TX buffers mapped\n"); + return 0; + } + + ffa_errno = res.a2; + ffa_print_error_log(FFA_RXTX_MAP, ffa_errno); + + ffa_free_rxtx_buffers(dev); + + return ffa_to_std_errno(ffa_errno); +} + +/** + * ffa_unmap_rxtx_buffers_hdlr() - FFA_RXTX_UNMAP handler function + * @dev: The FF-A bus device + * + * Implement FFA_RXTX_UNMAP FF-A function to unmap the RX/TX buffers + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_unmap_rxtx_buffers_hdlr(struct udevice *dev) +{ + ffa_value_t res = {0}; + int ffa_errno; + struct ffa_priv *uc_priv; + + log_debug("unmapping FF-A RX/TX buffers\n"); + + uc_priv = dev_get_uclass_priv(dev); + + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_32(FFA_RXTX_UNMAP), + .a1 = PREP_SELF_ENDPOINT_ID(uc_priv->id), + }, &res); + + if (res.a0 == FFA_SMC_32(FFA_SUCCESS)) { + ffa_free_rxtx_buffers(dev); + return 0; + } + + ffa_errno = res.a2; + ffa_print_error_log(FFA_RXTX_UNMAP, ffa_errno); + + return ffa_to_std_errno(ffa_errno); +} + +/** + * ffa_release_rx_buffer_hdlr() - FFA_RX_RELEASE handler function + * @dev: The FF-A bus device + * + * Invoke FFA_RX_RELEASE FF-A function to release the ownership of the RX buffer + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int ffa_release_rx_buffer_hdlr(struct udevice *dev) +{ + ffa_value_t res = {0}; + int ffa_errno; + + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_32(FFA_RX_RELEASE), + }, &res); + + if (res.a0 == FFA_SMC_32(FFA_SUCCESS)) + return 0; + + ffa_errno = res.a2; + ffa_print_error_log(FFA_RX_RELEASE, ffa_errno); + + return ffa_to_std_errno(ffa_errno); +} + +/** + * ffa_uuid_are_identical() - check whether two given UUIDs are identical + * @uuid1: first UUID + * @uuid2: second UUID + * + * Used by ffa_read_partitions_info to search for a UUID in the partitions descriptors table + * + * Return: + * + * 1 when UUIDs match. Otherwise, 0 + */ +static bool ffa_uuid_are_identical(const struct ffa_partition_uuid *uuid1, + const struct ffa_partition_uuid *uuid2) +{ + if (!uuid1 || !uuid2) + return 0; + + return !memcmp(uuid1, uuid2, sizeof(struct ffa_partition_uuid)); +} + +/** + * ffa_read_partitions_info() - read queried partition data + * @dev: The FF-A bus device + * @count: The number of partitions queried + * @part_uuid: Pointer to the partition(s) UUID + * + * Read the partitions information returned by the FFA_PARTITION_INFO_GET and saves it in uc_priv + * + * Return: + * + * uc_priv is updated with the partition(s) information + * 0 is returned on success. Otherwise, failure + */ +static int ffa_read_partitions_info(struct udevice *dev, u32 count, + struct ffa_partition_uuid *part_uuid) +{ + struct ffa_priv *uc_priv = dev_get_uclass_priv(dev); + + if (!count) { + log_err("no partition detected\n"); + return -ENODATA; + } + + log_debug("Reading FF-A partitions data from the RX buffer\n"); + + if (!part_uuid) { + /* Querying information of all partitions */ + u64 buf_bytes; + u64 data_bytes; + u32 desc_idx; + struct ffa_partition_info *parts_info; + + data_bytes = count * sizeof(struct ffa_partition_desc); + + buf_bytes = uc_priv->pair.rxtx_min_pages * SZ_4K; + + if (data_bytes > buf_bytes) { + log_err("partitions data size exceeds the RX buffer size:\n"); + log_err(" sizes in bytes: data %llu , RX buffer %llu\n", + data_bytes, + buf_bytes); + + return -ENOMEM; + } + + uc_priv->partitions.descs = devm_kmalloc(dev, data_bytes, __GFP_ZERO); + if (!uc_priv->partitions.descs) { + log_err("cannot allocate partitions data buffer\n"); + return -ENOMEM; + } + + parts_info = uc_priv->pair.rxbuf; + + for (desc_idx = 0 ; desc_idx < count ; desc_idx++) { + uc_priv->partitions.descs[desc_idx].info = + parts_info[desc_idx]; + + log_debug("FF-A partition ID %x : info cached\n", + uc_priv->partitions.descs[desc_idx].info.id); + } + + uc_priv->partitions.count = count; + + log_debug("%d FF-A partition(s) found and cached\n", count); + + } else { + u32 rx_desc_idx, cached_desc_idx; + struct ffa_partition_info *parts_info; + u8 desc_found; + + parts_info = uc_priv->pair.rxbuf; + + /* + * Search for the SP IDs read from the RX buffer + * in the already cached SPs. + * Update the UUID when ID found. + */ + for (rx_desc_idx = 0; rx_desc_idx < count ; rx_desc_idx++) { + desc_found = 0; + + /* Search the current ID in the cached partitions */ + for (cached_desc_idx = 0; + cached_desc_idx < uc_priv->partitions.count; + cached_desc_idx++) { + /* Save the UUID */ + if (uc_priv->partitions.descs[cached_desc_idx].info.id == + parts_info[rx_desc_idx].id) { + uc_priv->partitions.descs[cached_desc_idx].sp_uuid = + *part_uuid; + + desc_found = 1; + break; + } + } + + if (!desc_found) + return -ENODATA; + } + } + + return 0; +} + +/** + * ffa_query_partitions_info() - invoke FFA_PARTITION_INFO_GET and save partitions data + * @dev: The FF-A bus device + * @part_uuid: Pointer to the partition(s) UUID + * @pcount: Pointer to the number of partitions variable filled when querying + * + * Execute the FFA_PARTITION_INFO_GET to query the partitions data. + * Then, call ffa_read_partitions_info to save the data in uc_priv. + * + * After reading the data the RX buffer is released using ffa_release_rx_buffer + * + * Return: + * + * When part_uuid is NULL, all partitions data are retrieved from secure world + * When part_uuid is non NULL, data for partitions matching the given UUID are + * retrieved and the number of partitions is returned + * 0 is returned on success. Otherwise, failure + */ +static int ffa_query_partitions_info(struct udevice *dev, struct ffa_partition_uuid *part_uuid, + u32 *pcount) +{ + struct ffa_partition_uuid query_uuid = {0}; + ffa_value_t res = {0}; + int ffa_errno; + + /* + * If a UUID is specified. Information for one or more + * partitions in the system is queried. Otherwise, information + * for all installed partitions is queried + */ + + if (part_uuid) { + if (!pcount) + return -EINVAL; + + query_uuid = *part_uuid; + } else if (pcount) { + return -EINVAL; + } + + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_32(FFA_PARTITION_INFO_GET), + .a1 = query_uuid.a1, + .a2 = query_uuid.a2, + .a3 = query_uuid.a3, + .a4 = query_uuid.a4, + }, &res); + + if (res.a0 == FFA_SMC_32(FFA_SUCCESS)) { + int ret; + + /* + * res.a2 contains the count of partition information descriptors + * populated in the RX buffer + */ + if (res.a2) { + ret = ffa_read_partitions_info(dev, (u32)res.a2, part_uuid); + if (ret) { + log_err("failed reading SP(s) data , err (%d)\n", ret); + ffa_release_rx_buffer_hdlr(dev); + return -EINVAL; + } + } + + /* Return the SP count (when querying using a UUID) */ + if (pcount) + *pcount = (u32)res.a2; + + /* + * After calling FFA_PARTITION_INFO_GET the buffer ownership + * is assigned to the consumer (u-boot). So, we need to give + * the ownership back to the SPM or hypervisor + */ + ret = ffa_release_rx_buffer_hdlr(dev); + + return ret; + } + + ffa_errno = res.a2; + ffa_print_error_log(FFA_PARTITION_INFO_GET, ffa_errno); + + return ffa_to_std_errno(ffa_errno); +} + +/** + * ffa_get_partitions_info_hdlr() - FFA_PARTITION_INFO_GET handler function + * @uuid_str: pointer to the UUID string + * @sp_count: address of the variable containing the number of partitions matching the UUID + * The variable is set by the driver + * @sp_descs: address of the descriptors of the partitions matching the UUID + * The address is set by the driver + * + * Return the number of partitions and their descriptors matching the UUID + * + * Query the secure partition data from uc_priv. + * If not found, invoke FFA_PARTITION_INFO_GET FF-A function to query the partition information + * from secure world. + * + * A client of the FF-A driver should know the UUID of the service it wants to + * access. It should use the UUID to request the FF-A driver to provide the + * partition(s) information of the service. The FF-A driver uses + * PARTITION_INFO_GET to obtain this information. This is implemented through + * ffa_get_partitions_info_hdlr() function. + * If the partition(s) matching the UUID found, the partition(s) information and the + * number are returned. + * If no partition matching the UUID is found in the cached area, a new FFA_PARTITION_INFO_GET + * call is issued. + * If not done yet, the UUID is updated in the cached area. + * This assumes that partitions data does not change in the secure world. + * Otherwise u-boot will have an outdated partition data. The benefit of caching + * the information in the FF-A driver is to accommodate discovery after + * ExitBootServices(). + * + * Return: + * + * @sp_count: the number of partitions + * @sp_descs: address of the partitions descriptors + * + * On success 0 is returned. Otherwise, failure + */ +int ffa_get_partitions_info_hdlr(struct udevice *dev, const char *uuid_str, + u32 *sp_count, struct ffa_partition_desc **sp_descs) +{ + u32 i; + struct ffa_partition_uuid part_uuid = {0}; + struct ffa_priv *uc_priv; + struct ffa_partition_desc *rx_descs; + + uc_priv = dev_get_uclass_priv(dev); + + if (!uc_priv->partitions.count || !uc_priv->partitions.descs) { + log_err("no partition installed\n"); + return -EINVAL; + } + + if (!uuid_str) { + log_err("no UUID provided\n"); + return -EINVAL; + } + + if (!sp_count) { + log_err("no count argument provided\n"); + return -EINVAL; + } + + if (!sp_descs) { + log_err("no info argument provided\n"); + return -EINVAL; + } + + if (uuid_str_to_le_bin(uuid_str, (unsigned char *)&part_uuid)) { + log_err("invalid UUID\n"); + return -EINVAL; + } + + log_debug("Searching FF-A partitions using the provided UUID\n"); + + *sp_count = 0; + *sp_descs = uc_priv->pair.rxbuf; + rx_descs = *sp_descs; + + /* Search in the cached partitions */ + for (i = 0; i < uc_priv->partitions.count; i++) + if (ffa_uuid_are_identical(&uc_priv->partitions.descs[i].sp_uuid, + &part_uuid)) { + log_debug("FF-A partition ID %x matches the provided UUID\n", + uc_priv->partitions.descs[i].info.id); + + (*sp_count)++; + *rx_descs++ = uc_priv->partitions.descs[i]; + } + + if (!(*sp_count)) { + int ret; + + log_debug("No FF-A partition found. Querying framework ...\n"); + + ret = ffa_query_partitions_info(dev, &part_uuid, sp_count); + + if (!ret) { + log_debug("Number of FF-A partition(s) matching the UUID: %d\n", *sp_count); + + if (*sp_count) + ret = ffa_get_partitions_info_hdlr(dev, uuid_str, sp_count, + sp_descs); + else + ret = -ENODATA; + } + + return ret; + } + + return 0; +} + +/** + * ffa_cache_partitions_info() - Query and saves all secure partitions data + * @dev: The FF-A bus device + * + * Invoke FFA_PARTITION_INFO_GET FF-A function to query from secure world + * all partitions information. + * + * The FFA_PARTITION_INFO_GET call is issued with nil UUID as an argument. + * All installed partitions information are returned. We cache them in uc_priv + * and we keep the UUID field empty (in FF-A 1.0 UUID is not provided by the partition descriptor) + * + * Called at the device probing level. + * ffa_cache_partitions_info uses ffa_query_partitions_info to get the data + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int ffa_cache_partitions_info(struct udevice *dev) +{ + return ffa_query_partitions_info(dev, NULL, NULL); +} + +/** + * ffa_msg_send_direct_req_hdlr() - FFA_MSG_SEND_DIRECT_{REQ,RESP} handler function + * @dev: The FF-A bus device + * @dst_part_id: destination partition ID + * @msg: pointer to the message data preallocated by the client (in/out) + * @is_smc64: select 64-bit or 32-bit FF-A ABI + * + * Implement FFA_MSG_SEND_DIRECT_{REQ,RESP} + * FF-A functions. + * + * FFA_MSG_SEND_DIRECT_REQ is used to send the data to the secure partition. + * The response from the secure partition is handled by reading the + * FFA_MSG_SEND_DIRECT_RESP arguments. + * + * The maximum size of the data that can be exchanged is 40 bytes which is + * sizeof(struct ffa_send_direct_data) as defined by the FF-A specification 1.0 + * in the section relevant to FFA_MSG_SEND_DIRECT_{REQ,RESP} + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_msg_send_direct_req_hdlr(struct udevice *dev, u16 dst_part_id, + struct ffa_send_direct_data *msg, bool is_smc64) +{ + ffa_value_t res = {0}; + int ffa_errno; + u64 req_mode, resp_mode; + struct ffa_priv *uc_priv; + + uc_priv = dev_get_uclass_priv(dev); + + /* No partition installed */ + if (!uc_priv->partitions.count || !uc_priv->partitions.descs) + return -ENODEV; + + if (is_smc64) { + req_mode = FFA_SMC_64(FFA_MSG_SEND_DIRECT_REQ); + resp_mode = FFA_SMC_64(FFA_MSG_SEND_DIRECT_RESP); + } else { + req_mode = FFA_SMC_32(FFA_MSG_SEND_DIRECT_REQ); + resp_mode = FFA_SMC_32(FFA_MSG_SEND_DIRECT_RESP); + } + + invoke_ffa_fn((ffa_value_t){ + .a0 = req_mode, + .a1 = PREP_SELF_ENDPOINT_ID(uc_priv->id) | + PREP_PART_ENDPOINT_ID(dst_part_id), + .a2 = 0, + .a3 = msg->data0, + .a4 = msg->data1, + .a5 = msg->data2, + .a6 = msg->data3, + .a7 = msg->data4, + }, &res); + + while (res.a0 == FFA_SMC_32(FFA_INTERRUPT)) + invoke_ffa_fn((ffa_value_t){ + .a0 = FFA_SMC_32(FFA_RUN), + .a1 = res.a1, + }, &res); + + if (res.a0 == FFA_SMC_32(FFA_SUCCESS)) { + /* Message sent with no response */ + return 0; + } + + if (res.a0 == resp_mode) { + /* Message sent with response extract the return data */ + msg->data0 = res.a3; + msg->data1 = res.a4; + msg->data2 = res.a5; + msg->data3 = res.a6; + msg->data4 = res.a7; + + return 0; + } + + ffa_errno = res.a2; + return ffa_to_std_errno(ffa_errno); +} + +/* FF-A driver operations (used by clients for communicating with FF-A)*/ + +/** + * ffa_partition_info_get() - FFA_PARTITION_INFO_GET driver operation + * @uuid_str: pointer to the UUID string + * @sp_count: address of the variable containing the number of partitions matching the UUID + * The variable is set by the driver + * @sp_descs: address of the descriptors of the partitions matching the UUID + * The address is set by the driver + * + * Driver operation for FFA_PARTITION_INFO_GET. + * Please see ffa_get_partitions_info_hdlr() description for more details. + * + * Return: + * + * @sp_count: the number of partitions + * @sp_descs: address of the partitions descriptors + * + * On success 0 is returned. Otherwise, failure + */ +int ffa_partition_info_get(struct udevice *dev, const char *uuid_str, + u32 *sp_count, struct ffa_partition_desc **sp_descs) +{ + struct ffa_bus_ops *ops = ffa_get_ops(dev); + + if (!ops->partition_info_get) + return -ENOSYS; + + return ops->partition_info_get(dev, uuid_str, sp_count, sp_descs); +} + +/** + * ffa_sync_send_receive() - FFA_MSG_SEND_DIRECT_{REQ,RESP} driver operation + * @dev: The FF-A bus device + * @dst_part_id: destination partition ID + * @msg: pointer to the message data preallocated by the client (in/out) + * @is_smc64: select 64-bit or 32-bit FF-A ABI + * + * Driver operation for FFA_MSG_SEND_DIRECT_{REQ,RESP}. + * Please see ffa_msg_send_direct_req_hdlr() description for more details. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_sync_send_receive(struct udevice *dev, u16 dst_part_id, + struct ffa_send_direct_data *msg, bool is_smc64) +{ + struct ffa_bus_ops *ops = ffa_get_ops(dev); + + if (!ops->sync_send_receive) + return -ENOSYS; + + return ops->sync_send_receive(dev, dst_part_id, msg, is_smc64); +} + +/** + * ffa_rxtx_unmap() - FFA_RXTX_UNMAP driver operation + * @dev: The FF-A bus device + * + * Driver operation for FFA_RXTX_UNMAP. + * Please see ffa_unmap_rxtx_buffers_hdlr() description for more details. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_rxtx_unmap(struct udevice *dev) +{ + struct ffa_bus_ops *ops = ffa_get_ops(dev); + + if (!ops->rxtx_unmap) + return -ENOSYS; + + return ops->rxtx_unmap(dev); +} + +/** + * ffa_do_probe() - probing FF-A framework + * @dev: the FF-A bus device (arm_ffa) + * + * Probing is triggered on demand by clients searching for the uclass. + * At probe level the following actions are done: + * - saving the FF-A framework version in uc_priv + * - querying from secure world the u-boot endpoint ID + * - querying from secure world the supported features of FFA_RXTX_MAP + * - mapping the RX/TX buffers + * - querying from secure world all the partitions information + * + * All data queried from secure world is saved in uc_priv. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int ffa_do_probe(struct udevice *dev) +{ + int ret; + + ret = ffa_get_version_hdlr(dev); + if (ret) + return ret; + + ret = ffa_get_endpoint_id(dev); + if (ret) + return ret; + + ret = ffa_get_rxtx_map_features_hdlr(dev); + if (ret) + return ret; + + ret = ffa_map_rxtx_buffers_hdlr(dev); + if (ret) + return ret; + + ret = ffa_cache_partitions_info(dev); + if (ret) { + ffa_unmap_rxtx_buffers_hdlr(dev); + return ret; + } + + return 0; +} + +UCLASS_DRIVER(ffa) = { + .name = "ffa", + .id = UCLASS_FFA, + .pre_probe = ffa_do_probe, + .pre_remove = ffa_unmap_rxtx_buffers_hdlr, + .per_device_auto = sizeof(struct ffa_priv) +}; diff --git a/drivers/firmware/arm-ffa/arm-ffa.c b/drivers/firmware/arm-ffa/arm-ffa.c new file mode 100644 index 00000000000..68df75bd9e5 --- /dev/null +++ b/drivers/firmware/arm-ffa/arm-ffa.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/** + * invoke_ffa_fn() - SMC wrapper + * @args: FF-A ABI arguments to be copied to Xn registers + * @res: FF-A ABI return data to be copied from Xn registers + * + * Calls low level SMC assembly function + */ +void invoke_ffa_fn(ffa_value_t args, ffa_value_t *res) +{ + arm_smccc_1_2_smc(&args, res); +} + +/** + * arm_ffa_discover() - perform FF-A discovery + * @dev: The Arm FF-A bus device (arm_ffa) + * Try to discover the FF-A framework. Discovery is performed by + * querying the FF-A framework version from secure world using the FFA_VERSION ABI. + * Return: + * + * true on success. Otherwise, false. + */ +static bool arm_ffa_discover(struct udevice *dev) +{ + int ret; + + log_info("Arm FF-A framework discovery\n"); + + ret = ffa_get_version_hdlr(dev); + if (ret) + return false; + + return true; +} + +/** + * arm_ffa_is_supported() - FF-A bus discovery callback + * @invoke_fn: legacy SMC invoke function (not used) + * + * Perform FF-A discovery by calling arm_ffa_discover(). + * Discovery is performed by querying the FF-A framework version from + * secure world using the FFA_VERSION ABI. + * + * The FF-A driver is registered as an SMCCC feature driver. So, features discovery + * callbacks are called by the PSCI driver (PSCI device is the SMCCC features + * root device). + * + * The FF-A driver supports the SMCCCv1.2 extended input/output registers. + * So, the legacy SMC invocation is not used. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static bool arm_ffa_is_supported(void (*invoke_fn)(ulong a0, ulong a1, + ulong a2, ulong a3, + ulong a4, ulong a5, + ulong a6, ulong a7, + struct arm_smccc_res *res)) +{ + return arm_ffa_discover(NULL); +} + +/* Arm FF-A driver operations */ + +static const struct ffa_bus_ops ffa_ops = { + .partition_info_get = ffa_get_partitions_info_hdlr, + .sync_send_receive = ffa_msg_send_direct_req_hdlr, + .rxtx_unmap = ffa_unmap_rxtx_buffers_hdlr, +}; + +/* Registering the FF-A driver as an SMCCC feature driver */ + +ARM_SMCCC_FEATURE_DRIVER(arm_ffa) = { + .driver_name = FFA_DRV_NAME, + .is_supported = arm_ffa_is_supported, +}; + +/* Declaring the FF-A driver under UCLASS_FFA */ + +U_BOOT_DRIVER(arm_ffa) = { + .name = FFA_DRV_NAME, + .id = UCLASS_FFA, + .flags = DM_REMOVE_OS_PREPARE, + .ops = &ffa_ops, +}; diff --git a/drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h b/drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h new file mode 100644 index 00000000000..4338f9c9b17 --- /dev/null +++ b/drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#ifndef __SANDBOX_ARM_FFA_PRV_H +#define __SANDBOX_ARM_FFA_PRV_H + +/* Future sandbox support private declarations */ + +#endif diff --git a/include/arm_ffa.h b/include/arm_ffa.h new file mode 100644 index 00000000000..db9b1be995e --- /dev/null +++ b/include/arm_ffa.h @@ -0,0 +1,213 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#ifndef __ARM_FFA_H +#define __ARM_FFA_H + +#include + +/* + * This header is public. It can be used by clients to access + * data structures and definitions they need + */ + +/* + * struct ffa_partition_info - Partition information descriptor + * @id: Partition ID + * @exec_ctxt: Execution context count + * @properties: Partition properties + * + * Data structure containing information about partitions instantiated in the system + * This structure is filled with the data queried by FFA_PARTITION_INFO_GET + */ +struct ffa_partition_info { + u16 id; + u16 exec_ctxt; +/* partition supports receipt of direct requests */ +#define FFA_PARTITION_DIRECT_RECV BIT(0) +/* partition can send direct requests. */ +#define FFA_PARTITION_DIRECT_SEND BIT(1) +/* partition can send and receive indirect messages. */ +#define FFA_PARTITION_INDIRECT_MSG BIT(2) + u32 properties; +}; + +/* + * struct ffa_partition_uuid - 16 bytes UUID transmitted by FFA_PARTITION_INFO_GET + * @a1-4: 32-bit words access to the UUID data + * + */ +struct ffa_partition_uuid { + u32 a1; /* w1 */ + u32 a2; /* w2 */ + u32 a3; /* w3 */ + u32 a4; /* w4 */ +}; + +/** + * struct ffa_partition_desc - the secure partition descriptor + * @info: partition information + * @sp_uuid: the secure partition UUID + * + * Each partition has its descriptor containing the partitions information and the UUID + */ +struct ffa_partition_desc { + struct ffa_partition_info info; + struct ffa_partition_uuid sp_uuid; +}; + +/* + * struct ffa_send_direct_data - Data structure hosting the data + * used by FFA_MSG_SEND_DIRECT_{REQ,RESP} + * @data0-4: Data read/written from/to x3-x7 registers + * + * Data structure containing the data to be sent by FFA_MSG_SEND_DIRECT_REQ + * or read from FFA_MSG_SEND_DIRECT_RESP + */ + +/* For use with FFA_MSG_SEND_DIRECT_{REQ,RESP} which pass data via registers */ +struct ffa_send_direct_data { + ulong data0; /* w3/x3 */ + ulong data1; /* w4/x4 */ + ulong data2; /* w5/x5 */ + ulong data3; /* w6/x6 */ + ulong data4; /* w7/x7 */ +}; + +struct udevice; + +/** + * struct ffa_bus_ops - Operations for FF-A + * @partition_info_get: callback for the FFA_PARTITION_INFO_GET + * @sync_send_receive: callback for the FFA_MSG_SEND_DIRECT_REQ + * @rxtx_unmap: callback for the FFA_RXTX_UNMAP + * + * The data structure providing all the operations supported by the driver. + * This structure is EFI runtime resident. + */ +struct ffa_bus_ops { + int (*partition_info_get)(struct udevice *dev, const char *uuid_str, + u32 *sp_count, struct ffa_partition_desc **sp_descs); + int (*sync_send_receive)(struct udevice *dev, u16 dst_part_id, + struct ffa_send_direct_data *msg, + bool is_smc64); + int (*rxtx_unmap)(struct udevice *dev); +}; + +#define ffa_get_ops(dev) ((struct ffa_bus_ops *)(dev)->driver->ops) + +/** + * ffa_rxtx_unmap() - FFA_RXTX_UNMAP driver operation + * Please see ffa_unmap_rxtx_buffers_hdlr() description for more details. + */ +int ffa_rxtx_unmap(struct udevice *dev); + +/** + * ffa_unmap_rxtx_buffers_hdlr() - FFA_RXTX_UNMAP handler function + * @dev: The arm_ffa bus device + * + * This function implements FFA_RXTX_UNMAP FF-A function + * to unmap the RX/TX buffers + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_unmap_rxtx_buffers_hdlr(struct udevice *dev); + +/** + * ffa_sync_send_receive() - FFA_MSG_SEND_DIRECT_{REQ,RESP} driver operation + * Please see ffa_msg_send_direct_req_hdlr() description for more details. + */ +int ffa_sync_send_receive(struct udevice *dev, u16 dst_part_id, + struct ffa_send_direct_data *msg, bool is_smc64); + +/** + * ffa_msg_send_direct_req_hdlr() - FFA_MSG_SEND_DIRECT_{REQ,RESP} handler function + * @dev: The arm_ffa bus device + * @dst_part_id: destination partition ID + * @msg: pointer to the message data preallocated by the client (in/out) + * @is_smc64: select 64-bit or 32-bit FF-A ABI + * + * This function implements FFA_MSG_SEND_DIRECT_{REQ,RESP} + * FF-A functions. + * + * FFA_MSG_SEND_DIRECT_REQ is used to send the data to the secure partition. + * The response from the secure partition is handled by reading the + * FFA_MSG_SEND_DIRECT_RESP arguments. + * + * The maximum size of the data that can be exchanged is 40 bytes which is + * sizeof(struct ffa_send_direct_data) as defined by the FF-A specification 1.0 + * in the section relevant to FFA_MSG_SEND_DIRECT_{REQ,RESP} + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_msg_send_direct_req_hdlr(struct udevice *dev, u16 dst_part_id, + struct ffa_send_direct_data *msg, bool is_smc64); + +/** + * ffa_partition_info_get() - FFA_PARTITION_INFO_GET driver operation + * Please see ffa_get_partitions_info_hdlr() description for more details. + */ +int ffa_partition_info_get(struct udevice *dev, const char *uuid_str, + u32 *sp_count, struct ffa_partition_desc **sp_descs); + +/** + * ffa_get_partitions_info_hdlr() - FFA_PARTITION_INFO_GET handler function + * @uuid_str: pointer to the UUID string + * @sp_count: address of the variable containing the number of partitions matching the UUID + * The variable is set by the driver + * @sp_descs: address of the descriptors of the partitions matching the UUID + * The address is set by the driver + * + * Return the number of partitions and their descriptors matching the UUID + * + * Query the secure partition data from uc_priv. + * If not found, invoke FFA_PARTITION_INFO_GET + * FF-A function to query the partition information from secure world. + * + * A client of the FF-A driver should know the UUID of the service it wants to + * access. It should use the UUID to request the FF-A driver to provide the + * partition(s) information of the service. The FF-A driver uses + * PARTITION_INFO_GET to obtain this information. This is implemented through + * ffa_get_partitions_info_hdlr() function. + * A new FFA_PARTITION_INFO_GET call is issued (first one performed through + * ffa_cache_partitions_info) allowing to retrieve the partition(s) information. + * They are not saved (already done). We only update the UUID in the cached area. + * This assumes that partitions data does not change in the secure world. + * Otherwise u-boot will have an outdated partition data. The benefit of caching + * the information in the FF-A driver is to accommodate discovery after + * ExitBootServices(). + * + * Return: + * + * @sp_count: the number of partitions + * @sp_descs: address of the partitions descriptors + * + * On success 0 is returned. Otherwise, failure + */ +int ffa_get_partitions_info_hdlr(struct udevice *dev, const char *uuid_str, + u32 *sp_count, struct ffa_partition_desc **sp_descs); + +struct ffa_priv; + +/** + * ffa_set_smc_conduit() - Set the SMC conduit + * @dev: The FF-A bus device + * + * Selects the SMC conduit by setting the FF-A ABI invoke function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_set_smc_conduit(struct udevice *dev); + +#endif diff --git a/include/arm_ffa_priv.h b/include/arm_ffa_priv.h new file mode 100644 index 00000000000..d564c33c647 --- /dev/null +++ b/include/arm_ffa_priv.h @@ -0,0 +1,246 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#ifndef __ARM_FFA_PRV_H +#define __ARM_FFA_PRV_H + +#include +#include +#include + +/* This header is exclusively used by the FF-A Uclass and FF-A driver(s) */ + +/* Arm FF-A driver name */ +#define FFA_DRV_NAME "arm_ffa" + +/* The FF-A SMC function definitions */ + +#if CONFIG_IS_ENABLED(SANDBOX) + +/* Providing Arm SMCCC declarations to sandbox */ + +/** + * struct sandbox_smccc_1_2_regs - emulated SMC call arguments or results + * @a0-a17 argument values from registers 0 to 17 + */ +struct sandbox_smccc_1_2_regs { + ulong a0; + ulong a1; + ulong a2; + ulong a3; + ulong a4; + ulong a5; + ulong a6; + ulong a7; + ulong a8; + ulong a9; + ulong a10; + ulong a11; + ulong a12; + ulong a13; + ulong a14; + ulong a15; + ulong a16; + ulong a17; +}; + +typedef struct sandbox_smccc_1_2_regs ffa_value_t; + +#define ARM_SMCCC_FAST_CALL 1UL +#define ARM_SMCCC_OWNER_STANDARD 4 +#define ARM_SMCCC_SMC_32 0 +#define ARM_SMCCC_SMC_64 1 +#define ARM_SMCCC_TYPE_SHIFT 31 +#define ARM_SMCCC_CALL_CONV_SHIFT 30 +#define ARM_SMCCC_OWNER_MASK 0x3f +#define ARM_SMCCC_OWNER_SHIFT 24 +#define ARM_SMCCC_FUNC_MASK 0xffff + +#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ + (((type) << ARM_SMCCC_TYPE_SHIFT) | \ + ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ + (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ + ((func_num) & ARM_SMCCC_FUNC_MASK)) + +#else +/* CONFIG_ARM64 */ +#include +typedef struct arm_smccc_1_2_regs ffa_value_t; +#endif + +/* Defining the function pointer type for the function executing the FF-A ABIs */ +typedef void (*invoke_ffa_fn_t)(ffa_value_t args, ffa_value_t *res); + +/* FF-A driver version definitions */ + +#define MAJOR_VERSION_MASK GENMASK(30, 16) +#define MINOR_VERSION_MASK GENMASK(15, 0) +#define GET_FFA_MAJOR_VERSION(x) \ + ((u16)(FIELD_GET(MAJOR_VERSION_MASK, (x)))) +#define GET_FFA_MINOR_VERSION(x) \ + ((u16)(FIELD_GET(MINOR_VERSION_MASK, (x)))) +#define PACK_VERSION_INFO(major, minor) \ + (FIELD_PREP(MAJOR_VERSION_MASK, (major)) | \ + FIELD_PREP(MINOR_VERSION_MASK, (minor))) + +#define FFA_MAJOR_VERSION (1) +#define FFA_MINOR_VERSION (0) +#define FFA_VERSION_1_0 \ + PACK_VERSION_INFO(FFA_MAJOR_VERSION, FFA_MINOR_VERSION) + +/* Endpoint ID mask (u-boot endpoint ID) */ + +#define GET_SELF_ENDPOINT_ID_MASK GENMASK(15, 0) +#define GET_SELF_ENDPOINT_ID(x) \ + ((u16)(FIELD_GET(GET_SELF_ENDPOINT_ID_MASK, (x)))) + +#define PREP_SELF_ENDPOINT_ID_MASK GENMASK(31, 16) +#define PREP_SELF_ENDPOINT_ID(x) \ + (FIELD_PREP(PREP_SELF_ENDPOINT_ID_MASK, (x))) + +/* Partition endpoint ID mask (partition with which u-boot communicates with) */ + +#define PREP_PART_ENDPOINT_ID_MASK GENMASK(15, 0) +#define PREP_PART_ENDPOINT_ID(x) \ + (FIELD_PREP(PREP_PART_ENDPOINT_ID_MASK, (x))) + +/* Definitions of the Arm FF-A interfaces supported by the Arm FF-A driver */ + +#define FFA_SMC(calling_convention, func_num) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, (calling_convention), \ + ARM_SMCCC_OWNER_STANDARD, (func_num)) + +#define FFA_SMC_32(func_num) FFA_SMC(ARM_SMCCC_SMC_32, (func_num)) +#define FFA_SMC_64(func_num) FFA_SMC(ARM_SMCCC_SMC_64, (func_num)) + +enum ffa_abis { + FFA_ERROR = 0x60, + FFA_SUCCESS = 0x61, + FFA_INTERRUPT = 0x62, + FFA_VERSION = 0x63, + FFA_FEATURES = 0x64, + FFA_RX_RELEASE = 0x65, + FFA_RXTX_MAP = 0x66, + FFA_RXTX_UNMAP = 0x67, + FFA_PARTITION_INFO_GET = 0x68, + FFA_ID_GET = 0x69, + FFA_RUN = 0x6d, + FFA_MSG_SEND_DIRECT_REQ = 0x6f, + FFA_MSG_SEND_DIRECT_RESP = 0x70, + + /* To be updated when adding new FFA IDs */ + FFA_FIRST_ID = FFA_ERROR, /* Lowest number ID */ + FFA_LAST_ID = FFA_MSG_SEND_DIRECT_RESP, /* Highest number ID */ +}; + +enum ffa_abi_errcode { + NOT_SUPPORTED = 1, + INVALID_PARAMETERS, + NO_MEMORY, + BUSY, + INTERRUPTED, + DENIED, + RETRY, + ABORTED, + MAX_NUMBER_FFA_ERR +}; + +extern int ffa_to_std_errmap[MAX_NUMBER_FFA_ERR]; + +/* Container structure and helper macros to map between an FF-A error and relevant error log */ +struct ffa_abi_errmap { + char *err_str[MAX_NUMBER_FFA_ERR]; +}; + +#define FFA_ERRMAP_COUNT (FFA_LAST_ID - FFA_FIRST_ID + 1) +#define FFA_ID_TO_ERRMAP_ID(ffa_id) ((ffa_id) - FFA_FIRST_ID) + +/** + * enum ffa_rxtx_buf_sizes - minimum sizes supported + * for the RX/TX buffers + */ +enum ffa_rxtx_buf_sizes { + RXTX_4K, + RXTX_64K, + RXTX_16K +}; + +/** + * struct ffa_rxtxpair - Hosts the RX/TX buffers virtual addresses + * @rxbuf: virtual address of the RX buffer + * @txbuf: virtual address of the TX buffer + * @rxtx_min_pages: RX/TX buffers minimum size in pages + * + * Hosts the virtual addresses of the mapped RX/TX buffers + * These addresses are used by the FF-A functions that use the RX/TX buffers + */ +struct ffa_rxtxpair { + void *rxbuf; /* Virtual address returned by memalign */ + void *txbuf; /* Virtual address returned by memalign */ + size_t rxtx_min_pages; /* Minimum number of pages in each of the RX/TX buffers */ +}; + +struct ffa_partition_desc; + +/** + * struct ffa_partitions - descriptors for all secure partitions + * @count: The number of partitions descriptors + * @descs The partitions descriptors table + * + * Contains the partitions descriptors table + */ +struct ffa_partitions { + u32 count; + struct ffa_partition_desc *descs; /* Virtual address */ +}; + +/** + * struct ffa_priv - the driver private data structure + * + * @fwk_version: FF-A framework version + * @emul: FF-A sandbox emulator + * @id: u-boot endpoint ID + * @partitions: The partitions descriptors structure + * @pair: The RX/TX buffers pair + * + * The device private data structure containing all the + * data read from secure world. + */ +struct ffa_priv { + u32 fwk_version; + struct udevice *emul; + u16 id; + struct ffa_partitions partitions; + struct ffa_rxtxpair pair; +}; + +/** + * ffa_get_version_hdlr() - FFA_VERSION handler function + * @dev: The FF-A bus device + * + * Implement FFA_VERSION FF-A function + * to get from the secure world the FF-A framework version + * FFA_VERSION is used to discover the FF-A framework. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int ffa_get_version_hdlr(struct udevice *dev); + +/** + * invoke_ffa_fn() - SMC wrapper + * @args: FF-A ABI arguments to be copied to Xn registers + * @res: FF-A ABI return data to be copied from Xn registers + * + * Calls low level SMC implementation. + * This function should be implemented by the user driver. + */ +void invoke_ffa_fn(ffa_value_t args, ffa_value_t *res); + +#endif diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 307ad6931ca..3c6af2e3d2f 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -4,6 +4,11 @@ * * (C) Copyright 2012 * Pavel Herrmann + * + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi */ #ifndef _DM_UCLASS_ID_H @@ -57,6 +62,7 @@ enum uclass_id { UCLASS_ETH, /* Ethernet device */ UCLASS_ETH_PHY, /* Ethernet PHY device */ UCLASS_EXTCON, /* External Connector Class */ + UCLASS_FFA, /* Arm Firmware Framework for Armv8-A */ UCLASS_FIRMWARE, /* Firmware */ UCLASS_FPGA, /* FPGA device */ UCLASS_FUZZING_ENGINE, /* Fuzzing engine */ From a09852d862bc203b80368ca671ff36e80bcb510f Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:41 +0100 Subject: [PATCH 015/148] arm_ffa: introduce sandbox FF-A support Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support Features of the sandbox FF-A support: - Introduce an FF-A emulator - Introduce an FF-A device driver for FF-A comms with emulated Secure World - Provides test methods allowing to read the status of the inspected ABIs The sandbox FF-A emulator supports only 64-bit direct messaging. Signed-off-by: Abdellatif El Khlifi Reviewed-by: Simon Glass Cc: Tom Rini Cc: Ilias Apalodimas Cc: Jens Wiklander Cc: Heinrich Schuchardt --- MAINTAINERS | 3 +- arch/sandbox/dts/sandbox.dtsi | 9 + arch/sandbox/dts/test.dts | 8 + arch/sandbox/include/asm/sandbox_arm_ffa.h | 72 ++ .../include/asm/sandbox_arm_ffa_priv.h | 121 +++ configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + doc/arch/arm64.ffa.rst | 19 +- doc/arch/sandbox/sandbox.rst | 1 + drivers/firmware/arm-ffa/Kconfig | 13 +- drivers/firmware/arm-ffa/Makefile | 10 +- drivers/firmware/arm-ffa/ffa-emul-uclass.c | 720 ++++++++++++++++++ .../firmware/arm-ffa/sandbox_arm_ffa_priv.h | 14 - drivers/firmware/arm-ffa/sandbox_ffa.c | 110 +++ include/dm/uclass-id.h | 1 + 15 files changed, 1081 insertions(+), 22 deletions(-) create mode 100644 arch/sandbox/include/asm/sandbox_arm_ffa.h create mode 100644 arch/sandbox/include/asm/sandbox_arm_ffa_priv.h create mode 100644 drivers/firmware/arm-ffa/ffa-emul-uclass.c delete mode 100644 drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h create mode 100644 drivers/firmware/arm-ffa/sandbox_ffa.c diff --git a/MAINTAINERS b/MAINTAINERS index fcca162dee2..9d59ac09516 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -269,10 +269,11 @@ F: configs/cortina_presidio-asic-pnand_defconfig ARM FF-A M: Abdellatif El Khlifi S: Maintained +F: arch/sandbox/include/asm/sandbox_arm_ffa.h +F: arch/sandbox/include/asm/sandbox_arm_ffa_priv.h F: doc/arch/arm64.ffa.rst F: drivers/firmware/arm-ffa/ F: include/arm_ffa.h -F: include/sandbox_arm_ffa.h ARM FREESCALE IMX M: Stefano Babic diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index f0ee0b3481a..8aaf911a41a 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -451,6 +451,15 @@ thermal { compatible = "sandbox,thermal"; }; + + arm-ffa-emul { + compatible = "sandbox,arm-ffa-emul"; + + sandbox-arm-ffa { + compatible = "sandbox,arm-ffa"; + }; + }; + }; &cros_ec { diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index b5509eee8cf..f351d5cb84b 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -1831,6 +1831,14 @@ extcon { compatible = "sandbox,extcon"; }; + + arm-ffa-emul { + compatible = "sandbox,arm-ffa-emul"; + + sandbox-arm-ffa { + compatible = "sandbox,arm-ffa"; + }; + }; }; #include "sandbox_pmic.dtsi" diff --git a/arch/sandbox/include/asm/sandbox_arm_ffa.h b/arch/sandbox/include/asm/sandbox_arm_ffa.h new file mode 100644 index 00000000000..be2790f4960 --- /dev/null +++ b/arch/sandbox/include/asm/sandbox_arm_ffa.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#ifndef __SANDBOX_ARM_FFA_H +#define __SANDBOX_ARM_FFA_H + +#include + +/* + * This header provides public sandbox FF-A emulator declarations + * and declarations needed by FF-A sandbox clients + */ + +/* UUIDs strings of the emulated services */ +#define SANDBOX_SERVICE1_UUID "ed32d533-4209-99e6-2d72-cdd998a79cc0" +#define SANDBOX_SERVICE2_UUID "ed32d544-4209-99e6-2d72-cdd998a79cc0" + +/* IDs of the emulated secure partitions (SPs) */ +#define SANDBOX_SP1_ID 0x1245 +#define SANDBOX_SP2_ID 0x9836 +#define SANDBOX_SP3_ID 0x6452 +#define SANDBOX_SP4_ID 0x7814 + +/* Invalid service UUID (no matching SP) */ +#define SANDBOX_SERVICE3_UUID "55d532ed-0942-e699-722d-c09ca798d9cd" + +/* Invalid service UUID (invalid UUID string format) */ +#define SANDBOX_SERVICE4_UUID "32ed-0942-e699-722d-c09ca798d9cd" + +/* Number of valid services */ +#define SANDBOX_SP_COUNT_PER_VALID_SERVICE 2 + +/** + * struct ffa_sandbox_data - query ABI state data structure + * @data0_size: size of the first argument + * @data0: pointer to the first argument + * @data1_size>: size of the second argument + * @data1: pointer to the second argument + * + * Used to pass various types of data with different sizes between + * the test cases and the sandbox emulator. + * The data is for querying FF-A ABIs state. + */ +struct ffa_sandbox_data { + u32 data0_size; /* size of the first argument */ + void *data0; /* pointer to the first argument */ + u32 data1_size; /* size of the second argument */ + void *data1; /* pointer to the second argument */ +}; + +/* The sandbox FF-A emulator public functions */ + +/** + * sandbox_query_ffa_emul_state() - Inspect the FF-A ABIs + * @queried_func_id: The FF-A function to be queried + * @func_data: Pointer to the FF-A function arguments container structure + * + * Query the status of FF-A ABI specified in the input argument. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int sandbox_query_ffa_emul_state(u32 queried_func_id, + struct ffa_sandbox_data *func_data); + +#endif diff --git a/arch/sandbox/include/asm/sandbox_arm_ffa_priv.h b/arch/sandbox/include/asm/sandbox_arm_ffa_priv.h new file mode 100644 index 00000000000..b0881822d78 --- /dev/null +++ b/arch/sandbox/include/asm/sandbox_arm_ffa_priv.h @@ -0,0 +1,121 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#ifndef __SANDBOX_ARM_FFA_PRV_H +#define __SANDBOX_ARM_FFA_PRV_H + +#include + +/* This header is exclusively used by the Sandbox FF-A driver and emulator */ + +/* Non-secure physical FF-A instance */ +#define NS_PHYS_ENDPOINT_ID (0) + +#define GET_NS_PHYS_ENDPOINT_ID_MASK GENMASK(31, 16) +#define GET_NS_PHYS_ENDPOINT_ID(x) \ + ((u16)(FIELD_GET(GET_NS_PHYS_ENDPOINT_ID_MASK, (x)))) + +/* Helper macro for reading the destination partition ID */ +#define GET_DST_SP_ID_MASK GENMASK(15, 0) +#define GET_DST_SP_ID(x) \ + ((u16)(FIELD_GET(GET_DST_SP_ID_MASK, (x)))) + +/* Helper macro for setting the source partition ID */ +#define PREP_SRC_SP_ID_MASK GENMASK(31, 16) +#define PREP_SRC_SP_ID(x) \ + (FIELD_PREP(PREP_SRC_SP_ID_MASK, (x))) + +/* Helper macro for setting the destination endpoint ID */ +#define PREP_NS_PHYS_ENDPOINT_ID_MASK GENMASK(15, 0) +#define PREP_NS_PHYS_ENDPOINT_ID(x) \ + (FIELD_PREP(PREP_NS_PHYS_ENDPOINT_ID_MASK, (x))) + +/* RX/TX buffers minimum size */ +#define RXTX_BUFFERS_MIN_SIZE (RXTX_4K) +#define RXTX_BUFFERS_MIN_PAGES (1) + +/* MBZ registers info */ + +/* x1-x7 MBZ */ +#define FFA_X1X7_MBZ_CNT (7) +#define FFA_X1X7_MBZ_REG_START (&res->a1) + +/* x4-x7 MBZ */ +#define FFA_X4X7_MBZ_CNT (4) +#define FFA_X4X7_MBZ_REG_START (&res->a4) + +/* x3-x7 MBZ */ +#define FFA_X3X7_MBZ_CNT (5) +#define FFA_X3_MBZ_REG_START (&res->a3) + +/* number of emulated FF-A secure partitions (SPs) */ +#define SANDBOX_PARTITIONS_CNT (4) + +/* Binary data of the emulated services UUIDs */ + +/* service 1 UUID binary data (little-endian format) */ +#define SANDBOX_SERVICE1_UUID_A1 0xed32d533 +#define SANDBOX_SERVICE1_UUID_A2 0x99e64209 +#define SANDBOX_SERVICE1_UUID_A3 0x9cc02d72 +#define SANDBOX_SERVICE1_UUID_A4 0xcdd998a7 + +/* service 2 UUID binary data (little-endian format) */ +#define SANDBOX_SERVICE2_UUID_A1 0xed32d544 +#define SANDBOX_SERVICE2_UUID_A2 0x99e64209 +#define SANDBOX_SERVICE2_UUID_A3 0x9cc02d72 +#define SANDBOX_SERVICE2_UUID_A4 0xcdd998a7 + +/** + * struct ffa_rxtxpair_info - structure hosting the RX/TX buffers flags + * @rxbuf_owned: RX buffer ownership flag (the owner is non secure world) + * @rxbuf_mapped: RX buffer mapping flag + * @txbuf_owned TX buffer ownership flag + * @txbuf_mapped: TX buffer mapping flag + * @rxtx_buf_size: RX/TX buffers size + * + * Hosts the ownership/mapping flags of the RX/TX buffers + * When a buffer is owned/mapped its corresponding flag is set to 1 otherwise 0. + */ +struct ffa_rxtxpair_info { + u8 rxbuf_owned; + u8 rxbuf_mapped; + u8 txbuf_owned; + u8 txbuf_mapped; + u32 rxtx_buf_size; +}; + +/** + * struct sandbox_ffa_emul - emulator data + * + * @fwk_version: FF-A framework version + * @id: u-boot endpoint ID + * @partitions: The partitions descriptors structure + * @pair: The RX/TX buffers pair + * @pair_info: The RX/TX buffers pair flags and size + * @test_ffa_data: The data of the FF-A bus under test + * + * Hosts all the emulated secure world data. + */ +struct sandbox_ffa_emul { + u32 fwk_version; + u16 id; + struct ffa_partitions partitions; + struct ffa_rxtxpair pair; + struct ffa_rxtxpair_info pair_info; +}; + +/** + * ffa_emul_find() - Finds the FF-A emulator + * @dev: the sandbox FF-A device (sandbox-arm-ffa) + * @emulp: the FF-A emulator device (sandbox-ffa-emul) + * Return: + * 0 on success. Otherwise, failure + */ +int ffa_emul_find(struct udevice *dev, struct udevice **emulp); + +#endif diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index bf3ef0c4007..69e5efe8748 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -260,3 +260,4 @@ CONFIG_FWU_MULTI_BANK_UPDATE=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y +CONFIG_ARM_FFA_TRANSPORT=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index ea2b2566aa1..1cd1c2ed7cd 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -345,3 +345,4 @@ CONFIG_TEST_FDTDEC=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y +CONFIG_ARM_FFA_TRANSPORT=y diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst index df189487741..792898321a9 100644 --- a/doc/arch/arm64.ffa.rst +++ b/doc/arch/arm64.ffa.rst @@ -33,6 +33,10 @@ The U-Boot FF-A support provides the following parts: - A Uclass driver providing generic FF-A methods. - An Arm FF-A device driver providing Arm-specific methods and reusing the Uclass methods. +- A sandbox emulator for Arm FF-A, emulates the FF-A side of the Secure World and provides + FF-A ABIs inspection methods. +- An FF-A sandbox device driver for FF-A communication with the emulated Secure World. + The driver leverages the FF-A Uclass to establish FF-A communication. FF-A and SMC specifications ------------------------------------------- @@ -62,6 +66,7 @@ CONFIG_ARM_FFA_TRANSPORT Enables the FF-A support. Turn this on if you want to use FF-A communication. When using an Arm 64-bit platform, the Arm FF-A driver will be used. + When using sandbox, the sandbox FF-A emulator and FF-A sandbox driver will be used. FF-A ABIs under the hood --------------------------------------- @@ -98,10 +103,8 @@ architecture features including FF-A bus. Class Index Probed Driver Name ----------------------------------------------------------- - ... firmware 0 [ + ] psci |-- psci ffa 0 [ ] arm_ffa | `-- arm_ffa - ... The PSCI driver is bound to the PSCI device and when probed it tries to discover the architecture features by calling a callback the features drivers provide. @@ -203,6 +206,18 @@ The following features are provided: - FF-A bus can be compiled and used without EFI +Relationship between the sandbox emulator and the FF-A device +--------------------------------------------------------------- + +:: + + => dm tree + + Class Index Probed Driver Name + ----------------------------------------------------------- + ffa_emul 0 [ + ] sandbox_ffa_emul `-- arm-ffa-emul + ffa 0 [ ] sandbox_arm_ffa `-- sandbox-arm-ffa + Example of boot logs with FF-A enabled -------------------------------------- diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst index 77ca6bc4cc7..a3631de7493 100644 --- a/doc/arch/sandbox/sandbox.rst +++ b/doc/arch/sandbox/sandbox.rst @@ -200,6 +200,7 @@ Supported Drivers U-Boot sandbox supports these emulations: +- Arm FF-A - Block devices - Chrome OS EC - GPIO diff --git a/drivers/firmware/arm-ffa/Kconfig b/drivers/firmware/arm-ffa/Kconfig index 9200c8028b8..fc668c109d6 100644 --- a/drivers/firmware/arm-ffa/Kconfig +++ b/drivers/firmware/arm-ffa/Kconfig @@ -2,9 +2,9 @@ config ARM_FFA_TRANSPORT bool "Enable Arm Firmware Framework for Armv8-A driver" - depends on DM && ARM64 - select ARM_SMCCC - select ARM_SMCCC_FEATURES + depends on DM && (ARM64 || SANDBOX) + select ARM_SMCCC if !SANDBOX + select ARM_SMCCC_FEATURES if !SANDBOX select LIB_UUID select DEVRES help @@ -32,5 +32,10 @@ config ARM_FFA_TRANSPORT Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c). Arm specific methods are implemented in the Arm driver (arm-ffa.c). - For more details about the FF-A support, please refer to doc/arch/arm64.ffa.rst + FF-A sandbox is provided to run FF-A under sandbox and allows to test the FF-A Uclass. + Sandbox support includes an emulator for Arm FF-A which emulates the FF-A side of + the Secure World and provides FF-A ABIs inspection methods (ffa-emul-uclass.c). + An FF-A sandbox driver is also provided for FF-A communication with the emulated + Secure World (sandbox_ffa.c). + For more details about the FF-A support, please refer to doc/arch/arm64.ffa.rst diff --git a/drivers/firmware/arm-ffa/Makefile b/drivers/firmware/arm-ffa/Makefile index 11b17662853..318123a7f42 100644 --- a/drivers/firmware/arm-ffa/Makefile +++ b/drivers/firmware/arm-ffa/Makefile @@ -5,4 +5,12 @@ # Authors: # Abdellatif El Khlifi -obj-y += arm-ffa-uclass.o arm-ffa.o +# build the generic FF-A methods +obj-y += arm-ffa-uclass.o +ifeq ($(CONFIG_SANDBOX),y) +# build the FF-A sandbox emulator and driver +obj-y += ffa-emul-uclass.o sandbox_ffa.o +else +# build the Arm64 FF-A driver +obj-y += arm-ffa.o +endif diff --git a/drivers/firmware/arm-ffa/ffa-emul-uclass.c b/drivers/firmware/arm-ffa/ffa-emul-uclass.c new file mode 100644 index 00000000000..5562bbaac3a --- /dev/null +++ b/drivers/firmware/arm-ffa/ffa-emul-uclass.c @@ -0,0 +1,720 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* The partitions (SPs) table */ +static struct ffa_partition_desc sandbox_partitions[SANDBOX_PARTITIONS_CNT] = { + { + .info = { .id = SANDBOX_SP1_ID, .exec_ctxt = 0x5687, .properties = 0x89325621 }, + .sp_uuid = { + .a1 = SANDBOX_SERVICE1_UUID_A1, + .a2 = SANDBOX_SERVICE1_UUID_A2, + .a3 = SANDBOX_SERVICE1_UUID_A3, + .a4 = SANDBOX_SERVICE1_UUID_A4, + } + }, + { + .info = { .id = SANDBOX_SP3_ID, .exec_ctxt = 0x7687, .properties = 0x23325621 }, + .sp_uuid = { + .a1 = SANDBOX_SERVICE2_UUID_A1, + .a2 = SANDBOX_SERVICE2_UUID_A2, + .a3 = SANDBOX_SERVICE2_UUID_A3, + .a4 = SANDBOX_SERVICE2_UUID_A4, + } + }, + { + .info = { .id = SANDBOX_SP2_ID, .exec_ctxt = 0x9587, .properties = 0x45325621 }, + .sp_uuid = { + .a1 = SANDBOX_SERVICE1_UUID_A1, + .a2 = SANDBOX_SERVICE1_UUID_A2, + .a3 = SANDBOX_SERVICE1_UUID_A3, + .a4 = SANDBOX_SERVICE1_UUID_A4, + } + }, + { + .info = { .id = SANDBOX_SP4_ID, .exec_ctxt = 0x1487, .properties = 0x70325621 }, + .sp_uuid = { + .a1 = SANDBOX_SERVICE2_UUID_A1, + .a2 = SANDBOX_SERVICE2_UUID_A2, + .a3 = SANDBOX_SERVICE2_UUID_A3, + .a4 = SANDBOX_SERVICE2_UUID_A4, + } + } + +}; + +/* The emulator functions */ + +/** + * sandbox_ffa_version() - Emulated FFA_VERSION handler function + * @emul: The sandbox FF-A emulator device + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_VERSION FF-A function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ + +static int sandbox_ffa_version(struct udevice *emul, ffa_value_t *pargs, ffa_value_t *res) +{ + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + priv->fwk_version = FFA_VERSION_1_0; + res->a0 = priv->fwk_version; + + /* x1-x7 MBZ */ + memset(FFA_X1X7_MBZ_REG_START, 0, FFA_X1X7_MBZ_CNT * sizeof(ulong)); + + return 0; +} + +/** + * sandbox_ffa_id_get() - Emulated FFA_ID_GET handler function + * @emul: The sandbox FF-A emulator device + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_ID_GET FF-A function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_id_get(struct udevice *emul, ffa_value_t *pargs, ffa_value_t *res) +{ + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + res->a0 = FFA_SMC_32(FFA_SUCCESS); + res->a1 = 0; + + priv->id = NS_PHYS_ENDPOINT_ID; + res->a2 = priv->id; + + /* x3-x7 MBZ */ + memset(FFA_X3_MBZ_REG_START, 0, FFA_X3X7_MBZ_CNT * sizeof(ulong)); + + return 0; +} + +/** + * sandbox_ffa_features() - Emulated FFA_FEATURES handler function + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_FEATURES FF-A function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_features(ffa_value_t *pargs, ffa_value_t *res) +{ + res->a1 = 0; + + if (pargs->a1 == FFA_SMC_64(FFA_RXTX_MAP)) { + res->a0 = FFA_SMC_32(FFA_SUCCESS); + res->a2 = RXTX_BUFFERS_MIN_SIZE; + res->a3 = 0; + /* x4-x7 MBZ */ + memset(FFA_X4X7_MBZ_REG_START, 0, FFA_X4X7_MBZ_CNT * sizeof(ulong)); + return 0; + } + + res->a0 = FFA_SMC_32(FFA_ERROR); + res->a2 = -NOT_SUPPORTED; + /* x3-x7 MBZ */ + memset(FFA_X3_MBZ_REG_START, 0, FFA_X3X7_MBZ_CNT * sizeof(ulong)); + log_err("FF-A interface %lx not implemented\n", pargs->a1); + + return ffa_to_std_errmap[NOT_SUPPORTED]; +} + +/** + * sandbox_ffa_partition_info_get() - Emulated FFA_PARTITION_INFO_GET handler + * @emul: The sandbox FF-A emulator device + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_PARTITION_INFO_GET FF-A function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_partition_info_get(struct udevice *emul, ffa_value_t *pargs, + ffa_value_t *res) +{ + struct ffa_partition_info *rxbuf_desc_info = NULL; + u32 descs_cnt; + u32 descs_size_bytes; + int ret; + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + res->a0 = FFA_SMC_32(FFA_ERROR); + + if (!priv->pair.rxbuf) { + res->a2 = -DENIED; + ret = ffa_to_std_errmap[DENIED]; + goto cleanup; + } + + if (priv->pair_info.rxbuf_owned) { + res->a2 = -BUSY; + ret = ffa_to_std_errmap[BUSY]; + goto cleanup; + } + + if (!priv->partitions.descs) { + priv->partitions.descs = sandbox_partitions; + priv->partitions.count = SANDBOX_PARTITIONS_CNT; + } + + descs_size_bytes = SANDBOX_PARTITIONS_CNT * + sizeof(struct ffa_partition_desc); + + /* Abort if the RX buffer size is smaller than the descs buffer size */ + if ((priv->pair_info.rxtx_buf_size * SZ_4K) < descs_size_bytes) { + res->a2 = -NO_MEMORY; + ret = ffa_to_std_errmap[NO_MEMORY]; + goto cleanup; + } + + rxbuf_desc_info = priv->pair.rxbuf; + + /* No UUID specified. Return the information of all partitions */ + if (!pargs->a1 && !pargs->a2 && !pargs->a3 && !pargs->a4) { + for (descs_cnt = 0; descs_cnt < SANDBOX_PARTITIONS_CNT; descs_cnt++) + *(rxbuf_desc_info++) = priv->partitions.descs[descs_cnt].info; + + res->a0 = FFA_SMC_32(FFA_SUCCESS); + res->a2 = SANDBOX_PARTITIONS_CNT; + /* Transfer ownership to the consumer: the non secure world */ + priv->pair_info.rxbuf_owned = 1; + ret = 0; + + goto cleanup; + } + + /* A UUID specified. Return the info of all SPs matching the UUID */ + + for (descs_cnt = 0 ; descs_cnt < SANDBOX_PARTITIONS_CNT ; descs_cnt++) + if (pargs->a1 == priv->partitions.descs[descs_cnt].sp_uuid.a1 && + pargs->a2 == priv->partitions.descs[descs_cnt].sp_uuid.a2 && + pargs->a3 == priv->partitions.descs[descs_cnt].sp_uuid.a3 && + pargs->a4 == priv->partitions.descs[descs_cnt].sp_uuid.a4) { + *(rxbuf_desc_info++) = priv->partitions.descs[descs_cnt].info; + } + + if (rxbuf_desc_info != priv->pair.rxbuf) { + res->a0 = FFA_SMC_32(FFA_SUCCESS); + /* Store the partitions count */ + res->a2 = (ulong) + (rxbuf_desc_info - (struct ffa_partition_info *) + priv->pair.rxbuf); + ret = 0; + + /* Transfer ownership to the consumer: the non secure world */ + priv->pair_info.rxbuf_owned = 1; + } else { + /* Unrecognized UUID */ + res->a2 = -INVALID_PARAMETERS; + ret = ffa_to_std_errmap[INVALID_PARAMETERS]; + } + +cleanup: + + log_err("FFA_PARTITION_INFO_GET (%ld)\n", res->a2); + + res->a1 = 0; + + /* x3-x7 MBZ */ + memset(FFA_X3_MBZ_REG_START, 0, FFA_X3X7_MBZ_CNT * sizeof(ulong)); + + return ret; +} + +/** + * sandbox_ffa_rxtx_map() - Emulated FFA_RXTX_MAP handler + * @emul: The sandbox FF-A emulator device + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_RXTX_MAP FF-A function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_rxtx_map(struct udevice *emul, ffa_value_t *pargs, ffa_value_t *res) +{ + int ret; + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + res->a0 = FFA_SMC_32(FFA_ERROR); + + if (priv->pair.txbuf && priv->pair.rxbuf) { + res->a2 = -DENIED; + ret = ffa_to_std_errmap[DENIED]; + goto feedback; + } + + if (pargs->a3 >= RXTX_BUFFERS_MIN_PAGES && pargs->a1 && pargs->a2) { + priv->pair.txbuf = map_sysmem(pargs->a1, 0); + priv->pair.rxbuf = map_sysmem(pargs->a2, 0); + priv->pair_info.rxtx_buf_size = pargs->a3; + priv->pair_info.rxbuf_mapped = 1; + res->a0 = FFA_SMC_32(FFA_SUCCESS); + res->a2 = 0; + ret = 0; + goto feedback; + } + + if (!pargs->a1 || !pargs->a2) { + res->a2 = -INVALID_PARAMETERS; + ret = ffa_to_std_errmap[INVALID_PARAMETERS]; + } else { + res->a2 = -NO_MEMORY; + ret = ffa_to_std_errmap[NO_MEMORY]; + } + + log_err("Error in FFA_RXTX_MAP arguments (%d)\n", + (int)res->a2); + +feedback: + + res->a1 = 0; + + /* x3-x7 MBZ */ + memset(FFA_X3_MBZ_REG_START, 0, FFA_X3X7_MBZ_CNT * sizeof(ulong)); + + return ret; +} + +/** + * sandbox_ffa_rxtx_unmap() - Emulated FFA_RXTX_UNMAP handler + * @emul: The sandbox FF-A emulator device + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_RXTX_UNMAP FF-A function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_rxtx_unmap(struct udevice *emul, ffa_value_t *pargs, ffa_value_t *res) +{ + int ret; + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + res->a0 = FFA_SMC_32(FFA_ERROR); + res->a2 = -INVALID_PARAMETERS; + ret = ffa_to_std_errmap[INVALID_PARAMETERS]; + + if (GET_NS_PHYS_ENDPOINT_ID(pargs->a1) != priv->id) + goto feedback; + + if (priv->pair.txbuf && priv->pair.rxbuf) { + priv->pair.txbuf = 0; + priv->pair.rxbuf = 0; + priv->pair_info.rxtx_buf_size = 0; + priv->pair_info.rxbuf_mapped = 0; + res->a0 = FFA_SMC_32(FFA_SUCCESS); + res->a2 = 0; + ret = 0; + goto feedback; + } + + log_err("No buffer pair registered on behalf of the caller\n"); + +feedback: + + res->a1 = 0; + + /* x3-x7 MBZ */ + memset(FFA_X3_MBZ_REG_START, 0, FFA_X3X7_MBZ_CNT * sizeof(ulong)); + + return ret; +} + +/** + * sandbox_ffa_rx_release() - Emulated FFA_RX_RELEASE handler + * @emul: The sandbox FF-A emulator device + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_RX_RELEASE FF-A function. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_rx_release(struct udevice *emul, ffa_value_t *pargs, ffa_value_t *res) +{ + int ret; + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + if (!priv->pair_info.rxbuf_owned) { + res->a0 = FFA_SMC_32(FFA_ERROR); + res->a2 = -DENIED; + ret = ffa_to_std_errmap[DENIED]; + } else { + priv->pair_info.rxbuf_owned = 0; + res->a0 = FFA_SMC_32(FFA_SUCCESS); + res->a2 = 0; + ret = 0; + } + + res->a1 = 0; + + /* x3-x7 MBZ */ + memset(FFA_X3_MBZ_REG_START, 0, FFA_X3X7_MBZ_CNT * sizeof(ulong)); + + return ret; +} + +/** + * sandbox_ffa_sp_valid() - Check SP validity + * @emul: The sandbox FF-A emulator device + * @part_id: partition ID to check + * + * Search the input ID in the descriptors table. + * + * Return: + * + * 1 on success (Partition found). Otherwise, failure + */ +static int sandbox_ffa_sp_valid(struct udevice *emul, u16 part_id) +{ + u32 descs_cnt; + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + for (descs_cnt = 0 ; descs_cnt < SANDBOX_PARTITIONS_CNT ; descs_cnt++) + if (priv->partitions.descs[descs_cnt].info.id == part_id) + return 1; + + return 0; +} + +/** + * sandbox_ffa_msg_send_direct_req() - Emulated FFA_MSG_SEND_DIRECT_{REQ,RESP} handler + * @emul: The sandbox FF-A emulator device + * @pargs: The SMC call input arguments a0-a7 + * @res: The SMC return data + * + * Emulate FFA_MSG_SEND_DIRECT_{REQ,RESP} FF-A ABIs. + * Only SMC 64-bit is supported in Sandbox. + * + * Emulating interrupts is not supported. So, FFA_RUN and FFA_INTERRUPT are not + * supported. In case of success FFA_MSG_SEND_DIRECT_RESP is returned with + * default pattern data (0xff). + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_msg_send_direct_req(struct udevice *emul, + ffa_value_t *pargs, ffa_value_t *res) +{ + u16 part_id; + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + part_id = GET_DST_SP_ID(pargs->a1); + + if (GET_NS_PHYS_ENDPOINT_ID(pargs->a1) != priv->id || + !sandbox_ffa_sp_valid(emul, part_id) || pargs->a2) { + res->a0 = FFA_SMC_32(FFA_ERROR); + res->a1 = 0; + res->a2 = -INVALID_PARAMETERS; + + /* x3-x7 MBZ */ + memset(FFA_X3_MBZ_REG_START, 0, FFA_X3X7_MBZ_CNT * sizeof(ulong)); + + return ffa_to_std_errmap[INVALID_PARAMETERS]; + } + + res->a0 = FFA_SMC_64(FFA_MSG_SEND_DIRECT_RESP); + + res->a1 = PREP_SRC_SP_ID(part_id) | + PREP_NS_PHYS_ENDPOINT_ID(priv->id); + + res->a2 = 0; + + /* Return 0xff bytes as a response */ + res->a3 = -1UL; + res->a4 = -1UL; + res->a5 = -1UL; + res->a6 = -1UL; + res->a7 = -1UL; + + return 0; +} + +/** + * sandbox_ffa_get_rxbuf_flags() - Read the mapping/ownership flags + * @emul: The sandbox FF-A emulator device + * @queried_func_id: The FF-A function to be queried + * @func_data: Pointer to the FF-A function arguments container structure + * + * Query the status flags of the following emulated + * ABIs: FFA_RXTX_MAP, FFA_RXTX_UNMAP, FFA_RX_RELEASE. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_get_rxbuf_flags(struct udevice *emul, u32 queried_func_id, + struct ffa_sandbox_data *func_data) +{ + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + if (!func_data) + return -EINVAL; + + if (!func_data->data0 || func_data->data0_size != sizeof(u8)) + return -EINVAL; + + switch (queried_func_id) { + case FFA_RXTX_MAP: + case FFA_RXTX_UNMAP: + *((u8 *)func_data->data0) = priv->pair_info.rxbuf_mapped; + return 0; + case FFA_RX_RELEASE: + *((u8 *)func_data->data0) = priv->pair_info.rxbuf_owned; + return 0; + default: + log_err("The querried FF-A interface flag (%d) undefined\n", + queried_func_id); + return -EINVAL; + } +} + +/** + * sandbox_ffa_get_fwk_version() - Return the FFA framework version + * @emul: The sandbox FF-A emulator device + * @func_data: Pointer to the FF-A function arguments container structure + * + * Return the FFA framework version read from the FF-A emulator data. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_get_fwk_version(struct udevice *emul, struct ffa_sandbox_data *func_data) +{ + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + if (!func_data) + return -EINVAL; + + if (!func_data->data0 || + func_data->data0_size != sizeof(priv->fwk_version)) + return -EINVAL; + + *((u32 *)func_data->data0) = priv->fwk_version; + + return 0; +} + +/** + * sandbox_ffa_get_parts() - Return the address of partitions data + * @emul: The sandbox FF-A emulator device + * @func_data: Pointer to the FF-A function arguments container structure + * + * Return the address of partitions data read from the FF-A emulator data. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_get_parts(struct udevice *emul, struct ffa_sandbox_data *func_data) +{ + struct sandbox_ffa_emul *priv = dev_get_priv(emul); + + if (!func_data) + return -EINVAL; + + if (!func_data->data0 || + func_data->data0_size != sizeof(struct ffa_partitions *)) + return -EINVAL; + + *((struct ffa_partitions **)func_data->data0) = &priv->partitions; + + return 0; +} + +/** + * sandbox_query_ffa_emul_state() - Inspect the FF-A ABIs + * @queried_func_id: The FF-A function to be queried + * @func_data: Pointer to the FF-A function arguments container structure + * + * Query the status of FF-A ABI specified in the input argument. + * + * Return: + * + * 0 on success. Otherwise, failure + */ +int sandbox_query_ffa_emul_state(u32 queried_func_id, + struct ffa_sandbox_data *func_data) +{ + struct udevice *emul; + int ret; + + ret = uclass_first_device_err(UCLASS_FFA_EMUL, &emul); + if (ret) { + log_err("Cannot find FF-A emulator during querying state\n"); + return ret; + } + + switch (queried_func_id) { + case FFA_RXTX_MAP: + case FFA_RXTX_UNMAP: + case FFA_RX_RELEASE: + return sandbox_ffa_get_rxbuf_flags(emul, queried_func_id, func_data); + case FFA_VERSION: + return sandbox_ffa_get_fwk_version(emul, func_data); + case FFA_PARTITION_INFO_GET: + return sandbox_ffa_get_parts(emul, func_data); + default: + log_err("Undefined FF-A interface (%d)\n", + queried_func_id); + return -EINVAL; + } +} + +/** + * sandbox_arm_ffa_smccc_smc() - FF-A SMC call emulation + * @args: the SMC call arguments + * @res: the SMC call returned data + * + * Emulate the FF-A ABIs SMC call. + * The emulated FF-A ABI is identified and invoked. + * FF-A emulation is based on the FF-A specification 1.0 + * + * Return: + * + * 0 on success. Otherwise, failure. + * FF-A protocol error codes are returned using the registers arguments as + * described by the specification + */ +void sandbox_arm_ffa_smccc_smc(ffa_value_t *args, ffa_value_t *res) +{ + int ret = 0; + struct udevice *emul; + + ret = uclass_first_device_err(UCLASS_FFA_EMUL, &emul); + if (ret) { + log_err("Cannot find FF-A emulator during SMC emulation\n"); + return; + } + + switch (args->a0) { + case FFA_SMC_32(FFA_VERSION): + ret = sandbox_ffa_version(emul, args, res); + break; + case FFA_SMC_32(FFA_PARTITION_INFO_GET): + ret = sandbox_ffa_partition_info_get(emul, args, res); + break; + case FFA_SMC_32(FFA_RXTX_UNMAP): + ret = sandbox_ffa_rxtx_unmap(emul, args, res); + break; + case FFA_SMC_64(FFA_MSG_SEND_DIRECT_REQ): + ret = sandbox_ffa_msg_send_direct_req(emul, args, res); + break; + case FFA_SMC_32(FFA_ID_GET): + ret = sandbox_ffa_id_get(emul, args, res); + break; + case FFA_SMC_32(FFA_FEATURES): + ret = sandbox_ffa_features(args, res); + break; + case FFA_SMC_64(FFA_RXTX_MAP): + ret = sandbox_ffa_rxtx_map(emul, args, res); + break; + case FFA_SMC_32(FFA_RX_RELEASE): + ret = sandbox_ffa_rx_release(emul, args, res); + break; + default: + log_err("Undefined FF-A interface (%lx)\n", + args->a0); + } + + if (ret != 0) + log_err("FF-A ABI internal failure (%d)\n", ret); +} + +/** + * invoke_ffa_fn() - SMC wrapper + * @args: FF-A ABI arguments to be copied to Xn registers + * @res: FF-A ABI return data to be copied from Xn registers + * + * Calls the emulated SMC call. + */ +void invoke_ffa_fn(ffa_value_t args, ffa_value_t *res) +{ + sandbox_arm_ffa_smccc_smc(&args, res); +} + +/** + * ffa_emul_find() - Find the FF-A emulator + * @dev: the sandbox FF-A device (sandbox-arm-ffa) + * @emulp: the FF-A emulator device (sandbox-ffa-emul) + * + * Search for the FF-A emulator and returns its device pointer. + * + * Return: + * 0 on success. Otherwise, failure + */ +int ffa_emul_find(struct udevice *dev, struct udevice **emulp) +{ + int ret; + + ret = uclass_first_device_err(UCLASS_FFA_EMUL, emulp); + if (ret) { + log_err("Cannot find FF-A emulator\n"); + return ret; + } + + log_info("FF-A emulator ready to use\n"); + + return 0; +} + +UCLASS_DRIVER(ffa_emul) = { + .name = "ffa_emul", + .id = UCLASS_FFA_EMUL, + .post_bind = dm_scan_fdt_dev, +}; + +static const struct udevice_id sandbox_ffa_emul_ids[] = { + { .compatible = "sandbox,arm-ffa-emul" }, + { } +}; + +/* Declaring the sandbox FF-A emulator under UCLASS_FFA_EMUL */ +U_BOOT_DRIVER(sandbox_ffa_emul) = { + .name = "sandbox_ffa_emul", + .id = UCLASS_FFA_EMUL, + .of_match = sandbox_ffa_emul_ids, + .priv_auto = sizeof(struct sandbox_ffa_emul), +}; diff --git a/drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h b/drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h deleted file mode 100644 index 4338f9c9b17..00000000000 --- a/drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2022-2023 Arm Limited and/or its affiliates - * - * Authors: - * Abdellatif El Khlifi - */ - -#ifndef __SANDBOX_ARM_FFA_PRV_H -#define __SANDBOX_ARM_FFA_PRV_H - -/* Future sandbox support private declarations */ - -#endif diff --git a/drivers/firmware/arm-ffa/sandbox_ffa.c b/drivers/firmware/arm-ffa/sandbox_ffa.c new file mode 100644 index 00000000000..ef9491ccead --- /dev/null +++ b/drivers/firmware/arm-ffa/sandbox_ffa.c @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/** + * sandbox_ffa_discover() - perform sandbox FF-A discovery + * @dev: The sandbox FF-A bus device + * Try to discover the FF-A framework. Discovery is performed by + * querying the FF-A framework version from secure world using the FFA_VERSION ABI. + * Return: + * + * 0 on success. Otherwise, failure + */ +static int sandbox_ffa_discover(struct udevice *dev) +{ + int ret; + struct udevice *emul; + + log_info("Emulated FF-A framework discovery\n"); + + ret = ffa_emul_find(dev, &emul); + if (ret) { + log_err("Cannot find FF-A emulator\n"); + return ret; + } + + ret = ffa_get_version_hdlr(dev); + if (ret) + return ret; + + return 0; +} + +/** + * sandbox_ffa_probe() - The sandbox FF-A driver probe function + * @dev: the sandbox-arm-ffa device + * Save the emulator device in uc_priv. + * Return: + * + * 0 on success. + */ +static int sandbox_ffa_probe(struct udevice *dev) +{ + int ret; + struct ffa_priv *uc_priv = dev_get_uclass_priv(dev); + + ret = uclass_first_device_err(UCLASS_FFA_EMUL, &uc_priv->emul); + if (ret) { + log_err("Cannot find FF-A emulator\n"); + return ret; + } + + return 0; +} + +/** + * sandbox_ffa_bind() - The sandbox FF-A driver bind function + * @dev: the sandbox-arm-ffa device + * Try to discover the emulated FF-A bus. + * Return: + * + * 0 on success. + */ +static int sandbox_ffa_bind(struct udevice *dev) +{ + int ret; + + ret = sandbox_ffa_discover(dev); + if (ret) + return ret; + + return 0; +} + +/* Sandbox Arm FF-A emulator operations */ + +static const struct ffa_bus_ops sandbox_ffa_ops = { + .partition_info_get = ffa_get_partitions_info_hdlr, + .sync_send_receive = ffa_msg_send_direct_req_hdlr, + .rxtx_unmap = ffa_unmap_rxtx_buffers_hdlr, +}; + +static const struct udevice_id sandbox_ffa_id[] = { + { "sandbox,arm-ffa", 0 }, + { }, +}; + +/* Declaring the sandbox FF-A driver under UCLASS_FFA */ +U_BOOT_DRIVER(sandbox_arm_ffa) = { + .name = "sandbox_arm_ffa", + .of_match = sandbox_ffa_id, + .id = UCLASS_FFA, + .bind = sandbox_ffa_bind, + .probe = sandbox_ffa_probe, + .ops = &sandbox_ffa_ops, +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 3c6af2e3d2f..0432c95c9ed 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -63,6 +63,7 @@ enum uclass_id { UCLASS_ETH_PHY, /* Ethernet PHY device */ UCLASS_EXTCON, /* External Connector Class */ UCLASS_FFA, /* Arm Firmware Framework for Armv8-A */ + UCLASS_FFA_EMUL, /* sandbox FF-A device emulator */ UCLASS_FIRMWARE, /* Firmware */ UCLASS_FPGA, /* FPGA device */ UCLASS_FUZZING_ENGINE, /* Fuzzing engine */ From a2f5c91cda9215d9abf042fc778b7a471994cf6b Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:42 +0100 Subject: [PATCH 016/148] arm_ffa: introduce sandbox test cases for UCLASS_FFA Add functional test cases for the FF-A support These tests rely on the FF-A sandbox emulator and FF-A sandbox driver which help in inspecting the FF-A communication. Signed-off-by: Abdellatif El Khlifi Reviewed-by: Simon Glass Cc: Tom Rini Cc: Ilias Apalodimas Cc: Jens Wiklander Cc: Heinrich Schuchardt --- MAINTAINERS | 1 + doc/arch/arm64.ffa.rst | 1 + test/dm/Makefile | 3 +- test/dm/ffa.c | 261 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 265 insertions(+), 1 deletion(-) create mode 100644 test/dm/ffa.c diff --git a/MAINTAINERS b/MAINTAINERS index 9d59ac09516..5a2a5467878 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -274,6 +274,7 @@ F: arch/sandbox/include/asm/sandbox_arm_ffa_priv.h F: doc/arch/arm64.ffa.rst F: drivers/firmware/arm-ffa/ F: include/arm_ffa.h +F: test/dm/ffa.c ARM FREESCALE IMX M: Stefano Babic diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst index 792898321a9..71606373f94 100644 --- a/doc/arch/arm64.ffa.rst +++ b/doc/arch/arm64.ffa.rst @@ -37,6 +37,7 @@ The U-Boot FF-A support provides the following parts: FF-A ABIs inspection methods. - An FF-A sandbox device driver for FF-A communication with the emulated Secure World. The driver leverages the FF-A Uclass to establish FF-A communication. +- Sandbox FF-A test cases. FF-A and SMC specifications ------------------------------------------- diff --git a/test/dm/Makefile b/test/dm/Makefile index 3799b1ae8fd..7ed00733c1a 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # # Copyright (c) 2013 Google, Inc -# Copyright 2023 Arm Limited and/or its affiliates +# Copyright 2022-2023 Arm Limited and/or its affiliates obj-$(CONFIG_UT_DM) += test-dm.o @@ -92,6 +92,7 @@ obj-$(CONFIG_POWER_DOMAIN) += power-domain.o obj-$(CONFIG_ACPI_PMC) += pmc.o obj-$(CONFIG_DM_PMIC) += pmic.o obj-$(CONFIG_DM_PWM) += pwm.o +obj-$(CONFIG_ARM_FFA_TRANSPORT) += ffa.o obj-$(CONFIG_QFW) += qfw.o obj-$(CONFIG_RAM) += ram.o obj-y += regmap.o diff --git a/test/dm/ffa.c b/test/dm/ffa.c new file mode 100644 index 00000000000..6912666bb46 --- /dev/null +++ b/test/dm/ffa.c @@ -0,0 +1,261 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Functional tests for UCLASS_FFA class + * + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Functional tests for the UCLASS_FFA */ + +static int check_fwk_version(struct ffa_priv *uc_priv, struct unit_test_state *uts) +{ + struct ffa_sandbox_data func_data; + u32 fwk_version = 0; + + func_data.data0 = &fwk_version; + func_data.data0_size = sizeof(fwk_version); + ut_assertok(sandbox_query_ffa_emul_state(FFA_VERSION, &func_data)); + ut_asserteq(uc_priv->fwk_version, fwk_version); + + return 0; +} + +static int check_endpoint_id(struct ffa_priv *uc_priv, struct unit_test_state *uts) +{ + ut_asserteq(0, uc_priv->id); + + return 0; +} + +static int check_rxtxbuf(struct ffa_priv *uc_priv, struct unit_test_state *uts) +{ + ut_assertnonnull(uc_priv->pair.rxbuf); + ut_assertnonnull(uc_priv->pair.txbuf); + + return 0; +} + +static int check_features(struct ffa_priv *uc_priv, struct unit_test_state *uts) +{ + ut_assert(uc_priv->pair.rxtx_min_pages == RXTX_4K || + uc_priv->pair.rxtx_min_pages == RXTX_16K || + uc_priv->pair.rxtx_min_pages == RXTX_64K); + + return 0; +} + +static int check_rxbuf_mapped_flag(u32 queried_func_id, + u8 rxbuf_mapped, + struct unit_test_state *uts) +{ + switch (queried_func_id) { + case FFA_RXTX_MAP: + ut_asserteq(1, rxbuf_mapped); + break; + case FFA_RXTX_UNMAP: + ut_asserteq(0, rxbuf_mapped); + break; + default: + ut_assert(false); + } + + return 0; +} + +static int check_rxbuf_release_flag(u8 rxbuf_owned, struct unit_test_state *uts) +{ + ut_asserteq(0, rxbuf_owned); + + return 0; +} + +static int test_ffa_msg_send_direct_req(u16 part_id, struct unit_test_state *uts) +{ + struct ffa_send_direct_data msg; + u8 cnt; + struct udevice *dev; + + ut_assertok(uclass_first_device_err(UCLASS_FFA, &dev)); + + ut_assertok(ffa_sync_send_receive(dev, part_id, &msg, 1)); + + for (cnt = 0; cnt < sizeof(struct ffa_send_direct_data) / sizeof(u64); cnt++) + ut_asserteq_64(-1UL, ((u64 *)&msg)[cnt]); + + return 0; +} + +static int test_partitions_and_comms(const char *service_uuid, + struct unit_test_state *uts) +{ + struct ffa_partition_desc *descs; + u32 count, i, j, valid_sps = 0; + struct udevice *dev; + struct ffa_sandbox_data func_data; + struct ffa_partitions *partitions; + + ut_assertok(uclass_first_device_err(UCLASS_FFA, &dev)); + + /* Get from the driver the count and information of the SPs matching the UUID */ + ut_assertok(ffa_partition_info_get(dev, service_uuid, &count, &descs)); + + /* Make sure the count is correct */ + ut_asserteq(SANDBOX_SP_COUNT_PER_VALID_SERVICE, count); + + /* SPs found , verify the partitions information */ + + func_data.data0 = &partitions; + func_data.data0_size = sizeof(struct ffa_partitions *); + ut_assertok(sandbox_query_ffa_emul_state(FFA_PARTITION_INFO_GET, &func_data)); + + for (i = 0; i < count ; i++) { + for (j = 0; + j < partitions->count; + j++) { + if (descs[i].info.id == + partitions->descs[j].info.id) { + valid_sps++; + ut_asserteq_mem(&descs[i], + &partitions->descs[j], + sizeof(struct ffa_partition_desc)); + /* Send and receive data from the current partition */ + test_ffa_msg_send_direct_req(descs[i].info.id, uts); + } + } + } + + /* Verify expected partitions found in the emulated secure world */ + ut_asserteq(SANDBOX_SP_COUNT_PER_VALID_SERVICE, valid_sps); + + return 0; +} + +static int dm_test_ffa_ack(struct unit_test_state *uts) +{ + struct ffa_priv *uc_priv; + struct ffa_sandbox_data func_data; + u8 rxbuf_flag = 0; + const char *svc1_uuid = SANDBOX_SERVICE1_UUID; + const char *svc2_uuid = SANDBOX_SERVICE2_UUID; + struct udevice *dev; + + /* Test probing the sandbox FF-A bus */ + ut_assertok(uclass_first_device_err(UCLASS_FFA, &dev)); + + /* Get a pointer to the sandbox FF-A bus private data */ + uc_priv = dev_get_uclass_priv(dev); + + /* Make sure the private data pointer is retrieved */ + ut_assertnonnull(uc_priv); + + /* Test FFA_VERSION */ + check_fwk_version(uc_priv, uts); + + /* Test FFA_ID_GET */ + check_endpoint_id(uc_priv, uts); + + /* Test FFA_FEATURES */ + check_features(uc_priv, uts); + + /* Test RX/TX buffers */ + check_rxtxbuf(uc_priv, uts); + + /* Test FFA_RXTX_MAP */ + func_data.data0 = &rxbuf_flag; + func_data.data0_size = sizeof(rxbuf_flag); + + rxbuf_flag = 0; + sandbox_query_ffa_emul_state(FFA_RXTX_MAP, &func_data); + check_rxbuf_mapped_flag(FFA_RXTX_MAP, rxbuf_flag, uts); + + /* FFA_PARTITION_INFO_GET / FFA_MSG_SEND_DIRECT_REQ */ + test_partitions_and_comms(svc1_uuid, uts); + + /* Test FFA_RX_RELEASE */ + rxbuf_flag = 1; + sandbox_query_ffa_emul_state(FFA_RX_RELEASE, &func_data); + check_rxbuf_release_flag(rxbuf_flag, uts); + + /* FFA_PARTITION_INFO_GET / FFA_MSG_SEND_DIRECT_REQ */ + test_partitions_and_comms(svc2_uuid, uts); + + /* Test FFA_RX_RELEASE */ + rxbuf_flag = 1; + ut_assertok(sandbox_query_ffa_emul_state(FFA_RX_RELEASE, &func_data)); + check_rxbuf_release_flag(rxbuf_flag, uts); + + return 0; +} + +DM_TEST(dm_test_ffa_ack, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC); + +static int dm_test_ffa_nack(struct unit_test_state *uts) +{ + struct ffa_priv *uc_priv; + const char *valid_svc_uuid = SANDBOX_SERVICE1_UUID; + const char *unvalid_svc_uuid = SANDBOX_SERVICE3_UUID; + const char *unvalid_svc_uuid_str = SANDBOX_SERVICE4_UUID; + struct ffa_send_direct_data msg; + int ret; + u32 count; + u16 part_id = 0; + struct udevice *dev; + struct ffa_partition_desc *descs = NULL; + + /* Test probing the sandbox FF-A bus */ + ut_assertok(uclass_first_device_err(UCLASS_FFA, &dev)); + + /* Get a pointer to the sandbox FF-A bus private data */ + uc_priv = dev_get_uclass_priv(dev); + + /* Make sure the private data pointer is retrieved */ + ut_assertnonnull(uc_priv); + + /* Query partitions count using invalid arguments */ + ret = ffa_partition_info_get(dev, NULL, NULL, NULL); + ut_asserteq(-EINVAL, ret); + ret = ffa_partition_info_get(dev, unvalid_svc_uuid, NULL, NULL); + ut_asserteq(-EINVAL, ret); + ret = ffa_partition_info_get(dev, unvalid_svc_uuid, &count, NULL); + ut_asserteq(-EINVAL, ret); + + /* Query partitions count using an invalid UUID string */ + ret = ffa_partition_info_get(dev, unvalid_svc_uuid_str, &count, &descs); + ut_asserteq(-EINVAL, ret); + + /* Query partitions count using an invalid UUID (no matching SP) */ + count = 0; + ret = ffa_partition_info_get(dev, unvalid_svc_uuid, &count, &descs); + ut_asserteq(0, count); + + /* Query partitions data using a valid UUID */ + count = 0; + ut_assertok(ffa_partition_info_get(dev, valid_svc_uuid, &count, &descs)); + /* Make sure partitions are detected */ + ut_asserteq(SANDBOX_SP_COUNT_PER_VALID_SERVICE, count); + ut_assertnonnull(descs); + + /* Send data to an invalid partition */ + ret = ffa_sync_send_receive(dev, part_id, &msg, 1); + ut_asserteq(-EINVAL, ret); + + /* Send data to a valid partition */ + part_id = uc_priv->partitions.descs[0].info.id; + ut_assertok(ffa_sync_send_receive(dev, part_id, &msg, 1)); + + return 0; +} + +DM_TEST(dm_test_ffa_nack, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC); From f16a48fec933829cfa3a81eb1dd531b924e3cde8 Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:43 +0100 Subject: [PATCH 017/148] arm_ffa: introduce armffa command Provide armffa command showcasing the use of the U-Boot FF-A support armffa is a command showcasing how to invoke FF-A operations. This provides a guidance to the client developers on how to call the FF-A bus interfaces. The command also allows to gather secure partitions information and ping these partitions. The command is also helpful in testing the communication with secure partitions. For more details please refer to the command documentation [1]. A Sandbox test is provided for the armffa command. [1]: doc/usage/cmd/armffa.rst Signed-off-by: Abdellatif El Khlifi Reviewed-by: Simon Glass Cc: Tom Rini Cc: Ilias Apalodimas Cc: Jens Wiklander Cc: Heinrich Schuchardt --- MAINTAINERS | 3 + cmd/Kconfig | 10 ++ cmd/Makefile | 1 + cmd/armffa.c | 202 +++++++++++++++++++++++++++++++ doc/arch/arm64.ffa.rst | 9 ++ doc/usage/cmd/armffa.rst | 94 ++++++++++++++ doc/usage/index.rst | 1 + drivers/firmware/arm-ffa/Kconfig | 1 + test/cmd/Makefile | 2 + test/cmd/armffa.c | 33 +++++ 10 files changed, 356 insertions(+) create mode 100644 cmd/armffa.c create mode 100644 doc/usage/cmd/armffa.rst create mode 100644 test/cmd/armffa.c diff --git a/MAINTAINERS b/MAINTAINERS index 5a2a5467878..bf851cffd6b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -271,9 +271,12 @@ M: Abdellatif El Khlifi S: Maintained F: arch/sandbox/include/asm/sandbox_arm_ffa.h F: arch/sandbox/include/asm/sandbox_arm_ffa_priv.h +F: cmd/armffa.c F: doc/arch/arm64.ffa.rst +F: doc/usage/cmd/armffa.rst F: drivers/firmware/arm-ffa/ F: include/arm_ffa.h +F: test/cmd/armffa.c F: test/dm/ffa.c ARM FREESCALE IMX diff --git a/cmd/Kconfig b/cmd/Kconfig index 7f65e3187a6..43ca10f69cc 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -952,6 +952,16 @@ endmenu menu "Device access commands" +config CMD_ARMFFA + bool "Arm FF-A test command" + depends on ARM_FFA_TRANSPORT + help + Provides a test command for the FF-A support + supported options: + - Listing the partition(s) info + - Sending a data pattern to the specified partition + - Displaying the arm_ffa device info + config CMD_ARMFLASH #depends on FLASH_CFI_DRIVER bool "armflash" diff --git a/cmd/Makefile b/cmd/Makefile index 9f8c0b058be..9bebf321c39 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -12,6 +12,7 @@ obj-y += panic.o obj-y += version.o # command +obj-$(CONFIG_CMD_ARMFFA) += armffa.o obj-$(CONFIG_CMD_2048) += 2048.o obj-$(CONFIG_CMD_ACPI) += acpi.o obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o diff --git a/cmd/armffa.c b/cmd/armffa.c new file mode 100644 index 00000000000..7e6eafc03ad --- /dev/null +++ b/cmd/armffa.c @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ +#include +#include +#include +#include +#include +#include +#include + +/* Select the right physical address formatting according to the platform */ +#ifdef CONFIG_PHYS_64BIT +#define PhysAddrLength "ll" +#else +#define PhysAddrLength "" +#endif +#define PHYS_ADDR_LN "%" PhysAddrLength "x" + +/** + * ffa_get_dev() - Return the FF-A device + * @devp: pointer to the FF-A device + * + * Search for the FF-A device. + * + * Return: + * 0 on success. Otherwise, failure + */ +static int ffa_get_dev(struct udevice **devp) +{ + int ret; + + ret = uclass_first_device_err(UCLASS_FFA, devp); + if (ret) { + log_err("Cannot find FF-A bus device\n"); + return ret; + } + + return 0; +} + +/** + * do_ffa_getpart() - implementation of the getpart subcommand + * @cmdtp: Command Table + * @flag: flags + * @argc: number of arguments + * @argv: arguments + * + * Query a secure partition information. The secure partition UUID is provided + * as an argument. The function uses the arm_ffa driver + * partition_info_get operation which implements FFA_PARTITION_INFO_GET + * ABI to retrieve the data. The input UUID string is expected to be in big + * endian format. + * + * Return: + * + * CMD_RET_SUCCESS: on success, otherwise failure + */ +static int do_ffa_getpart(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + u32 count = 0; + int ret; + struct ffa_partition_desc *descs; + u32 i; + struct udevice *dev; + + if (argc != 2) { + log_err("Missing argument\n"); + return CMD_RET_USAGE; + } + + ret = ffa_get_dev(&dev); + if (ret) + return CMD_RET_FAILURE; + + /* Ask the driver to fill the buffer with the SPs info */ + + ret = ffa_partition_info_get(dev, argv[1], &count, &descs); + if (ret) { + log_err("Failure in querying partition(s) info (error code: %d)\n", ret); + return CMD_RET_FAILURE; + } + + /* SPs found , show the partition information */ + for (i = 0; i < count ; i++) { + log_info("Partition: id = %x , exec_ctxt %x , properties %x\n", + descs[i].info.id, + descs[i].info.exec_ctxt, + descs[i].info.properties); + } + + return CMD_RET_SUCCESS; +} + +/** + * do_ffa_ping() - implementation of the ping subcommand + * @cmdtp: Command Table + * @flag: flags + * @argc: number of arguments + * @argv: arguments + * + * Send data to a secure partition. The secure partition UUID is provided + * as an argument. Use the arm_ffa driver sync_send_receive operation + * which implements FFA_MSG_SEND_DIRECT_{REQ,RESP} ABIs to send/receive data. + * + * Return: + * + * CMD_RET_SUCCESS: on success, otherwise failure + */ +static int do_ffa_ping(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + struct ffa_send_direct_data msg = { + .data0 = 0xaaaaaaaa, + .data1 = 0xbbbbbbbb, + .data2 = 0xcccccccc, + .data3 = 0xdddddddd, + .data4 = 0xeeeeeeee, + }; + u16 part_id; + int ret; + struct udevice *dev; + + if (argc != 2) { + log_err("Missing argument\n"); + return CMD_RET_USAGE; + } + + part_id = strtoul(argv[1], NULL, 16); + if (!part_id) { + log_err("Partition ID can not be 0\n"); + return CMD_RET_USAGE; + } + + ret = ffa_get_dev(&dev); + if (ret) + return CMD_RET_FAILURE; + + ret = ffa_sync_send_receive(dev, part_id, &msg, 1); + if (!ret) { + u8 cnt; + + log_info("SP response:\n[LSB]\n"); + for (cnt = 0; + cnt < sizeof(struct ffa_send_direct_data) / sizeof(u64); + cnt++) + log_info("%llx\n", ((u64 *)&msg)[cnt]); + return CMD_RET_SUCCESS; + } + + log_err("Sending direct request error (%d)\n", ret); + return CMD_RET_FAILURE; +} + +/** + *do_ffa_devlist() - implementation of the devlist subcommand + * @cmdtp: [in] Command Table + * @flag: flags + * @argc: number of arguments + * @argv: arguments + * + * Query the device belonging to the UCLASS_FFA + * class. + * + * Return: + * + * CMD_RET_SUCCESS: on success, otherwise failure + */ +static int do_ffa_devlist(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + struct udevice *dev; + int ret; + + ret = ffa_get_dev(&dev); + if (ret) + return CMD_RET_FAILURE; + + log_info("device %s, addr " PHYS_ADDR_LN ", driver %s, ops " PHYS_ADDR_LN "\n", + dev->name, + map_to_sysmem(dev), + dev->driver->name, + map_to_sysmem(dev->driver->ops)); + + return CMD_RET_SUCCESS; +} + +static char armffa_help_text[] = + "getpart \n" + " - lists the partition(s) info\n" + "ping \n" + " - sends a data pattern to the specified partition\n" + "devlist\n" + " - displays information about the FF-A device/driver\n"; + +U_BOOT_CMD_WITH_SUBCMDS(armffa, "Arm FF-A test command", armffa_help_text, + U_BOOT_SUBCMD_MKENT(getpart, 2, 1, do_ffa_getpart), + U_BOOT_SUBCMD_MKENT(ping, 2, 1, do_ffa_ping), + U_BOOT_SUBCMD_MKENT(devlist, 1, 1, do_ffa_devlist)); diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst index 71606373f94..325fb80346e 100644 --- a/doc/arch/arm64.ffa.rst +++ b/doc/arch/arm64.ffa.rst @@ -120,6 +120,8 @@ At this stage the FF-A bus is registered with the DM and can be interacted with the DM APIs. Clients are able to probe then use the FF-A bus by calling uclass_first_device(). +Please refer to the armffa command implementation as an example of how to probe +and interact with the FF-A bus. When calling uclass_first_device(), the FF-A driver is probed and ends up calling ffa_do_probe() provided by the Uclass which does the following: @@ -219,6 +221,13 @@ Relationship between the sandbox emulator and the FF-A device ffa_emul 0 [ + ] sandbox_ffa_emul `-- arm-ffa-emul ffa 0 [ ] sandbox_arm_ffa `-- sandbox-arm-ffa +The armffa command +----------------------------------- + +armffa is a command showcasing how to use the FF-A bus and how to invoke the driver operations. + +Please refer the command documentation at :doc:`../usage/cmd/armffa` + Example of boot logs with FF-A enabled -------------------------------------- diff --git a/doc/usage/cmd/armffa.rst b/doc/usage/cmd/armffa.rst new file mode 100644 index 00000000000..13fa90c1290 --- /dev/null +++ b/doc/usage/cmd/armffa.rst @@ -0,0 +1,94 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2022-2023 Arm Limited and/or its affiliates + +armffa command +============== + +Synopsis +-------- + +:: + + armffa [sub-command] [arguments] + + sub-commands: + + getpart [partition UUID] + + lists the partition(s) info + + ping [partition ID] + + sends a data pattern to the specified partition + + devlist + + displays information about the FF-A device/driver + +Description +----------- + +armffa is a command showcasing how to use the FF-A bus and how to invoke its operations. + +This provides a guidance to the client developers on how to call the FF-A bus interfaces. + +The command also allows to gather secure partitions information and ping these partitions. + +The command is also helpful in testing the communication with secure partitions. + +Example +------- + +The following examples are run on Corstone-1000 platform. + +* ping + +:: + + corstone1000# armffa ping 0x8003 + SP response: + [LSB] + fffffffe + 0 + 0 + 0 + 0 + +* ping (failure case) + +:: + + corstone1000# armffa ping 0 + Sending direct request error (-22) + +* getpart + +:: + + corstone1000# armffa getpart 33d532ed-e699-0942-c09c-a798d9cd722d + Partition: id = 8003 , exec_ctxt 1 , properties 3 + +* getpart (failure case) + +:: + + corstone1000# armffa getpart 33d532ed-e699-0942-c09c-a798d9cd7221 + INVALID_PARAMETERS: Unrecognized UUID + Failure in querying partitions count (error code: -22) + +* devlist + +:: + + corstone1000# armffa devlist + device name arm_ffa, dev 00000000fdf41c30, driver name arm_ffa, ops 00000000fffc0e98 + +Configuration +------------- + +The command is available if CONFIG_CMD_ARMFFA=y and CONFIG_ARM_FFA_TRANSPORT=y. + +Return value +------------ + +The return value $? is 0 (true) on success, 1 (false) on failure. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 072db53614c..3326ec82fff 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -22,6 +22,7 @@ Shell commands cmd/acpi cmd/addrmap + cmd/armffa cmd/askenv cmd/base cmd/bdinfo diff --git a/drivers/firmware/arm-ffa/Kconfig b/drivers/firmware/arm-ffa/Kconfig index fc668c109d6..d75f8b53fd8 100644 --- a/drivers/firmware/arm-ffa/Kconfig +++ b/drivers/firmware/arm-ffa/Kconfig @@ -5,6 +5,7 @@ config ARM_FFA_TRANSPORT depends on DM && (ARM64 || SANDBOX) select ARM_SMCCC if !SANDBOX select ARM_SMCCC_FEATURES if !SANDBOX + imply CMD_ARMFFA select LIB_UUID select DEVRES help diff --git a/test/cmd/Makefile b/test/cmd/Makefile index a3cf983739e..6e3d7e919ef 100644 --- a/test/cmd/Makefile +++ b/test/cmd/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # # Copyright (c) 2013 Google, Inc +# Copyright 2022-2023 Arm Limited and/or its affiliates ifdef CONFIG_HUSH_PARSER obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o @@ -24,6 +25,7 @@ obj-$(CONFIG_CMD_SEAMA) += seama.o ifdef CONFIG_SANDBOX obj-$(CONFIG_CMD_READ) += rw.o obj-$(CONFIG_CMD_SETEXPR) += setexpr.o +obj-$(CONFIG_ARM_FFA_TRANSPORT) += armffa.o endif obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o obj-$(CONFIG_CMD_WGET) += wget.o diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c new file mode 100644 index 00000000000..9a44a397e8a --- /dev/null +++ b/test/cmd/armffa.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test for armffa command + * + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi + */ + +#include +#include +#include +#include +#include +#include + +/* Basic test of 'armffa' command */ +static int dm_test_armffa_cmd(struct unit_test_state *uts) +{ + /* armffa getpart */ + ut_assertok(run_command("armffa getpart " SANDBOX_SERVICE1_UUID, 0)); + + /* armffa ping */ + ut_assertok(run_commandf("armffa ping 0x%x", SANDBOX_SP1_ID)); + + /* armffa devlist */ + ut_assertok(run_command("armffa devlist", 0)); + + return 0; +} + +DM_TEST(dm_test_armffa_cmd, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC); From 218b062e8f20233181ecbcca1d627f5d44c4617d Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:44 +0100 Subject: [PATCH 018/148] arm_ffa: efi: introduce FF-A MM communication Add MM communication support using FF-A transport This feature allows accessing MM partitions services through EFI MM communication protocol. MM partitions such as StandAlonneMM or smm-gateway secure partitions which reside in secure world. An MM shared buffer and a door bell event are used to exchange the data. The data is used by EFI services such as GetVariable()/SetVariable() and copied from the communication buffer to the MM shared buffer. The secure partition is notified about availability of data in the MM shared buffer by an FF-A message (door bell). On such event, MM SP can read the data and updates the MM shared buffer with the response data. The response data is copied back to the communication buffer and consumed by the EFI subsystem. MM communication protocol supports FF-A 64-bit direct messaging. We tested the FF-A MM communication on the Corstone-1000 platform. We ran the UEFI SCT test suite containing EFI setVariable, getVariable and getNextVariable tests which involve FF-A MM communication and all tests are passing with the current changes. We made the SCT test reports (part of the ACS results) public following the latest Corstone-1000 platform software release. Please find the test reports at [1]. [1]: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-test-report/-/tree/master/embedded-a/corstone1000/CORSTONE1000-2023.06/acs_results_fpga.zip Signed-off-by: Abdellatif El Khlifi Tested-by: Gowtham Suresh Kumar Reviewed-by: Simon Glass Cc: Tom Rini Cc: Ilias Apalodimas Cc: Jens Wiklander Reviewed-by: Ilias Apalodimas Reviewed-by: Tom Rini --- include/mm_communication.h | 17 ++ lib/efi_loader/Kconfig | 39 ++++- lib/efi_loader/efi_variable_tee.c | 270 +++++++++++++++++++++++++++++- 3 files changed, 320 insertions(+), 6 deletions(-) diff --git a/include/mm_communication.h b/include/mm_communication.h index e65fbde60d0..f38f1a5344b 100644 --- a/include/mm_communication.h +++ b/include/mm_communication.h @@ -6,6 +6,9 @@ * Copyright (c) 2017, Intel Corporation. All rights reserved. * Copyright (C) 2020 Linaro Ltd. * Copyright (C) 2020 Linaro Ltd. + * Copyright 2022-2023 Arm Limited and/or its affiliates + * Authors: + * Abdellatif El Khlifi */ #ifndef _MM_COMMUNICATION_H_ @@ -13,6 +16,11 @@ #include +#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT) +/* MM service UUID string (big-endian format). This UUID is common across all MM SPs */ +#define MM_SP_UUID "33d532ed-e699-0942-c09c-a798d9cd722d" +#endif + /* * Interface to the pseudo Trusted Application (TA), which provides a * communication channel with the Standalone MM (Management Mode) @@ -248,4 +256,13 @@ struct smm_variable_var_check_property { u16 name[]; }; +#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT) +/* supported MM transports */ +enum mm_comms_select { + MM_COMMS_UNDEFINED, + MM_COMMS_FFA, + MM_COMMS_OPTEE +}; +#endif + #endif /* _MM_COMMUNICATION_H_ */ diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index a22e47616f7..9989e3f384e 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -55,13 +55,50 @@ config EFI_VARIABLE_FILE_STORE stored as file /ubootefi.var on the EFI system partition. config EFI_MM_COMM_TEE - bool "UEFI variables storage service via OP-TEE" + bool "UEFI variables storage service via the trusted world" depends on OPTEE help + Allowing access to the MM SP services (SPs such as StandAlonneMM, smm-gateway). + When using the u-boot OP-TEE driver, StandAlonneMM is supported. + When using the u-boot FF-A driver any MM SP is supported. + If OP-TEE is present and running StandAloneMM, dispatch all UEFI variable related operations to that. The application will verify, authenticate and store the variables on an RPMB. + When ARM_FFA_TRANSPORT is used, dispatch all UEFI variable related + operations to the MM SP running in the secure world. + A door bell mechanism is used to notify the SP when there is data in the shared + MM buffer. The data is copied by u-boot to the shared buffer before issuing + the door bell event. + +config FFA_SHARED_MM_BUF_SIZE + int "Memory size of the shared MM communication buffer" + depends on EFI_MM_COMM_TEE && ARM_FFA_TRANSPORT + help + This defines the size in bytes of the memory area reserved for the shared + buffer used for communication between the MM feature in U-Boot and + the MM SP in secure world. + The size of the memory region must be a multiple of the size of the maximum + translation granule size that is specified in the ID_AA64MMFR0_EL1 System register. + It is assumed that the MM SP knows the size of the shared MM communication buffer. + +config FFA_SHARED_MM_BUF_OFFSET + int "Data offset in the shared MM communication buffer" + depends on EFI_MM_COMM_TEE && ARM_FFA_TRANSPORT + help + This defines the offset in bytes of the data read or written to in the shared + buffer by the MM SP. + +config FFA_SHARED_MM_BUF_ADDR + hex "Define the address of the shared MM communication buffer" + depends on EFI_MM_COMM_TEE && ARM_FFA_TRANSPORT + help + This defines the address of the shared MM communication buffer + used for communication between the MM feature in U-Boot and + the MM SP in secure world. + It is assumed that the MM SP knows the address of the shared MM communication buffer. + config EFI_VARIABLE_NO_STORE bool "Don't persist non-volatile UEFI variables" help diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c index dfef18435df..09d03c0eee7 100644 --- a/lib/efi_loader/efi_variable_tee.c +++ b/lib/efi_loader/efi_variable_tee.c @@ -4,16 +4,38 @@ * * Copyright (C) 2019 Linaro Ltd. * Copyright (C) 2019 Linaro Ltd. + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi */ #include +#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT) +#include +#endif +#include +#include #include #include #include #include -#include #include +#include #include +#include + +#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT) +/* MM return codes */ +#define MM_SUCCESS (0) +#define MM_NOT_SUPPORTED (-1) +#define MM_INVALID_PARAMETER (-2) +#define MM_DENIED (-3) +#define MM_NO_MEMORY (-5) + +static const char *mm_sp_svc_uuid = MM_SP_UUID; +static u16 mm_sp_id; +#endif extern struct efi_var_file __efi_runtime_data *efi_var_buf; static efi_uintn_t max_buffer_size; /* comm + var + func + data */ @@ -144,12 +166,238 @@ static efi_status_t optee_mm_communicate(void *comm_buf, ulong dsize) return ret; } +#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT) /** - * mm_communicate() - Adjust the cmonnucation buffer to StandAlonneMM and send + * ffa_notify_mm_sp() - Announce there is data in the shared buffer + * + * Notify the MM partition in the trusted world that + * data is available in the shared buffer. + * This is a blocking call during which trusted world has exclusive access + * to the MM shared buffer. + * + * Return: + * + * 0 on success + */ +static int ffa_notify_mm_sp(void) +{ + struct ffa_send_direct_data msg = {0}; + int ret; + int sp_event_ret; + struct udevice *dev; + + ret = uclass_first_device_err(UCLASS_FFA, &dev); + if (ret) { + log_err("EFI: Cannot find FF-A bus device, notify MM SP failure\n"); + return ret; + } + + msg.data0 = CONFIG_FFA_SHARED_MM_BUF_OFFSET; /* x3 */ + + ret = ffa_sync_send_receive(dev, mm_sp_id, &msg, 1); + if (ret) + return ret; + + sp_event_ret = msg.data0; /* x3 */ + + switch (sp_event_ret) { + case MM_SUCCESS: + ret = 0; + break; + case MM_NOT_SUPPORTED: + ret = -EINVAL; + break; + case MM_INVALID_PARAMETER: + ret = -EPERM; + break; + case MM_DENIED: + ret = -EACCES; + break; + case MM_NO_MEMORY: + ret = -EBUSY; + break; + default: + ret = -EACCES; + } + + return ret; +} + +/** + * ffa_discover_mm_sp_id() - Query the MM partition ID + * + * Use the FF-A driver to get the MM partition ID. + * If multiple partitions are found, use the first one. + * This is a boot time function. + * + * Return: + * + * 0 on success + */ +static int ffa_discover_mm_sp_id(void) +{ + u32 count = 0; + int ret; + struct ffa_partition_desc *descs; + struct udevice *dev; + + ret = uclass_first_device_err(UCLASS_FFA, &dev); + if (ret) { + log_err("EFI: Cannot find FF-A bus device, MM SP discovery failure\n"); + return ret; + } + + /* Ask the driver to fill the buffer with the SPs info */ + ret = ffa_partition_info_get(dev, mm_sp_svc_uuid, &count, &descs); + if (ret) { + log_err("EFI: Failure in querying SPs info (%d), MM SP discovery failure\n", ret); + return ret; + } + + /* MM SPs found , use the first one */ + + mm_sp_id = descs[0].info.id; + + log_info("EFI: MM partition ID 0x%x\n", mm_sp_id); + + return 0; +} + +/** + * ffa_mm_communicate() - Exchange EFI services data with the MM partition using FF-A + * @comm_buf: locally allocated communication buffer used for rx/tx + * @dsize: communication buffer size + * + * Issue a door bell event to notify the MM partition (SP) running in OP-TEE + * that there is data to read from the shared buffer. + * Communication with the MM SP is performed using FF-A transport. + * On the event, MM SP can read the data from the buffer and + * update the MM shared buffer with response data. + * The response data is copied back to the communication buffer. + * + * Return: + * + * EFI status code + */ +static efi_status_t ffa_mm_communicate(void *comm_buf, ulong comm_buf_size) +{ + ulong tx_data_size; + int ffa_ret; + efi_status_t efi_ret; + struct efi_mm_communicate_header *mm_hdr; + void *virt_shared_buf; + + if (!comm_buf) + return EFI_INVALID_PARAMETER; + + /* Discover MM partition ID at boot time */ + if (!mm_sp_id && ffa_discover_mm_sp_id()) { + log_err("EFI: Failure to discover MM SP ID at boot time, FF-A MM comms failure\n"); + return EFI_UNSUPPORTED; + } + + mm_hdr = (struct efi_mm_communicate_header *)comm_buf; + tx_data_size = mm_hdr->message_len + sizeof(efi_guid_t) + sizeof(size_t); + + if (comm_buf_size != tx_data_size || tx_data_size > CONFIG_FFA_SHARED_MM_BUF_SIZE) + return EFI_INVALID_PARAMETER; + + /* Copy the data to the shared buffer */ + + virt_shared_buf = map_sysmem((phys_addr_t)CONFIG_FFA_SHARED_MM_BUF_ADDR, 0); + memcpy(virt_shared_buf, comm_buf, tx_data_size); + + /* + * The secure world might have cache disabled for + * the device region used for shared buffer (which is the case for Optee). + * In this case, the secure world reads the data from DRAM. + * Let's flush the cache so the DRAM is updated with the latest data. + */ +#ifdef CONFIG_ARM64 + invalidate_dcache_all(); +#endif + + /* Announce there is data in the shared buffer */ + + ffa_ret = ffa_notify_mm_sp(); + + switch (ffa_ret) { + case 0: { + ulong rx_data_size; + /* Copy the MM SP response from the shared buffer to the communication buffer */ + rx_data_size = ((struct efi_mm_communicate_header *)virt_shared_buf)->message_len + + sizeof(efi_guid_t) + + sizeof(size_t); + + if (rx_data_size > comm_buf_size) { + efi_ret = EFI_OUT_OF_RESOURCES; + break; + } + + memcpy(comm_buf, virt_shared_buf, rx_data_size); + efi_ret = EFI_SUCCESS; + break; + } + case -EINVAL: + efi_ret = EFI_DEVICE_ERROR; + break; + case -EPERM: + efi_ret = EFI_INVALID_PARAMETER; + break; + case -EACCES: + efi_ret = EFI_ACCESS_DENIED; + break; + case -EBUSY: + efi_ret = EFI_OUT_OF_RESOURCES; + break; + default: + efi_ret = EFI_ACCESS_DENIED; + } + + unmap_sysmem(virt_shared_buf); + return efi_ret; +} + +/** + * get_mm_comms() - detect the available MM transport + * + * Make sure the FF-A bus is probed successfully + * which means FF-A communication with secure world works and ready + * for use. + * + * If FF-A bus is not ready, use OPTEE comms. + * + * Return: + * + * MM_COMMS_FFA or MM_COMMS_OPTEE + */ +static enum mm_comms_select get_mm_comms(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_first_device_err(UCLASS_FFA, &dev); + if (ret) { + log_debug("EFI: Cannot find FF-A bus device, trying Optee comms\n"); + return MM_COMMS_OPTEE; + } + + return MM_COMMS_FFA; +} +#endif + +/** + * mm_communicate() - Adjust the communication buffer to the MM SP and send * it to OP-TEE * - * @comm_buf: locally allocted communcation buffer + * @comm_buf: locally allocated communication buffer * @dsize: buffer size + * + * The SP (also called partition) can be any MM SP such as StandAlonneMM or smm-gateway. + * The comm_buf format is the same for both partitions. + * When using the u-boot OP-TEE driver, StandAlonneMM is supported. + * When using the u-boot FF-A driver, any MM SP is supported. + * * Return: status code */ static efi_status_t mm_communicate(u8 *comm_buf, efi_uintn_t dsize) @@ -157,12 +405,24 @@ static efi_status_t mm_communicate(u8 *comm_buf, efi_uintn_t dsize) efi_status_t ret; struct efi_mm_communicate_header *mm_hdr; struct smm_variable_communicate_header *var_hdr; +#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT) + enum mm_comms_select mm_comms; +#endif dsize += MM_COMMUNICATE_HEADER_SIZE + MM_VARIABLE_COMMUNICATE_SIZE; mm_hdr = (struct efi_mm_communicate_header *)comm_buf; var_hdr = (struct smm_variable_communicate_header *)mm_hdr->data; - ret = optee_mm_communicate(comm_buf, dsize); +#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT) + mm_comms = get_mm_comms(); + if (mm_comms == MM_COMMS_FFA) + ret = ffa_mm_communicate(comm_buf, dsize); + else + ret = optee_mm_communicate(comm_buf, dsize); +#else + ret = optee_mm_communicate(comm_buf, dsize); +#endif + if (ret != EFI_SUCCESS) { log_err("%s failed!\n", __func__); return ret; @@ -697,7 +957,7 @@ void efi_variables_boot_exit_notify(void) ret = EFI_NOT_FOUND; if (ret != EFI_SUCCESS) - log_err("Unable to notify StMM for ExitBootServices\n"); + log_err("Unable to notify the MM partition for ExitBootServices\n"); free(comm_buf); /* From 13f3470adc18c5f71210a26e92cb86c375e7a35b Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 4 Aug 2023 14:33:45 +0100 Subject: [PATCH 019/148] arm_ffa: efi: corstone1000: enable MM communication turn on EFI MM communication On Corstone-1000 platform MM communication between u-boot and the secure world (Optee) is done using the FF-A bus. Changes made are generated using savedefconfig. Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini Cc: Simon Glass Cc: Ilias Apalodimas Cc: Jens Wiklander --- configs/corstone1000_defconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index c68e52b9fb2..3b5733b777d 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -42,6 +42,7 @@ CONFIG_OF_CONTROL=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y +CONFIG_ARM_FFA_TRANSPORT=y CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_NVMXIP_QSPI=y @@ -54,9 +55,15 @@ CONFIG_DM_RTC=y CONFIG_RTC_EMULATION=y CONFIG_DM_SERIAL=y CONFIG_SYSRESET=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_USB=y CONFIG_USB_ISP1760=y CONFIG_ERRNO_STR=y +CONFIG_EFI_MM_COMM_TEE=y +CONFIG_FFA_SHARED_MM_BUF_SIZE=4096 +CONFIG_FFA_SHARED_MM_BUF_OFFSET=0 +CONFIG_FFA_SHARED_MM_BUF_ADDR=0x02000000 CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_FWU_MULTI_BANK_UPDATE=y From effe50854a6964b6cf0f30e2716bec052a770d10 Mon Sep 17 00:00:00 2001 From: Jason Kacines Date: Thu, 3 Aug 2023 01:29:22 -0500 Subject: [PATCH 020/148] doc: board: ti: k3: Add a guide to debugging with OpenOCD Bootloader debug usually tends to be a bit dicey prior to DDR and serial port getting active in the system. JTAG typically remains the only practical debug option during the initial bringup. OpenOCD is one of the most popular environment for providing debug capability via a GDB compatible interface for developers to work with. Debugging U-Boot and bootloaders on K3 platform does have a bit of tribal knowledge that is better documented in our common platform documentation. Signed-off-by: Jason Kacines Signed-off-by: Nishanth Menon --- doc/board/ti/am62x_sk.rst | 24 ++ doc/board/ti/am65x_evm.rst | 24 ++ doc/board/ti/img/openocd-overview.svg | 580 ++++++++++++++++++++++++++ doc/board/ti/j7200_evm.rst | 24 ++ doc/board/ti/j721e_evm.rst | 24 ++ doc/board/ti/k3.rst | 514 +++++++++++++++++++++++ 6 files changed, 1190 insertions(+) create mode 100644 doc/board/ti/img/openocd-overview.svg diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst index 4646bc0f525..5ed17c0a3a5 100644 --- a/doc/board/ti/am62x_sk.rst +++ b/doc/board/ti/am62x_sk.rst @@ -246,3 +246,27 @@ https://www.ti.com/lit/pdf/spruiv7 under the `Boot Mode Pins` section. - 11001010 For SW2 and SW1, the switch state in the "ON" position = 1. + +Debugging U-Boot +---------------- + +See :ref:`Common Debugging environment - OpenOCD`: for +detailed setup information. + +.. warning:: + + **OpenOCD support since**: v0.12.0 + + If the default package version of OpenOCD in your development + environment's distribution needs to be updated, it might be necessary to + build OpenOCD from the source. + +.. include:: k3.rst + :start-after: .. k3_rst_include_start_openocd_connect_XDS110 + :end-before: .. k3_rst_include_end_openocd_connect_XDS110 + +To start OpenOCD and connect to the board + +.. code-block:: bash + + openocd -f board/ti_am625evm.cfg diff --git a/doc/board/ti/am65x_evm.rst b/doc/board/ti/am65x_evm.rst index 0129235c2b2..5f3c46cf9f9 100644 --- a/doc/board/ti/am65x_evm.rst +++ b/doc/board/ti/am65x_evm.rst @@ -287,3 +287,27 @@ artifacts needed to the device: sb --ymodem tispl.bin > $MAIN_DEV < $MAIN_DEV sleep 1 sb --xmodem u-boot.img > $MAIN_DEV < $MAIN_DEV + +Debugging U-Boot +---------------- + +See :ref:`Common Debugging environment - OpenOCD`: for +detailed setup information. + +.. warning:: + + **OpenOCD support since**: v0.12.0 + + If the default package version of OpenOCD in your development + environment's distribution needs to be updated, it might be necessary to + build OpenOCD from the source. + +.. include:: k3.rst + :start-after: .. k3_rst_include_start_openocd_connect_XDS110 + :end-before: .. k3_rst_include_end_openocd_connect_XDS110 + +To start OpenOCD and connect to the board + +.. code-block:: bash + + openocd -f board/ti_am654evm.cfg diff --git a/doc/board/ti/img/openocd-overview.svg b/doc/board/ti/img/openocd-overview.svg new file mode 100644 index 00000000000..afb6f7472a4 --- /dev/null +++ b/doc/board/ti/img/openocd-overview.svg @@ -0,0 +1,580 @@ + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + + Cortex-R + + + + Cortex-R + + + + + + + + + + Cortex-A + + + + Cortex-A + + + + + + + + K3 SoC + + + + K3 SoC + + + + + + + + + + + + + Debug SS + + + + Debug SS + + + + + + + + + + + Jtag Interface +(XDS110, TUMPA..) + + + + Jtag Interface... + + + + + + + + + + + PC + + + + PC + + + + + + + + USB + + + + USB + + + + + + + + JTAG + + + + JTAG + + + + + + + + + OpenOCD + + + + OpenOCD + + + + + + + + + + + GDB + + + + GDB + + + + + + + + + + + IDE debugging code + + + + IDE debugging code + + + + diff --git a/doc/board/ti/j7200_evm.rst b/doc/board/ti/j7200_evm.rst index 69abc55a93c..2e60e22ba15 100644 --- a/doc/board/ti/j7200_evm.rst +++ b/doc/board/ti/j7200_evm.rst @@ -201,3 +201,27 @@ fat formatted UDA FS as file. In case of booting from eMMC, write above images into raw or UDA FS. and set mmc partconf accordingly. + +Debugging U-Boot +---------------- + +See :ref:`Common Debugging environment - OpenOCD`: for +detailed setup information. + +.. warning:: + + **OpenOCD support since**: v0.12.0 + + If the default package version of OpenOCD in your development + environment's distribution needs to be updated, it might be necessary to + build OpenOCD from the source. + +.. include:: k3.rst + :start-after: .. k3_rst_include_start_openocd_connect_XDS110 + :end-before: .. k3_rst_include_end_openocd_connect_XDS110 + +To start OpenOCD and connect to the board + +.. code-block:: bash + + openocd -f board/ti_j7200evm.cfg diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst index f4b4c192d9d..d2a214fb33f 100644 --- a/doc/board/ti/j721e_evm.rst +++ b/doc/board/ti/j721e_evm.rst @@ -228,3 +228,27 @@ J721E common processor board can be attached to a Ethernet QSGMII card and the PHY in the card has to be reset before it can be used for data transfer. "do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to configure this PHY. + +Debugging U-Boot +---------------- + +See :ref:`Common Debugging environment - OpenOCD`: for +detailed setup information. + +.. warning:: + + **OpenOCD support since**: v0.12.0 + + If the default package version of OpenOCD in your development + environment's distribution needs to be updated, it might be necessary to + build OpenOCD from the source. + +.. include:: k3.rst + :start-after: .. k3_rst_include_start_openocd_connect_XDS110 + :end-before: .. k3_rst_include_end_openocd_connect_XDS110 + +To start OpenOCD and connect to the board + +.. code-block:: bash + + openocd -f board/ti_j721eevm.cfg diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index d2f86b0a11a..f4576c54cb3 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -468,3 +468,517 @@ filesystem and then imported => fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} => env import -t ${loadaddr} ${filesize} + +.. _k3_rst_refer_openocd: + +Common Debugging environment - OpenOCD +-------------------------------------- + +This section will show you how to connect a board to `OpenOCD +`_ and load the SPL symbols for debugging with +a K3 generation device. To follow this guide, you must build custom +u-boot binaries, start your board from a boot media such as an SD +card, and use an OpenOCD environment. This section uses generic +examples, though you can apply these instructions to any supported K3 +generation device. + +The overall structure of this setup is in the following figure. + +.. image:: img/openocd-overview.svg + +.. note:: + + If you find these instructions useful, please consider `donating + `_ to OpenOCD. + +Step 1: Download and install OpenOCD +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +To get started, it is more convenient if the distribution you +use supports OpenOCD by default. Follow the instructions in the +`getting OpenOCD `_ +documentation to pick the installation steps appropriate to your +environment. Some references to OpenOCD documentation: + +* `OpenOCD User Guide `_ +* `OpenOCD Developer's Guide `_ + +Refer to the release notes corresponding to the `OpenOCD version +`_ to ensure + +* Processor support: In general, processor support shouldn't present + any difficulties since OpenOCD provides solid support for both ARMv8 + and ARMv7. +* SoC support: When working with System-on-a-Chip (SoC), the support + usually comes as a TCL config file. It is vital to ensure the correct + version of OpenOCD or to use the TCL files from the latest release or + the one mentioned. +* Board or the JTAG adapter support: In most cases, board support is + a relatively easy problem if the board has a JTAG pin header. All + you need to do is ensure that the adapter you select is compatible + with OpenOCD. Some boards come with an onboard JTAG adapter that + requires a USB cable to be plugged into the board, in which case, it + is vital to ensure that the JTAG adapter is supported. Fortunately, + almost all TI K3 SK/EVMs come with TI's XDS110, which has out of the + box support by OpenOCD. The board-specific documentation will + cover the details and any adapter/dongle recommendations. + +.. code-block:: bash + + openocd -v + +.. note:: + + OpenOCD version 0.12.0 is usually required to connect to most K3 + devices. If your device is only supported by a newer version than the + one provided by your distribution, you may need to build it from the source. + +Building OpenOCD from source +"""""""""""""""""""""""""""" + +The dependency package installation instructions below are for Debian +systems, but equivalent instructions should exist for systems with +other package managers. Please refer to the `OpenOCD Documentation +`_ for more recent installation steps. + +.. code-block:: bash + + $ # Check the packages to be installed: needs deb-src in sources.list + $ sudo apt build-dep openocd + $ # The following list is NOT complete - please check the latest + $ sudo apt-get install libtool pkg-config texinfo libusb-dev \ + libusb-1.0.0-dev libftdi-dev libhidapi-dev autoconf automake + $ git clone https://github.com/openocd-org/openocd.git openocd + $ cd openocd + $ git submodule init + $ git submodule update + $ ./bootstrap + $ ./configure --prefix=/usr/local/ + $ make -j`nproc` + $ sudo make install + +.. note:: + + The example above uses the GitHub mirror site. See + `git repo information `_ + information to pick the official git repo. + If a specific version is desired, select the version using `git checkout tag`. + +Installing OpenOCD udev rules +""""""""""""""""""""""""""""" + +The step is not necessary if the distribution supports the OpenOCD, but +if building from a source, ensure that the udev rules are installed +correctly to ensure a sane system. + +.. code-block:: bash + + # Go to the OpenOCD source directory + $ cd openocd + # Copy the udev rules to the correct system location + $ sudo cp ./contrib/60-openocd.rules \ + ./src/JTAG/drivers/libjaylink/contrib/99-libjaylink.rules \ + /etc/udev/rules.d/ + # Get Udev to load the new rules up + $ sudo udevadm control --reload-rules + # Use the new rules on existing connected devices + $ sudo udevadm trigger + +Step 2: Setup GDB +^^^^^^^^^^^^^^^^^ + +Most systems come with gdb-multiarch package. + +.. code-block:: bash + + # Install gdb-multiarch package + $ sudo apt-get install gdb-multiarch + +Though using GDB natively is normal, developers with interest in using IDE +may find a few of these interesting: + +* `gdb-dashboard `_ +* `gef `_ +* `peda `_ +* `pwndbg `_ +* `voltron `_ +* `ddd `_ +* `vscode `_ +* `vim conque-gdb `_ +* `emacs realgud `_ +* `Lauterbach IDE `_ + +.. warning:: + LLDB support for OpenOCD is still a work in progress as of this writing. + Using GDB is probably the safest option at this point in time. + +Step 3: Connect board to PC +^^^^^^^^^^^^^^^^^^^^^^^^^^^ +There are few patterns of boards in the ecosystem + +.. k3_rst_include_start_openocd_connect_XDS110 + +**Integrated JTAG adapter/dongle**: The board has a micro-USB connector labelled +XDS110 USB or JTAG. Connect a USB cable to the board to the mentioned port. + +.. note:: + + There are multiple USB ports on a typical board, So, ensure you have read + the user guide for the board and confirmed the silk screen label to ensure + connecting to the correct port. + +.. k3_rst_include_end_openocd_connect_XDS110 + +.. k3_rst_include_start_openocd_connect_cti20 + +**cTI20 connector**: The TI's `cTI20 +`_ connector +is probably the most prevelant on TI platforms. Though many +TI boards have an onboard XDS110, cTI20 connector is usually +provided as an alternate scheme to connect alternatives such +as `Lauterbach `_ or `XDS560 +`_. + +To debug on these boards, the following combinations is suggested: + +* `TUMPA `_ + or `equivalent dongles supported by OpenOCD. `_ +* Cable such as `Tag-connect ribbon cable `_ +* Adapter to convert cTI20 to ARM20 such as those from + `Segger `_ + or `Lauterbach LA-3780 `_ + Or optionally, if you have manufacturing capability then you could try + `BeagleBone JTAG Adapter `_ + +.. warning:: + XDS560 and Lauterbach are proprietary solutions and is not supported by + OpenOCD. + When purchasing an off the shelf adapter/dongle, you do want to be careful + about the signalling though. Please + `read for additional info `_. + +.. k3_rst_include_end_openocd_connect_cti20 + +.. k3_rst_include_start_openocd_connect_tag_connect + +**Tag-Connect**: `Tag-Connect `_ +pads on the boards which require special cable. Please check the documentation +to `identify `_ if "legged" +or "no-leg" version of the cable is appropriate for the board. + +To debug on these boards, you will need: + +* `TUMPA `_ + or `equivalent dongles supported by OpenOCD `_. +* Tag-Connect cable appropriate to the board such as + `TC2050-IDC-NL `_ +* In case of no-leg, version, a + `retaining clip `_ +* Tag-Connect to ARM20 + `adapter `_ + +.. note:: + You can optionally use a 3d printed solution such as + `Protective cap `_ or + `clip `_ to replace + the retaining clip. + +.. warning:: + With the Tag-Connect to ARM20 adapter, Please solder the "Trst" signal for + connection to work. + +.. k3_rst_include_end_openocd_connect_tag_connect + +Debugging with OpenOCD +^^^^^^^^^^^^^^^^^^^^^^ + +Debugging U-Boot is different from debugging regular user space +applications. The bootloader initialization process involves many boot +media and hardware configuration operations. For K3 devices, there +are also interactions with security firmware. While reloading the +"elf" file works through GDB, developers must be mindful of cascading +initialization's potential consequences. + +Consider the following code change: + +.. code-block:: diff + + --- a/file.c 2023-07-29 10:55:29.647928811 -0500 + +++ b/file.c 2023-07-29 10:55:46.091856816 -0500 + @@ -1,3 +1,3 @@ + val = readl(reg); + -val |= 0x2; + +val |= 0x1; + writel(val, reg); + +Re-running the elf file with the above change will result in the +register setting 0x3 instead of the intended 0x1. There are other +hardware blocks which may not behave very well with a re-initialization +without proper shutdown. + +To help narrow the debug down, it is usually simpler to use the +standard boot media to get to the bootloader and debug only in the area +of interest. + +In general, to debug u-boot spl/u-boot with OpenOCD there are three steps: + +* Modify the code adding a loop to allow the debugger to attach + near the point of interest. Boot up normally to stop at the loop. +* Connect with OpenOCD and step out of the loop. +* Step through the code to find the root of issue. + +Typical debugging involves a few iterations of the above sequence. +Though most bootloader developers like to use printf to debug, +debug with JTAG tends to be most efficient since it is possible to +investigate the code flow and inspect hardware registers without +repeated iterations. + +Code modification +""""""""""""""""" + +* **start.S**: Adding an infinite while loop at the very entry of + U-Boot. For this, look for the corresponding start.S entry file. + This is usually only required when debugging some core SoC or + processor related function. For example: arch/arm/cpu/armv8/start.S or + arch/arm/cpu/armv7/start.S + +.. code-block:: diff + + diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S + index 69e281b086..744929e825 100644 + --- a/arch/arm/cpu/armv7/start.S + +++ b/arch/arm/cpu/armv7/start.S + @@ -37,6 +37,8 @@ + #endif + + reset: + +dead_loop: + + b dead_loop + /* Allow the board to save important registers */ + b save_boot_params + save_boot_params_ret: + +* **board_init_f**: Adding an infinite while loop at the board entry + function. In many cases, it is important to debug the boot process if + any changes are made for board-specific applications. Below is a step + by step process for debugging the boot SPL or Armv8 SPL: + + To debug the boot process in either domain, we will first + add a modification to the code we would like to debug. + In this example, we will debug ``board_init_f`` inside + ``arch/arm/mach-k3/{soc}_init.c``. Since some sections of U-Boot + will be executed multiple times during the bootup process of K3 + devices, we will need to include either ``CONFIG_CPU_ARM64`` or + ``CONFIG_CPU_V7R`` to catch the CPU at the desired place during the + bootup process (Main or Wakeup domains). For example, modify the + file as follows (depending on need): + +.. code-block:: c + + void board_init_f(ulong dummy) + { + . + . + /* Code to run on the R5F (Wakeup/Boot Domain) */ + if (IS_ENABLED(CONFIG_CPU_V7R)) { + volatile int x = 1; + while(x) {}; + } + ... + /* Code to run on the ARMV8 (Main Domain) */ + if (IS_ENABLED(CONFIG_CPU_ARM64)) { + volatile int x = 1; + while(x) {}; + } + . + . + } + +Connecting with OpenOCD for a debug session +""""""""""""""""""""""""""""""""""""""""""" + +Startup OpenOCD to debug the platform as follows: + +* **Integrated JTAG interface**: If the evm has a debugger such as + XDS110 inbuilt, there is typically an evm board support added and a + cfg file will be available. + +.. k3_rst_include_start_openocd_cfg_XDS110 + +.. code-block:: bash + + openocd -f board/{board_of_choice}.cfg + +.. k3_rst_include_end_openocd_cfg_XDS110 + +.. k3_rst_include_start_openocd_cfg_external_intro + +* **External JTAG adapter/interface**: In other cases, where an + adapter/dongle is used, a simple cfg file can be created to integrate the + SoC and adapter information. See `supported TI K3 SoCs + `_ + to decide if the SoC is supported or not. + +.. code-block:: bash + + openocd -f openocd_connect.cfg + +.. k3_rst_include_end_openocd_cfg_external_intro + + For example, with BeaglePlay (AM62X platform), the openocd_connect.cfg: + +.. code-block:: tcl + + # TUMPA example: + # http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual + source [find interface/ftdi/tumpa.cfg] + + transport select jtag + + # default JTAG configuration has only SRST and no TRST + reset_config srst_only srst_push_pull + + # delay after SRST goes inactive + adapter srst delay 20 + + if { ![info exists SOC] } { + # Set the SoC of interest + set SOC am625 + } + + source [find target/ti_k3.cfg] + + ftdi tdo_sample_edge falling + + # Speeds for FT2232H are in multiples of 2, and 32MHz is tops + # max speed we seem to achieve is ~20MHz.. so we pick 16MHz + adapter speed 16000 + +Below is an example of the output of this command: + +.. code-block:: console + + Info : Listening on port 6666 for tcl connections + Info : Listening on port 4444 for telnet connections + Info : XDS110: connected + Info : XDS110: vid/pid = 0451/bef3 + Info : XDS110: firmware version = 3.0.0.20 + Info : XDS110: hardware version = 0x002f + Info : XDS110: connected to target via JTAG + Info : XDS110: TCK set to 2500 kHz + Info : clock speed 2500 kHz + Info : JTAG tap: am625.cpu tap/device found: 0x0bb7e02f (mfg: 0x017 (Texas Instruments), part: 0xbb7e, ver: 0x0) + Info : starting gdb server for am625.cpu.sysctrl on 3333 + Info : Listening on port 3333 for gdb connections + Info : starting gdb server for am625.cpu.a53.0 on 3334 + Info : Listening on port 3334 for gdb connections + Info : starting gdb server for am625.cpu.a53.1 on 3335 + Info : Listening on port 3335 for gdb connections + Info : starting gdb server for am625.cpu.a53.2 on 3336 + Info : Listening on port 3336 for gdb connections + Info : starting gdb server for am625.cpu.a53.3 on 3337 + Info : Listening on port 3337 for gdb connections + Info : starting gdb server for am625.cpu.main0_r5.0 on 3338 + Info : Listening on port 3338 for gdb connections + Info : starting gdb server for am625.cpu.gp_mcu on 3339 + Info : Listening on port 3339 for gdb connections + +.. note:: + Notice the default configuration is non-SMP configuration allowing + for each of the core to be attached and debugged simultaneously. + ARMv8 SPL/U-Boot starts up on cpu0 of a53/a72. + +.. k3_rst_include_start_openocd_cfg_external_gdb + +To debug using this server, use GDB directly or your preferred +GDB-based IDE. To start up GDB in the terminal, run the following +command. + +.. code-block:: bash + + gdb-multiarch + +To connect to your desired core, run the following command within GDB: + +.. code-block:: bash + + target extended-remote localhost:{port for desired core} + +To load symbols: + +.. warning:: + + SPL and U-Boot does a re-location of address compared to where it + is loaded originally. This step takes place after the DDR size is + determined from dt parsing. So, debugging can be split into either + "before re-location" or "after re-location". Please refer to the + file ''doc/README.arm-relocation'' to see how to grab the relocation + address. + +* Prior to relocation: + +.. code-block:: bash + + symbol-file {path to elf file} + +* After relocation: + +.. code-block:: bash + + # Drop old symbol file + symbol-file + # Pick up new relocaddr + add-symbol-file {path to elf file} {relocaddr} + +.. k3_rst_include_end_openocd_cfg_external_gdb + +In the above example of AM625, + +.. code-block:: bash + + target extended-remote localhost:3338 <- R5F (Wakeup Domain) + target extended-remote localhost:3334 <- A53 (Main Domain) + +The core can now be debugged directly within GDB using GDB commands or +if using IDE, as appropriate to the IDE. + +Stepping through the code +""""""""""""""""""""""""" + +`GDB TUI Commands +`_ can +help set up the display more sensible for debug. Provide the name +of the layout that can be used to debug. For example, use the GDB +command ``layout src`` after loading the symbols to see the code and +breakpoints. To exit the debug loop added above, add any breakpoints +needed and run the following GDB commands to step out of the debug +loop set in the ``board_init_f`` function. + +.. code-block:: bash + + set x = 0 + continue + +The platform has now been successfully setup to debug with OpenOCD +using GDB commands or a GDB-based IDE. See `OpenOCD documentation for +GDB `_ for further +information. + +.. warning:: + + On the K3 family of devices, a watchdog timer within the DMSC is + enabled by default by the ROM bootcode with a timeout of 3 minutes. + The watchdog timer is serviced by System Firmware (SYSFW) or TI + Foundational Security (TIFS) during normal operation. If debugging + the SPL before the SYSFW is loaded, the watchdog timer will not get + serviced automatically and the debug session will reset after 3 + minutes. It is recommended to start debugging SPL code only after + the startup of SYSFW to avoid running into the watchdog timer reset. + +Miscellaneous notes with OpenOCD +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Currently, OpenOCD does not support tracing for K3 platforms. Tracing +function could be beneficial if the bug in code occurs deep within +nested function and can optionally save developers major trouble of +stepping through a large quantity of code. From b8531ac4d11b274c50803f90a0ffc5a9064f9836 Mon Sep 17 00:00:00 2001 From: Jit Loon Lim Date: Fri, 4 Aug 2023 10:28:39 +0800 Subject: [PATCH 021/148] doc: Add the link for the documentation of the .its Provide the link for the .its related documentation for Arria10. Signed-off-by: Jit Loon Lim --- doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt index da210bfc86b..1381bdcd164 100644 --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt @@ -41,3 +41,6 @@ Example: Bundles both peripheral bitstream and core bitstream into FIT image resets = <&rst FPGAMGR_RESET>; altr,bitstream = "fit_spl_fpga.itb"; }; + +- The .its related documentations can be found here + - Appendix - Reducing Arria 10 Fabric Configuration Time - https://rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10 From 636acb40223ecb287c4c8a971daafccd521b4e77 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 7 Aug 2023 01:44:46 +0200 Subject: [PATCH 022/148] doc: board: toradex: fix verdin module output Fix the Verdin module output which was missing white space for correct rendering. While at it also leave product links, add section author also for the Verdin iMX8M Mini and Plus, and add a missing CROSS_COMPILE export for the Verdin iMX8M Mini. Signed-off-by: Marcel Ziswiler Reviewed-by: Nishanth Menon #verdin-am62 Reviewed-by: Tom Rini --- doc/board/toradex/verdin-am62.rst | 99 +++++++++++++++-------------- doc/board/toradex/verdin-imx8mm.rst | 53 ++++++++------- doc/board/toradex/verdin-imx8mp.rst | 62 +++++++++--------- 3 files changed, 113 insertions(+), 101 deletions(-) diff --git a/doc/board/toradex/verdin-am62.rst b/doc/board/toradex/verdin-am62.rst index ac0e86b3001..36db149cda0 100644 --- a/doc/board/toradex/verdin-am62.rst +++ b/doc/board/toradex/verdin-am62.rst @@ -4,6 +4,9 @@ Verdin AM62 Module ================== +- SoM: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 +- Carrier board: https://www.toradex.com/products/carrier-board/verdin-development-board-kit + Quick Start ----------- @@ -74,57 +77,57 @@ Boot Output: -.. code-block:: bash +.. code-block:: none -U-Boot SPL 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:14 +0200) -SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)') -SPL initial stack usage: 13368 bytes -Trying to boot from MMC1 -Authentication passed -Authentication passed -Authentication passed -Authentication passed -Authentication passed -Starting ATF on ARM64 core... + U-Boot SPL 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:14 +0200) + SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)') + SPL initial stack usage: 13368 bytes + Trying to boot from MMC1 + Authentication passed + Authentication passed + Authentication passed + Authentication passed + Authentication passed + Starting ATF on ARM64 core... -NOTICE: BL31: v2.9(release):v2.9.0-73-g463655cc8 -NOTICE: BL31: Built : 14:51:42, Jun 5 2023 -I/TC: -I/TC: OP-TEE version: 3.21.0-168-g322cf9e33 (gcc version 12.2.1 20221205 (Arm GNU Toolchain 12.2.Rel1 (Build arm-12.24))) #2 Mon Jun 5 13:04:15 UTC 2023 aarch64 -I/TC: WARNING: This OP-TEE configuration might be insecure! -I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html -I/TC: Primary CPU initializing -I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)') -I/TC: HUK Initialized -I/TC: Primary CPU switching to normal world boot + NOTICE: BL31: v2.9(release):v2.9.0-73-g463655cc8 + NOTICE: BL31: Built : 14:51:42, Jun 5 2023 + I/TC: + I/TC: OP-TEE version: 3.21.0-168-g322cf9e33 (gcc version 12.2.1 20221205 (Arm GNU Toolchain 12.2.Rel1 (Build arm-12.24))) #2 Mon Jun 5 13:04:15 UTC 2023 aarch64 + I/TC: WARNING: This OP-TEE configuration might be insecure! + I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html + I/TC: Primary CPU initializing + I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)') + I/TC: HUK Initialized + I/TC: Primary CPU switching to normal world boot -U-Boot SPL 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:41 +0200) -SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)') -SPL initial stack usage: 1840 bytes -Trying to boot from MMC1 -Authentication passed -Authentication passed + U-Boot SPL 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:41 +0200) + SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)') + SPL initial stack usage: 1840 bytes + Trying to boot from MMC1 + Authentication passed + Authentication passed -U-Boot 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:41 +0200) + U-Boot 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:41 +0200) -SoC: AM62X SR1.0 HS-FS -DRAM: 2 GiB -Core: 136 devices, 28 uclasses, devicetree: separate -MMC: mmc@fa10000: 0, mmc@fa00000: 1 -Loading Environment from MMC... OK -In: serial@2800000 -Out: serial@2800000 -Err: serial@2800000 -Model: Toradex 0076 Verdin AM62 Quad 2GB WB IT V1.0A -Serial#: 15037380 -Carrier: Toradex Verdin Development Board V1.1A, Serial# 10754333 -am65_cpsw_nuss ethernet@8000000: K3 CPSW: nuss_ver: 0x6BA01103 cpsw_ver: 0x6BA81103 ale_ver: 0x00290105 Ports:2 mdio_freq:1000000 -Setting variant to wifi -Net: -Warning: ethernet@8000000port@1 MAC addresses don't match: -Address in ROM is 1c:63:49:22:5f:f9 -Address in environment is 00:14:2d:e5:73:c4 -eth0: ethernet@8000000port@1 [PRIME], eth1: ethernet@8000000port@2 -Hit any key to stop autoboot: 0 -Verdin AM62 # + SoC: AM62X SR1.0 HS-FS + DRAM: 2 GiB + Core: 136 devices, 28 uclasses, devicetree: separate + MMC: mmc@fa10000: 0, mmc@fa00000: 1 + Loading Environment from MMC... OK + In: serial@2800000 + Out: serial@2800000 + Err: serial@2800000 + Model: Toradex 0076 Verdin AM62 Quad 2GB WB IT V1.0A + Serial#: 15037380 + Carrier: Toradex Verdin Development Board V1.1A, Serial# 10754333 + am65_cpsw_nuss ethernet@8000000: K3 CPSW: nuss_ver: 0x6BA01103 cpsw_ver: 0x6BA81103 ale_ver: 0x00290105 Ports:2 mdio_freq:1000000 + Setting variant to wifi + Net: + Warning: ethernet@8000000port@1 MAC addresses don't match: + Address in ROM is 1c:63:49:22:5f:f9 + Address in environment is 00:14:2d:e5:73:c4 + eth0: ethernet@8000000port@1 [PRIME], eth1: ethernet@8000000port@2 + Hit any key to stop autoboot: 0 + Verdin AM62 # diff --git a/doc/board/toradex/verdin-imx8mm.rst b/doc/board/toradex/verdin-imx8mm.rst index 439128adceb..cc39030450f 100644 --- a/doc/board/toradex/verdin-imx8mm.rst +++ b/doc/board/toradex/verdin-imx8mm.rst @@ -1,8 +1,12 @@ -.. SPDX-License-Identifier: GPL-2.0+ +.. SPDX-License-Identifier: GPL-2.0-or-later +.. sectionauthor:: Marcel Ziswiler Verdin iMX8M Mini Module ======================== +- SoM: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini-nano +- Carrier board: https://www.toradex.com/products/carrier-board/verdin-development-board-kit + Quick Start ----------- @@ -25,6 +29,7 @@ Then build ATF (TF-A): .. code-block:: bash + $ export CROSS_COMPILE=aarch64-linux-gnu- $ make PLAT=imx8mm IMX_BOOT_UART_BASE=0x30860000 bl31 $ cp build/imx8mm/release/bl31.bin ../ @@ -75,30 +80,30 @@ Boot sequence is: Output: -.. code-block:: bash +.. code-block:: none -U-Boot SPL 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200) -Normal Boot -WDT: Started with servicing (60s timeout) -Trying to boot from MMC1 -NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b -NOTICE: BL31: Built : 18:02:12, Aug 16 2021 + U-Boot SPL 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200) + Normal Boot + WDT: Started with servicing (60s timeout) + Trying to boot from MMC1 + NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b + NOTICE: BL31: Built : 18:02:12, Aug 16 2021 -U-Boot 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200) + U-Boot 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200) -CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz -Reset cause: POR -DRAM: 2 GiB -WDT: Started with servicing (60s timeout) -MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 -Loading Environment from MMC... OK -In: serial -Out: serial -Err: serial -Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.1A, Serial# 06760554 -Carrier: Toradex Verdin Development Board V1.1A, Serial# 10754333 -Setting variant to wifi -Net: eth0: ethernet@30be0000 -Hit any key to stop autoboot: 0 -Verdin iMX8MM # + CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz + Reset cause: POR + DRAM: 2 GiB + WDT: Started with servicing (60s timeout) + MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 + Loading Environment from MMC... OK + In: serial + Out: serial + Err: serial + Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.1A, Serial# 06760554 + Carrier: Toradex Verdin Development Board V1.1A, Serial# 10754333 + Setting variant to wifi + Net: eth0: ethernet@30be0000 + Hit any key to stop autoboot: 0 + Verdin iMX8MM # diff --git a/doc/board/toradex/verdin-imx8mp.rst b/doc/board/toradex/verdin-imx8mp.rst index 482f6935779..bdc4d0c2cb5 100644 --- a/doc/board/toradex/verdin-imx8mp.rst +++ b/doc/board/toradex/verdin-imx8mp.rst @@ -1,8 +1,12 @@ .. SPDX-License-Identifier: GPL-2.0-or-later +.. sectionauthor:: Marcel Ziswiler Verdin iMX8M Plus Module ======================== +- SoM: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus +- Carrier board: https://www.toradex.com/products/carrier-board/verdin-development-board-kit + Quick Start ----------- @@ -76,36 +80,36 @@ Boot sequence is: Output: -.. code-block:: bash +.. code-block:: none -U-Boot SPL 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100) -Quad die, dual rank failed, attempting dual die, single rank configuration. -Normal Boot -WDT: Started watchdog@30280000 with servicing (60s timeout) -Trying to boot from BOOTROM -Find img info 0x&48025a00, size 872 -Need continue download 1024 -Download 779264, Total size 780424 -NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b -NOTICE: BL31: Built : 16:52:37, Aug 26 2021 + U-Boot SPL 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100) + Quad die, dual rank failed, attempting dual die, single rank configuration. + Normal Boot + WDT: Started watchdog@30280000 with servicing (60s timeout) + Trying to boot from BOOTROM + Find img info 0x&48025a00, size 872 + Need continue download 1024 + Download 779264, Total size 780424 + NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b + NOTICE: BL31: Built : 16:52:37, Aug 26 2021 -U-Boot 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100) + U-Boot 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100) -CPU: Freescale i.MX8MP[8] rev1.1 at 1200 MHz -Reset cause: POR -DRAM: 8 GiB -Core: 78 devices, 18 uclasses, devicetree: separate -WDT: Started watchdog@30280000 with servicing (60s timeout) -MMC: FSL_SDHC: 1, FSL_SDHC: 2 -Loading Environment from MMC... OK -In: serial -Out: serial -Err: serial -Model: Toradex Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT V1.0B, Serial# 06817281 -Carrier: Toradex Verdin Development Board V1.1A, Serial# 10807609 -Setting variant to wifi -Net: Hard-coding pdata->enetaddr -eth1: ethernet@30be0000, eth0: ethernet@30bf0000 [PRIME] -Hit any key to stop autoboot: 0 -Verdin iMX8MP # + CPU: Freescale i.MX8MP[8] rev1.1 at 1200 MHz + Reset cause: POR + DRAM: 8 GiB + Core: 78 devices, 18 uclasses, devicetree: separate + WDT: Started watchdog@30280000 with servicing (60s timeout) + MMC: FSL_SDHC: 1, FSL_SDHC: 2 + Loading Environment from MMC... OK + In: serial + Out: serial + Err: serial + Model: Toradex Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT V1.0B, Serial# 06817281 + Carrier: Toradex Verdin Development Board V1.1A, Serial# 10807609 + Setting variant to wifi + Net: Hard-coding pdata->enetaddr + eth1: ethernet@30be0000, eth0: ethernet@30bf0000 [PRIME] + Hit any key to stop autoboot: 0 + Verdin iMX8MP # From c631cf84dba9204ca1167b613b72847b6b18e7e4 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Mon, 7 Aug 2023 08:42:41 +0200 Subject: [PATCH 023/148] doc: ti: Explain how the various gadget devices can be used Describe the current situation wrt the handling of USB devices on AM33xx based boards, taking the example of a common board (the Beagle Bone Black) and explaining how the different USB gadgets can be used. Signed-off-by: Miquel Raynal --- doc/board/ti/am335x_evm.rst | 62 +++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/doc/board/ti/am335x_evm.rst b/doc/board/ti/am335x_evm.rst index ee4faec37c2..3332d51b365 100644 --- a/doc/board/ti/am335x_evm.rst +++ b/doc/board/ti/am335x_evm.rst @@ -201,3 +201,65 @@ booting and mtdparts have been configured correctly for the board: U-Boot # spl export fdt ${loadaddr} - ${fdtaddr} U-Boot # nand erase.part u-boot-spl-os U-Boot # nand write ${fdtaddr} u-boot-spl-os + +USB device +---------- + +The platform code for am33xx based designs is legacy in the sense that +it is not fully compliant with the driver model in its management of the +various resources. This is particularly true for the USB Ethernet gadget +which will automatically be bound to the first USB Device Controller +(UDC). This make the USB Ethernet gadget work out of the box on common +boards like the Beagle Bone Blacks and by default will prevents other +gadgets to be used. + +The output of the 'dm tree' command shows which driver is bound to which +device, so the user can easily configure their platform differently from +the command line: + +.. code-block:: text + + => dm tree + Class Index Probed Driver Name + ----------------------------------------------------------- + [...] + misc 0 [ + ] ti-musb-wrapper | |-- usb@47400000 + usb 0 [ + ] ti-musb-peripheral | | |-- usb@47401000 + ethernet 1 [ + ] usb_ether | | | `-- usb_ether + bootdev 3 [ ] eth_bootdev | | | `-- usb_ether.bootdev + usb 0 [ ] ti-musb-host | | `-- usb@47401800 + +Typically here any network command performed using the usb_ether +interface would work, while using other gadgets would fail: + +.. code-block:: text + + => fastboot usb 0 + All UDC in use (1 available), use the unbind command + g_dnl_register: failed!, error: -19 + exit not allowed from main input shell. + +As hinted by the primary error message, the only controller available +(usb@47401000) is currently bound to the usb_ether driver, which makes +it impossible for the fastboot command to bind with this device (at +least from a bootloader point of view). The solution here would be to +use the unbind command specifying the class and index parameters (as +shown above in the 'dm tree' output) to target the driver to unbind: + +.. code-block:: text + + => unbind ethernet 1 + +The output of the 'dm tree' command now shows the availability of the +first USB device controller, the fastboot gadget will now be able to +bind with it: + +.. code-block:: text + + => dm tree + Class Index Probed Driver Name + ----------------------------------------------------------- + [...] + misc 0 [ + ] ti-musb-wrapper | |-- usb@47400000 + usb 0 [ ] ti-musb-peripheral | | |-- usb@47401000 + usb 0 [ ] ti-musb-host | | `-- usb@47401800 From 961519b58d1c578f88a8a1f8c6ed78344cb47c96 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 7 Aug 2023 10:42:46 -0300 Subject: [PATCH 024/148] doc: imx8mp_evk: Remove unneeded export ATF_LOAD_ADDR line Originally, exporting the ATF_LOAD_ADDR was required, but since binman has been used to generate the flash.bin, it is no longer needed to do such manual export. The ATF address is now passed via binman in imx8mp-u-boot.dtsi: atf { description = "ARM Trusted Firmware"; type = "firmware"; arch = "arm64"; compression = "none"; load = <0x970000>; entry = <0x970000>; atf_blob: atf-blob { filename = "bl31.bin"; type = "atf-bl31"; }; }; Remove the unneeded export ATF_LOAD_ADDR line. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan --- doc/board/nxp/imx8mp_evk.rst | 1 - 1 file changed, 1 deletion(-) diff --git a/doc/board/nxp/imx8mp_evk.rst b/doc/board/nxp/imx8mp_evk.rst index e7cc7b396b5..e106c3c7187 100644 --- a/doc/board/nxp/imx8mp_evk.rst +++ b/doc/board/nxp/imx8mp_evk.rst @@ -44,7 +44,6 @@ Build U-Boot $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_202006.bin ./build/ $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_202006.bin ./build/ $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_202006.bin ./build/ - $ export ATF_LOAD_ADDR=0x970000 $ make O=build Burn the flash.bin to the MicroSD card at offset 32KB: From 8134043dada24a1879d85a9218c24c617ee4ae1e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 7 Aug 2023 10:42:47 -0300 Subject: [PATCH 025/148] doc: imx8mp_evk: Use in-tree build in the example To make it consistent with the instructions from other NXP imx8m boards, such as imx8mm-evk and imx8mn-evk, use U-Boot in-tree build in the examples. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan --- doc/board/nxp/imx8mp_evk.rst | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/doc/board/nxp/imx8mp_evk.rst b/doc/board/nxp/imx8mp_evk.rst index e106c3c7187..72175dbe78f 100644 --- a/doc/board/nxp/imx8mp_evk.rst +++ b/doc/board/nxp/imx8mp_evk.rst @@ -37,20 +37,22 @@ Build U-Boot .. code-block:: bash +Note: builddir is U-Boot build directory (source directory for in-tree builds). + $ export CROSS_COMPILE=aarch64-poky-linux- $ make O=build imx8mp_evk_defconfig - $ cp ../imx-atf/build/imx8mp/release/bl31.bin ./build/bl31.bin - $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_202006.bin ./build/ - $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_202006.bin ./build/ - $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_202006.bin ./build/ - $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_202006.bin ./build/ - $ make O=build + $ cp ../imx-atf/build/imx8mp/release/bl31.bin $(builddir) + $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_202006.bin $(builddir) + $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_202006.bin $(builddir) + $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_202006.bin $(builddir) + $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_202006.bin $(builddir) + $ make Burn the flash.bin to the MicroSD card at offset 32KB: .. code-block:: bash - $sudo dd if=build/flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc; sync + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc; sync Boot ---- From fa43709b8d7aa30b6d1039dce854c5eea86f122f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 8 Aug 2023 16:36:16 -0400 Subject: [PATCH 026/148] doc: Begin adding a best practices document for board ports To help guide developers down the right path, begin a document that lists some best practices to follow when creating a new board port. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- doc/develop/board_best_practices.rst | 26 ++++++++++++++++++++++++++ doc/develop/index.rst | 1 + 2 files changed, 27 insertions(+) create mode 100644 doc/develop/board_best_practices.rst diff --git a/doc/develop/board_best_practices.rst b/doc/develop/board_best_practices.rst new file mode 100644 index 00000000000..f44401eab7d --- /dev/null +++ b/doc/develop/board_best_practices.rst @@ -0,0 +1,26 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +Best Practices for Board Ports +============================== + +In addition to the regular best practices such as using :doc:`checkpatch` and +following the :doc:`docstyle` and the :doc:`codingstyle` there are some things +which are specific to creating a new board port. + +* Implement :doc:`bootstd` to ensure that most operating systems will be + supported by the platform. + +* The platform defconfig file must be generated via `make savedefconfig`. + +* The Kconfig and Kbuild infrastructure supports using "fragments" that can be + used to apply changes on top of a defconfig file. These can be useful for + many things such as: + + * Supporting different firmware locations (e.g. eMMC, SD, QSPI). + + * Multiple board variants when runtime detection is not desired. + + * Supporting different build types such as production and development. + + Kconfig fragments should reside in the board directory itself rather than in + the top-level `configs/` directory. diff --git a/doc/develop/index.rst b/doc/develop/index.rst index 263d404b4ca..5b230d0321f 100644 --- a/doc/develop/index.rst +++ b/doc/develop/index.rst @@ -9,6 +9,7 @@ General .. toctree:: :maxdepth: 1 + board_best_practices codingstyle designprinciples docstyle From 0f621ca9b92098ee08b944c5138e398059fcf6ee Mon Sep 17 00:00:00 2001 From: Shenlin Liang Date: Fri, 28 Jul 2023 14:57:44 +0800 Subject: [PATCH 027/148] arm64: fsl: layerscape: Remove unused functions Function board_switch_core_volt has not been used since it was defined Signed-off-by: Shenlin Liang Signed-off-by: Peng Fan --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 577a0b60983..3bfdc3f7743 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -575,11 +575,6 @@ int get_core_volt_from_fuse(void) return vdd; } -__weak int board_switch_core_volt(u32 vdd) -{ - return 0; -} - static int setup_core_volt(u32 vdd) { return board_setup_core_volt(vdd); From 4c4ccc5a0499cf2abdca95415caf7443c760a26d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:15:12 -0600 Subject: [PATCH 028/148] usb: Return -ENOENT when no devices are found When USB finds no devices it currently returns -EPERM which bootstd does not understand. This causes other bootdevs of the same priority to be skipped. Fix this by returning the correct error code. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/usb/host/usb-uclass.c | 2 +- include/usb.h | 9 ++++++++- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c index 02c0138a206..7a03435ba77 100644 --- a/drivers/usb/host/usb-uclass.c +++ b/drivers/usb/host/usb-uclass.c @@ -346,7 +346,7 @@ int usb_init(void) if (controllers_initialized == 0) printf("No working controllers found\n"); - return usb_started ? 0 : -1; + return usb_started ? 0 : -ENOENT; } int usb_setup_ehci_gadget(struct ehci_ctrl **ctlrp) diff --git a/include/usb.h b/include/usb.h index 42b001c3dd5..09e3f0cb309 100644 --- a/include/usb.h +++ b/include/usb.h @@ -257,7 +257,14 @@ int usb_kbd_deregister(int force); #endif /* routines */ -int usb_init(void); /* initialize the USB Controller */ + +/* + * usb_init() - initialize the USB Controllers + * + * Returns: 0 if OK, -ENOENT if there are no USB devices + */ +int usb_init(void); + int usb_stop(void); /* stop the USB Controller */ int usb_detect_change(void); /* detect if a USB device has been (un)plugged */ From 3a3543db519478cd174e4554691f3d4828902c79 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:15:13 -0600 Subject: [PATCH 029/148] lib: Suppress E when writing error-string output When CONFIG_ERRNO_STR is not enabled this shows a spurious 'E' from the format string. Fix this. Fixes: 7f331941321 ("lib: Support printing an error string") Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- lib/vsprintf.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/vsprintf.c b/lib/vsprintf.c index e87503e41ad..e14c6ca9f96 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -680,8 +680,10 @@ repeat: break; case 'd': - if (fmt[1] == 'E') + if (fmt[1] == 'E') { flags |= ERRSTR; + fmt++; + } /* fallthrough */ case 'i': flags |= SIGN; @@ -725,7 +727,6 @@ repeat: ADDCH(str, ' '); for (p = errno_str(num); *p; p++) ADDCH(str, *p); - fmt++; } } From d7d78576bbfddd52b258771c9e926bd51b50d91e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:15:14 -0600 Subject: [PATCH 030/148] bootstd: Rename bootdev_setup_sibling_blk() This name is a little confusing since it suggests that it sets up the sibling block device. In fact it sets up a bootdev for it. Rename the function to make this clearer. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Mattijs Korpershoek --- boot/bootdev-uclass.c | 8 +++++--- common/usb_storage.c | 2 +- doc/develop/bootstd.rst | 4 ++-- drivers/mmc/mmc-uclass.c | 2 +- drivers/nvme/nvme.c | 2 +- drivers/scsi/scsi.c | 2 +- drivers/virtio/virtio-uclass.c | 2 +- include/bootdev.h | 10 +++++----- 8 files changed, 17 insertions(+), 15 deletions(-) diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c index 3f2c8d7153a..1c16ca1b8d7 100644 --- a/boot/bootdev-uclass.c +++ b/boot/bootdev-uclass.c @@ -262,7 +262,7 @@ static int bootdev_get_suffix_start(struct udevice *dev, const char *suffix) return len; } -int bootdev_setup_sibling_blk(struct udevice *blk, const char *drv_name) +int bootdev_setup_for_sibling_blk(struct udevice *blk, const char *drv_name) { struct udevice *parent, *dev; char dev_name[50]; @@ -305,7 +305,9 @@ int bootdev_get_sibling_blk(struct udevice *dev, struct udevice **blkp) if (device_get_uclass_id(dev) != UCLASS_BOOTDEV) return -EINVAL; - /* This should always work if bootdev_setup_sibling_blk() was used */ + /* + * This should always work if bootdev_setup_for_sibling_blk() was used + */ len = bootdev_get_suffix_start(dev, ".bootdev"); ret = device_find_child_by_namelen(parent, dev->name, len, &blk); if (ret) { @@ -335,7 +337,7 @@ static int bootdev_get_from_blk(struct udevice *blk, struct udevice **bootdevp) if (device_get_uclass_id(blk) != UCLASS_BLK) return -EINVAL; - /* This should always work if bootdev_setup_sibling_blk() was used */ + /* This should always work if bootdev_setup_for_sibling_blk() was used */ len = bootdev_get_suffix_start(blk, ".blk"); snprintf(dev_name, sizeof(dev_name), "%.*s.%s", len, blk->name, "bootdev"); diff --git a/common/usb_storage.c b/common/usb_storage.c index ac642757737..85774220ef2 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -246,7 +246,7 @@ static int usb_stor_probe_device(struct usb_device *udev) if (ret) return ret; - ret = bootdev_setup_sibling_blk(dev, "usb_bootdev"); + ret = bootdev_setup_for_sibling_blk(dev, "usb_bootdev"); if (ret) { int ret2; diff --git a/doc/develop/bootstd.rst b/doc/develop/bootstd.rst index 7a2a69fdfce..ec313653578 100644 --- a/doc/develop/bootstd.rst +++ b/doc/develop/bootstd.rst @@ -306,7 +306,7 @@ media device:: The bootdev device is typically created automatically in the media uclass' `post_bind()` method by calling `bootdev_setup_for_dev()` or -`bootdev_setup_sibling_blk()`. The code typically something like this:: +`bootdev_setup_for_sibling_blk()`. The code typically something like this:: /* dev is the Ethernet device */ ret = bootdev_setup_for_dev(dev, "eth_bootdev"); @@ -316,7 +316,7 @@ The bootdev device is typically created automatically in the media uclass' or:: /* blk is the block device (child of MMC device) - ret = bootdev_setup_sibling_blk(blk, "mmc_bootdev"); + ret = bootdev_setup_for_sibling_blk(blk, "mmc_bootdev"); if (ret) return log_msg_ret("bootdev", ret); diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 01d9b0201f2..0e157672eae 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -421,7 +421,7 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg) mmc->cfg = cfg; mmc->priv = dev; - ret = bootdev_setup_sibling_blk(bdev, "mmc_bootdev"); + ret = bootdev_setup_for_sibling_blk(bdev, "mmc_bootdev"); if (ret) return log_msg_ret("bootdev", ret); diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index a7add66ab4d..20dc910d8a3 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -910,7 +910,7 @@ int nvme_init(struct udevice *udev) if (ret) goto free_id; - ret = bootdev_setup_sibling_blk(ns_udev, "nvme_bootdev"); + ret = bootdev_setup_for_sibling_blk(ns_udev, "nvme_bootdev"); if (ret) return log_msg_ret("bootdev", ret); diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 6caeb3fcdd0..0a3420b7fbc 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -607,7 +607,7 @@ static int do_scsi_scan_one(struct udevice *dev, int id, int lun, bool verbose) /* TODO: undo create */ return log_msg_ret("pro", ret); - ret = bootdev_setup_sibling_blk(bdev, "scsi_bootdev"); + ret = bootdev_setup_for_sibling_blk(bdev, "scsi_bootdev"); if (ret) return log_msg_ret("bd", ret); diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c index f2b3ef1d8b9..c5420162735 100644 --- a/drivers/virtio/virtio-uclass.c +++ b/drivers/virtio/virtio-uclass.c @@ -248,7 +248,7 @@ static int virtio_uclass_post_probe(struct udevice *udev) device_set_name_alloced(vdev); if (uc_priv->device == VIRTIO_ID_BLOCK && !IS_ENABLED(CONFIG_SANDBOX)) { - ret = bootdev_setup_sibling_blk(vdev, "virtio_bootdev"); + ret = bootdev_setup_for_sibling_blk(vdev, "virtio_bootdev"); if (ret) return log_msg_ret("bootdev", ret); } diff --git a/include/bootdev.h b/include/bootdev.h index 1533adfe506..848233187f8 100644 --- a/include/bootdev.h +++ b/include/bootdev.h @@ -371,7 +371,7 @@ int bootdev_next_prio(struct bootflow_iter *iter, struct udevice **devp); /** * bootdev_setup_for_dev() - Bind a new bootdev device (deprecated) * - * Please use bootdev_setup_sibling_blk() instead since it supports multiple + * Please use bootdev_setup_for_sibling_blk() instead since it supports multiple * (child) block devices for each media device. * * Creates a bootdev device as a child of @parent. This should be called from @@ -386,7 +386,7 @@ int bootdev_next_prio(struct bootflow_iter *iter, struct udevice **devp); int bootdev_setup_for_dev(struct udevice *parent, const char *drv_name); /** - * bootdev_setup_for_blk() - Bind a new bootdev device for a blk device + * bootdev_setup_for_sibling_blk() - Bind a new bootdev device for a blk device * * Creates a bootdev device as a sibling of @blk. This should be called from * the driver's bind() method or its uclass' post_bind() method, at the same @@ -398,7 +398,7 @@ int bootdev_setup_for_dev(struct udevice *parent, const char *drv_name); * @drv_name: Name of bootdev driver to bind * Return: 0 if OK, -ve on error */ -int bootdev_setup_sibling_blk(struct udevice *blk, const char *drv_name); +int bootdev_setup_for_sibling_blk(struct udevice *blk, const char *drv_name); /** * bootdev_get_sibling_blk() - Locate the block device for a bootdev @@ -428,8 +428,8 @@ static inline int bootdev_setup_for_dev(struct udevice *parent, return 0; } -static inline int bootdev_setup_sibling_blk(struct udevice *blk, - const char *drv_name) +static inline int bootdev_setup_for_sibling_blk(struct udevice *blk, + const char *drv_name) { return 0; } From 2d5b5a9cdb7dc0646ca51206dde509f724bf6403 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:15:15 -0600 Subject: [PATCH 031/148] bootstd: Correct creating of bootdev sibling Use the correct function here, since there may be multiple IDE devices available. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Mattijs Korpershoek --- drivers/block/ide.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/block/ide.c b/drivers/block/ide.c index 89201dd4d22..c698f9cbd55 100644 --- a/drivers/block/ide.c +++ b/drivers/block/ide.c @@ -1059,9 +1059,9 @@ static int ide_probe(struct udevice *udev) desc->lba48 = pdesc.lba48; desc->type = pdesc.type; - ret = bootdev_setup_for_dev(udev, "ide_bootdev"); + ret = bootdev_setup_for_sibling_blk(blk, "ide_bootdev"); if (ret) - return log_msg_ret("bootdev", ret); + return log_msg_ret("bd", ret); } return 0; From 3500ae13c6c17c6702f0efcd8ce9beeb9503ce6a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:15:16 -0600 Subject: [PATCH 032/148] bootstd: Add some more debugging in the bootdev uclass Add some more output to make it easier to see what is going wrong when a bootdev hunter fails. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- boot/bootdev-uclass.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c index 1c16ca1b8d7..fa52bc3a9c4 100644 --- a/boot/bootdev-uclass.c +++ b/boot/bootdev-uclass.c @@ -537,6 +537,8 @@ static int default_get_bootflow(struct udevice *dev, struct bootflow_iter *iter, int ret; ret = bootdev_get_sibling_blk(dev, &blk); + log_debug("sibling_blk ret=%d, blk=%s\n", ret, + ret ? "(none)" : blk->name); /* * If there is no media, indicate that no more partitions should be * checked @@ -662,7 +664,8 @@ int bootdev_next_prio(struct bootflow_iter *iter, struct udevice **devp) ret = bootdev_hunt_prio(iter->cur_prio, iter->flags & BOOTFLOWIF_SHOW); - log_debug("- hunt ret %d\n", ret); + log_debug("- bootdev_hunt_prio() ret %d\n", + ret); if (ret) return log_msg_ret("hun", ret); } @@ -698,6 +701,7 @@ int bootdev_setup_iter(struct bootflow_iter *iter, const char *label, /* hunt for any pre-scan devices */ if (iter->flags & BOOTFLOWIF_HUNT) { ret = bootdev_hunt_prio(BOOTDEVP_1_PRE_SCAN, show); + log_debug("- bootdev_hunt_prio() ret %d\n", ret); if (ret) return log_msg_ret("pre", ret); } @@ -768,6 +772,7 @@ static int bootdev_hunt_drv(struct bootdev_hunter *info, uint seq, bool show) log_debug("Hunting with: %s\n", name); if (info->hunt) { ret = info->hunt(info, show); + log_debug(" - hunt result %d\n", ret); if (ret) return ret; } @@ -833,9 +838,11 @@ int bootdev_hunt_prio(enum bootdev_prio_t prio, bool show) if (prio != info->prio) continue; ret = bootdev_hunt_drv(info, i, show); + log_debug("bootdev_hunt_drv() return %d\n", ret); if (ret && ret != -ENOENT) result = ret; } + log_debug("exit %d\n", result); return result; } From d60fb7a958780dc6215258430501d4c221b1ea0c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:15:19 -0600 Subject: [PATCH 033/148] x86: coreboot: Update doc for CBFS access Add an example to show how cbfs is used. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [Removed CONFIG_CMD_CBFS from defconfig files] Signed-off-by: Bin Meng --- doc/board/coreboot/coreboot.rst | 34 +++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst index 0fe95af56d2..21801a8a4d9 100644 --- a/doc/board/coreboot/coreboot.rst +++ b/doc/board/coreboot/coreboot.rst @@ -51,6 +51,40 @@ can be useful for running UEFI applications, for example. This has only been lightly tested. +CBFS access +----------- + +You can use the 'cbfs' commands to access the Coreboot filesystem:: + + => cbfsinit + => cbfsinfo + + CBFS version: 0x31313132 + ROM size: 0x100000 + Boot block size: 0x4 + CBFS size: 0xffdfc + Alignment: 64 + Offset: 0x200 + + => cbfsls + size type name + ------------------------------------------ + 32 cbfs header cbfs master header + 16720 17 fallback/romstage + 53052 17 fallback/ramstage + 398 raw config + 715 raw revision + 117 raw build_info + 4044 raw fallback/dsdt.aml + 640 cmos layout cmos_layout.bin + 17804 17 fallback/postcar + 335797 payload fallback/payload + 607000 null (empty) + 10752 bootblock bootblock + + 12 file(s) + + => Memory map ---------- From 22080e05fc4bcfd8c25474ca3ecfce4814fa486d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:15:59 -0600 Subject: [PATCH 034/148] x86: spl: Drop unwanted debug() This was left over from some previous debugging. Drop it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/spl.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index b6812bb8ca2..55c06157086 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -137,7 +137,6 @@ static int x86_spl_init(void) } #ifndef CONFIG_SYS_COREBOOT - log_debug("bss\n"); debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start, (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start); memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); From d5a3f14c23edb124babeb9a01f543f2ab3a7e14f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:16:00 -0600 Subject: [PATCH 035/148] video: Tidy up Makefile rule for video Drop the duplication and add a single rule which can handle SPL as well. Signed-off-by: Simon Glass Reviewed-by: Nikhil M Jain Reviewed-by: Bin Meng --- drivers/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 2e38c7552cc..efc2a4afb24 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -39,6 +39,8 @@ obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/ obj-$(CONFIG_$(SPL_)NVME) += nvme/ obj-$(CONFIG_XEN) += xen/ obj-$(CONFIG_$(SPL_)FPGA) += fpga/ +obj-$(CONFIG_$(SPL_)VIDEO) += video/ + obj-y += bus/ ifndef CONFIG_TPL_BUILD @@ -64,7 +66,6 @@ obj-$(CONFIG_SPL_USB_HOST) += usb/host/ obj-$(CONFIG_SPL_SATA) += ata/ scsi/ obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/ obj-$(CONFIG_SPL_THERMAL) += thermal/ -obj-$(CONFIG_SPL_VIDEO) +=video/ endif endif @@ -99,7 +100,6 @@ obj-y += rtc/ obj-y += scsi/ obj-y += sound/ obj-y += spmi/ -obj-y += video/ obj-y += watchdog/ obj-$(CONFIG_QE) += qe/ obj-$(CONFIG_U_QE) += qe/ From ea6eef27caba27f8b92b13dda123623d59947ece Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:16:01 -0600 Subject: [PATCH 036/148] x86: Run QEMU machine setup in SPL Call the hardware-init function from QEMU from SPL. This allows the video BIOS to operate correctly. Create an x86-wide qemu.h header to avoid having to #ifdef the header in spl.c Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng # qemu-x86_64 --- arch/x86/cpu/qemu/qemu.c | 2 +- arch/x86/include/asm/qemu.h | 14 ++++++++++++++ arch/x86/lib/spl.c | 3 +++ 3 files changed, 18 insertions(+), 1 deletion(-) create mode 100644 arch/x86/include/asm/qemu.h diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c index 274978c023b..70414556086 100644 --- a/arch/x86/cpu/qemu/qemu.c +++ b/arch/x86/cpu/qemu/qemu.c @@ -48,7 +48,7 @@ static void enable_pm_ich9(void) pci_write_config32(ICH9_PM, PMBA, CONFIG_ACPI_PM1_BASE | 1); } -static void qemu_chipset_init(void) +void qemu_chipset_init(void) { u16 device, xbcs; int pam, i; diff --git a/arch/x86/include/asm/qemu.h b/arch/x86/include/asm/qemu.h new file mode 100644 index 00000000000..f1e95ffd7a4 --- /dev/null +++ b/arch/x86/include/asm/qemu.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Generic QEMU header + * + * Copyright 2023 Google LLC + */ + +#ifndef __QEMU_H +#define __QEMU_H + +/* set up the chipset for QEMU so that video can be used */ +void qemu_chipset_init(void); + +#endif diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 55c06157086..f99df08fbec 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -291,6 +292,8 @@ void spl_board_init(void) #ifndef CONFIG_TPL preloader_console_init(); #endif + if (IS_ENABLED(CONFIG_QEMU)) + qemu_chipset_init(); if (CONFIG_IS_ENABLED(VIDEO)) { struct udevice *dev; From 1fa64e155d93a9e8a44b34e22390db61bfb24afd Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:16:02 -0600 Subject: [PATCH 037/148] Revert "x86: Switch QEMU over to use the bochs driver" Unfortunately the bochs driver does not currently work with distros. It causes a hang between grub menu selection and the OS displaying something. Preliminary investigation shows that GRUB does not jump to the kernel at all. This reproduces reliably. This reverts commit b8956425d525c3c25fd218f252f89a5e44df6a9f. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng # qemu-x86_64 [Slightly modify the commit message about preliminary investigation] Signed-off-by: Bin Meng --- arch/x86/cpu/qemu/Kconfig | 2 +- configs/qemu-x86_64_defconfig | 4 ++++ configs/qemu-x86_defconfig | 3 +++ 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig index aa329b0dab2..f8f2f647308 100644 --- a/arch/x86/cpu/qemu/Kconfig +++ b/arch/x86/cpu/qemu/Kconfig @@ -12,7 +12,7 @@ config QEMU imply SYS_NS16550 imply USB imply USB_EHCI_HCD - imply VIDEO_BOCHS + imply VIDEO_VESA if QEMU diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 9cf38a5c695..c6f30674a8f 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -84,6 +84,10 @@ CONFIG_SPL_DM_RTC=y CONFIG_SYS_NS16550_PORT_MAPPED=y CONFIG_SPI=y CONFIG_USB_KEYBOARD=y +CONFIG_SPL_VIDEO=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x144 CONFIG_CONSOLE_SCROLL_LINES=5 # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_GENERATE_ACPI_TABLE=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 95a6ff9ae79..56788cd185f 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -53,6 +53,9 @@ CONFIG_NVME_PCI=y CONFIG_SYS_NS16550_PORT_MAPPED=y CONFIG_SPI=y CONFIG_USB_KEYBOARD=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_USER=y +CONFIG_FRAMEBUFFER_VESA_MODE=0x144 CONFIG_CONSOLE_SCROLL_LINES=5 CONFIG_GENERATE_ACPI_TABLE=y # CONFIG_GZIP is not set From 4099df48a68fdfdc4b1d57a503679b35e724de4e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:16:04 -0600 Subject: [PATCH 038/148] x86: Correct copying of BIOS mode information This is copying beyond the end of the destination buffer. Correct the code by using the size of the vesa_mode_info struct. We don't need to copy the rest of the bytes in the buffer. This long-standing bug prevents virtio bootdevs working correctly on qemu-x86 at present. Fixes: 0ca2426beae ("x86: Add support for running option ROMs natively") Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng # qemu-x86_64 --- arch/x86/lib/bios.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c index e29cae78e50..f146bbd5422 100644 --- a/arch/x86/lib/bios.c +++ b/arch/x86/lib/bios.c @@ -204,7 +204,7 @@ static u8 vbe_get_mode_info(struct vesa_state *mi) realmode_interrupt(0x10, VESA_GET_MODE_INFO, 0x0000, mi->video_mode, 0x0000, buffer_seg, buffer_adr); - memcpy(mi->mode_info_block, buffer, sizeof(struct vesa_state)); + memcpy(mi->mode_info_block, buffer, sizeof(struct vesa_mode_info)); mi->valid = true; return 0; From b7080bfceb35cba3a460decb04a9fc3d6dbba511 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:16:05 -0600 Subject: [PATCH 039/148] video: Add a Kconfig option for SPL video handoff At present this feature is enabled in SPL if a bloblist is available. Some platforms may not want to use this, so add an option to allow the feature to be disabled. Note that the feature unfortunately only fills in part of the video-handoff information, so causes failures on x86 platforms. For now, disable it there. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng # qemu-x86_64 --- common/board_f.c | 3 +-- drivers/video/Kconfig | 10 ++++++++++ drivers/video/video-uclass.c | 2 +- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/common/board_f.c b/common/board_f.c index 7d2c380e91e..791c1e601c4 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -411,8 +411,7 @@ __weak int arch_reserve_mmu(void) static int reserve_video(void) { - if (IS_ENABLED(CONFIG_SPL_VIDEO) && spl_phase() > PHASE_SPL && - CONFIG_IS_ENABLED(BLOBLIST)) { + if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) { struct video_handoff *ho; ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho)); diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index e32ce13fb6b..2a37d026bc2 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1011,6 +1011,16 @@ config SPL_VIDEO if SPL_VIDEO source "drivers/video/tidss/Kconfig" +config SPL_VIDEO_HANDOFF + bool "Pass the video frame-buffer through to U-Boot proper" + depends on SPL_BLOBLIST + default y if !X86 + help + Enable this to set up video-handoff information in SPL which can be + picked up in U-Boot proper. This includes the frame buffer and + various other pieces of information. With this enabled, SPL can set + up video and avoid re-initing it later. + config SPL_VIDEO_LOGO bool "Show the U-Boot logo on the display at SPL" default y if !SPL_SPLASH_SCREEN diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 8f268fc4063..f743ed74c81 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -141,7 +141,7 @@ int video_reserve(ulong *addrp) debug("Video frame buffers from %lx to %lx\n", gd->video_bottom, gd->video_top); - if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) { + if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(VIDEO_HANDOFF)) { struct video_handoff *ho; ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0); From cfa5934979dcb3f2f3edce8af040f1465a2367b7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:16:06 -0600 Subject: [PATCH 040/148] x86: Enable useful options for qemu-86 This build can be used to boot 32-bit standard-distro builds. Enable some more options, so that all possible EFI UUIDs are decoded, we can search memory for tables, support the full set of standard-boot features, have full logging along with debug UART and can boot from CDROM media. This mirrors a similar patch for qemu-x86_64 Signed-off-by: Simon Glass Reviewed-by: Bin Meng [Drop the unknown option from defconfig] Signed-off-by: Bin Meng --- configs/qemu-x86_defconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 56788cd185f..24682a5387d 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -5,10 +5,14 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x40000 CONFIG_MAX_CPUS=2 CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART=y CONFIG_SMP=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_FIT=y +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y @@ -16,6 +20,8 @@ CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_LOG=y +CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y @@ -23,11 +29,13 @@ CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_MEM_SEARCH=y CONFIG_CMD_IDE=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_BOOTFILESIZE=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_QFW=y CONFIG_CMD_BOOTSTAGE=y From b985760b7eac0b0294c24347c1c21a6ea0675da2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 11:16:07 -0600 Subject: [PATCH 041/148] x86: Update qemu documentation Add some hints and observations related to booting distros on QEMU on x86. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- doc/board/emulation/qemu-x86.rst | 88 ++++++++++++++++++++++++++++++-- 1 file changed, 84 insertions(+), 4 deletions(-) diff --git a/doc/board/emulation/qemu-x86.rst b/doc/board/emulation/qemu-x86.rst index e7dd4e994d3..15f56b6bc70 100644 --- a/doc/board/emulation/qemu-x86.rst +++ b/doc/board/emulation/qemu-x86.rst @@ -113,7 +113,87 @@ sure the specified CPU supports 64-bit like '-cpu core2duo'. Conversely '-cpu pentium' won't work for obvious reasons that the processor only supports 32-bit. -Note 64-bit support is very preliminary at this point. Lots of features -are missing in the 64-bit world. One notable feature is the VGA console -support which is currently missing, so that you must specify '-nographic' -to get 64-bit U-Boot up and running. +Booting distros +--------------- + +It is possible to install and boot a standard Linux distribution using +qemu-x86_64 by setting up a root disk:: + + qemu-img create root.img 10G + +then using the installer to install. For example, with Ubuntu 2023.04:: + + qemu-system-x86_64 -m 8G -smp 4 -bios /tmp/b/qemu-x86_64/u-boot.rom \ + -drive file=root.img,if=virtio,driver=raw \ + -drive file=ubuntu-23.04-desktop-amd64.iso,if=virtio,driver=raw + +You can also add `-serial mon:stdio` if you want the serial console to show as +well as the video. + +The output will be something like this:: + + U-Boot SPL 2023.07 (Jul 23 2023 - 08:00:12 -0600) + Trying to boot from SPI + Jumping to 64-bit U-Boot: Note many features are missing + + + U-Boot 2023.07 (Jul 23 2023 - 08:00:12 -0600) + + CPU: QEMU Virtual CPU version 2.5+ + DRAM: 8 GiB + Core: 20 devices, 13 uclasses, devicetree: separate + Loading Environment from nowhere... OK + Model: QEMU x86 (I440FX) + Net: e1000: 52:54:00:12:34:56 + eth0: e1000#0 + Hit any key to stop autoboot: 0 + Scanning for bootflows in all bootdevs + Seq Method State Uclass Part Name Filename + --- ----------- ------ -------- ---- ------------------------ ---------------- + Scanning global bootmeth 'efi_mgr': + Hunting with: nvme + Hunting with: qfw + Hunting with: scsi + scanning bus for devices... + Hunting with: virtio + Scanning bootdev 'qfw_pio.bootdev': + fatal: no kernel available + Scanning bootdev 'virtio-blk#0.bootdev': + Scanning bootdev 'virtio-blk#1.bootdev': + 0 efi ready virtio 2 virtio-blk#1.bootdev.part efi/boot/bootx64.efi + ** Booting bootflow 'virtio-blk#1.bootdev.part_2' with efi + EFI using ACPI tables at f0060 + efi_install_fdt() WARNING: Can't have ACPI table and device tree - ignoring DT. + efi_run_image() Booting /efi\boot\bootx64.efi + error: file `/boot/' not found. + +Standard boot looks through various available devices and finds the virtio +disks, then boots from the first one. After a second or so the grub menu appears +and you can work through the installer flow normally. + +Note that standard boot will not find 32-bit distros, since it looks for a +different filename. + +Current limitations +------------------- + +Only qemu-x86-64 can be used for booting distros, since qemu-x86 (the 32-bit +version of U-Boot) seems to have an EFI bug leading to the boot handing after +Linux is selected from grub, e.g. with `debian-12.1.0-i386-netinst.iso`:: + + ** Booting bootflow 'virtio-blk#1.bootdev.part_2' with efi + EFI using ACPI tables at f0180 + efi_install_fdt() WARNING: Can't have ACPI table and device tree - ignoring DT. + efi_run_image() Booting /efi\boot\bootia32.efi + Failed to open efi\boot\root=/dev/sdb3 - Not Found + Failed to load image 큀緃: Not Found + start_image() returned Not Found, falling back to default loader + Welcome to GRUB! + +The bochs video driver also seems to cause problems before the OS is able to +show a display. + +Finally, the use of `-M accel=kvm` is intended to use the native CPU's +virtual-machine features to accelerate operation, but this causes U-Boot to hang +when jumping 64-bit mode, at least on AMD machines. This may be a bug in U-Boot +or something else. From f26a966b2ed06ab1ba86ebce16b96b73bc3f283f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:44 -0600 Subject: [PATCH 042/148] doc: Explain how to avoid the distro-boot scripts Now that standard boot is available, mention this in the environment documentation. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- doc/usage/environment.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst index 2c44e5da6aa..91dc07b17bc 100644 --- a/doc/usage/environment.rst +++ b/doc/usage/environment.rst @@ -94,7 +94,7 @@ to add environment variables. Board maintainers are encouraged to migrate to the text-based environment as it is easier to maintain. The distro-board script still requires the old-style -environment but work is underway to address this. +environments, so use :doc:`../develop/bootstd` instead. List of environment variables From 5e541a05f70296dbad07fc1f4e8678ad207bb476 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:45 -0600 Subject: [PATCH 043/148] env: Use include/env for text-environment includes The 'environment' word is too long. We mostly use 'env' in U-Boot, so use that as the name of the include directory too. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/keymile/km83xx/km83xx.env | 4 ++-- board/keymile/kmcent2/kmcent2.env | 2 +- board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env | 2 +- board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env | 2 +- board/siemens/iot2050/iot2050.env | 2 +- board/ti/am62ax/am62ax.env | 4 ++-- board/ti/am62x/am62x.env | 4 ++-- board/ti/am64x/am64x.env | 6 +++--- board/ti/am65x/am65x.env | 8 ++++---- board/ti/j721e/j721e.env | 10 +++++----- board/ti/j721s2/j721s2.env | 10 +++++----- board/ti/ks2_evm/k2e_evm.env | 4 ++-- board/ti/ks2_evm/k2g_evm.env | 6 +++--- board/ti/ks2_evm/k2hk_evm.env | 4 ++-- board/ti/ks2_evm/k2l_evm.env | 4 ++-- include/configs/am335x_evm.h | 2 +- include/configs/am43xx_evm.h | 2 +- include/configs/am57xx_evm.h | 2 +- include/configs/am62ax_evm.h | 4 ++-- include/configs/am62x_evm.h | 2 +- include/configs/am64x_evm.h | 4 ++-- include/configs/am65x_evm.h | 6 +++--- include/configs/da850evm.h | 2 +- include/configs/dra7xx_evm.h | 2 +- include/configs/omap3_evm.h | 2 +- include/configs/omapl138_lcdk.h | 2 +- include/configs/phycore_am335x_r2.h | 4 ++-- include/configs/sifive-unleashed.h | 2 +- include/configs/ti_omap4_common.h | 2 +- include/configs/ti_omap5_common.h | 4 ++-- include/{environment => env}/distro/sf.h | 0 include/{environment => env}/pg-wcom/common.env | 0 include/{environment => env}/pg-wcom/ls102xa.env | 2 +- include/{environment => env}/pg-wcom/powerpc.env | 0 include/{environment => env}/ti/dfu.h | 0 include/{environment => env}/ti/k3_dfu.env | 0 include/{environment => env}/ti/k3_dfu.h | 0 include/{environment => env}/ti/k3_rproc.env | 0 include/{environment => env}/ti/k3_rproc.h | 0 include/{environment => env}/ti/mmc.env | 0 include/{environment => env}/ti/mmc.h | 0 include/{environment => env}/ti/nand.env | 0 include/{environment => env}/ti/nand.h | 0 include/{environment => env}/ti/ti_armv7_common.env | 0 include/{environment => env}/ti/ti_armv7_keystone2.env | 0 include/{environment => env}/ti/ufs.env | 0 include/{environment => env}/ti/ufs.h | 0 47 files changed, 58 insertions(+), 58 deletions(-) rename include/{environment => env}/distro/sf.h (100%) rename include/{environment => env}/pg-wcom/common.env (100%) rename include/{environment => env}/pg-wcom/ls102xa.env (95%) rename include/{environment => env}/pg-wcom/powerpc.env (100%) rename include/{environment => env}/ti/dfu.h (100%) rename include/{environment => env}/ti/k3_dfu.env (100%) rename include/{environment => env}/ti/k3_dfu.h (100%) rename include/{environment => env}/ti/k3_rproc.env (100%) rename include/{environment => env}/ti/k3_rproc.h (100%) rename include/{environment => env}/ti/mmc.env (100%) rename include/{environment => env}/ti/mmc.h (100%) rename include/{environment => env}/ti/nand.env (100%) rename include/{environment => env}/ti/nand.h (100%) rename include/{environment => env}/ti/ti_armv7_common.env (100%) rename include/{environment => env}/ti/ti_armv7_keystone2.env (100%) rename include/{environment => env}/ti/ufs.env (100%) rename include/{environment => env}/ti/ufs.h (100%) diff --git a/board/keymile/km83xx/km83xx.env b/board/keymile/km83xx/km83xx.env index ed2487c028d..1f13aaa8823 100644 --- a/board/keymile/km83xx/km83xx.env +++ b/board/keymile/km83xx/km83xx.env @@ -13,8 +13,8 @@ netdev=eth0 uimage=uImage #endif -#include -#include +#include +#include #if CONFIG_TARGET_KMCOGE5NE add_default+= eccmode=bch diff --git a/board/keymile/kmcent2/kmcent2.env b/board/keymile/kmcent2/kmcent2.env index 6b676a4ceb8..efa762e5589 100644 --- a/board/keymile/kmcent2/kmcent2.env +++ b/board/keymile/kmcent2/kmcent2.env @@ -1,4 +1,4 @@ -#include +#include EEprom_ivm=pca9547:70:9 arch=ppc_82xx diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env b/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env index d960de6bfe0..1054dbf9f54 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-expu1.env @@ -1,3 +1,3 @@ -#include +#include hostname=EXPU1 diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env b/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env index 4031f8bee95..1232fe9da8b 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-seli8.env @@ -1,3 +1,3 @@ -#include +#include hostname=SELI8 diff --git a/board/siemens/iot2050/iot2050.env b/board/siemens/iot2050/iot2050.env index 7fd836e6285..caa9f80e3fc 100644 --- a/board/siemens/iot2050/iot2050.env +++ b/board/siemens/iot2050/iot2050.env @@ -6,7 +6,7 @@ * Jan Kiszka */ -#include +#include usb_pgood_delay=900 diff --git a/board/ti/am62ax/am62ax.env b/board/ti/am62ax/am62ax.env index 491ec973bbc..3f7c333fa40 100644 --- a/board/ti/am62ax/am62ax.env +++ b/board/ti/am62ax/am62ax.env @@ -1,5 +1,5 @@ -#include -#include +#include +#include default_device_tree=ti/k3-am62a7-sk.dtb findfdt= diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env index bb37d21de61..f2dc87893a9 100644 --- a/board/ti/am62x/am62x.env +++ b/board/ti/am62x/am62x.env @@ -1,5 +1,5 @@ -#include -#include +#include +#include default_device_tree=ti/k3-am625-sk.dtb findfdt= diff --git a/board/ti/am64x/am64x.env b/board/ti/am64x/am64x.env index ecb07366fc8..1567907fcbd 100644 --- a/board/ti/am64x/am64x.env +++ b/board/ti/am64x/am64x.env @@ -1,6 +1,6 @@ -#include -#include -#include +#include +#include +#include findfdt= if test $board_name = am64x_gpevm; then diff --git a/board/ti/am65x/am65x.env b/board/ti/am65x/am65x.env index 036f4752835..755bff2707c 100644 --- a/board/ti/am65x/am65x.env +++ b/board/ti/am65x/am65x.env @@ -1,8 +1,8 @@ -#include -#include -#include +#include +#include +#include #if CONFIG_CMD_REMOTEPROC -#include +#include #endif findfdt= diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env index f7a4880bf83..2f2fb059127 100644 --- a/board/ti/j721e/j721e.env +++ b/board/ti/j721e/j721e.env @@ -1,10 +1,10 @@ -#include -#include -#include -#include +#include +#include +#include +#include #if CONFIG_CMD_REMOTEPROC -#include +#include #endif default_device_tree=ti/k3-j721e-common-proc-board.dtb diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env index 2ec652dbdd3..6825b146985 100644 --- a/board/ti/j721s2/j721s2.env +++ b/board/ti/j721s2/j721s2.env @@ -1,10 +1,10 @@ -#include -#include -#include -#include +#include +#include +#include +#include #if CONFIG_CMD_REMOTEPROC -#include +#include #endif default_device_tree=ti/k3-j721s2-common-proc-board.dtb diff --git a/board/ti/ks2_evm/k2e_evm.env b/board/ti/ks2_evm/k2e_evm.env index 746e4065a2c..a145db53e5f 100644 --- a/board/ti/ks2_evm/k2e_evm.env +++ b/board/ti/ks2_evm/k2e_evm.env @@ -1,5 +1,5 @@ -#include -#include +#include +#include findfdt=setenv fdtfile ${name_fdt} boot=ubi diff --git a/board/ti/ks2_evm/k2g_evm.env b/board/ti/ks2_evm/k2g_evm.env index 72807ac87a6..4f4941dd090 100644 --- a/board/ti/ks2_evm/k2g_evm.env +++ b/board/ti/ks2_evm/k2g_evm.env @@ -1,6 +1,6 @@ -#include -#include -#include +#include +#include +#include set_name_pmmc=setenv name_pmmc ti-sci-firmware-k2g.bin dev_pmmc=0 diff --git a/board/ti/ks2_evm/k2hk_evm.env b/board/ti/ks2_evm/k2hk_evm.env index f1cdc706036..0714a51090e 100644 --- a/board/ti/ks2_evm/k2hk_evm.env +++ b/board/ti/ks2_evm/k2hk_evm.env @@ -1,5 +1,5 @@ -#include -#include +#include +#include findfdt=setenv fdtfile ${name_fdt} boot=ubi diff --git a/board/ti/ks2_evm/k2l_evm.env b/board/ti/ks2_evm/k2l_evm.env index ddb5cd4aadc..e8a803a4ed7 100644 --- a/board/ti/ks2_evm/k2l_evm.env +++ b/board/ti/ks2_evm/k2l_evm.env @@ -1,5 +1,5 @@ -#include -#include +#include +#include findfdt=setenv fdtfile ${name_fdt} boot=ubi diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 5b477785174..504b1f02283 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -76,7 +76,7 @@ #include #ifndef CONFIG_SPL_BUILD -#include +#include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index a2f73c47543..7ee7b7e4f4f 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -64,7 +64,7 @@ #include #ifndef CONFIG_SPL_BUILD -#include +#include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index ba91f2b0545..06edde69028 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -11,7 +11,7 @@ #ifndef __CONFIG_AM57XX_EVM_H #define __CONFIG_AM57XX_EVM_H -#include +#include #include #define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h index 3997ce558a4..57003f120f9 100644 --- a/include/configs/am62ax_evm.h +++ b/include/configs/am62ax_evm.h @@ -9,8 +9,8 @@ #define __CONFIG_AM62AX_EVM_H #include -#include -#include +#include +#include /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h index 6b2a6ee0d0c..44180dc7687 100644 --- a/include/configs/am62x_evm.h +++ b/include/configs/am62x_evm.h @@ -10,7 +10,7 @@ #define __CONFIG_AM625_EVM_H #include -#include +#include /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 1e37ab47b9a..062102a610d 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -11,9 +11,9 @@ #include #include -#include +#include #include -#include +#include /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 2fa658d5396..9e90239a1c1 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -10,9 +10,9 @@ #define __CONFIG_AM654_EVM_H #include -#include -#include -#include +#include +#include +#include /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 736af88a024..cef404218ed 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -143,7 +143,7 @@ "fdtaddr=0xc0600000\0" \ "scriptaddr=0xc0600000\0" -#include +#include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index ef1d5a11260..633ec1f32fa 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -11,7 +11,7 @@ #ifndef __CONFIG_DRA7XX_EVM_H #define __CONFIG_DRA7XX_EVM_H -#include +#include #define CFG_MAX_MEM_MAPPED 0x80000000 diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index adb25a62970..f44967787c9 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -67,7 +67,7 @@ #include -#include +#include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index af0093511a0..fc2655a17b9 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -135,7 +135,7 @@ "fdtaddr=0xc0600000\0" \ "scriptaddr=0xc0600000\0" -#include +#include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index 4e6dc79f41b..8668da6eba5 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -59,8 +59,8 @@ func(NAND, nand, 0) #include -#include -#include +#include +#include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_MMC_TI_ARGS \ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index f208f5e20db..2996b375723 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -26,7 +26,7 @@ func(DHCP, dhcp, na) #include -#include +#include #define TYPE_GUID_LOADER1 "5B193300-FC78-40CD-8002-E86C45580B47" #define TYPE_GUID_LOADER2 "2E54B353-1271-4842-806F-E436D6AF6985" diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 9e312ac16d1..c4f116aabf8 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -56,7 +56,7 @@ func(DHCP, dhcp, na) #include -#include +#include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 74a39c40785..4e5aa74147d 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -39,8 +39,8 @@ #define DFUARGS #endif -#include -#include +#include +#include #ifndef CONSOLEDEV #define CONSOLEDEV "ttyS2" diff --git a/include/environment/distro/sf.h b/include/env/distro/sf.h similarity index 100% rename from include/environment/distro/sf.h rename to include/env/distro/sf.h diff --git a/include/environment/pg-wcom/common.env b/include/env/pg-wcom/common.env similarity index 100% rename from include/environment/pg-wcom/common.env rename to include/env/pg-wcom/common.env diff --git a/include/environment/pg-wcom/ls102xa.env b/include/env/pg-wcom/ls102xa.env similarity index 95% rename from include/environment/pg-wcom/ls102xa.env rename to include/env/pg-wcom/ls102xa.env index 5b5bda95e28..abbec424574 100644 --- a/include/environment/pg-wcom/ls102xa.env +++ b/include/env/pg-wcom/ls102xa.env @@ -1,6 +1,6 @@ #define WCOM_UBI_PARTITION_APP -#include +#include EEprom_ivm=pca9547:70:9 boot=bootm $load_addr_r - $fdt_addr_r diff --git a/include/environment/pg-wcom/powerpc.env b/include/env/pg-wcom/powerpc.env similarity index 100% rename from include/environment/pg-wcom/powerpc.env rename to include/env/pg-wcom/powerpc.env diff --git a/include/environment/ti/dfu.h b/include/env/ti/dfu.h similarity index 100% rename from include/environment/ti/dfu.h rename to include/env/ti/dfu.h diff --git a/include/environment/ti/k3_dfu.env b/include/env/ti/k3_dfu.env similarity index 100% rename from include/environment/ti/k3_dfu.env rename to include/env/ti/k3_dfu.env diff --git a/include/environment/ti/k3_dfu.h b/include/env/ti/k3_dfu.h similarity index 100% rename from include/environment/ti/k3_dfu.h rename to include/env/ti/k3_dfu.h diff --git a/include/environment/ti/k3_rproc.env b/include/env/ti/k3_rproc.env similarity index 100% rename from include/environment/ti/k3_rproc.env rename to include/env/ti/k3_rproc.env diff --git a/include/environment/ti/k3_rproc.h b/include/env/ti/k3_rproc.h similarity index 100% rename from include/environment/ti/k3_rproc.h rename to include/env/ti/k3_rproc.h diff --git a/include/environment/ti/mmc.env b/include/env/ti/mmc.env similarity index 100% rename from include/environment/ti/mmc.env rename to include/env/ti/mmc.env diff --git a/include/environment/ti/mmc.h b/include/env/ti/mmc.h similarity index 100% rename from include/environment/ti/mmc.h rename to include/env/ti/mmc.h diff --git a/include/environment/ti/nand.env b/include/env/ti/nand.env similarity index 100% rename from include/environment/ti/nand.env rename to include/env/ti/nand.env diff --git a/include/environment/ti/nand.h b/include/env/ti/nand.h similarity index 100% rename from include/environment/ti/nand.h rename to include/env/ti/nand.h diff --git a/include/environment/ti/ti_armv7_common.env b/include/env/ti/ti_armv7_common.env similarity index 100% rename from include/environment/ti/ti_armv7_common.env rename to include/env/ti/ti_armv7_common.env diff --git a/include/environment/ti/ti_armv7_keystone2.env b/include/env/ti/ti_armv7_keystone2.env similarity index 100% rename from include/environment/ti/ti_armv7_keystone2.env rename to include/env/ti/ti_armv7_keystone2.env diff --git a/include/environment/ti/ufs.env b/include/env/ti/ufs.env similarity index 100% rename from include/environment/ti/ufs.env rename to include/env/ti/ufs.env diff --git a/include/environment/ti/ufs.h b/include/env/ti/ufs.h similarity index 100% rename from include/environment/ti/ufs.h rename to include/env/ti/ufs.h From 63af90e7f0cab3b5197c19744f5e807ebc325c81 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:46 -0600 Subject: [PATCH 044/148] env: Explain how to use #include files in text environment Provide documentation on how to share common settings among boards. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- doc/usage/environment.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst index 91dc07b17bc..c6439dde668 100644 --- a/doc/usage/environment.rst +++ b/doc/usage/environment.rst @@ -81,6 +81,12 @@ Example:: echo CONFIG_SYS_BOARD boot failed - please check your image echo Load address is CONFIG_SYS_LOAD_ADDR +Settings which are common to a group of boards can use #include to bring in +a common file in the `include/env` directory, containing environment +settings. For example:: + + #include + If CONFIG_ENV_SOURCE_FILE is empty and the default filename is not present, then the old-style C environment is used instead. See below. From edd53bda53b9489aafe6b728b2b71044bb92f248 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:47 -0600 Subject: [PATCH 045/148] x86: Drop CFG_SYS_STACK_SIZE This is only used in one file and the value is the same for both boards which define it. Use the fixed value of 32KB and drop the CFG. This will allow removal of the config.h files. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- arch/x86/lib/physmem.c | 3 ++- include/configs/edison.h | 4 ---- include/configs/x86-common.h | 10 ---------- 3 files changed, 2 insertions(+), 15 deletions(-) diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c index 1eb97ac5bb1..382f768149f 100644 --- a/arch/x86/lib/physmem.c +++ b/arch/x86/lib/physmem.c @@ -14,6 +14,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -144,7 +145,7 @@ static void x86_phys_memset_page(phys_addr_t map_addr, uintptr_t offset, int c, /* Make sure the window is below U-Boot. */ assert(window + LARGE_PAGE_SIZE < - gd->relocaddr - CONFIG_SYS_MALLOC_LEN - CFG_SYS_STACK_SIZE); + gd->relocaddr - CONFIG_SYS_MALLOC_LEN - SZ_32K); /* Map the page into the window and then memset the appropriate part. */ x86_phys_map_page(window, map_addr, 1); memset((void *)(window + offset), c, size); diff --git a/include/configs/edison.h b/include/configs/edison.h index 455a889b64c..558c74d7b46 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -8,8 +8,4 @@ #include -/* Miscellaneous configurable options */ - -#define CFG_SYS_STACK_SIZE (32 * 1024) - #endif diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index c1c5a09a35c..608c5ba7b0a 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -10,16 +10,6 @@ #ifndef __CONFIG_X86_COMMON_H #define __CONFIG_X86_COMMON_H -/*----------------------------------------------------------------------- - * CPU Features - */ - -#define CFG_SYS_STACK_SIZE (32 * 1024) - -/*----------------------------------------------------------------------- - * Environment configuration - */ - /*----------------------------------------------------------------------- * USB configuration */ From dbfb6c096ed1088b3fa2eb9a140393089a3bd731 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:48 -0600 Subject: [PATCH 046/148] x86: i8254: Include required ibmpc.h header This is needed for this file, so include it here explicitly. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- arch/x86/lib/i8254.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/lib/i8254.c b/arch/x86/lib/i8254.c index 0f975389103..a8d1db188ec 100644 --- a/arch/x86/lib/i8254.c +++ b/arch/x86/lib/i8254.c @@ -7,6 +7,7 @@ #include #include #include +#include #define TIMER1_VALUE 18 /* 15.6us */ #define BEEP_FREQUENCY_HZ 440 From c0def3207db502e2fab6dec90c035d0f067efdac Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:49 -0600 Subject: [PATCH 047/148] x86: edison: Drop inclusion of ibmpc.h This should be included by files that need it, not the config.h file. Drop it. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- include/configs/edison.h | 7 ------- 1 file changed, 7 deletions(-) diff --git a/include/configs/edison.h b/include/configs/edison.h index 558c74d7b46..127c2c4546e 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -2,10 +2,3 @@ /* * Copyright (c) 2017 Intel Corp. */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#endif From 8c0090b0690c292cb46e690a33489ecbb1396975 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:50 -0600 Subject: [PATCH 048/148] x86: Drop inclusion of ibmpc.h This is not needed in this file anymore. Drop it. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- include/configs/x86-common.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 608c5ba7b0a..e05f667d722 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -5,8 +5,6 @@ * Graeme Russ, graeme.russ@gmail.com. */ -#include - #ifndef __CONFIG_X86_COMMON_H #define __CONFIG_X86_COMMON_H From f726545a62aba1e56f33afc8d95cb76e55720896 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:51 -0600 Subject: [PATCH 049/148] x86: Drop unused distro settings No x86 board uses distro boot, so drop these settings. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- include/configs/x86-common.h | 7 ------- 1 file changed, 7 deletions(-) diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index e05f667d722..8bd0716c08d 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -20,18 +20,11 @@ #define CFG_OTHBOOTARGS "othbootargs=acpi=off\0" #endif -#if defined(CONFIG_DISTRO_DEFAULTS) -#define DISTRO_BOOTENV BOOTENV -#else -#define DISTRO_BOOTENV -#endif - #ifndef SPLASH_SETTINGS #define SPLASH_SETTINGS #endif #define CFG_EXTRA_ENV_SETTINGS \ - DISTRO_BOOTENV \ CFG_STD_DEVICES_SETTINGS \ SPLASH_SETTINGS \ "pciconfighost=1\0" \ From 876bc404bdcdce8b1a16837a940ae36dc4425e5f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:52 -0600 Subject: [PATCH 050/148] x86: Add a common include for environment settings Create a text-file version of x86-common.h which can be used by x86 boards. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- include/env/x86.env | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/env/x86.env diff --git a/include/env/x86.env b/include/env/x86.env new file mode 100644 index 00000000000..d00d98f70a1 --- /dev/null +++ b/include/env/x86.env @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com + */ + +pciconfighost=1 +netdev=eth0 +consoledev=ttyS0 +scriptaddr=0x7000000 +kernel_addr_r=0x1000000 +ramdisk_addr_r=0x4000000 +ramdiskfile=initramfs.gz + +/* common console settings */ +stdin=serial,i8042-kbd,usbkbd +stdout=serial,vidconsole +stderr=serial,vidconsole From c49a767a6a9f02eeacadd91c5352fa848c9ec668 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:53 -0600 Subject: [PATCH 051/148] x86: coreboot: Convert to text environment Use the common include and add some options specific to this board. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/coreboot/coreboot/coreboot.env | 9 +++++++++ include/configs/coreboot.h | 20 -------------------- 2 files changed, 9 insertions(+), 20 deletions(-) create mode 100644 board/coreboot/coreboot/coreboot.env diff --git a/board/coreboot/coreboot/coreboot.env b/board/coreboot/coreboot/coreboot.env new file mode 100644 index 00000000000..0f5bb6fb624 --- /dev/null +++ b/board/coreboot/coreboot/coreboot.env @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018, Bin Meng + */ + +#include + +splashsource=virtio_fs +splashimage=0x1000000 diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index b4f49bf5289..e00c408f29a 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -2,23 +2,3 @@ /* * Copyright (C) 2018, Bin Meng */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define SPLASH_SETTINGS "splashsource=virtio_fs\0" \ - "splashimage=0x1000000\0" - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" - -/* ATA/IDE support */ - -#endif /* __CONFIG_H */ From f1e7abf4b9f06e64734dc74909fd47d1c935ec9e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:54 -0600 Subject: [PATCH 052/148] x86: crownbay: Convert to text environment Use the common include. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/intel/crownbay/crownbay.env | 6 ++++++ include/configs/crownbay.h | 17 ----------------- 2 files changed, 6 insertions(+), 17 deletions(-) create mode 100644 board/intel/crownbay/crownbay.env diff --git a/board/intel/crownbay/crownbay.env b/board/intel/crownbay/crownbay.env new file mode 100644 index 00000000000..9e95414c002 --- /dev/null +++ b/board/intel/crownbay/crownbay.env @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014, Bin Meng + */ + +#include diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 387bb8800e8..0c842dd01eb 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -2,20 +2,3 @@ /* * Copyright (C) 2014, Bin Meng */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" - -/* Environment configuration */ - -#endif /* __CONFIG_H */ From df827efecdda09b0e947e350a2e9d5388166fe36 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:55 -0600 Subject: [PATCH 053/148] x86: bayleybay: Convert to text environment Use the common include. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/intel/bayleybay/bayleybay.env | 9 +++++++++ include/configs/bayleybay.h | 17 ----------------- 2 files changed, 9 insertions(+), 17 deletions(-) create mode 100644 board/intel/bayleybay/bayleybay.env diff --git a/board/intel/bayleybay/bayleybay.env b/board/intel/bayleybay/bayleybay.env new file mode 100644 index 00000000000..89e1849fa83 --- /dev/null +++ b/board/intel/bayleybay/bayleybay.env @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2015, Bin Meng + */ + +#include + +/* don't use i8042-kbd */ +stdin=serial,usbkbd diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index b0df328cd84..9b0f5cedcd7 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -2,20 +2,3 @@ /* * Copyright (C) 2015, Bin Meng */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" - -/* Environment configuration */ - -#endif /* __CONFIG_H */ From b5948c5d39fba007c8f4b10ea0007747db479e37 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:56 -0600 Subject: [PATCH 054/148] x86: galileo: Convert to text environment Use the common include. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/intel/galileo/galileo.env | 11 +++++++++++ include/configs/galileo.h | 19 ------------------- 2 files changed, 11 insertions(+), 19 deletions(-) create mode 100644 board/intel/galileo/galileo.env diff --git a/board/intel/galileo/galileo.env b/board/intel/galileo/galileo.env new file mode 100644 index 00000000000..83e77bb300a --- /dev/null +++ b/board/intel/galileo/galileo.env @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2015, Bin Meng + */ + +#include + +/* use just serial */ +stdin=serial +stdout=serial +stderr=serial diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 0380ac287be..9b0f5cedcd7 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -2,22 +2,3 @@ /* * Copyright (C) 2015, Bin Meng */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -/* ns16550 UART is memory-mapped in Quark SoC */ - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ - "stdout=serial\0" \ - "stderr=serial\0" - -/* Environment configuration */ - -#endif /* __CONFIG_H */ From a68a7abc3da15a6e441faed1c7dad2f57e66e259 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:57 -0600 Subject: [PATCH 055/148] x86: edison: Convert to text environment Don't use the common include since Edison's environment is empty. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/intel/edison/edison.env | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 board/intel/edison/edison.env diff --git a/board/intel/edison/edison.env b/board/intel/edison/edison.env new file mode 100644 index 00000000000..c7d4de7b039 --- /dev/null +++ b/board/intel/edison/edison.env @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2017 Intel Corp. + */ + +/* empty environment */ From 5ccb18a75210c4f6a09255c430cd01466d1dd85d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:58 -0600 Subject: [PATCH 056/148] x86: cherryhill: Convert to text environment Use the common include. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/intel/cherryhill/cherryhill.env | 9 +++++++++ include/configs/cherryhill.h | 13 ------------- 2 files changed, 9 insertions(+), 13 deletions(-) create mode 100644 board/intel/cherryhill/cherryhill.env diff --git a/board/intel/cherryhill/cherryhill.env b/board/intel/cherryhill/cherryhill.env new file mode 100644 index 00000000000..929b6a18a74 --- /dev/null +++ b/board/intel/cherryhill/cherryhill.env @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2017, Bin Meng + */ + +#include + +/* don't use i8042-kbd */ +stdin=serial,usbkbd diff --git a/include/configs/cherryhill.h b/include/configs/cherryhill.h index d6ce70a96ae..a3009571de9 100644 --- a/include/configs/cherryhill.h +++ b/include/configs/cherryhill.h @@ -2,16 +2,3 @@ /* * Copyright (C) 2017, Bin Meng */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ - "stdout=vidconsole,serial\0" \ - "stderr=vidconsole,serial\0" - -/* Environment configuration */ - -#endif /* __CONFIG_H */ From c166298ed238f2d654b0bbaafa354541a2de317a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:01:59 -0600 Subject: [PATCH 057/148] x86: cougarcanyon2: Convert to text environment Use the common include. The existing environment includes "vga" but that is not valid anymore, so let it use vidconsole Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/intel/cougarcanyon2/cougarcanyon2.env | 6 ++++++ include/configs/cougarcanyon2.h | 13 ------------- 2 files changed, 6 insertions(+), 13 deletions(-) create mode 100644 board/intel/cougarcanyon2/cougarcanyon2.env diff --git a/board/intel/cougarcanyon2/cougarcanyon2.env b/board/intel/cougarcanyon2/cougarcanyon2.env new file mode 100644 index 00000000000..6329b0f330b --- /dev/null +++ b/board/intel/cougarcanyon2/cougarcanyon2.env @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016, Bin Meng + */ + +#include diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index 31639e48da8..0406786f7c6 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -2,16 +2,3 @@ /* * Copyright (C) 2016, Bin Meng */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ - "stdout=serial,vga\0" \ - "stderr=serial,vga\0" - -/* Environment configuration */ - -#endif /* __CONFIG_H */ From d9e6318ce9018e3116d1240ffe8b278016c30c83 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:02:00 -0600 Subject: [PATCH 058/148] x86: minnowmax: Convert to text environment Use the common include along with some additions. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/intel/minnowmax/minnowmax.env | 11 +++++++++++ include/configs/minnowmax.h | 16 ---------------- 2 files changed, 11 insertions(+), 16 deletions(-) create mode 100644 board/intel/minnowmax/minnowmax.env diff --git a/board/intel/minnowmax/minnowmax.env b/board/intel/minnowmax/minnowmax.env new file mode 100644 index 00000000000..71f3607843b --- /dev/null +++ b/board/intel/minnowmax/minnowmax.env @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2015 Google, Inc + */ + +#include + +/* don't use i8042-kbd */ +stdin=usbkbd,serial + +usb_pgood_delay=40 diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 842672d5575..068a2af2c1f 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -2,19 +2,3 @@ /* * Copyright (C) 2015 Google, Inc */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ - "stdout=vidconsole,serial\0" \ - "stderr=vidconsole,serial\0" \ - "usb_pgood_delay=40\0" - -#endif /* __CONFIG_H */ From 2d6ebda7560b29bcc8044b01627eb3d3267806c0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:02:01 -0600 Subject: [PATCH 059/148] x86: slimbootloader: Convert to text environment Use the common include along with some additions. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng [Drop common env from slimbootloader.env] Signed-off-by: Bin Meng --- board/intel/slimbootloader/slimbootloader.env | 23 ++++++++++++ include/configs/slimbootloader.h | 35 ------------------- 2 files changed, 23 insertions(+), 35 deletions(-) create mode 100644 board/intel/slimbootloader/slimbootloader.env diff --git a/board/intel/slimbootloader/slimbootloader.env b/board/intel/slimbootloader/slimbootloader.env new file mode 100644 index 00000000000..3fce487d167 --- /dev/null +++ b/board/intel/slimbootloader/slimbootloader.env @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Intel Corporation + */ + +#include + +/* don't use video */ +stdout=serial +stderr=serial + +usb_pgood_delay=40 + +ramdiskaddr=0x4000000 +ramdiskfile=initrd +bootdev=usb +bootdevnum=0 +bootdevpart=0 +bootfsload=fatload +bootusb=setenv bootdev usb; boot +bootscsi=setenv bootdev scsi; boot +bootmmc=setenv bootdev mmc; boot +bootargs=console=ttyS0,115200 console=tty0 diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h index 20b99a1021d..85f6a968e04 100644 --- a/include/configs/slimbootloader.h +++ b/include/configs/slimbootloader.h @@ -2,38 +2,3 @@ /* * Copyright (C) 2019 Intel Corporation */ - -#ifndef __SLIMBOOTLOADER_CONFIG_H__ -#define __SLIMBOOTLOADER_CONFIG_H__ - -#include - -#define CFG_STD_DEVICES_SETTINGS \ - "stdin=serial,i8042-kbd,usbkbd\0" \ - "stdout=serial\0" \ - "stderr=serial\0" - -/* - * Override CFG_EXTRA_ENV_SETTINGS in x86-common.h - */ -#undef CFG_EXTRA_ENV_SETTINGS -#define CFG_EXTRA_ENV_SETTINGS \ - CFG_STD_DEVICES_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=0x4000000\0" \ - "ramdiskfile=initrd\0" \ - "bootdev=usb\0" \ - "bootdevnum=0\0" \ - "bootdevpart=0\0" \ - "bootfsload=fatload\0" \ - "bootusb=setenv bootdev usb; boot\0" \ - "bootscsi=setenv bootdev scsi; boot\0" \ - "bootmmc=setenv bootdev mmc; boot\0" \ - "bootargs=console=ttyS0,115200 console=tty0\0" - -/* - * Override CONFIG_BOOTCOMMAND in x86-common.h - */ - -#endif /* __SLIMBOOTLOADER_CONFIG_H__ */ From 6ed1cb3552c0d590f681176878bd625373ea0c6b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:02:02 -0600 Subject: [PATCH 060/148] x86: efi-x86_app: Convert to text environment Use the common include. Drop the unnecessary changes, since missing stdio drivers will be ignored. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/efi/efi-x86_app/efi-x86_app.env | 6 ++++++ include/configs/efi-x86_app.h | 11 ----------- 2 files changed, 6 insertions(+), 11 deletions(-) create mode 100644 board/efi/efi-x86_app/efi-x86_app.env diff --git a/board/efi/efi-x86_app/efi-x86_app.env b/board/efi/efi-x86_app/efi-x86_app.env new file mode 100644 index 00000000000..106836af1ff --- /dev/null +++ b/board/efi/efi-x86_app/efi-x86_app.env @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2015 Google, Inc + */ + +#include diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 843ed8b9d1d..d5824049d69 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -2,14 +2,3 @@ /* * Copyright (c) 2015 Google, Inc */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ - "stdout=vidconsole\0" \ - "stderr=vidconsole\0" - -#endif From 17b2398534c5212dd3b32db7d965e813c8a31e59 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:02:03 -0600 Subject: [PATCH 061/148] x86: efi-x86_payload: Convert to text environment Use the common include. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/efi/efi-x86_payload/efi-x86_payload.env | 6 ++++++ include/configs/efi-x86_payload.h | 17 ----------------- 2 files changed, 6 insertions(+), 17 deletions(-) create mode 100644 board/efi/efi-x86_payload/efi-x86_payload.env diff --git a/board/efi/efi-x86_payload/efi-x86_payload.env b/board/efi/efi-x86_payload/efi-x86_payload.env new file mode 100644 index 00000000000..6a656287060 --- /dev/null +++ b/board/efi/efi-x86_payload/efi-x86_payload.env @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018, Bin Meng + */ + +#include diff --git a/include/configs/efi-x86_payload.h b/include/configs/efi-x86_payload.h index c72b067c367..e00c408f29a 100644 --- a/include/configs/efi-x86_payload.h +++ b/include/configs/efi-x86_payload.h @@ -2,20 +2,3 @@ /* * Copyright (C) 2018, Bin Meng */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" - -/* ATA/IDE support */ - -#endif /* __CONFIG_H */ From 3cc409536232017cb69a2339c3d9c7e7a3d3d096 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:02:04 -0600 Subject: [PATCH 062/148] x86: qemu: Add required linux/sizes.h include These files rely on the config.h file provided this include. Add it explictily so we can move to a text environment. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- arch/x86/cpu/qemu/dram.c | 1 + arch/x86/cpu/qemu/e820.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index 595c397d4a4..1a52d1dc522 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -8,6 +8,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c index 19e54c5202a..ebfe5956442 100644 --- a/arch/x86/cpu/qemu/e820.c +++ b/arch/x86/cpu/qemu/e820.c @@ -12,6 +12,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; From 9234b77b9d42ebd77585091a072b4ab958ba83ed Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 30 Jul 2023 21:02:05 -0600 Subject: [PATCH 063/148] x86: qemu-x86: Convert to text environment Use the common include. Drop everything from the config.h file. Signed-off-by: Simon Glass Reviewed-by: Andy Shevchenko # Intel Edison Reviewed-by: Bin Meng --- board/emulation/qemu-x86/qemu-x86.env | 6 ++++++ include/configs/qemu-x86.h | 23 ----------------------- 2 files changed, 6 insertions(+), 23 deletions(-) create mode 100644 board/emulation/qemu-x86/qemu-x86.env diff --git a/board/emulation/qemu-x86/qemu-x86.env b/board/emulation/qemu-x86/qemu-x86.env new file mode 100644 index 00000000000..adcc1c53bd2 --- /dev/null +++ b/board/emulation/qemu-x86/qemu-x86.env @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2015, Bin Meng + */ + +#include diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 3e5235291a2..9b0f5cedcd7 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -2,26 +2,3 @@ /* * Copyright (C) 2015, Bin Meng */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#include - -#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" - -/* - * ATA/SATA support for QEMU x86 targets - * - Only legacy IDE controller is supported for QEMU '-M pc' target - * - AHCI controller is supported for QEMU '-M q35' target - */ - -#endif /* __CONFIG_H */ From 1b7de4f9efd7df1c82948c2b7b7a8cc4ed1577e3 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 28 Jul 2023 15:54:15 +0200 Subject: [PATCH 064/148] riscv: qemu: imply CONFIG_DM_RNG The EFI_RNG_PROTOCOL is needed for Linux' KASLR. QEMU can provide a virtio-rng device to emulate a hardware random number generator which is supported by our virtio_rng driver. Enabling CONFIG_DM_RNG will enable CONFIG_VIRTIO_RNG and CONFIG_EFI_RNG_PROTOCOL by default too. Signed-off-by: Heinrich Schuchardt Reviewed-by: Bin Meng --- board/emulation/qemu-riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index b503578d274..d56b4b5bc1e 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -57,6 +57,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply NVME imply PCI imply PCIE_ECAM_GENERIC + imply DM_RNG imply SCSI imply DM_SCSI imply SYS_NS16550 From 6982e6b04672440fce0eed93679aea89a024779f Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 2 Aug 2023 22:39:46 +0200 Subject: [PATCH 065/148] cmd/sbi: display new extensions The SBI specification v2.0-rc2 defines new extensions: * Nested Acceleration Extension (NACL) * Steal Time Accounting (STA) Allow the sbi command to display these. Add missing implementation IDs. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/include/asm/sbi.h | 2 ++ cmd/riscv/sbi.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 769369997dd..009a26885c6 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -31,6 +31,8 @@ enum sbi_ext_id { SBI_EXT_DBCN = 0x4442434E, SBI_EXT_SUSP = 0x53555350, SBI_EXT_CPPC = 0x43505043, + SBI_EXT_NACL = 0x4E41434C, + SBI_EXT_STA = 0x535441, }; enum sbi_ext_base_fid { diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index c4707fe5207..32761c595eb 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -27,6 +27,8 @@ static struct sbi_imp implementations[] = { { 4, "RustSBI" }, { 5, "Diosix" }, { 6, "Coffer" }, + { 7, "Xen Project" }, + { 8, "PolarFire Hart Software Services" }, }; static struct sbi_ext extensions[] = { @@ -49,6 +51,8 @@ static struct sbi_ext extensions[] = { { SBI_EXT_DBCN, "Debug Console Extension" }, { SBI_EXT_SUSP, "System Suspend Extension" }, { SBI_EXT_CPPC, "Collaborative Processor Performance Control Extension" }, + { SBI_EXT_NACL, "Nested Acceleration Extension" }, + { SBI_EXT_STA, "Steal-time Accounting Extension" }, }; static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc, From 8d184d4b652bad455e17d2d0e451c0e08e112f34 Mon Sep 17 00:00:00 2001 From: Minda Chen Date: Mon, 7 Aug 2023 16:53:35 +0800 Subject: [PATCH 066/148] pci: plda: Get correct ECAM offset in multiple PCIe RC case Get the correct ECAM offset and record the secondary bus number in Multiple RC case. Signed-off-by: Minda Chen Reviewed-by: Leo Yu-Chi Liang --- drivers/pci/pcie_plda_common.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pcie_plda_common.c b/drivers/pci/pcie_plda_common.c index 005b92616a7..cd74bb47116 100644 --- a/drivers/pci/pcie_plda_common.c +++ b/drivers/pci/pcie_plda_common.c @@ -36,8 +36,8 @@ static int plda_pcie_conf_address(const struct udevice *udev, pci_dev_t bdf, uint offset, void **paddr) { struct pcie_plda *priv = dev_get_priv(udev); - int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), - PCI_FUNC(bdf), offset); + int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf) - dev_seq(udev), + PCI_DEV(bdf), PCI_FUNC(bdf), offset); if (!plda_pcie_addr_valid(priv, bdf)) return -ENODEV; @@ -71,6 +71,7 @@ int plda_pcie_config_write(struct udevice *udev, pci_dev_t bdf, (offset == PCI_PRIMARY_BUS && size != PCI_SIZE_8))) { priv->sec_busno = ((offset == PCI_PRIMARY_BUS) ? (value >> 8) : value) & 0xff; + priv->sec_busno += dev_seq(udev); debug("Secondary bus number was changed to %d\n", priv->sec_busno); } From 1037c5ba3702996d854becb3e719d44d2178c1bf Mon Sep 17 00:00:00 2001 From: Minda Chen Date: Mon, 7 Aug 2023 16:53:36 +0800 Subject: [PATCH 067/148] riscv: dts: starfive: Enable pcie0 dts node In StarFive VF2 board. pcie0 connect to VTI usb controller. Enable it to support usb host. Signed-off-by: Minda Chen Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi index bf7fdb4dd61..e40f57a1508 100644 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi @@ -311,7 +311,7 @@ &pcie0 { reset-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>; - status = "disabled"; + status = "okay"; }; &pcie1 { From eca2d41c681466c229fc0b4372432db71745c826 Mon Sep 17 00:00:00 2001 From: Minda Chen Date: Mon, 7 Aug 2023 16:53:37 +0800 Subject: [PATCH 068/148] riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZE Some device driver need SYS_CACHELINE_SIZE macro. Add StarFive SYS_CACHE_SHIFT_6 to enable it. Signed-off-by: Minda Chen Reviewed-by: Bin Meng Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/cpu/jh7110/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig index 4d9581165bf..c1d3e6ada23 100644 --- a/arch/riscv/cpu/jh7110/Kconfig +++ b/arch/riscv/cpu/jh7110/Kconfig @@ -13,6 +13,7 @@ config STARFIVE_JH7110 select SUPPORT_SPL select SPL_RAM if SPL select SPL_STARFIVE_DDR + select SYS_CACHE_SHIFT_6 select PINCTRL_STARFIVE_JH7110 imply MMC imply MMC_BROKEN_CD From 0665621386cd907d6a3e3527a3c6636aee10ed04 Mon Sep 17 00:00:00 2001 From: Minda Chen Date: Mon, 7 Aug 2023 16:53:38 +0800 Subject: [PATCH 069/148] configs: riscv: starfive: Add VF2 PCIe USB3 XHCI support Add XHCI_PCI to enable usb3-host functions. Also add usb command and keyboard config. Signed-off-by: Minda Chen Reviewed-by: Leo Yu-Chi Liang --- configs/starfive_visionfive2_defconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig index 5d8a8e28cbb..a70ada394f3 100644 --- a/configs/starfive_visionfive2_defconfig +++ b/configs/starfive_visionfive2_defconfig @@ -65,6 +65,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -111,3 +112,7 @@ CONFIG_PINCTRL_STARFIVE=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_TIMER_EARLY=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_KEYBOARD=y From 7d79bed00c9e02187a09e74e90c5bd5a927a6a61 Mon Sep 17 00:00:00 2001 From: Shengyu Qu Date: Tue, 8 Aug 2023 21:14:36 +0800 Subject: [PATCH 070/148] configs: starfive: Enable environment in SPI flash support On Starfive Visionfive 2, the u-boot environment settings are saved to on-board SPI flash. Enable relative configs by default and set offset and size according to upstream linux dts. Signed-off-by: Shengyu Qu Reviewed-by: Leo Yu-Chi Liang --- configs/starfive_visionfive2_defconfig | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig index a70ada394f3..e9b63e5b847 100644 --- a/configs/starfive_visionfive2_defconfig +++ b/configs/starfive_visionfive2_defconfig @@ -6,6 +6,15 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000000 CONFIG_SF_DEFAULT_SPEED=100000000 +CONFIG_ENV_SUPPORT=y +CONFIG_SAVEENV=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_SECT_SIZE_AUTO=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0xf0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2" CONFIG_SPL_TEXT_BASE=0x8000000 From d365f6646aa4ecaabc58c07ecc432a3177f13138 Mon Sep 17 00:00:00 2001 From: Shengyu Qu Date: Wed, 9 Aug 2023 21:11:31 +0800 Subject: [PATCH 071/148] riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE Add a Kconfig item to allow SPL to clear stack/GD/malloc area before using them. Signed-off-by: Bo Gan Signed-off-by: Shengyu Qu Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 867cbcbe74e..6771d8d9198 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -64,6 +64,14 @@ config SPL_SYS_DCACHE_OFF help Do not enable data cache in SPL. +config SPL_ZERO_MEM_BEFORE_USE + bool "Zero memory before use" + depends on SPL + default n + help + Zero stack/GD/malloc area in SPL before using them, this is needed for + Sifive core devices that uses L2 cache to store SPL. + # board-specific options below source "board/AndesTech/ae350/Kconfig" source "board/emulation/qemu-riscv/Kconfig" From 6419f8e9fdc63ee411e1f012d412f8ae17283432 Mon Sep 17 00:00:00 2001 From: Shengyu Qu Date: Wed, 9 Aug 2023 21:11:32 +0800 Subject: [PATCH 072/148] riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation Add the actual support code for SPL_ZERO_MEM_BEFORE_USE and remove existing Starfive JH7110's L2 LIM clean code, since existing code has following issues: 1. Each hart (in the middle of a function call) overwriting its own stack and other harts' stacks. (data-race and data-corruption) 2. Lottery winner hart can be doing "board_init_f_init_reserve", while other harts are in the middle of zeroing L2 LIM. (data-race) Signed-off-by: Bo Gan Signed-off-by: Shengyu Qu Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/cpu/jh7110/spl.c | 25 ------------------------- arch/riscv/cpu/start.S | 12 ++++++++++++ common/init/board_init.c | 3 +++ 3 files changed, 15 insertions(+), 25 deletions(-) diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c index 72adcefa0e9..4047b10efe8 100644 --- a/arch/riscv/cpu/jh7110/spl.c +++ b/arch/riscv/cpu/jh7110/spl.c @@ -13,7 +13,6 @@ #include #define CSR_U74_FEATURE_DISABLE 0x7c1 -#define L2_LIM_MEM_END 0x81FFFFFUL DECLARE_GLOBAL_DATA_PTR; @@ -59,9 +58,6 @@ int spl_soc_init(void) void harts_early_init(void) { - ulong *ptr; - u8 *tmp; - ulong len, remain; /* * Feature Disable CSR * @@ -70,25 +66,4 @@ void harts_early_init(void) */ if (CONFIG_IS_ENABLED(RISCV_MMODE)) csr_write(CSR_U74_FEATURE_DISABLE, 0); - - /* clear L2 LIM memory - * set __bss_end to 0x81FFFFF region to zero - * The L2 Cache Controller supports ECC. ECC is applied to SRAM. - * If it is not cleared, the ECC part is invalid, and an ECC error - * will be reported when reading data. - */ - ptr = (ulong *)&__bss_end; - len = L2_LIM_MEM_END - (ulong)&__bss_end; - remain = len % sizeof(ulong); - len /= sizeof(ulong); - - while (len--) - *ptr++ = 0; - - /* clear the remain bytes */ - if (remain) { - tmp = (u8 *)ptr; - while (remain--) - *tmp++ = 0; - } } diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 59d58a5a57b..30cf6743701 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -111,6 +111,18 @@ call_board_init_f: * It's essential before any function call, otherwise, we get data-race. */ +/* clear stack if necessary */ +#if CONFIG_IS_ENABLED(ZERO_MEM_BEFORE_USE) +clear_stack: + li t1, 1 + slli t1, t1, CONFIG_STACK_SIZE_SHIFT + sub t1, sp, t1 +clear_stack_loop: + SREG zero, 0(t1) /* t1 is always 16 byte aligned */ + addi t1, t1, REGBYTES + blt t1, sp, clear_stack_loop +#endif + call_board_init_f_0: /* find top of reserve space */ #if CONFIG_IS_ENABLED(SMP) diff --git a/common/init/board_init.c b/common/init/board_init.c index 96ffb79a986..ab8c508ad83 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -162,6 +162,9 @@ void board_init_f_init_reserve(ulong base) #if CONFIG_VAL(SYS_MALLOC_F_LEN) /* go down one 'early malloc arena' */ gd->malloc_base = base; +#if CONFIG_IS_ENABLED(ZERO_MEM_BEFORE_USE) + memset((void *)base, '\0', CONFIG_VAL(SYS_MALLOC_F_LEN)); +#endif #endif if (CONFIG_IS_ENABLED(SYS_REPORT_STACK_F_USAGE)) From 47ed15125cccd98e041cdff3b6bbe675a2418ec2 Mon Sep 17 00:00:00 2001 From: Shengyu Qu Date: Wed, 9 Aug 2023 21:11:33 +0800 Subject: [PATCH 073/148] riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE. Signed-off-by: Bo Gan Signed-off-by: Shengyu Qu Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/cpu/jh7110/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig index c1d3e6ada23..8469ee7de5d 100644 --- a/arch/riscv/cpu/jh7110/Kconfig +++ b/arch/riscv/cpu/jh7110/Kconfig @@ -14,6 +14,7 @@ config STARFIVE_JH7110 select SPL_RAM if SPL select SPL_STARFIVE_DDR select SYS_CACHE_SHIFT_6 + select SPL_ZERO_MEM_BEFORE_USE select PINCTRL_STARFIVE_JH7110 imply MMC imply MMC_BROKEN_CD From 8ba4eae01da11e73e7ee9f7047979f4d2ebfe5fc Mon Sep 17 00:00:00 2001 From: Alexander Dahl Date: Fri, 4 Aug 2023 17:53:23 +0200 Subject: [PATCH 074/148] cmd: cyclic: Remove duplicate command name in help text Function 'cmd_usage()' already prints one command in usage before printing out the help text given to the U_BOOT_CMD_WITH_SUBCMDS macro. Wrong previous output: Usage: cyclic cyclic demo - register cyclic demo function cyclic list - list cyclic functions Signed-off-by: Alexander Dahl Reviewed-by: Stefan Roese --- cmd/cyclic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/cyclic.c b/cmd/cyclic.c index 97324d82405..946f1d78184 100644 --- a/cmd/cyclic.c +++ b/cmd/cyclic.c @@ -77,7 +77,7 @@ static int do_cyclic_list(struct cmd_tbl *cmdtp, int flag, int argc, } static char cyclic_help_text[] = - "cyclic demo - register cyclic demo function\n" + "demo - register cyclic demo function\n" "cyclic list - list cyclic functions\n"; U_BOOT_CMD_WITH_SUBCMDS(cyclic, "Cyclic", cyclic_help_text, From 160984ed3a91a4225b27ffe8bfc3b1b4dc08a4ea Mon Sep 17 00:00:00 2001 From: Sergei Antonov Date: Sun, 30 Jul 2023 20:14:16 +0300 Subject: [PATCH 075/148] watchdog: ftwdt010: need to reset watchdog in ftwdt010_wdt_start() ftwdt010_wdt_start() has to call ftwdt010_wdt_reset() after setting-up the timeout in the same fashion ftwdt010_wdt_expire_now() does it. Without this patch the "wdt start " command does not actually start the watchdog timer until the "wdt reset" command is executed. Signed-off-by: Sergei Antonov Reviewed-by: Stefan Roese --- drivers/watchdog/ftwdt010_wdt.c | 40 +++++++++++++++++---------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c index a6b33b17209..1f5f301b125 100644 --- a/drivers/watchdog/ftwdt010_wdt.c +++ b/drivers/watchdog/ftwdt010_wdt.c @@ -25,8 +25,27 @@ struct ftwdt010_wdt_priv { struct ftwdt010_wdt __iomem *regs; }; +static int ftwdt010_wdt_reset(struct udevice *dev) +{ + struct ftwdt010_wdt_priv *priv = dev_get_priv(dev); + struct ftwdt010_wdt *wd = priv->regs; + + debug("Reset WDT..\n"); + + /* clear control register */ + writel(0, &wd->wdcr); + + /* Write Magic number */ + writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart); + + /* Enable WDT */ + writel(FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE, &wd->wdcr); + + return 0; +} + /* - * Set the watchdog time interval. + * Set the watchdog time interval and start the timer. * Counter is 32 bit. */ static int ftwdt010_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) @@ -52,24 +71,7 @@ static int ftwdt010_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) writel(reg, &wd->wdload); - return 0; -} - -static int ftwdt010_wdt_reset(struct udevice *dev) -{ - struct ftwdt010_wdt_priv *priv = dev_get_priv(dev); - struct ftwdt010_wdt *wd = priv->regs; - - /* clear control register */ - writel(0, &wd->wdcr); - - /* Write Magic number */ - writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart); - - /* Enable WDT */ - writel((FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE), &wd->wdcr); - - return 0; + return ftwdt010_wdt_reset(dev); } static int ftwdt010_wdt_stop(struct udevice *dev) From e5422ea51290db9de0d3a48ec4bfbdf6d27c2662 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 22 Jul 2022 12:09:08 +0200 Subject: [PATCH 076/148] rockchip: rk3399: remove duplicate call to regulators_enable_boot_on An earlier commit makes the common SPL code call regulators_enable_boot_on and regulators_enable_boot_off before iterating over possible boot media for U-Boot proper. There is therefore no need to do this in the rk3399-specific code, so let's remove it. Cc: Quentin Schulz Tested-by: Xavier Drudis Ferran Signed-off-by: Quentin Schulz Reviewed-by: Jagan Teki --- arch/arm/mach-rockchip/rk3399/rk3399.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index a7cc91a952c..cbd2ea047dc 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -280,15 +280,5 @@ void spl_board_init(void) if (cru->glb_rst_st != 0) rk3399_force_power_on_reset(); } - - if (IS_ENABLED(CONFIG_SPL_DM_REGULATOR)) { - /* - * Turning the eMMC and SPI back on (if disabled via the Qseven - * BIOS_ENABLE) signal is done through a always-on regulator). - */ - if (regulators_enable_boot_on(false)) - debug("%s: Cannot enable boot on regulator\n", - __func__); - } } #endif From 0e2474f55001e00e966be50595e7e0e055255006 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 11 Jul 2023 23:13:56 +0000 Subject: [PATCH 077/148] pci: rockchip: Release resources on failing probe The PCIe driver for RK3399 is affected by a similar issue that was fixed for RK35xx in the commit e04b67a7f4c1 ("pci: pcie_dw_rockchip: release resources on failing probe"). Resources are not released on failing probe, e.g. regulators may be left enabled and the ep-gpio may be left in a requested state. Change to use regulator_set_enable_if_allowed and disable regulators after failure to keep regulator enable count balanced, ep-gpio is also released on regulator failure. Also add support for the vpcie12v-supply, remove unused include and check return value from dev_read_addr_name. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- drivers/pci/pcie_rockchip.c | 108 +++++++++++++++++++----------------- 1 file changed, 57 insertions(+), 51 deletions(-) diff --git a/drivers/pci/pcie_rockchip.c b/drivers/pci/pcie_rockchip.c index 72b41398f27..624841e9d8b 100644 --- a/drivers/pci/pcie_rockchip.c +++ b/drivers/pci/pcie_rockchip.c @@ -12,23 +12,15 @@ */ #include -#include #include -#include #include #include #include -#include #include #include -#include -#include #include -#include #include -DECLARE_GLOBAL_DATA_PTR; - #define HIWORD_UPDATE(mask, val) (((mask) << 16) | (val)) #define HIWORD_UPDATE_BIT(val) HIWORD_UPDATE(val, val) @@ -383,41 +375,38 @@ static int rockchip_pcie_set_vpcie(struct udevice *dev) struct rockchip_pcie *priv = dev_get_priv(dev); int ret; - if (priv->vpcie3v3) { - ret = regulator_set_enable(priv->vpcie3v3, true); - if (ret) { - dev_err(dev, "failed to enable vpcie3v3 (ret=%d)\n", - ret); - return ret; - } + ret = regulator_set_enable_if_allowed(priv->vpcie12v, true); + if (ret && ret != -ENOSYS) { + dev_err(dev, "failed to enable vpcie12v (ret=%d)\n", ret); + return ret; } - if (priv->vpcie1v8) { - ret = regulator_set_enable(priv->vpcie1v8, true); - if (ret) { - dev_err(dev, "failed to enable vpcie1v8 (ret=%d)\n", - ret); - goto err_disable_3v3; - } + ret = regulator_set_enable_if_allowed(priv->vpcie3v3, true); + if (ret && ret != -ENOSYS) { + dev_err(dev, "failed to enable vpcie3v3 (ret=%d)\n", ret); + goto err_disable_12v; } - if (priv->vpcie0v9) { - ret = regulator_set_enable(priv->vpcie0v9, true); - if (ret) { - dev_err(dev, "failed to enable vpcie0v9 (ret=%d)\n", - ret); - goto err_disable_1v8; - } + ret = regulator_set_enable_if_allowed(priv->vpcie1v8, true); + if (ret && ret != -ENOSYS) { + dev_err(dev, "failed to enable vpcie1v8 (ret=%d)\n", ret); + goto err_disable_3v3; + } + + ret = regulator_set_enable_if_allowed(priv->vpcie0v9, true); + if (ret && ret != -ENOSYS) { + dev_err(dev, "failed to enable vpcie0v9 (ret=%d)\n", ret); + goto err_disable_1v8; } return 0; err_disable_1v8: - if (priv->vpcie1v8) - regulator_set_enable(priv->vpcie1v8, false); + regulator_set_enable_if_allowed(priv->vpcie1v8, false); err_disable_3v3: - if (priv->vpcie3v3) - regulator_set_enable(priv->vpcie3v3, false); + regulator_set_enable_if_allowed(priv->vpcie3v3, false); +err_disable_12v: + regulator_set_enable_if_allowed(priv->vpcie12v, false); return ret; } @@ -427,19 +416,12 @@ static int rockchip_pcie_parse_dt(struct udevice *dev) int ret; priv->axi_base = dev_read_addr_name(dev, "axi-base"); - if (!priv->axi_base) - return -ENODEV; + if (priv->axi_base == FDT_ADDR_T_NONE) + return -EINVAL; priv->apb_base = dev_read_addr_name(dev, "apb-base"); - if (!priv->axi_base) - return -ENODEV; - - ret = gpio_request_by_name(dev, "ep-gpios", 0, - &priv->ep_gpio, GPIOD_IS_OUT); - if (ret) { - dev_err(dev, "failed to find ep-gpios property\n"); - return ret; - } + if (priv->apb_base == FDT_ADDR_T_NONE) + return -EINVAL; ret = reset_get_by_name(dev, "core", &priv->core_rst); if (ret) { @@ -483,6 +465,13 @@ static int rockchip_pcie_parse_dt(struct udevice *dev) return ret; } + ret = device_get_supply_regulator(dev, "vpcie12v-supply", + &priv->vpcie12v); + if (ret && ret != -ENOENT) { + dev_err(dev, "failed to get vpcie12v supply (ret=%d)\n", ret); + return ret; + } + ret = device_get_supply_regulator(dev, "vpcie3v3-supply", &priv->vpcie3v3); if (ret && ret != -ENOENT) { @@ -510,6 +499,13 @@ static int rockchip_pcie_parse_dt(struct udevice *dev) return ret; } + ret = gpio_request_by_name(dev, "ep-gpios", 0, + &priv->ep_gpio, GPIOD_IS_OUT); + if (ret) { + dev_err(dev, "failed to find ep-gpios property\n"); + return ret; + } + return 0; } @@ -529,16 +525,26 @@ static int rockchip_pcie_probe(struct udevice *dev) ret = rockchip_pcie_set_vpcie(dev); if (ret) - return ret; + goto err_gpio_free; ret = rockchip_pcie_init_port(dev); if (ret) - return ret; + goto err_disable_vpcie; dev_info(dev, "PCIE-%d: Link up (Bus%d)\n", dev_seq(dev), hose->first_busno); return 0; + +err_disable_vpcie: + regulator_set_enable_if_allowed(priv->vpcie0v9, false); + regulator_set_enable_if_allowed(priv->vpcie1v8, false); + regulator_set_enable_if_allowed(priv->vpcie3v3, false); + regulator_set_enable_if_allowed(priv->vpcie12v, false); +err_gpio_free: + if (dm_gpio_is_valid(&priv->ep_gpio)) + dm_gpio_free(dev, &priv->ep_gpio); + return ret; } static const struct dm_pci_ops rockchip_pcie_ops = { @@ -552,10 +558,10 @@ static const struct udevice_id rockchip_pcie_ids[] = { }; U_BOOT_DRIVER(rockchip_pcie) = { - .name = "rockchip_pcie", - .id = UCLASS_PCI, - .of_match = rockchip_pcie_ids, - .ops = &rockchip_pcie_ops, - .probe = rockchip_pcie_probe, + .name = "rockchip_pcie", + .id = UCLASS_PCI, + .of_match = rockchip_pcie_ids, + .ops = &rockchip_pcie_ops, + .probe = rockchip_pcie_probe, .priv_auto = sizeof(struct rockchip_pcie), }; From a13a7a0b4508710e2274e9a7ac9bd07d02099604 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 14 Jun 2023 13:43:12 +0100 Subject: [PATCH 078/148] config: rock64: enable efuse for stable mac addr Enable the rockchip efuse driver on the Rock64 to provide a stable ethernet address on the device. Signed-off-by: Peter Robinson Reviewed-by: Kever Yang --- configs/rock64-rk3328_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 5e36612bb80..e9f0415bbd0 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -72,6 +72,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y From 080030f2766246bc9b0b41ba9b832b6ed6cb2838 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 14 Jun 2023 13:43:13 +0100 Subject: [PATCH 079/148] rockchip: dts: rk3328: Add rng details to u-boot.dtsi Add the rk3328 rng details to the u-boot.dtsi and enable the RNG on the Rock64 to be able to provide a random seed via UEFI. Signed-off-by: Peter Robinson (Fix typo message) Signed-off-by: Kever Yang --- arch/arm/dts/rk3328-u-boot.dtsi | 6 ++++++ configs/rock64-rk3328_defconfig | 2 ++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index ce96ce40a73..a9f2536de2a 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -26,6 +26,12 @@ 0x0 0xff720000 0x0 0x1000 0x0 0xff798000 0x0 0x1000>; }; + + rng: rng@ff060000 { + compatible = "rockchip,cryptov1-rng"; + reg = <0x0 0xff060000 0x0 0x4000>; + status = "okay"; + }; }; &cru { diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index e9f0415bbd0..c2641f65b50 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -75,6 +75,8 @@ CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y From 10e38327f017628f782ae4b104dcd64b3d3aa0fd Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 14 Jun 2023 13:43:14 +0100 Subject: [PATCH 080/148] rockchip: dts: rk3328: rock64: Align spi flash entry Align the SPI flash entry with upstream. There's no need to diverge here. Signed-off-by: Peter Robinson Reviewed-by: Kever Yang --- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 +- arch/arm/dts/rk3328-rock64.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index 849854302ee..6904515b969 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -54,7 +54,7 @@ }; &spi0 { - spi_flash: spiflash@0 { + spi_flash: flash@0 { bootph-all; }; }; diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts index 1b0f7e4551e..f69a38f42d2 100644 --- a/arch/arm/dts/rk3328-rock64.dts +++ b/arch/arm/dts/rk3328-rock64.dts @@ -345,7 +345,7 @@ &spi0 { status = "okay"; - spiflash@0 { + flash@0 { compatible = "jedec,spi-nor"; reg = <0>; From 2fa09b455a73a9bda0c616eaecd5dfafd5c19502 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Sat, 29 Jul 2023 19:11:42 +0530 Subject: [PATCH 081/148] rockchip: rv1126: Enable fdtoverlay support Add fdtoverlay_addr_r and enable OF_LIBFDT_OVERLAY for the use of DT overlay in RV1126. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + include/configs/rv1126_common.h | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 49da93d54b4..a279582f4f6 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -359,6 +359,7 @@ config ROCKCHIP_RV1126 select PMIC_RK8XX select BOARD_LATE_INIT imply ROCKCHIP_COMMON_BOARD + imply OF_LIBFDT_OVERLAY imply TPL_DM imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h index 1ec1640f99d..a64c0c63642 100644 --- a/include/configs/rv1126_common.h +++ b/include/configs/rv1126_common.h @@ -24,6 +24,7 @@ "scriptaddr=0x00000000\0" \ "pxefile_addr_r=0x00100000\0" \ "fdt_addr_r=0x08300000\0" \ + "fdtoverlay_addr_r=0x02000000\0" \ "kernel_addr_r=0x02008000\0" \ "ramdisk_addr_r=0x0a200000\0" From bb38db086c6c7eade690d83aa0d96af8c993b991 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Sat, 5 Aug 2023 20:00:11 +0800 Subject: [PATCH 082/148] rockchip: rk3568: Add EmbedFire Lubancat 2 support LubanCat2 is a rk3568 based SBC from EmbedFire. Specification: - Rockchip rk3568 - LPDDR4/4X 1/2/4/8 GB - TF scard slot - eMMC 8/32/64/128 GB - Gigabit ethernet x 2 - HDMI out - USB 2.0 Host x 1 - USB 2.0 Type-C OTG x 1 - USB 3.0 Host x 1 - Mini PCIE interface for WIFI/BT module - M.2 key for 2280 NVME - 40 pin header The dts file is sync from linux mainline. Signed-off-by: Andy Yan Reviewed-by: Kever Yang --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi | 27 + arch/arm/dts/rk3568-lubancat-2.dts | 733 +++++++++++++++++++++ board/rockchip/evb_rk3568/MAINTAINERS | 7 + configs/lubancat-2-rk3568_defconfig | 85 +++ doc/board/rockchip/rockchip.rst | 1 + 6 files changed, 854 insertions(+) create mode 100644 arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi create mode 100644 arch/arm/dts/rk3568-lubancat-2.dts create mode 100644 configs/lubancat-2-rk3568_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index bd518064f35..64c885dcf9a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -178,6 +178,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3566-soquartz-cm4.dtb \ rk3566-soquartz-model-a.dtb \ rk3568-evb.dtb \ + rk3568-lubancat-2.dtb \ rk3568-nanopi-r5c.dtb \ rk3568-nanopi-r5s.dtb \ rk3568-odroid-m1.dtb \ diff --git a/arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi b/arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi new file mode 100644 index 00000000000..27c62775233 --- /dev/null +++ b/arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2023 Rockchip Electronics Co., Ltd + * (C) Copyright 2023 Andy Yan + */ + +#include "rk356x-u-boot.dtsi" + +/ { + chosen { + stdout-path = &uart2; + }; +}; + +&sdhci { + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; +}; + +&uart2 { + bootph-all; + clock-frequency = <24000000>; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3568-lubancat-2.dts b/arch/arm/dts/rk3568-lubancat-2.dts new file mode 100644 index 00000000000..e653b067aa5 --- /dev/null +++ b/arch/arm/dts/rk3568-lubancat-2.dts @@ -0,0 +1,733 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2022 EmbedFire + */ + +/dts-v1/; +#include +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model = "EmbedFire LubanCat 2"; + compatible = "embedfire,lubancat-2", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + leds { + compatible = "gpio-leds"; + + user_led: user-led { + label = "user_led"; + linux,default-trigger = "heartbeat"; + default-state = "on"; + gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&user_led_pin>; + }; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + dc_5v: dc-5v-regulator { + compatible = "regulator-fixed"; + regulator-name = "dc_5v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc3v3_sys: vcc3v3-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_5v>; + }; + + vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator { + compatible = "regulator-fixed"; + regulator-name = "m2_pcie_3v3"; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc3v3_m2_pcie_en>; + pinctrl-names = "default"; + startup-delay-us = <200000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator { + compatible = "regulator-fixed"; + regulator-name = "minipcie_3v3"; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc3v3_mini_pcie_en>; + pinctrl-names = "default"; + startup-delay-us = <5000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_usb20_host: vcc5v0-usb20-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb20_host"; + enable-active-high; + gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc5v0_usb20_host_en>; + pinctrl-names = "default"; + }; + + vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb30_host"; + enable-active-high; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc5v0_usb30_host_en>; + pinctrl-names = "default"; + }; + + vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_otg_vbus"; + enable-active-high; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc5v0_otg_vbus_en>; + pinctrl-names = "default"; + }; +}; + +&combphy0 { + status = "okay"; +}; + +&combphy1 { + status = "okay"; +}; + +&combphy2 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + #sound-dai-cells = <0>; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2s1_8ch { + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +&gmac0 { + phy-mode = "rgmii"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + tx_delay = <0x22>; + rx_delay = <0x0e>; + + phy-handle = <&rgmii_phy0>; + status = "okay"; +}; + +&mdio0 { + rgmii_phy0: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&gmac1 { + phy-mode = "rgmii"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + + tx_delay = <0x21>; + rx_delay = <0x0e>; + + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&mdio1 { + rgmii_phy1: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&gic { + mbi-ranges = <94 31>, <229 31>, <289 31>; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x2 { + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_m2_pcie>; + status = "okay"; +}; + +&pcie2x1 { + reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; + disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_mini_pcie>; + status = "okay"; +}; + +&pmu_io_domains { + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm8 { + status = "okay"; +}; + +&pwm9 { + status = "disabled"; +}; + +&pwm10 { + status = "disabled"; +}; + +&pwm14 { + status = "disabled"; +}; + +&spi3 { + pinctrl-0 = <&spi3m1_pins>; + status = "disabled"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3m1_xfer>; + status = "disabled"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&sdhci { + assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>; + assigned-clock-rates = <200000000>, <24000000>, <200000000>; + bus-width = <8>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; + supports-emmc; + status = "okay"; +}; + +&sdmmc0 { + max-frequency = <150000000>; + no-sdio; + no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + status = "okay"; +}; + +/* USB OTG/USB Host_1 USB 2.0 Comb */ +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb30_host>; + status = "okay"; +}; + +&usb2phy0_otg { + phy-supply = <&vcc5v0_otg_vbus>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +/* USB Host_2/USB Host_3 USB 2.0 Comb */ +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + status = "okay"; +}; + +&usb2phy1_otg { + phy-supply = <&vcc5v0_usb20_host>; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +/* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2.0 */ +&usb_host0_xhci { + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + extcon = <&usb2phy0>; + maximum-speed = "high-speed"; + dr_mode = "host"; + status = "okay"; +}; + +&sata0 { + status = "okay"; +}; + +/* USB3.0 Host */ +&usb_host1_xhci { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&pinctrl { + leds { + user_led_pin: user-status-led-pin { + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_usb20_host_en: vcc5v0-usb20-host-en { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_usb30_host_en: vcc5v0-usb30-host-en { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_otg_vbus_en: vcc5v0-otg-vbus-en { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + vcc3v3_m2_pcie_en: vcc3v3-m2-pcie-en { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc3v3_mini_pcie_en: vcc3v3-mini-pcie-en { + rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS index 82a92b89fa6..1cdeafcf79b 100644 --- a/board/rockchip/evb_rk3568/MAINTAINERS +++ b/board/rockchip/evb_rk3568/MAINTAINERS @@ -7,6 +7,13 @@ F: configs/evb-rk3568_defconfig F: arch/arm/dts/rk3568-evb-boot.dtsi F: arch/arm/dts/rk3568-evb.dts +Lubancat-2 +M: Andy Yan +S: Maintained +F: configs/lubancat-2-rk3568_defconfig +F: arch/arm/dts/rk3568-lubancat-2.dts +F: arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi + NANOPI-R5C M: Tianling Shen S: Maintained diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig new file mode 100644 index 00000000000..b01d3bd2a1a --- /dev/null +++ b/configs/lubancat-2-rk3568_defconfig @@ -0,0 +1,85 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-lubancat-2.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +# CONFIG_SPI_FLASH is not set +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y +CONFIG_EFI_VAR_BUF_SIZE=16384 diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 49a0c5797ad..31aeb856760 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -95,6 +95,7 @@ List of mainline supported Rockchip boards: * rk3568 - Rockchip Evb-RK3568 (evb-rk3568) + - EmbedFire Lubancat 2 (lubancat-2-rk3568_defconfig) - Hardkernel ODROID-M1 (odroid-m1-rk3568) - Pine64 Quartz64-A Board (quartz64-a-rk3566_defconfig) - Pine64 Quartz64-B Board (quartz64-b-rk3566_defconfig) From 8300cebcd60476443d8a630b56f715eae5af911b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alvaro=20Fernando=20Garc=C3=ADa?= Date: Thu, 3 Aug 2023 21:35:38 -0300 Subject: [PATCH 083/148] video: avoid build failure on veyron board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 533ad9dc avoided an overflow but causes compilation failure on 32bit boards (eg. veyron speedy) this commit uses div_u64 which has a fallback codepath for 32bit platforms Signed-off-by: Alvaro Fernando García Tested-by: Simon Glass # chromebook_jerry Reviewed-by: Kever Yang --- drivers/video/pwm_backlight.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c index 46c16a8f447..aa0e2928666 100644 --- a/drivers/video/pwm_backlight.c +++ b/drivers/video/pwm_backlight.c @@ -14,6 +14,7 @@ #include #include #include +#include #include /** @@ -59,12 +60,14 @@ struct pwm_backlight_priv { static int set_pwm(struct pwm_backlight_priv *priv) { + u64 width; uint duty_cycle; int ret; if (priv->period_ns) { - duty_cycle = (u64)priv->period_ns * (priv->cur_level - priv->min_level) / - (priv->max_level - priv->min_level); + width = priv->period_ns * (priv->cur_level - priv->min_level); + duty_cycle = div_u64(width, + (priv->max_level - priv->min_level)); ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, duty_cycle); } else { From 6e710897aa319cda8aaf18a09290e3fb9b6d015f Mon Sep 17 00:00:00 2001 From: Anton Date: Mon, 7 Aug 2023 10:04:46 +0300 Subject: [PATCH 084/148] rockchip: cru: Enable cpu info support for rk3568 Add cru structure definition in head file to support cpu_info driver. Series-version: 2 Series-changes: 2 Format the patch header, add commit message and signature. Signed-off-by: Anton Signed-off-by: Kever Yang --- arch/arm/include/asm/arch-rockchip/cru.h | 2 ++ arch/arm/include/asm/arch-rockchip/cru_rk3568.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index 13ea4aba8eb..9778790f348 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -15,6 +15,8 @@ # include #elif defined(CONFIG_ROCKCHIP_RK3399) # include +#elif defined(CONFIG_ROCKCHIP_RK3568) +#include #endif /* CRU_GLB_RST_ST */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h index 399f19ad21e..76f1ad55105 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h @@ -106,6 +106,8 @@ struct rk3568_cru { unsigned int emmc_con[2];/* Address Offset: 0x0598 */ }; +#define rockchip_cru rk3568_cru + check_member(rk3568_cru, mode_con00, 0xc0); check_member(rk3568_cru, softrst_con[0], 0x400); From acb9812034850ae0d737a767b392b9cd097f3606 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Fri, 4 Aug 2023 09:33:57 +0000 Subject: [PATCH 085/148] clk: rockchip: rk3568: Fix clk selection in rk3568_pwm_get_clk Fix use of wrong clk selection for CLK_PWM1 on RK3568. Fixes: 4a262feba3a5 ("rockchip: rk3568: add clock driver") Signed-off-by: Damon Ding Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3568.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 0df82f59715..e8e4d20e532 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -1142,7 +1142,7 @@ static ulong rk3568_pwm_get_clk(struct rk3568_clk_priv *priv, ulong clk_id) switch (clk_id) { case CLK_PWM1: - sel = (con & CLK_PWM1_SEL_MASK) >> CLK_PWM3_SEL_SHIFT; + sel = (con & CLK_PWM1_SEL_MASK) >> CLK_PWM1_SEL_SHIFT; break; case CLK_PWM2: sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; From 6da8400d7ae986ef2a8e0ddb4f39907c6c0666f1 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 4 Aug 2023 09:33:59 +0000 Subject: [PATCH 086/148] clk: rockchip: rk3568: Fix mask for clk_cpll_div_25m_div The field for clk_cpll_div_25m_div in CRU_CLKSEL_CON81 is 6 bits wide, not 5 bits wide as currently defined in CPLL_25M_DIV_MASK. Fix this and the assert so that CPLL_25M can be assigned a 25 MHz rate. Fixes: 4a262feba3a5 ("rockchip: rk3568: add clock driver") Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/include/asm/arch-rockchip/cru_rk3568.h | 2 +- drivers/clk/rockchip/clk_rk3568.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h index 76f1ad55105..9c7ddd751f7 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h @@ -495,7 +495,7 @@ enum { /* CRU_CLK_SEL81_CON */ CPLL_25M_DIV_SHIFT = 8, - CPLL_25M_DIV_MASK = 0x1f << CPLL_25M_DIV_SHIFT, + CPLL_25M_DIV_MASK = 0x3f << CPLL_25M_DIV_SHIFT, CPLL_50M_DIV_SHIFT = 0, CPLL_50M_DIV_MASK = 0x1f << CPLL_50M_DIV_SHIFT, diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index e8e4d20e532..dab254d4d11 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -702,7 +702,10 @@ static ulong rk3568_cpll_div_set_rate(struct rk3568_clk_priv *priv, } div = DIV_ROUND_UP(priv->cpll_hz, rate); - assert(div - 1 <= 31); + if (clk_id == CPLL_25M) + assert(div - 1 <= 63); + else + assert(div - 1 <= 31); rk_clrsetreg(&cru->clksel_con[con], mask, (div - 1) << shift); return rk3568_cpll_div_get_rate(priv, clk_id); From ff46cd56318015133e92140b31083eab68e701f7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 4 Aug 2023 09:33:59 +0000 Subject: [PATCH 087/148] clk: rockchip: rk3568: Include UART clocks in SPL The clock driver for RK3568 does not include support for UART clocks in SPL. This result in the following message with high enough loglevel. ns16550_serial serial@fe660000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 Fix this by including support for UART clocks in SPL. Fixes: 4a262feba3a5 ("rockchip: rk3568: add clock driver") Signed-off-by: Jonas Karlman Reviewed-by: Eugen Hristev Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3568.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index dab254d4d11..dabc7e70dd5 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -2189,6 +2189,7 @@ static ulong rk3568_rkvdec_set_clk(struct rk3568_clk_priv *priv, return rk3568_rkvdec_get_clk(priv, clk_id); } +#endif static ulong rk3568_uart_get_rate(struct rk3568_clk_priv *priv, ulong clk_id) { @@ -2324,7 +2325,6 @@ static ulong rk3568_uart_set_rate(struct rk3568_clk_priv *priv, return rk3568_uart_get_rate(priv, clk_id); } -#endif static ulong rk3568_clk_get_rate(struct clk *clk) { @@ -2463,6 +2463,7 @@ static ulong rk3568_clk_get_rate(struct clk *clk) case TCLK_WDT_NS: rate = OSC_HZ; break; +#endif case SCLK_UART1: case SCLK_UART2: case SCLK_UART3: @@ -2474,7 +2475,6 @@ static ulong rk3568_clk_get_rate(struct clk *clk) case SCLK_UART9: rate = rk3568_uart_get_rate(priv, clk->id); break; -#endif case ACLK_SECURE_FLASH: case ACLK_CRYPTO_NS: case HCLK_SECURE_FLASH: @@ -2648,6 +2648,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) case TCLK_WDT_NS: ret = OSC_HZ; break; +#endif case SCLK_UART1: case SCLK_UART2: case SCLK_UART3: @@ -2659,7 +2660,6 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) case SCLK_UART9: ret = rk3568_uart_set_rate(priv, clk->id, rate); break; -#endif case ACLK_SECURE_FLASH: case ACLK_CRYPTO_NS: case HCLK_SECURE_FLASH: From 9296f9a8d7ffc96b8a8220a0e74c7dacb1934b2e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 4 Aug 2023 09:34:00 +0000 Subject: [PATCH 088/148] clk: rockchip: rk3568: Add dummy support for GMAC speed clocks Pine64 Quartz64 boards DT reference SCLK_GMAC1_RGMII_SPEED in the assigned-clocks property of the gmac1 node. This result in a ENOENT error when driver core tries to set a parent for this clock. The clock speed in rgmii/rmii mode is changed using clk_set_rate of the tx_rx clock and not using clk_set_parent of the speed clock. Add dummy support for SCLK_GMAC1_RGMII_SPEED and similar clocks to clk driver to allow a driver for gmac node to probe. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3568.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index dabc7e70dd5..599b7b130eb 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -2843,6 +2843,10 @@ static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent) case CLK_RKVDEC_CORE: return rk3568_rkvdec_set_parent(clk, parent); case I2S1_MCLKOUT_TX: + case SCLK_GMAC0_RGMII_SPEED: + case SCLK_GMAC0_RMII_SPEED: + case SCLK_GMAC1_RGMII_SPEED: + case SCLK_GMAC1_RMII_SPEED: break; default: return -ENOENT; From 520fece4cacb294b78ca7e3a25667a6449c7287c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 4 Aug 2023 09:34:01 +0000 Subject: [PATCH 089/148] rockchip: rk356x-u-boot: Set max-frequency prop in sdhci node Most board device trees for RK356x set max-frequency = <200000000> in the sdhci node, some boards like Quartz64 do not. This result in an error message due to sdhci driver trying to set a clock rate of 0 instead of the max-frequency value. rockchip_sdhci_probe clk set rate fail! Fix this by setting a common max-frequency in rk356x-u-boot.dtsi. A patch to set default max-frequency of sdhci node in linux is planned. Also remove the forced status = "okay" for the sdhci and sdmmc0 nodes, boards already set correct state for these nodes. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk356x-u-boot.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index d21b1820522..32f687f2924 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -126,12 +126,11 @@ &sdhci { bootph-pre-ram; - status = "okay"; + max-frequency = <200000000>; }; &sdmmc0 { bootph-pre-ram; - status = "okay"; }; #ifdef CONFIG_ROCKCHIP_SPI_IMAGE From 08e74ac3d9c20d29e38c1ec6e50688f978975097 Mon Sep 17 00:00:00 2001 From: Massimo Pegorer Date: Wed, 2 Aug 2023 19:05:23 +0200 Subject: [PATCH 090/148] rockchip: spl: Drop useless call to debug_uart_init Since commit 0dba45864b2a ("arm: Init the debug UART") function debug_uart_init is called in crt files _main before calling board_init_f. Therefore, there is no need to call it again inside board_init_f implementation in arm/mach-rockchip/spl.c. Signed-off-by: Massimo Pegorer Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/spl.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 30be6404252..a6396b3c423 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -116,12 +116,10 @@ void board_init_f(ulong dummy) /* * Debug UART can be used from here if required: * - * debug_uart_init(); * printch('a'); * printhex8(0x1234); * printascii("string"); */ - debug_uart_init(); debug("\nspl:debug uart enabled in %s\n", __func__); #endif From 36adce73724d53f0a22520af86690381b69518aa Mon Sep 17 00:00:00 2001 From: Massimo Pegorer Date: Wed, 2 Aug 2023 19:05:24 +0200 Subject: [PATCH 091/148] rockchip: spl: Drop out of scope debug message related to uart init Debug uart is no more inited in board_init_f function: remove this debug message from board_init_f. If an earliest-as-possible message after debug uart initialization is needed, enable DEBUG_UART_ANNOUNCE Kconfig option, instead. Signed-off-by: Massimo Pegorer Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/spl.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index a6396b3c423..87280e2ba7c 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -112,17 +112,6 @@ void board_init_f(ulong dummy) { int ret; -#ifdef CONFIG_DEBUG_UART - /* - * Debug UART can be used from here if required: - * - * printch('a'); - * printhex8(0x1234); - * printascii("string"); - */ - debug("\nspl:debug uart enabled in %s\n", __func__); -#endif - board_early_init_f(); ret = spl_early_init(); From e4c6ccc6875638766970d249a6cb5dacce6822fe Mon Sep 17 00:00:00 2001 From: Massimo Pegorer Date: Thu, 3 Aug 2023 13:08:11 +0200 Subject: [PATCH 092/148] clk: rockchip: rk3308: Fix ordering between masking and shifting As per definitions of masks and shift offsets in cru_rk3308.h, values read from registers must be first masked and then shifted. By the way, this fix is binary invariant, because in all of fixed cases the shift offset is zero. Signed-off-by: Massimo Pegorer Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3308.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c index 64f33587e28..d27673c4540 100644 --- a/drivers/clk/rockchip/clk_rk3308.c +++ b/drivers/clk/rockchip/clk_rk3308.c @@ -150,7 +150,7 @@ static ulong rk3308_i2c_get_clk(struct clk *clk) } con = readl(&cru->clksel_con[con_id]); - div = con >> CLK_I2C_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK; + div = (con & CLK_I2C_DIV_CON_MASK) >> CLK_I2C_DIV_CON_SHIFT; return DIV_TO_RATE(priv->dpll_hz, div); } @@ -314,7 +314,7 @@ static ulong rk3308_saradc_get_clk(struct clk *clk) u32 div, con; con = readl(&cru->clksel_con[34]); - div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK; + div = (con & CLK_SARADC_DIV_CON_MASK) >> CLK_SARADC_DIV_CON_SHIFT; return DIV_TO_RATE(OSC_HZ, div); } @@ -342,7 +342,7 @@ static ulong rk3308_tsadc_get_clk(struct clk *clk) u32 div, con; con = readl(&cru->clksel_con[33]); - div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK; + div = (con & CLK_SARADC_DIV_CON_MASK) >> CLK_SARADC_DIV_CON_SHIFT; return DIV_TO_RATE(OSC_HZ, div); } @@ -385,7 +385,7 @@ static ulong rk3308_spi_get_clk(struct clk *clk) } con = readl(&cru->clksel_con[con_id]); - div = con >> CLK_SPI_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK; + div = (con & CLK_SPI_DIV_CON_MASK) >> CLK_SPI_DIV_CON_SHIFT; return DIV_TO_RATE(priv->dpll_hz, div); } @@ -429,7 +429,7 @@ static ulong rk3308_pwm_get_clk(struct clk *clk) u32 div, con; con = readl(&cru->clksel_con[29]); - div = con >> CLK_PWM_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK; + div = (con & CLK_PWM_DIV_CON_MASK) >> CLK_PWM_DIV_CON_SHIFT; return DIV_TO_RATE(priv->dpll_hz, div); } From 0cd87aac5c89941e711c392d5062da031445ae59 Mon Sep 17 00:00:00 2001 From: Massimo Pegorer Date: Thu, 3 Aug 2023 13:08:12 +0200 Subject: [PATCH 093/148] clk: rockchip: rk3308: Support reading UART rate and clock registers Add support to read RK3308 registers used to configure UART clocks, and thus to get UART rate and baudrate. This fixes clock_get_rate returning error on serial device probing. Moreover, there is no need anymore to use 'clock-frequency' property for UART nodes in *-u-boot.dtsi files for all cases where UART is not inited by U-Boot proper or by SPL o by TPL code but by a preliminary external boot phase (for Rock PI S, UART is inited by external TPL). Signed-off-by: Massimo Pegorer Reviewed-by: Kever Yang --- arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 2 - arch/arm/include/asm/arch-rk3308/cru_rk3308.h | 15 +++++ drivers/clk/rockchip/clk_rk3308.c | 59 +++++++++++++++++++ 3 files changed, 74 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi index 09694b41e53..61415559b7b 100644 --- a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi +++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi @@ -12,6 +12,4 @@ &uart0 { bootph-all; - clock-frequency = <24000000>; - status = "okay"; }; diff --git a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h index 86c906bb0ed..84b63e4d568 100644 --- a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h +++ b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h @@ -189,6 +189,21 @@ enum { DCLK_VOP_DIV_SHIFT = 0, DCLK_VOP_DIV_MASK = 0xff, + /* CRU_CLKSEL_CON10 */ + /* CRU_CLKSEL_CON13 */ + /* CRU_CLKSEL_CON16 */ + /* CRU_CLKSEL_CON19 */ + /* CRU_CLKSEL_CON22 */ + CLK_UART_PLL_SEL_SHIFT = 13, + CLK_UART_PLL_SEL_MASK = 0x7 << CLK_UART_PLL_SEL_SHIFT, + CLK_UART_PLL_SEL_DPLL = 0, + CLK_UART_PLL_SEL_VPLL0, + CLK_UART_PLL_SEL_VPLL1, + CLK_UART_PLL_SEL_480M, + CLK_UART_PLL_SEL_24M, + CLK_UART_DIV_CON_SHIFT = 0, + CLK_UART_DIV_CON_MASK = 0x1f << CLK_UART_DIV_CON_SHIFT, + /* CRU_CLK_SEL25_CON */ /* CRU_CLK_SEL26_CON */ /* CRU_CLK_SEL27_CON */ diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c index d27673c4540..d0a3f654466 100644 --- a/drivers/clk/rockchip/clk_rk3308.c +++ b/drivers/clk/rockchip/clk_rk3308.c @@ -451,6 +451,58 @@ static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz) return rk3308_pwm_get_clk(clk); } +static ulong rk3308_uart_get_clk(struct clk *clk) +{ + struct rk3308_clk_priv *priv = dev_get_priv(clk->dev); + struct rk3308_cru *cru = priv->cru; + u32 div, pll_sel, con, con_id, parent; + + switch (clk->id) { + case SCLK_UART0: + con_id = 10; + break; + case SCLK_UART1: + con_id = 13; + break; + case SCLK_UART2: + con_id = 16; + break; + case SCLK_UART3: + con_id = 19; + break; + case SCLK_UART4: + con_id = 22; + break; + default: + printf("do not support this uart interface\n"); + return -EINVAL; + } + + con = readl(&cru->clksel_con[con_id]); + pll_sel = (con & CLK_UART_PLL_SEL_MASK) >> CLK_UART_PLL_SEL_SHIFT; + div = (con & CLK_UART_DIV_CON_MASK) >> CLK_UART_DIV_CON_SHIFT; + + switch (pll_sel) { + case CLK_UART_PLL_SEL_DPLL: + parent = priv->dpll_hz; + break; + case CLK_UART_PLL_SEL_VPLL0: + parent = priv->vpll0_hz; + break; + case CLK_UART_PLL_SEL_VPLL1: + parent = priv->vpll0_hz; + break; + case CLK_UART_PLL_SEL_24M: + parent = OSC_HZ; + break; + default: + printf("do not support this uart pll sel\n"); + return -EINVAL; + } + + return DIV_TO_RATE(parent, div); +} + static ulong rk3308_vop_get_clk(struct clk *clk) { struct rk3308_clk_priv *priv = dev_get_priv(clk->dev); @@ -813,6 +865,13 @@ static ulong rk3308_clk_get_rate(struct clk *clk) case SCLK_EMMC_SAMPLE: rate = rk3308_mmc_get_clk(clk); break; + case SCLK_UART0: + case SCLK_UART1: + case SCLK_UART2: + case SCLK_UART3: + case SCLK_UART4: + rate = rk3308_uart_get_clk(clk); + break; case SCLK_I2C0: case SCLK_I2C1: case SCLK_I2C2: From c71321c7c6ee2a284dd66b949747e91e9cb75341 Mon Sep 17 00:00:00 2001 From: Massimo Pegorer Date: Thu, 3 Aug 2023 13:08:13 +0200 Subject: [PATCH 094/148] dts: rockchip: rk3308: Avoid warning for serial probe on prereloc Make device tree complete and consistent for pre relocation phase. Some nodes are missing, causing warnings to be issued on serial port probing during pre relocation phase (uclass_get_device_by_phandle_id fails when called by pinctrl_select_state_full: none of these failures is fatal nor causing issues). Add to *-u-boot.dtsi all required nodes with the 'bootph-some-ram' attribute. Signed-off-by: Massimo Pegorer Reviewed-by: Kever Yang --- arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 27 +++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi index 61415559b7b..d88dee80573 100644 --- a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi +++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi @@ -13,3 +13,30 @@ &uart0 { bootph-all; }; + +&pinctrl { + bootph-some-ram; + + uart0 { + bootph-some-ram; + }; + rtc { + bootph-some-ram; + }; +}; + +&uart0_xfer { + bootph-some-ram; +}; + +&uart0_cts { + bootph-some-ram; +}; + +&uart0_rts { + bootph-some-ram; +}; + +&rtc_32k { + bootph-some-ram; +}; From a73a28b3298dacea3a39f97c6da50fe7cd10e7df Mon Sep 17 00:00:00 2001 From: FUKAUMI Naoki Date: Thu, 3 Aug 2023 17:04:32 +0900 Subject: [PATCH 095/148] rockchip: MAINTAINERS: fix board name for Radxa ROCK 4C+ align with other ROCK series. Fixes: 2b506407c8 ("rockchip: Add MAINTAINERS entry for Radxa Rock 4C+") Signed-off-by: FUKAUMI Naoki Reviewed-by: Kever Yang --- board/rockchip/evb_rk3399/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index cb44bc9fda4..c7e412b54ee 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -80,7 +80,7 @@ F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi -RADXA ROCK 4C+ +ROCK-4C+ M: FUKAUMI Naoki S: Maintained F: configs/rock-4c-plus-rk3399_defconfig From a2bd99549c61768b67ec55bb104b9f2abaf52960 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 25 Apr 2020 14:57:55 +0200 Subject: [PATCH 096/148] clk: renesas: Tear clock controller down last before booting OS Once all the other drivers got torn down in preparation for the OS to start, tear down the clock controller last. The clock controller must be torn down last as some of the clock which get turned off might have still been needed during the teardown stage of the other drivers. Signed-off-by: Marek Vasut Signed-off-by: Tam Nguyen Signed-off-by: Hai Pham --- drivers/clk/renesas/clk-rcar-gen3.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index c8a5512b65e..0d274bb986e 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -526,6 +526,7 @@ U_BOOT_DRIVER(clk_gen3) = { .ops = &gen3_clk_ops, .probe = gen3_clk_probe, .remove = gen3_clk_remove, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_VITAL, }; static int gen3_reset_assert(struct reset_ctl *reset_ctl) @@ -565,6 +566,7 @@ U_BOOT_DRIVER(rst_gen3) = { .name = "rst_gen3", .id = UCLASS_RESET, .ops = &rst_gen3_ops, + .flags = DM_FLAG_OS_PREPARE | DM_FLAG_VITAL, }; int gen3_cpg_bind(struct udevice *parent) From bb89d926fc66fc754915f0300c77815e7db9327f Mon Sep 17 00:00:00 2001 From: Hai Pham Date: Tue, 20 Jun 2023 00:43:18 +0200 Subject: [PATCH 097/148] =?UTF-8?q?ARM:=20rmobile:=20Update=20little?= =?UTF-8?q?=E2=80=90endian=20byte=20order=20option=20in=20srec=5Fcat=20com?= =?UTF-8?q?mand?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since srecord v1.60, option "-Little_Endian_CONSTant" is deprecated. Fix the build warnings by updating little‐endian byte order option in srec_cat command when generating loader header. Reviewed-by: Marek Vasut Signed-off-by: Hai Pham Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/Makefile | 55 +++++++++++++++++++--------------- 1 file changed, 31 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile index fadb6eb0ab6..4eddba53ed2 100644 --- a/arch/arm/mach-rmobile/Makefile +++ b/arch/arm/mach-rmobile/Makefile @@ -25,6 +25,13 @@ cmd_objcopy = $(OBJCOPY) --gap-fill=0x00 $(OBJCOPYFLAGS) \ spl/u-boot-spl.srec: spl/u-boot-spl FORCE $(call if_changed,objcopy) +srec_cat_gte_160 := ${shell expr `srec_cat -VERSION | grep ^srec_cat | sed 's/^.* //g' | cut -f1-2 -d.` \>= "1.60"} +ifeq "$(srec_cat_gte_160)" "1" + srec_cat_le_cmd := "-constant-l-e" +else + srec_cat_le_cmd := "-l-e-constant" +endif + ifneq ($(CONFIG_R8A774C0)$(CONFIG_R8A77990)$(CONFIG_R8A77995),) # # The first 6 generate statements generate the R-Car Gen3 SCIF loader header. @@ -52,34 +59,34 @@ quiet_cmd_srec_cat = SRECCAT $@ cmd_srec_cat = srec_cat -output $@ -M 8 $< -M 8 \ -offset -0x13fd0 \ -Output_Block_Size 16 \ - -generate 0xe6300400 0xe6300404 -l-e-constant 0x0 4 \ - -generate 0xe630048c 0xe6300490 -l-e-constant 0x0 4 \ - -generate 0xe63005d4 0xe63005d8 -l-e-constant 0xe6304000 4 \ - -generate 0xe63006e4 0xe63006e8 -l-e-constant $2 4 \ - -generate 0xe6301154 0xe6301158 -l-e-constant 0xe6304000 4 \ - -generate 0xe6301264 0xe6301268 -l-e-constant $2 4 \ - -generate 0xe6304000 0xe6304004 -l-e-constant 0xd2bcc000 4 \ - -generate 0xe6304004 0xe6304008 -l-e-constant 0xb26c0400 4 \ - -generate 0xe6304008 0xe630400c -l-e-constant 0xb2720001 4 \ - -generate 0xe630400c 0xe6304010 -l-e-constant 0xb27c0421 4 \ - -generate 0xe6304010 0xe6304014 -l-e-constant 0xb2710402 4 \ - -generate 0xe6304014 0xe6304018 -l-e-constant 0xaa0203e0 4 \ - -generate 0xe6304018 0xe630401c -l-e-constant 0xd28e0003 4 \ - -generate 0xe630401c 0xe6304020 -l-e-constant 0xa8c11424 4 \ - -generate 0xe6304020 0xe6304024 -l-e-constant 0xa8811444 4 \ - -generate 0xe6304024 0xe6304028 -l-e-constant 0xf1004063 4 \ - -generate 0xe6304028 0xe630402c -l-e-constant 0x54ffffaa 4 \ - -generate 0xe630402c 0xe6304030 -l-e-constant 0xd61f0000 4 + -generate 0xe6300400 0xe6300404 $(srec_cat_le_cmd) 0x0 4 \ + -generate 0xe630048c 0xe6300490 $(srec_cat_le_cmd) 0x0 4 \ + -generate 0xe63005d4 0xe63005d8 $(srec_cat_le_cmd) 0xe6304000 4 \ + -generate 0xe63006e4 0xe63006e8 $(srec_cat_le_cmd) $2 4 \ + -generate 0xe6301154 0xe6301158 $(srec_cat_le_cmd) 0xe6304000 4 \ + -generate 0xe6301264 0xe6301268 $(srec_cat_le_cmd) $2 4 \ + -generate 0xe6304000 0xe6304004 $(srec_cat_le_cmd) 0xd2bcc000 4 \ + -generate 0xe6304004 0xe6304008 $(srec_cat_le_cmd) 0xb26c0400 4 \ + -generate 0xe6304008 0xe630400c $(srec_cat_le_cmd) 0xb2720001 4 \ + -generate 0xe630400c 0xe6304010 $(srec_cat_le_cmd) 0xb27c0421 4 \ + -generate 0xe6304010 0xe6304014 $(srec_cat_le_cmd) 0xb2710402 4 \ + -generate 0xe6304014 0xe6304018 $(srec_cat_le_cmd) 0xaa0203e0 4 \ + -generate 0xe6304018 0xe630401c $(srec_cat_le_cmd) 0xd28e0003 4 \ + -generate 0xe630401c 0xe6304020 $(srec_cat_le_cmd) 0xa8c11424 4 \ + -generate 0xe6304020 0xe6304024 $(srec_cat_le_cmd) 0xa8811444 4 \ + -generate 0xe6304024 0xe6304028 $(srec_cat_le_cmd) 0xf1004063 4 \ + -generate 0xe6304028 0xe630402c $(srec_cat_le_cmd) 0x54ffffaa 4 \ + -generate 0xe630402c 0xe6304030 $(srec_cat_le_cmd) 0xd61f0000 4 else quiet_cmd_srec_cat = SRECCAT $@ cmd_srec_cat = srec_cat -output $@ -M 8 $< -M 8 \ -Output_Block_Size 16 \ - -generate 0xe6300400 0xe6300404 -l-e-constant 0x0 4 \ - -generate 0xe630048c 0xe6300490 -l-e-constant 0x0 4 \ - -generate 0xe63005d4 0xe63005d8 -l-e-constant $(CONFIG_SPL_TEXT_BASE) 4 \ - -generate 0xe63006e4 0xe63006e8 -l-e-constant $2 4 \ - -generate 0xe6301154 0xe6301158 -l-e-constant $(CONFIG_SPL_TEXT_BASE) 4 \ - -generate 0xe6301264 0xe6301268 -l-e-constant $2 4 + -generate 0xe6300400 0xe6300404 $(srec_cat_le_cmd) 0x0 4 \ + -generate 0xe630048c 0xe6300490 $(srec_cat_le_cmd) 0x0 4 \ + -generate 0xe63005d4 0xe63005d8 $(srec_cat_le_cmd) $(CONFIG_SPL_TEXT_BASE) 4 \ + -generate 0xe63006e4 0xe63006e8 $(srec_cat_le_cmd) $2 4 \ + -generate 0xe6301154 0xe6301158 $(srec_cat_le_cmd) $(CONFIG_SPL_TEXT_BASE) 4 \ + -generate 0xe6301264 0xe6301268 $(srec_cat_le_cmd) $2 4 endif spl/u-boot-spl.scif: spl/u-boot-spl.srec spl/u-boot-spl.bin From 01c76f1a64ba8cb3da9b26be481e289ee16960f0 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 3 Aug 2023 17:32:41 +0800 Subject: [PATCH 098/148] video: vidconsole: Fix null dereference of ops->measure At present vidconsole_measure() tests ops->select_font before calling ops->measure, which would result in a null dereference when the console driver provides no ops for measure. Fixes: b828ed7d7929 ("console: Allow measuring the bounding box of text") Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- drivers/video/vidconsole-uclass.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index 05f93047809..b5b3b662590 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -603,7 +603,7 @@ int vidconsole_measure(struct udevice *dev, const char *name, uint size, struct vidconsole_ops *ops = vidconsole_get_ops(dev); int ret; - if (ops->select_font) { + if (ops->measure) { ret = ops->measure(dev, name, size, text, bbox); if (ret != -ENOSYS) return ret; From aba6776a71d3ccbbaf9452271c440364a5640ce3 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 3 Aug 2023 18:40:08 +0800 Subject: [PATCH 099/148] video: kconfig: Fix a typo in SPL_VIDEO_REMOVE Add one space between 'before' and 'loading'. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- drivers/video/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 2a37d026bc2..69f4809cf4a 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1115,7 +1115,7 @@ config SPL_VIDEO_REMOVE bool "Remove video driver after SPL stage" help if this option is enabled video driver will be removed at the end of - SPL stage, beforeloading the next stage. + SPL stage, before loading the next stage. if SPL_SPLASH_SCREEN From 28cd244e847c9a3becc954b5d911a7e67f34b14a Mon Sep 17 00:00:00 2001 From: Jason Wessel Date: Wed, 26 Jul 2023 10:42:34 +0800 Subject: [PATCH 100/148] bcm2835: Add simiple-framebuffer for use with fkms When the fkms dtb overlay is used only the simple-framebuffer is presented as a usable video display. So, add "simple-framebuffer" compatible to enable video driver bcm2835. Signed-off-by: Jason Wessel Signed-off-by: Meng Li --- drivers/video/bcm2835.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c index c2962932c97..14942526f19 100644 --- a/drivers/video/bcm2835.c +++ b/drivers/video/bcm2835.c @@ -54,6 +54,9 @@ static const struct udevice_id bcm2835_video_ids[] = { { .compatible = "brcm,bcm2835-hdmi" }, { .compatible = "brcm,bcm2711-hdmi0" }, { .compatible = "brcm,bcm2708-fb" }, +#if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB) + { .compatible = "simple-framebuffer" }, +#endif { } }; From 04cc66c047d959dc1b22a625b7949a26793ac52b Mon Sep 17 00:00:00 2001 From: Meng Li Date: Wed, 26 Jul 2023 10:42:35 +0800 Subject: [PATCH 101/148] rpi: set the correct parameter for simple framebuffer node When raspberrpi-4b platform boots up, there are 2 sets of same bootup log displayed on HDMI monitor screen, it looks like the screen is split into 2 parts. The root cause is that video format of u-boot is different from kernel. The fixing "a8r8g8b8" video format is used in u-boot, but "r5g6b5" video format from framebuffer node is used in kernel image. In order to avoid weird display status on screen, it needs to set the correct parameter for simple framebuffer node even if it has existed. Signed-off-by: Meng Li --- board/raspberrypi/rpi/rpi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 1057ebb9948..38bcab15cf8 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -561,6 +561,8 @@ int ft_board_setup(void *blob, struct bd_info *bd) node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer"); if (node < 0) fdt_simplefb_add_node(blob); + else + fdt_simplefb_enable_and_mem_rsv(blob); #ifdef CONFIG_EFI_LOADER /* Reserve the spin table */ From d7009faa098169abd7ff0e4b41af89b17896a7da Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 14 Aug 2023 00:28:26 +0000 Subject: [PATCH 102/148] pinctrl: rockchip: Fix drive and input schmitt on RK3568 On RK3568 most pins have a configurable drive strength of level 0-5 and some pins level 0-11. When rk3568_set_drive is called with a strength value above 7 the drv value written to reg may overflow into the write enable bits, resulting in a bad configuration. This cause e.g. ethernet PHY on Radxa CM3-IO board not to work after drive is configured according to the device tree. Could not get PHY for ethernet@fe010000: addr 0 Level 6-11 can be configured using a second reg for some pins, however the drv value is reused resulting in lower 6 bits being written to reg. Input schmitt is configured in 2-bit fields on RK3568 compared to earlier generation and 2'b10 should be used to enable input schmitt. Change to use regmap_update_bits with a rmask to fix the overflow issue and closer match the linux driver. Bit shift the drv value used for the second reg to configure drive strength level 6-11. Also write correct values for input schmitt setting. Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver") Signed-off-by: Jonas Karlman Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- drivers/pinctrl/rockchip/pinctrl-rk3568.c | 56 +++++++++++++---------- 1 file changed, 31 insertions(+), 25 deletions(-) diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c b/drivers/pinctrl/rockchip/pinctrl-rk3568.c index 314edb5a606..1d439198260 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c @@ -113,11 +113,9 @@ static int rk3568_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) struct rockchip_pinctrl_priv *priv = bank->priv; int iomux_num = (pin / 8); struct regmap *regmap; - int reg, ret, mask; + int reg, mask; u8 bit; - u32 data; - - debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); + u32 data, rmask; if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) regmap = priv->regmap_pmu; @@ -131,10 +129,10 @@ static int rk3568_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) mask = 0xf; data = (mask << (bit + 16)); + rmask = data | (data >> 16); data |= (mux & mask) << bit; - ret = regmap_write(regmap, reg, data); - return ret; + return regmap_update_bits(regmap, reg, rmask, data); } #define RK3568_PULL_PMU_OFFSET 0x20 @@ -225,7 +223,7 @@ static int rk3568_set_pull(struct rockchip_pin_bank *bank, struct regmap *regmap; int reg, ret; u8 bit, type; - u32 data; + u32 data, rmask; if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT) return -ENOTSUPP; @@ -249,52 +247,59 @@ static int rk3568_set_pull(struct rockchip_pin_bank *bank, /* enable the write to the equivalent lower bits */ data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); - + rmask = data | (data >> 16); data |= (ret << bit); - ret = regmap_write(regmap, reg, data); - return ret; + return regmap_update_bits(regmap, reg, rmask, data); } +#define GRF_GPIO1C5_DS 0x0840 +#define GRF_GPIO2A2_DS 0x0844 +#define GRF_GPIO2B0_DS 0x0848 +#define GRF_GPIO3A0_DS 0x084c +#define GRF_GPIO3A6_DS 0x0850 +#define GRF_GPIO4A0_DS 0x0854 + static int rk3568_set_drive(struct rockchip_pin_bank *bank, int pin_num, int strength) { struct regmap *regmap; - int reg; - u32 data; + int reg, ret; + u32 data, rmask; u8 bit; int drv = (1 << (strength + 1)) - 1; - int ret = 0; rk3568_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); /* enable the write to the equivalent lower bits */ data = ((1 << RK3568_DRV_BITS_PER_PIN) - 1) << (bit + 16); + rmask = data | (data >> 16); data |= (drv << bit); - ret = regmap_write(regmap, reg, data); + ret = regmap_update_bits(regmap, reg, rmask, data); if (ret) return ret; if (bank->bank_num == 1 && pin_num == 21) - reg = 0x0840; + reg = GRF_GPIO1C5_DS; else if (bank->bank_num == 2 && pin_num == 2) - reg = 0x0844; + reg = GRF_GPIO2A2_DS; else if (bank->bank_num == 2 && pin_num == 8) - reg = 0x0848; + reg = GRF_GPIO2B0_DS; else if (bank->bank_num == 3 && pin_num == 0) - reg = 0x084c; + reg = GRF_GPIO3A0_DS; else if (bank->bank_num == 3 && pin_num == 6) - reg = 0x0850; + reg = GRF_GPIO3A6_DS; else if (bank->bank_num == 4 && pin_num == 0) - reg = 0x0854; + reg = GRF_GPIO4A0_DS; else return 0; data = ((1 << RK3568_DRV_BITS_PER_PIN) - 1) << 16; - data |= drv; + rmask = data | (data >> 16); + data |= drv >> 6; - return regmap_write(regmap, reg, data); + return regmap_update_bits(regmap, reg, rmask, data); } static int rk3568_set_schmitt(struct rockchip_pin_bank *bank, @@ -302,16 +307,17 @@ static int rk3568_set_schmitt(struct rockchip_pin_bank *bank, { struct regmap *regmap; int reg; - u32 data; + u32 data, rmask; u8 bit; rk3568_calc_schmitt_reg_and_bit(bank, pin_num, ®map, ®, &bit); /* enable the write to the equivalent lower bits */ data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16); - data |= (enable << bit); + rmask = data | (data >> 16); + data |= ((enable ? 0x2 : 0x1) << bit); - return regmap_write(regmap, reg, data); + return regmap_update_bits(regmap, reg, rmask, data); } static struct rockchip_pin_bank rk3568_pin_banks[] = { From 250454c59b1b056d47cbb0c6d8d09a68416c9776 Mon Sep 17 00:00:00 2001 From: Sam Edwards Date: Tue, 25 Jul 2023 16:13:05 -0600 Subject: [PATCH 103/148] i2c: mvtwsi: reset controller if stuck in "bus error" state The MVTWSI controller can act either as a master or slave device. When acting as a master, the FSM is driven by the CPU. As a slave, the FSM is driven by the bus directly. In what is (apparently) a safety mechanism, if the bus transitions our FSM in any improper way, the FSM goes to a "bus error" state (0x00). I could find no documented or experimental way to get the FSM out of this state, except for a controller reset. Since U-Boot only uses the MVTWSI controller as a bus master, this feature only gets in the way: we do not care what happened on the bus previously as long as the bus is ready for a new transaction. So, when trying to start a new transaction, check for this state and reset the controller if necessary. Note that this should not be confused with the "deblocking" technique (used by the `i2c reset` command), which involves pulsing SCL repeatedly if SDA is found to be held low, in an attempt to force the bus back to an idle state. This patch only resets the controller in case something else had previously upset it, and (in principle) results in no externally-observable change in behavior. Signed-off-by: Sam Edwards Reviewed-by: Stefan Roese Reviewed-by: Heiko Schocher --- drivers/i2c/mvtwsi.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index 93bbc6916e5..14cdb0f6635 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -142,6 +142,8 @@ enum mvtwsi_ctrl_register_fields { * code. */ enum mvstwsi_status_values { + /* Protocol violation on bus; this is a terminal state */ + MVTWSI_BUS_ERROR = 0x00, /* START condition transmitted */ MVTWSI_STATUS_START = 0x08, /* Repeated START condition transmitted */ @@ -525,6 +527,36 @@ static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed, #endif } +/* + * __twsi_i2c_reinit() - Reset and reinitialize the I2C controller. + * + * This function should be called to get the MVTWSI controller out of the + * "bus error" state. It saves and restores the baud and address registers. + * + * @twsi: The MVTWSI register structure to use. + * @tick: The duration of a clock cycle at the current I2C speed. + */ +static void __twsi_i2c_reinit(struct mvtwsi_registers *twsi, uint tick) +{ + uint baud; + uint slaveadd; + + /* Save baud, address registers */ + baud = readl(&twsi->baudrate); + slaveadd = readl(&twsi->slave_address); + + /* Reset controller */ + twsi_reset(twsi); + + /* Restore baud, address registers */ + writel(baud, &twsi->baudrate); + writel(slaveadd, &twsi->slave_address); + writel(0, &twsi->xtnd_slave_addr); + + /* Assert STOP, but don't care for the result */ + (void) twsi_stop(twsi, tick); +} + /* * i2c_begin() - Start a I2C transaction. * @@ -621,6 +653,11 @@ static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip, int stop_status; int expected_start = MVTWSI_STATUS_START; + /* Check for (and clear) a bus error from a previous failed transaction + * or another master on the same bus */ + if (readl(&twsi->status) == MVTWSI_BUS_ERROR) + __twsi_i2c_reinit(twsi, tick); + if (alen > 0) { /* Begin i2c write to send the address bytes */ status = i2c_begin(twsi, expected_start, (chip << 1), tick); @@ -668,6 +705,11 @@ static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip, { int status, stop_status; + /* Check for (and clear) a bus error from a previous failed transaction + * or another master on the same bus */ + if (readl(&twsi->status) == MVTWSI_BUS_ERROR) + __twsi_i2c_reinit(twsi, tick); + /* Begin i2c write to send first the address bytes, then the * data bytes */ status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick); From 34031e9cce91de323ed711d7e8614c0d12fada1c Mon Sep 17 00:00:00 2001 From: Dmitry Dunaev Date: Wed, 12 Jul 2023 15:58:21 +0300 Subject: [PATCH 104/148] cmd: ubi: Fix 'ubi list' command arguments parsing This fixes allowed argc variable value for arguments parsing Fixes: 6de1daf64b1 ("cmd: ubi: Add 'ubi list' command") Signed-off-by: Dmitry Dunaev --- cmd/ubi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/ubi.c b/cmd/ubi.c index b61ae1efea4..0a6a80bdd10 100644 --- a/cmd/ubi.c +++ b/cmd/ubi.c @@ -653,7 +653,7 @@ static int do_ubi(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (strcmp(argv[1], "list") == 0) { int numeric = 0; - if (argc >= 2 && argv[2][0] == '-') { + if (argc >= 3 && argv[2][0] == '-') { if (strcmp(argv[2], "-numeric") == 0) numeric = 1; else From f26c54dddecb899750c378467078a13680077324 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 1 Aug 2023 14:53:30 -0400 Subject: [PATCH 105/148] doc/sphinx/requirements.txt: Bump certifi up Upgrade certifi to the latest version, to remove e-Tugra from the root store. Link: https://groups.google.com/a/mozilla.org/g/dev-security-policy/c/C-HrP1SEq1A?pli=1 Signed-off-by: Tom Rini Reviewed-by: Simon Glass Signed-off-by: Heinrich Schuchardt --- doc/sphinx/requirements.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt index b74661ad3f1..4f411f78d03 100644 --- a/doc/sphinx/requirements.txt +++ b/doc/sphinx/requirements.txt @@ -1,6 +1,6 @@ alabaster==0.7.12 Babel==2.9.1 -certifi==2023.5.7 +certifi==2023.07.22 charset-normalizer==2.0.12 docutils==0.16 idna==3.3 From 78246baa8d82a8d01feeefbcf8d97f23a9d5c728 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 12 Aug 2023 19:09:32 +0200 Subject: [PATCH 106/148] lmb: description lmb_is_reserved, lmb_is_reserved_flags * provide a description for function lmb_is_reserved() * improve the description of funciton lmb_is_reserved_flags() Signed-off-by: Heinrich Schuchardt --- include/lmb.h | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/include/lmb.h b/include/lmb.h index 07bf22144ea..231b68b27d9 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -116,16 +116,31 @@ phys_addr_t __lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align, phys_addr_t max_addr); phys_addr_t lmb_alloc_addr(struct lmb *lmb, phys_addr_t base, phys_size_t size); phys_size_t lmb_get_free_size(struct lmb *lmb, phys_addr_t addr); -int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr); + /** - * lmb_is_reserved_flags - test if tha address is in reserved region with a bitfield flag + * lmb_is_reserved() - test if address is in reserved region + * + * The function checks if a reserved region comprising @addr exists. * * @lmb: the logical memory block struct * @addr: address to be tested - * @flags: flags bitfied to be tested - * Return: if not reserved or reserved without the requested flag else 1 + * Return: 1 if reservation exists, 0 otherwise + */ +int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr); + +/** + * lmb_is_reserved_flags() - test if address is in reserved region with flag bits set + * + * The function checks if a reserved region comprising @addr exists which has + * all flag bits set which are set in @flags. + * + * @lmb: the logical memory block struct + * @addr: address to be tested + * @flags: bitmap with bits to be tested + * Return: 1 if matching reservation exists, 0 otherwise */ int lmb_is_reserved_flags(struct lmb *lmb, phys_addr_t addr, int flags); + long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size); void lmb_dump_all(struct lmb *lmb); From 289bd72ea41fd45237a34593065ff107afc2a9a9 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 14 Aug 2023 08:44:26 +0200 Subject: [PATCH 107/148] doc: description of board_get_usable_ram_top() Improve the description of function board_get_usable_ram_top(). Signed-off-by: Heinrich Schuchardt Reviewed-by: Simon Glass --- include/init.h | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/include/init.h b/include/init.h index 88730816851..dc3c1f220c3 100644 --- a/include/init.h +++ b/include/init.h @@ -296,13 +296,18 @@ int checkboard(void); int show_board_info(void); /** - * Get the uppermost pointer that is valid to access + * board_get_usable_ram_top() - get uppermost address for U-Boot relocation * - * Some systems may not map all of their address space. This function allows - * boards to indicate what their highest support pointer value is for DRAM - * access. + * Some systems have reserved memory areas in high memory. By implementing this + * function boards can indicate the highest address value to be used when + * relocating U-Boot. The returned address is exclusive (i.e. 1 byte above the + * last usable address). * - * @param total_size Size of U-Boot (unused?) + * Due to overflow on systems with 32bit phys_addr_t a value 0 is used instead + * of 4GiB. + * + * @total_size: monitor length in bytes (size of U-Boot code) + * Return: uppermost address for U-Boot relocation */ phys_size_t board_get_usable_ram_top(phys_size_t total_size); From 5aae021c30940a57862c1ea6a3cf8eeb88ca2c1c Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 15 Aug 2023 12:30:19 +0200 Subject: [PATCH 108/148] doc: add partition API to HTML documentation * Convert comments in part.h to Sphinx style. * Create documentation page for the partition API. * Add the partition API page to the API index page. Signed-off-by: Heinrich Schuchardt Reviewed-by: Simon Glass --- doc/api/index.rst | 1 + doc/api/part.rst | 6 ++ include/part.h | 210 ++++++++++++++++++++++++---------------------- 3 files changed, 119 insertions(+), 98 deletions(-) create mode 100644 doc/api/part.rst diff --git a/doc/api/index.rst b/doc/api/index.rst index a9338cfef9f..3a80ae0635a 100644 --- a/doc/api/index.rst +++ b/doc/api/index.rst @@ -15,6 +15,7 @@ U-Boot API documentation lmb logging nvmem + part pinctrl rng sandbox diff --git a/doc/api/part.rst b/doc/api/part.rst new file mode 100644 index 00000000000..d1df1d84945 --- /dev/null +++ b/doc/api/part.rst @@ -0,0 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Partition API +============= + +.. kernel-doc:: include/part.h diff --git a/include/part.h b/include/part.h index edc46f8dcbe..8e451bbdff9 100644 --- a/include/part.h +++ b/include/part.h @@ -98,8 +98,8 @@ struct disk_part { * @ifname: Interface name (e.g. "ide", "scsi") * @dev: Device number (0 for first device on that interface, 1 for * second, etc. - * Return: pointer to the block device, or NULL if not available, or an - * error occurred. + * Return: + * pointer to the block device, or NULL if not available, or an error occurred. */ struct blk_desc *blk_get_dev(const char *ifname, int dev); @@ -128,6 +128,10 @@ int part_get_info(struct blk_desc *dev_desc, int part, /** * part_get_info_whole_disk() - get partition info for the special case of * a partition occupying the entire disk. + * + * @dev_desc: block device descriptor + * @info: returned partition information + * Return: 0 on success */ int part_get_info_whole_disk(struct blk_desc *dev_desc, struct disk_partition *info); @@ -170,15 +174,18 @@ int blk_get_device_by_str(const char *ifname, const char *dev_str, * This calls blk_get_device_by_str() to look up a device. It also looks up * a partition and returns information about it. * - * @dev_part_str is in the format: - * .: where is the device number, - * is the optional hardware partition number and - * is the partition number + * @dev_part_str is in the format .: where * - * If ifname is "hostfs" then this function returns the sandbox host block + * * is the device number, + * + * * is the optional hardware partition number and + * + * * is the partition number. + * + * If @ifname is "hostfs", then this function returns the sandbox host block * device. * - * If ifname is ubi, then this function returns 0, with @info set to a + * If @ifname is "ubi", then this function returns 0, with @info set to a * special UBI device. * * If @dev_part_str is NULL or empty or "-", then this function looks up @@ -187,13 +194,13 @@ int blk_get_device_by_str(const char *ifname, const char *dev_str, * If the partition string is empty then the first partition is used. If the * partition string is "auto" then the first bootable partition is used. * - * @ifname: Interface name (e.g. "ide", "scsi") + * @ifname: Interface name (e.g. "ide", "scsi") * @dev_part_str: Device and partition string - * @dev_desc: Returns a pointer to the block device on success - * @info: Returns partition information + * @dev_desc: Returns a pointer to the block device on success + * @info: Returns partition information * @allow_whole_dev: true to allow the user to select partition 0 - * (which means the whole device), false to require a valid - * partition number >= 1 + * (which means the whole device), false to require a valid + * partition number >= 1 * Return: partition number, or -1 on error * */ @@ -205,18 +212,20 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, * part_get_info_by_name() - Search for a partition by name * among all available registered partitions * - * @param dev_desc - block device descriptor - * @param gpt_name - the specified table entry name - * @param info - returns the disk partition info + * @dev_desc: block device descriptor + * @name: the specified table entry name + * @info: returns the disk partition info * - * Return: - the partition number on match (starting on 1), -1 on no match, + * Return: the partition number on match (starting on 1), -1 on no match, * otherwise error */ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name, struct disk_partition *info); /** - * Get partition info from dev number + part name, or dev number + part number. + * part_get_info_by_dev_and_name_or_num() - Get partition info from dev number + * and part name, or dev number and + * part number. * * Parse a device number and partition description (either name or number) * in the form of device number plus partition name separated by a "#" @@ -225,14 +234,14 @@ int part_get_info_by_name(struct blk_desc *dev_desc, * partition descriptions for a given interface. If the partition is found, sets * dev_desc and part_info accordingly with the information of the partition. * - * @param[in] dev_iface Device interface - * @param[in] dev_part_str Input partition description, like "0#misc" or "0:1" - * @param[out] dev_desc Place to store the device description pointer - * @param[out] part_info Place to store the partition information - * @param[in] allow_whole_dev true to allow the user to select partition 0 - * (which means the whole device), false to require a valid - * partition number >= 1 - * Return: the partition number on success, or negative errno on error + * @dev_iface: Device interface + * @dev_part_str: Input partition description, like "0#misc" or "0:1" + * @dev_desc: Place to store the device description pointer + * @part_info: Place to store the partition information + * @allow_whole_dev: true to allow the user to select partition 0 + * (which means the whole device), false to require a valid + * partition number >= 1 + * Return: the partition number on success, or negative errno on error */ int part_get_info_by_dev_and_name_or_num(const char *dev_iface, const char *dev_part_str, @@ -322,7 +331,7 @@ int part_create_block_devices(struct udevice *blk_dev); * @start: Start block number to read in the partition (0=first) * @blkcnt: Number of blocks to read * @buffer: Destination buffer for data read - * Returns: number of blocks read, or -ve error number (see the + * Return: number of blocks read, or -ve error number (see the * IS_ERR_VALUE() macro */ ulong disk_blk_read(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, @@ -335,7 +344,7 @@ ulong disk_blk_read(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, * @start: Start block number to write in the partition (0=first) * @blkcnt: Number of blocks to write * @buffer: Source buffer for data to write - * Returns: number of blocks written, or -ve error number (see the + * Return: number of blocks written, or -ve error number (see the * IS_ERR_VALUE() macro */ ulong disk_blk_write(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, @@ -347,7 +356,7 @@ ulong disk_blk_write(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, * @dev: Device to (partially) erase (UCLASS_PARTITION) * @start: Start block number to erase in the partition (0=first) * @blkcnt: Number of blocks to erase - * Returns: number of blocks erased, or -ve error number (see the + * Return: number of blocks erased, or -ve error number (see the * IS_ERR_VALUE() macro */ ulong disk_blk_erase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt); @@ -369,35 +378,40 @@ ulong disk_blk_erase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt); #define part_get_info_ptr(x) x #endif - +/** + * struct part_driver - partition driver + */ struct part_driver { + /** @name: partition name */ const char *name; + /** @part_type: (MBR) partition type */ int part_type; - const int max_entries; /* maximum number of entries to search */ - + /** @max_entries: maximum number of partition table entries */ + const int max_entries; /** - * get_info() - Get information about a partition + * @get_info: Get information about a partition * - * @dev_desc: Block device descriptor - * @part: Partition number (1 = first) - * @info: Returns partition information + * @get_info.dev_desc: Block device descriptor + * @get_info.part: Partition number (1 = first) + * @get_info.info: Returns partition information */ int (*get_info)(struct blk_desc *dev_desc, int part, struct disk_partition *info); /** - * print() - Print partition information + * @print: Print partition information * - * @dev_desc: Block device descriptor + * @print.dev_desc: Block device descriptor */ void (*print)(struct blk_desc *dev_desc); /** - * test() - Test if a device contains this partition type + * @test: Test if a device contains this partition type * - * @dev_desc: Block device descriptor - * @return 0 if the block device appears to contain this partition - * type, -ve if not + * @test.dev_desc: Block device descriptor + * @test.Return: + * 0 if the block device appears to contain this partition type, + * -ve if not */ int (*test)(struct blk_desc *dev_desc); }; @@ -413,52 +427,52 @@ struct part_driver { /** * write_gpt_table() - Write the GUID Partition Table to disk * - * @param dev_desc - block device descriptor - * @param gpt_h - pointer to GPT header representation - * @param gpt_e - pointer to GPT partition table entries + * @dev_desc: block device descriptor + * @gpt_h: pointer to GPT header representation + * @gpt_e: pointer to GPT partition table entries * - * Return: - zero on success, otherwise error + * Return: zero on success, otherwise error */ int write_gpt_table(struct blk_desc *dev_desc, gpt_header *gpt_h, gpt_entry *gpt_e); /** - * gpt_fill_pte(): Fill the GPT partition table entry + * gpt_fill_pte() - Fill the GPT partition table entry * - * @param dev_desc - block device descriptor - * @param gpt_h - GPT header representation - * @param gpt_e - GPT partition table entries - * @param partitions - list of partitions - * @param parts - number of partitions + * @dev_desc: block device descriptor + * @gpt_h: GPT header representation + * @gpt_e: GPT partition table entries + * @partitions: list of partitions + * @parts: number of partitions * - * Return: zero on success + * Return: zero on success */ int gpt_fill_pte(struct blk_desc *dev_desc, gpt_header *gpt_h, gpt_entry *gpt_e, struct disk_partition *partitions, int parts); /** - * gpt_fill_header(): Fill the GPT header + * gpt_fill_header() - Fill the GPT header * - * @param dev_desc - block device descriptor - * @param gpt_h - GPT header representation - * @param str_guid - disk guid string representation - * @param parts_count - number of partitions + * @dev_desc: block device descriptor + * @gpt_h: GPT header representation + * @str_guid: disk guid string representation + * @parts_count: number of partitions * - * Return: - error on str_guid conversion error + * Return: error on str_guid conversion error */ int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h, char *str_guid, int parts_count); /** - * gpt_restore(): Restore GPT partition table + * gpt_restore() - Restore GPT partition table * - * @param dev_desc - block device descriptor - * @param str_disk_guid - disk GUID - * @param partitions - list of partitions - * @param parts - number of partitions + * @dev_desc: block device descriptor + * @str_disk_guid: disk GUID + * @partitions: list of partitions + * @parts_count: number of partitions * - * Return: zero on success + * Return: 0 on success */ int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid, struct disk_partition *partitions, const int parts_count); @@ -466,34 +480,34 @@ int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid, /** * is_valid_gpt_buf() - Ensure that the Primary GPT information is valid * - * @param dev_desc - block device descriptor - * @param buf - buffer which contains the MBR and Primary GPT info + * @dev_desc: block device descriptor + * @buf: buffer which contains the MBR and Primary GPT info * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int is_valid_gpt_buf(struct blk_desc *dev_desc, void *buf); /** * write_mbr_and_gpt_partitions() - write MBR, Primary GPT and Backup GPT * - * @param dev_desc - block device descriptor - * @param buf - buffer which contains the MBR and Primary GPT info + * @dev_desc: block device descriptor + * @buf: buffer which contains the MBR and Primary GPT info * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf); /** - * gpt_verify_headers() - Function to read and CRC32 check of the GPT's header + * gpt_verify_headers() - Read and check CRC32 of the GPT's header * and partition table entries (PTE) * * As a side effect if sets gpt_head and gpt_pte so they point to GPT data. * - * @param dev_desc - block device descriptor - * @param gpt_head - pointer to GPT header data read from medium - * @param gpt_pte - pointer to GPT partition table enties read from medium + * @dev_desc: block device descriptor + * @gpt_head: pointer to GPT header data read from medium + * @gpt_pte: pointer to GPT partition table enties read from medium * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head, gpt_entry **gpt_pte); @@ -502,9 +516,9 @@ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head, * gpt_repair_headers() - Function to repair the GPT's header * and partition table entries (PTE) * - * @param dev_desc - block device descriptor + * @dev_desc: block device descriptor * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int gpt_repair_headers(struct blk_desc *dev_desc); @@ -516,13 +530,13 @@ int gpt_repair_headers(struct blk_desc *dev_desc); * provided in '$partitions' environment variable. Specificially, name, start * and size of the partition is checked. * - * @param dev_desc - block device descriptor - * @param partitions - partition data read from '$partitions' env variable - * @param parts - number of partitions read from '$partitions' env variable - * @param gpt_head - pointer to GPT header data read from medium - * @param gpt_pte - pointer to GPT partition table enties read from medium + * @dev_desc: block device descriptor + * @partitions: partition data read from '$partitions' env variable + * @parts: number of partitions read from '$partitions' env variable + * @gpt_head: pointer to GPT header data read from medium + * @gpt_pte: pointer to GPT partition table enties read from medium * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int gpt_verify_partitions(struct blk_desc *dev_desc, struct disk_partition *partitions, int parts, @@ -530,15 +544,15 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, /** - * get_disk_guid() - Function to read the GUID string from a device's GPT + * get_disk_guid() - Read the GUID string from a device's GPT * * This function reads the GUID string from a block device whose descriptor * is provided. * - * @param dev_desc - block device descriptor - * @param guid - pre-allocated string in which to return the GUID + * @dev_desc: block device descriptor + * @guid: pre-allocated string in which to return the GUID * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int get_disk_guid(struct blk_desc *dev_desc, char *guid); @@ -548,19 +562,19 @@ int get_disk_guid(struct blk_desc *dev_desc, char *guid); /** * is_valid_dos_buf() - Ensure that a DOS MBR image is valid * - * @param buf - buffer which contains the MBR + * @buf: buffer which contains the MBR * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int is_valid_dos_buf(void *buf); /** * write_mbr_sector() - write DOS MBR * - * @param dev_desc - block device descriptor - * @param buf - buffer which contains the MBR + * @dev_desc: block device descriptor + * @buf: buffer which contains the MBR * - * Return: - '0' on success, otherwise error + * Return: 0 on success, otherwise error */ int write_mbr_sector(struct blk_desc *dev_desc, void *buf); @@ -575,7 +589,7 @@ int layout_mbr_partitions(struct disk_partition *p, int count, /** * part_driver_get_count() - get partition driver count * - * Return: - number of partition drivers + * Return: number of partition drivers */ static inline int part_driver_get_count(void) { @@ -585,7 +599,7 @@ static inline int part_driver_get_count(void) /** * part_driver_get_first() - get first partition driver * - * Return: - pointer to first partition driver on success, otherwise NULL + * Return: pointer to first partition driver on success, otherwise NULL */ static inline struct part_driver *part_driver_get_first(void) { @@ -595,9 +609,9 @@ static inline struct part_driver *part_driver_get_first(void) /** * part_get_type_by_name() - Get partition type by name * - * @name: Name of partition type to look up (not case-sensitive) - * Returns: Corresponding partition type (PART_TYPE_...) or PART_TYPE_UNKNOWN if - * not known + * @name: Name of partition type to look up (not case-sensitive) + * Return: + * Corresponding partition type (PART\_TYPE\_...) or PART\_TYPE\_UNKNOWN */ int part_get_type_by_name(const char *name); From 6072703dc9ac52c644fd6d1a80ee16f91bbd0313 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 3 Aug 2023 17:30:05 +0800 Subject: [PATCH 109/148] bootmeth: efi: Make distro_efi_boot() static As it is only called in bootmeth_efi.c Signed-off-by: Bin Meng Reviewed-by: Simon Glass Reviewed-by: Heinrich Schuchardt --- boot/bootmeth_efi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c index 1c9f2b1e2fe..ae936c8daa1 100644 --- a/boot/bootmeth_efi.c +++ b/boot/bootmeth_efi.c @@ -409,7 +409,7 @@ static int distro_efi_read_bootflow(struct udevice *dev, struct bootflow *bflow) return 0; } -int distro_efi_boot(struct udevice *dev, struct bootflow *bflow) +static int distro_efi_boot(struct udevice *dev, struct bootflow *bflow) { ulong kernel, fdt; char cmd[50]; From b571b3acdaa43b90de3bc7540f13c02b1ee86b8e Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 14 Aug 2023 07:50:53 +0200 Subject: [PATCH 110/148] efi_loader: fix efi_add_known_memory() In efi_add_known_memory() we currently call board_get_usable_ram_top() with an incorrect value 0 of parameter total_size. This leads to an incorrect value for ram_top depending on the code in board_get_usable_ram_top(). Use the value of gd->ram_top instead which is set before relocation by calling board_get_usable_ram_top(). Fixes: 7b78d6438a2b ("efi_loader: Reserve unaccessible memory") Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_memory.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c index ebf4a2d5fa3..f752703b438 100644 --- a/lib/efi_loader/efi_memory.c +++ b/lib/efi_loader/efi_memory.c @@ -877,7 +877,7 @@ efi_status_t efi_add_conventional_memory_map(u64 ram_start, u64 ram_end, */ __weak void efi_add_known_memory(void) { - u64 ram_top = board_get_usable_ram_top(0) & ~EFI_PAGE_MASK; + u64 ram_top = gd->ram_top & ~EFI_PAGE_MASK; int i; /* From d768dd88552df18d4a0527cf3d6ddd05dc072f02 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 12 Aug 2023 20:16:58 +0200 Subject: [PATCH 111/148] common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt --- arch/arm/mach-imx/imx8m/soc.c | 2 +- arch/arm/mach-mvebu/arm64-common.c | 2 +- arch/arm/mach-rockchip/sdram.c | 2 +- arch/arm/mach-stm32mp/dram_init.c | 2 +- arch/arm/mach-sunxi/board.c | 2 +- arch/arm/mach-tegra/board2.c | 2 +- arch/mips/mach-jz47xx/jz4780/jz4780.c | 2 +- arch/mips/mach-octeon/dram.c | 2 +- arch/riscv/cpu/fu540/dram.c | 2 +- arch/riscv/cpu/fu740/dram.c | 2 +- arch/riscv/cpu/generic/dram.c | 2 +- arch/riscv/cpu/jh7110/dram.c | 2 +- arch/x86/cpu/broadwell/sdram.c | 2 +- arch/x86/cpu/coreboot/sdram.c | 2 +- arch/x86/cpu/efi/payload.c | 2 +- arch/x86/cpu/efi/sdram.c | 2 +- arch/x86/cpu/ivybridge/sdram.c | 2 +- arch/x86/cpu/qemu/dram.c | 2 +- arch/x86/cpu/quark/dram.c | 2 +- arch/x86/cpu/slimbootloader/sdram.c | 2 +- arch/x86/cpu/tangier/sdram.c | 2 +- arch/x86/include/asm/u-boot-x86.h | 2 +- arch/x86/lib/fsp1/fsp_dram.c | 2 +- arch/x86/lib/fsp2/fsp_dram.c | 2 +- board/broadcom/bcmns3/ns3.c | 2 +- board/imgtec/boston/ddr.c | 2 +- board/menlo/m53menlo/m53menlo.c | 2 +- board/raspberrypi/rpi/rpi.c | 2 +- board/ti/am65x/evm.c | 2 +- board/ti/j721e/evm.c | 2 +- board/ti/j721s2/evm.c | 2 +- board/toradex/verdin-am62/verdin-am62.c | 2 +- board/xilinx/common/board.c | 2 +- common/board_f.c | 2 +- include/init.h | 2 +- 35 files changed, 35 insertions(+), 35 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index d5254886bed..78b775f449d 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -333,7 +333,7 @@ phys_size_t get_effective_memsize(void) } } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { ulong top_addr; diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index d3a95730be5..4c67f1aba4d 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR; */ #define USABLE_RAM_SIZE 0x80000000ULL -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { unsigned long top = CFG_SYS_SDRAM_BASE + min(gd->ram_size, USABLE_RAM_SIZE); diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 1d17a740ade..99ecbdc3412 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -216,7 +216,7 @@ int dram_init(void) return 0; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { unsigned long top = CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE; diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c index 80ba5c27741..7f37b0d2aa2 100644 --- a/arch/arm/mach-stm32mp/dram_init.c +++ b/arch/arm/mach-stm32mp/dram_init.c @@ -40,7 +40,7 @@ int dram_init(void) return 0; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { phys_size_t size; phys_addr_t reg; diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 391a65a5495..78597ad932c 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -64,7 +64,7 @@ static struct mm_region sunxi_mem_map[] = { }; struct mm_region *mem_map = sunxi_mem_map; -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* Some devices (like the EMAC) have a 32-bit DMA limit. */ if (gd->ram_top > (1ULL << 32)) diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 0df18360ca6..981768bb0e1 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -403,7 +403,7 @@ int dram_init_banksize(void) * This function is called before dram_init_banksize(), so we can't simply * return gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { ulong ram_top; diff --git a/arch/mips/mach-jz47xx/jz4780/jz4780.c b/arch/mips/mach-jz47xx/jz4780/jz4780.c index 15d1eff2ba7..676c305fd3e 100644 --- a/arch/mips/mach-jz47xx/jz4780/jz4780.c +++ b/arch/mips/mach-jz47xx/jz4780/jz4780.c @@ -76,7 +76,7 @@ void board_init_f(ulong dummy) } #endif /* CONFIG_SPL_BUILD */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return CFG_SYS_SDRAM_BASE + (256 * 1024 * 1024); } diff --git a/arch/mips/mach-octeon/dram.c b/arch/mips/mach-octeon/dram.c index 85cb084c13f..5b1311d8b5b 100644 --- a/arch/mips/mach-octeon/dram.c +++ b/arch/mips/mach-octeon/dram.c @@ -77,7 +77,7 @@ phys_size_t get_effective_memsize(void) return UBOOT_RAM_SIZE_MAX; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { if (IS_ENABLED(CONFIG_RAM_OCTEON)) { /* Map a maximum of 256MiB - return not size but address */ diff --git a/arch/riscv/cpu/fu540/dram.c b/arch/riscv/cpu/fu540/dram.c index 44e11bd56c5..94d8018407e 100644 --- a/arch/riscv/cpu/fu540/dram.c +++ b/arch/riscv/cpu/fu540/dram.c @@ -21,7 +21,7 @@ int dram_init_banksize(void) return fdtdec_setup_memory_banksize(); } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* * Ensure that we run from first 4GB so that all diff --git a/arch/riscv/cpu/fu740/dram.c b/arch/riscv/cpu/fu740/dram.c index d6d4a41d25e..8657fcd165c 100644 --- a/arch/riscv/cpu/fu740/dram.c +++ b/arch/riscv/cpu/fu740/dram.c @@ -20,7 +20,7 @@ int dram_init_banksize(void) return fdtdec_setup_memory_banksize(); } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_64BIT /* diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c index 44e11bd56c5..94d8018407e 100644 --- a/arch/riscv/cpu/generic/dram.c +++ b/arch/riscv/cpu/generic/dram.c @@ -21,7 +21,7 @@ int dram_init_banksize(void) return fdtdec_setup_memory_banksize(); } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* * Ensure that we run from first 4GB so that all diff --git a/arch/riscv/cpu/jh7110/dram.c b/arch/riscv/cpu/jh7110/dram.c index 2ad3f2044a2..1a9fa46d14b 100644 --- a/arch/riscv/cpu/jh7110/dram.c +++ b/arch/riscv/cpu/jh7110/dram.c @@ -21,7 +21,7 @@ int dram_init_banksize(void) return fdtdec_setup_memory_banksize(); } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* * Ensure that we run from first 4GB so that all diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c index 1295121ae5b..f477d513efc 100644 --- a/arch/x86/cpu/broadwell/sdram.c +++ b/arch/x86/cpu/broadwell/sdram.c @@ -25,7 +25,7 @@ #include #include -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return mrc_common_board_get_usable_ram_top(total_size); } diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index f4ee4cdf5d8..26352df421f 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -27,7 +27,7 @@ unsigned int install_e820_map(unsigned int max_entries, * address, and how far U-Boot is moved by relocation are set in the global * data structure. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { uintptr_t dest_addr = 0; int i; diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index 19a25dd6408..d8920effd39 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; * the relocation address, and how far U-Boot is moved by relocation are * set in the global data structure. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { struct efi_mem_desc *desc, *end; struct efi_entry_memmap *map; diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c index f3086db42c4..56f3326146c 100644 --- a/arch/x86/cpu/efi/sdram.c +++ b/arch/x86/cpu/efi/sdram.c @@ -11,7 +11,7 @@ DECLARE_GLOBAL_DATA_PTR; -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return (ulong)efi_get_ram_base() + gd->ram_size; } diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index 0718aefbb1f..95a826da713 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -46,7 +46,7 @@ DECLARE_GLOBAL_DATA_PTR; #define CMOS_OFFSET_MRC_SEED_S3 156 #define CMOS_OFFSET_MRC_SEED_CHK 160 -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return mrc_common_board_get_usable_ram_top(total_size); } diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index 1a52d1dc522..d83abf00527 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -72,7 +72,7 @@ int dram_init_banksize(void) * the relocation address, and how far U-Boot is moved by relocation are * set in the global data structure. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return qemu_get_low_memory_size(); } diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c index 8b1ee2d5ae5..ad98f3e07ba 100644 --- a/arch/x86/cpu/quark/dram.c +++ b/arch/x86/cpu/quark/dram.c @@ -184,7 +184,7 @@ int dram_init_banksize(void) * the relocation address, and how far U-Boot is moved by relocation are * set in the global data structure. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return gd->ram_size; } diff --git a/arch/x86/cpu/slimbootloader/sdram.c b/arch/x86/cpu/slimbootloader/sdram.c index d748d5c7d46..fbb33b246e5 100644 --- a/arch/x86/cpu/slimbootloader/sdram.c +++ b/arch/x86/cpu/slimbootloader/sdram.c @@ -48,7 +48,7 @@ static struct sbl_memory_map_info *get_memory_map_info(void) * @total_size: The memory size that u-boot occupies * Return: : The top available memory address lower than 4GB */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { struct sbl_memory_map_info *data; int i; diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c index 8a4b1c5d2d7..ee74a1f0433 100644 --- a/arch/x86/cpu/tangier/sdram.c +++ b/arch/x86/cpu/tangier/sdram.c @@ -204,7 +204,7 @@ unsigned int install_e820_map(unsigned int max_entries, * address, and how far U-Boot is moved by relocation are set in the global * data structure. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { struct sfi_table_simple *sb; struct sfi_mem_entry *mentry; diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 02a8b0f1527..3acc58ad74b 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -77,7 +77,7 @@ int x86_cleanup_before_linux(void); void x86_enable_caches(void); void x86_disable_caches(void); int x86_init_cache(void); -phys_size_t board_get_usable_ram_top(phys_size_t total_size); +phys_addr_t board_get_usable_ram_top(phys_size_t total_size); int default_print_cpuinfo(void); /* Set up a UART which can be used with printch(), printhex8(), etc. */ diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c index 5825221d1e5..eee9ce54b1c 100644 --- a/arch/x86/lib/fsp1/fsp_dram.c +++ b/arch/x86/lib/fsp1/fsp_dram.c @@ -34,7 +34,7 @@ int dram_init(void) * the relocation address, and how far U-Boot is moved by relocation are * set in the global data structure. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return fsp_get_usable_lowmem_top(gd->arch.hob_list); } diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c index f9ea1ab3baa..a1432239cfc 100644 --- a/arch/x86/lib/fsp2/fsp_dram.c +++ b/arch/x86/lib/fsp2/fsp_dram.c @@ -77,7 +77,7 @@ int dram_init(void) return 0; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { if (!ll_boot_init()) return gd->ram_size; diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 2a78df670cc..7ae6742c4be 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -183,7 +183,7 @@ int dram_init_banksize(void) } /* Limit RAM used by U-Boot to the DDR first bank End region */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return BCM_NS3_MEM_END; } diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c index 8532225dc0d..cecf454011c 100644 --- a/board/imgtec/boston/ddr.c +++ b/board/imgtec/boston/ddr.c @@ -23,7 +23,7 @@ int dram_init(void) return 0; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { DECLARE_GLOBAL_DATA_PTR; diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c index ca3b81c57ff..b8dffb0e485 100644 --- a/board/menlo/m53menlo/m53menlo.c +++ b/board/menlo/m53menlo/m53menlo.c @@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR; static u32 mx53_dram_size[2]; -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { /* * WARNING: We must override get_effective_memsize() function here diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 38bcab15cf8..cd823ad7465 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -334,7 +334,7 @@ static void set_fdt_addr(void) /* * Prevent relocation from stomping on a firmware provided FDT blob. */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { if ((gd->ram_top - fw_dtb_pointer) > SZ_64M) return gd->ram_top; diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 706b2198183..d52ac332f81 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -59,7 +59,7 @@ int dram_init(void) return 0; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT /* Limit RAM used by U-Boot to the DDR low region */ diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index 2398bead782..38fe447d8fa 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -55,7 +55,7 @@ int dram_init(void) return 0; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT /* Limit RAM used by U-Boot to the DDR low region */ diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index 8eaca9d5af2..7795300abc8 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -43,7 +43,7 @@ int dram_init(void) return 0; } -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT /* Limit RAM used by U-Boot to the DDR low region */ diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c index 5b166b14ca6..a3d1d07a0cb 100644 --- a/board/toradex/verdin-am62/verdin-am62.c +++ b/board/toradex/verdin-am62/verdin-am62.c @@ -37,7 +37,7 @@ int dram_init(void) /* * Avoid relocated U-Boot clash with Linux reserved-memory on 512 MB SoM */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { return 0x9C000000; } diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 0328d68e751..906d5e3c2d7 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -627,7 +627,7 @@ int embedded_dtb_select(void) #endif #if defined(CONFIG_LMB) -phys_size_t board_get_usable_ram_top(phys_size_t total_size) +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { phys_size_t size; phys_addr_t reg; diff --git a/common/board_f.c b/common/board_f.c index 791c1e601c4..e9f4edb93db 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -330,7 +330,7 @@ __weak int mach_cpu_init(void) } /* Get the top of usable RAM */ -__weak phys_size_t board_get_usable_ram_top(phys_size_t total_size) +__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0 /* diff --git a/include/init.h b/include/init.h index dc3c1f220c3..3bf30476a2e 100644 --- a/include/init.h +++ b/include/init.h @@ -309,7 +309,7 @@ int show_board_info(void); * @total_size: monitor length in bytes (size of U-Boot code) * Return: uppermost address for U-Boot relocation */ -phys_size_t board_get_usable_ram_top(phys_size_t total_size); +phys_addr_t board_get_usable_ram_top(phys_size_t total_size); int board_early_init_f(void); From b3d97f8ce34011b8928919822eb17b98477f3d72 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 18 May 2023 00:02:39 +0200 Subject: [PATCH 112/148] ARM: stm32: Power cycle Buck3 in reset on DHSOM In case the DHSOM is in suspend state and either reset button is pushed or IWDG2 triggers a watchdog reset, then DRAM initialization could fail as follows: " RAM: DDR3L 32bits 2x4Gb 533MHz DDR invalid size : 0x4, expected 0x40000000 DRAM init failed: -22 ### ERROR ### Please RESET the board ### " Avoid this failure by not keeping any Buck regulators enabled during reset, let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3 VDD enabled during reset is ST specific, move this addition to ST specific SPL board initialization so that it wouldn't affect the DHSOM . Signed-off-by: Marek Vasut Reviewed-by: Patrick Delaunay --- board/st/common/stpmic1.c | 10 +++------- board/st/common/stpmic1.h | 2 +- board/st/stm32mp1/spl.c | 13 +++++++++++-- 3 files changed, 15 insertions(+), 10 deletions(-) diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c index d52dce4f657..969ad484864 100644 --- a/board/st/common/stpmic1.c +++ b/board/st/common/stpmic1.c @@ -185,21 +185,17 @@ static int stmpic_buck1_set(struct udevice *dev, u32 voltage_mv) } /* early init of PMIC */ -void stpmic1_init(u32 voltage_mv) +struct udevice *stpmic1_init(u32 voltage_mv) { struct udevice *dev; if (uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(pmic_stpmic1), &dev)) - return; + return NULL; /* update VDDCORE = BUCK1 */ if (voltage_mv) stmpic_buck1_set(dev, voltage_mv); - /* Keep vdd on during the reset cycle */ - pmic_clrsetbits(dev, - STPMIC1_BUCKS_MRST_CR, - STPMIC1_MRST_BUCK(STPMIC1_BUCK3), - STPMIC1_MRST_BUCK(STPMIC1_BUCK3)); + return dev; } diff --git a/board/st/common/stpmic1.h b/board/st/common/stpmic1.h index b17d6f16338..7a7169d7cea 100644 --- a/board/st/common/stpmic1.h +++ b/board/st/common/stpmic1.h @@ -3,4 +3,4 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ -void stpmic1_init(u32 voltage_mv); +struct udevice *stpmic1_init(u32 voltage_mv); diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c index 747ec7e445a..8b4a529f759 100644 --- a/board/st/stm32mp1/spl.c +++ b/board/st/stm32mp1/spl.c @@ -5,6 +5,8 @@ #include #include +#include +#include #include #include "../common/stpmic1.h" @@ -19,8 +21,15 @@ void board_vddcore_init(u32 voltage_mv) int board_early_init_f(void) { - if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER)) - stpmic1_init(opp_voltage_mv); + if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER)) { + struct udevice *dev = stpmic1_init(opp_voltage_mv); + + /* Keep vdd on during the reset cycle */ + pmic_clrsetbits(dev, + STPMIC1_BUCKS_MRST_CR, + STPMIC1_MRST_BUCK(STPMIC1_BUCK3), + STPMIC1_MRST_BUCK(STPMIC1_BUCK3)); + } return 0; } From 141e232dbd981ab05e17660e63008ef170aea73d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 23 Jun 2023 15:05:16 +0200 Subject: [PATCH 113/148] clk: stm32mp1: remove error for disabled clock in stm32mp1_clk_get_parent To disabled a clock in clock tree initialization for a mux of STM32MP15, the selected clock source index is set with the latest possible index for the number of bit used. Today this valid configuration cause a error in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock is not needed for the used ETH PHY without crystal: no parents defined for clk id 123 This patch change the level of this message to avoid this trace for valid clock tree. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- drivers/clk/stm32/clk-stm32mp1.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c index 4f4524fcb2c..61502876949 100644 --- a/drivers/clk/stm32/clk-stm32mp1.c +++ b/drivers/clk/stm32/clk-stm32mp1.c @@ -881,7 +881,8 @@ static int stm32mp1_clk_get_parent(struct stm32mp1_clk_priv *priv, return sel[s].parent[p]; } - log_err("no parents defined for clk id %d\n", (u32)id); + /* clock is DISABLED when the clock src is not in clk_parent[] range */ + log_debug("no parents defined for clk id %d\n", (u32)id); return -EINVAL; } From fc7bd99f6d2d732d70bb2191f69955ea335577c6 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Mon, 3 Jul 2023 18:02:33 +0200 Subject: [PATCH 114/148] ARM: dts: stm32: fix display pinmux for stm32f746-disco As reported by the datasheet (DocID027590 Rev 4) for PG12: - AF9 -> LCD_B4 - AF14 -> LCD_B1 So replace AF14 with AF9 for PG12 in the dts. Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7") Signed-off-by: Dario Binacchi Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 19b5451db44..522cffb1ac9 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -169,7 +169,7 @@ ltdc_pins: ltdc@0 { pins { pinmux = , /* B0 */ - , /* B4 */ + , /* B4 */ , /* VSYNC */ , /* HSYNC */ , /* CLK */ From b58ab56d14f242850142a49e2a62a80389b3a11e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 6 Jul 2023 23:32:27 +0200 Subject: [PATCH 115/148] ARM: stm32: Inhibit PDDS because CSTBYDIS is set The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never enter CStandby state and would always end up in CStop state. Clear the PDDS bit, which indicates the CA cores can enter CStandby state as it makes little sense to keep it set with CSTBYDIS also set. This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR PDDS bits are set, then the chip enters CStandby state even though the PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that from happening. Signed-off-by: Marek Vasut Reviewed-by: Patrick Delaunay --- arch/arm/mach-stm32mp/psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c index 39b5200949a..8cdeb0ab3f2 100644 --- a/arch/arm/mach-stm32mp/psci.c +++ b/arch/arm/mach-stm32mp/psci.c @@ -729,7 +729,7 @@ void __secure psci_system_suspend(u32 __always_unused function_id, setbits_le32(STM32_RCC_BASE + RCC_MP_CIER, RCC_MP_CIFR_WKUPF); setbits_le32(STM32_PWR_BASE + PWR_MPUCR, - PWR_MPUCR_CSSF | PWR_MPUCR_CSTDBYDIS | PWR_MPUCR_PDDS); + PWR_MPUCR_CSSF | PWR_MPUCR_CSTDBYDIS); saved_mcudivr = readl(STM32_RCC_BASE + RCC_MCUDIVR); saved_pll3cr = readl(STM32_RCC_BASE + RCC_PLL3CR); From 61ad1a527a198a3c5ce4cdf25d74108bd038ebb4 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 10 Jul 2023 10:38:45 +0200 Subject: [PATCH 116/148] ARM: dts: stm32mp: alignment with v6.4 Device tree alignment with Linux kernel v6.4. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32mp13-pinctrl.dtsi | 129 ++++++++++++++++++++++++++++ arch/arm/dts/stm32mp131.dtsi | 99 ++++++++++++++++++++- arch/arm/dts/stm32mp135f-dk.dts | 42 ++++++++- arch/arm/dts/stm32mp15-pinctrl.dtsi | 34 ++++---- arch/arm/dts/stm32mp151.dtsi | 4 +- arch/arm/dts/stm32mp157a-dk1.dts | 3 - arch/arm/dts/stm32mp157c-dk2.dts | 3 - arch/arm/dts/stm32mp157c-ed1.dts | 17 +--- arch/arm/dts/stm32mp157c-ev1.dts | 9 +- arch/arm/dts/stm32mp15xx-dkx.dtsi | 15 ++-- 10 files changed, 299 insertions(+), 56 deletions(-) diff --git a/arch/arm/dts/stm32mp13-pinctrl.dtsi b/arch/arm/dts/stm32mp13-pinctrl.dtsi index b2dce3a29f3..27e0c382678 100644 --- a/arch/arm/dts/stm32mp13-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp13-pinctrl.dtsi @@ -258,4 +258,133 @@ bias-disable; }; }; + + uart4_idle_pins_a: uart4-idle-0 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_a: uart4-sleep-0 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; + + uart8_pins_a: uart8-0 { + pins1 { + pinmux = ; /* UART8_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART8_RX */ + bias-pull-up; + }; + }; + + uart8_idle_pins_a: uart8-idle-0 { + pins1 { + pinmux = ; /* UART8_TX */ + }; + pins2 { + pinmux = ; /* UART8_RX */ + bias-pull-up; + }; + }; + + uart8_sleep_pins_a: uart8-sleep-0 { + pins { + pinmux = , /* UART8_TX */ + ; /* UART8_RX */ + }; + }; + + usart1_pins_a: usart1-0 { + pins1 { + pinmux = , /* USART1_TX */ + ; /* USART1_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART1_RX */ + ; /* USART1_CTS_NSS */ + bias-pull-up; + }; + }; + + usart1_idle_pins_a: usart1-idle-0 { + pins1 { + pinmux = , /* USART1_TX */ + ; /* USART1_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART1_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART1_RX */ + bias-pull-up; + }; + }; + + usart1_sleep_pins_a: usart1-sleep-0 { + pins { + pinmux = , /* USART1_TX */ + , /* USART1_RTS */ + , /* USART1_CTS_NSS */ + ; /* USART1_RX */ + }; + }; + + usart2_pins_a: usart2-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_idle_pins_a: usart2-idle-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART2_RX */ + bias-disable; + }; + }; + + usart2_sleep_pins_a: usart2-sleep-0 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; }; diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index d94ba254726..d163c267e34 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -397,12 +397,42 @@ status = "disabled"; }; + usart3: serial@4000f000 { + compatible = "st,stm32h7-uart"; + reg = <0x4000f000 0x400>; + interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART3_K>; + resets = <&rcc USART3_R>; + wakeup-source; + dmas = <&dmamux1 45 0x400 0x5>, + <&dmamux1 46 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart4: serial@40010000 { compatible = "st,stm32h7-uart"; reg = <0x40010000 0x400>; - interrupts = ; + interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART4_K>; resets = <&rcc UART4_R>; + wakeup-source; + dmas = <&dmamux1 63 0x400 0x5>, + <&dmamux1 64 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart5: serial@40011000 { + compatible = "st,stm32h7-uart"; + reg = <0x40011000 0x400>; + interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART5_K>; + resets = <&rcc UART5_R>; + wakeup-source; + dmas = <&dmamux1 65 0x400 0x5>, + <&dmamux1 66 0x400 0x1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -442,6 +472,32 @@ status = "disabled"; }; + uart7: serial@40018000 { + compatible = "st,stm32h7-uart"; + reg = <0x40018000 0x400>; + interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART7_K>; + resets = <&rcc UART7_R>; + wakeup-source; + dmas = <&dmamux1 79 0x400 0x5>, + <&dmamux1 80 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart8: serial@40019000 { + compatible = "st,stm32h7-uart"; + reg = <0x40019000 0x400>; + interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART8_K>; + resets = <&rcc UART8_R>; + wakeup-source; + dmas = <&dmamux1 81 0x400 0x5>, + <&dmamux1 82 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + timers1: timer@44000000 { #address-cells = <1>; #size-cells = <0>; @@ -524,6 +580,19 @@ }; }; + usart6: serial@44003000 { + compatible = "st,stm32h7-uart"; + reg = <0x44003000 0x400>; + interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART6_K>; + resets = <&rcc USART6_R>; + wakeup-source; + dmas = <&dmamux1 71 0x400 0x5>, + <&dmamux1 72 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + i2s1: audio-controller@44004000 { compatible = "st,stm32h7-i2s"; reg = <0x44004000 0x400>; @@ -748,6 +817,32 @@ status = "disabled"; }; + usart1: serial@4c000000 { + compatible = "st,stm32h7-uart"; + reg = <0x4c000000 0x400>; + interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART1_K>; + resets = <&rcc USART1_R>; + wakeup-source; + dmas = <&dmamux1 41 0x400 0x5>, + <&dmamux1 42 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + usart2: serial@4c001000 { + compatible = "st,stm32h7-uart"; + reg = <0x4c001000 0x400>; + interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART2_K>; + resets = <&rcc USART2_R>; + wakeup-source; + dmas = <&dmamux1 43 0x400 0x5>, + <&dmamux1 44 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + i2s4: audio-controller@4c002000 { compatible = "st,stm32h7-i2s"; reg = <0x4c002000 0x400>; @@ -1001,8 +1096,6 @@ reg = <0x50000000 0x1000>; #clock-cells = <1>; #reset-cells = <1>; - interrupts = ; - clock-names = "hse", "hsi", "csi", "lse", "lsi"; clocks = <&scmi_clk CK_SCMI_HSE>, <&scmi_clk CK_SCMI_HSI>, diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts index c40686cb2b9..f0900ca672b 100644 --- a/arch/arm/dts/stm32mp135f-dk.dts +++ b/arch/arm/dts/stm32mp135f-dk.dts @@ -19,6 +19,13 @@ aliases { serial0 = &uart4; + serial1 = &usart1; + serial2 = &uart8; + serial3 = &usart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; }; memory@c0000000 { @@ -267,8 +274,41 @@ }; &uart4 { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep", "idle"; pinctrl-0 = <&uart4_pins_a>; + pinctrl-1 = <&uart4_sleep_pins_a>; + pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart8 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart8_pins_a>; + pinctrl-1 = <&uart8_sleep_pins_a>; + pinctrl-2 = <&uart8_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; +}; + +&usart1 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart1_pins_a>; + pinctrl-1 = <&usart1_sleep_pins_a>; + pinctrl-2 = <&usart1_idle_pins_a>; + uart-has-rtscts; + status = "disabled"; +}; + +/* Bluetooth */ +&usart2 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart2_pins_a>; + pinctrl-1 = <&usart2_sleep_pins_a>; + pinctrl-2 = <&usart2_idle_pins_a>; + uart-has-rtscts; status = "okay"; }; diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index a9d2bec9901..e86d989dd35 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -1880,6 +1880,21 @@ }; }; + spi1_pins_b: spi1-1 { + pins1 { + pinmux = , /* SPI1_SCK */ + ; /* SPI1_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI1_MISO */ + bias-disable; + }; + }; + spi2_pins_a: spi2-0 { pins1 { pinmux = , /* SPI2_SCK */ @@ -2163,7 +2178,7 @@ ; /* USART2_RTS */ bias-disable; drive-push-pull; - slew-rate = <3>; + slew-rate = <0>; }; pins2 { pinmux = , /* USART2_RX */ @@ -2181,7 +2196,7 @@ pinmux = ; /* USART2_RTS */ bias-disable; drive-push-pull; - slew-rate = <3>; + slew-rate = <0>; }; pins3 { pinmux = ; /* USART2_RX */ @@ -2448,19 +2463,4 @@ bias-disable; }; }; - - spi1_pins_b: spi1-1 { - pins1 { - pinmux = , /* SPI1_SCK */ - ; /* SPI1_MOSI */ - bias-disable; - drive-push-pull; - slew-rate = <1>; - }; - - pins2 { - pinmux = ; /* SPI1_MISO */ - bias-disable; - }; - }; }; diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi index b3baacbb269..21d11be328c 100644 --- a/arch/arm/dts/stm32mp151.dtsi +++ b/arch/arm/dts/stm32mp151.dtsi @@ -1148,8 +1148,8 @@ usbotg_hs: usb-otg@49000000 { compatible = "st,stm32mp15-hsotg", "snps,dwc2"; reg = <0x49000000 0x10000>; - clocks = <&rcc USBO_K>; - clock-names = "otg"; + clocks = <&rcc USBO_K>, <&usbphyc>; + clock-names = "otg", "utmi"; resets = <&rcc USBO_R>; reset-names = "dwc2"; interrupts = ; diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index 4c8be9c8eb2..0da3667ab1e 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -17,9 +17,6 @@ aliases { ethernet0 = ðernet0; - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart7; }; chosen { diff --git a/arch/arm/dts/stm32mp157c-dk2.dts b/arch/arm/dts/stm32mp157c-dk2.dts index 2bc92ef3aeb..ab13e340f4e 100644 --- a/arch/arm/dts/stm32mp157c-dk2.dts +++ b/arch/arm/dts/stm32mp157c-dk2.dts @@ -18,9 +18,6 @@ aliases { ethernet0 = ðernet0; - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart7; serial3 = &usart2; }; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index fe5c8f25cec..3541a17dceb 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -16,6 +16,10 @@ model = "STMicroelectronics STM32MP157C eval daughter"; compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; + aliases { + serial0 = &uart4; + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -65,15 +69,6 @@ reg = <0x38000000 0x10000>; no-map; }; - - gpu_reserved: gpu@e8000000 { - reg = <0xe8000000 0x8000000>; - no-map; - }; - }; - - aliases { - serial0 = &uart4; }; sd_switch: regulator-sd_switch { @@ -148,10 +143,6 @@ status = "okay"; }; -&gpu { - contiguous-area = <&gpu_reserved>; -}; - &hash1 { status = "okay"; }; diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts index 542226cfcfd..ba8e9d9a42f 100644 --- a/arch/arm/dts/stm32mp157c-ev1.dts +++ b/arch/arm/dts/stm32mp157c-ev1.dts @@ -14,16 +14,15 @@ model = "STMicroelectronics STM32MP157C eval daughter on eval mother"; compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157"; - chosen { - stdout-path = "serial0:115200n8"; - }; - aliases { - serial0 = &uart4; serial1 = &usart3; ethernet0 = ðernet0; }; + chosen { + stdout-path = "serial0:115200n8"; + }; + clocks { clk_ext_camera: clk-ext-camera { #clock-cells = <0>; diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 49b3e768c89..f4de6c0b758 100644 --- a/arch/arm/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi @@ -8,6 +8,12 @@ #include / { + aliases { + serial0 = &uart4; + serial1 = &usart3; + serial2 = &uart7; + }; + memory@c0000000 { device_type = "memory"; reg = <0xc0000000 0x20000000>; @@ -53,11 +59,6 @@ reg = <0x38000000 0x10000>; no-map; }; - - gpu_reserved: gpu@d4000000 { - reg = <0xd4000000 0x4000000>; - no-map; - }; }; led { @@ -159,10 +160,6 @@ }; }; -&gpu { - contiguous-area = <&gpu_reserved>; -}; - &hash1 { status = "okay"; }; From 284b08fb51b60255cbedcfe7aa7dcf319450d7e3 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 10 Jul 2023 13:30:59 +0200 Subject: [PATCH 117/148] board: stm32mp1: add splash screen with stmicroelectronics logo Display the STMicroelectronics logo with features VIDEO_LOGO and SPLASH_SCREEN on STMicroelectronics boards. With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the address indicated by splashimage and centered with "splashpos=m,m". Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- MAINTAINERS | 1 + configs/stm32mp15_basic_defconfig | 3 +++ configs/stm32mp15_defconfig | 3 +++ configs/stm32mp15_trusted_defconfig | 3 +++ include/configs/stm32mp15_st_common.h | 4 +++- tools/logos/st.bmp | Bin 0 -> 18244 bytes 6 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 tools/logos/st.bmp diff --git a/MAINTAINERS b/MAINTAINERS index bf851cffd6b..523c17ebae4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -633,6 +633,7 @@ F: include/dt-bindings/clock/stm32mp* F: include/dt-bindings/pinctrl/stm32-pinfunc.h F: include/dt-bindings/reset/stm32mp* F: include/stm32_rcc.h +F: tools/logos/st.bmp F: tools/stm32image.c N: stm N: stm32 diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 424ae5dbdfa..9ea5aaa7145 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -171,6 +171,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y @@ -178,6 +179,8 @@ CONFIG_VIDEO_STM32=y CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 2700b5c4991..4d0a81f8a87 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -147,6 +147,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y @@ -154,6 +155,8 @@ CONFIG_VIDEO_STM32=y CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 5b94e0c6d2e..0a7d8624858 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -147,6 +147,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y @@ -154,6 +155,8 @@ CONFIG_VIDEO_STM32=y CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index b45982a35b8..60838cb0e3f 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -10,7 +10,9 @@ #define STM32MP_BOARD_EXTRA_ENV \ "usb_pgood_delay=2000\0" \ - "console=ttySTM0\0" + "console=ttySTM0\0" \ + "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "splashpos=m,m\0" #include diff --git a/tools/logos/st.bmp b/tools/logos/st.bmp new file mode 100644 index 0000000000000000000000000000000000000000..f59d3c5cef6b8bce5213a1ef42a9cdaa3c5dbc58 GIT binary patch literal 18244 zcmeHvcUV-((s!LXVPJqEg9Hfz>WVo>42Tg_%$P;Qw63nQ=A5&b5zOKWq9|ZOKv57> z1OZ9TpyV(E6ZYo#-mm%$0|+yFpYPxIdH1=!JLh!$s;j%JtE=i1cZ}cI@xcG%#Q^+> zzm`w{<=7}Nzy`p116Ueq+Hd$w+L-avH{yT(zy1-lp`PqUgI^a@nCfW@{=J-FdS5q~ zIiL&79_$HohV_B~uf8yE)BsrEJs1}H41>kvyeSFAjj8m&}6=feT>cvV{;5v=}x8FNMu30%6Ol zAlSNkIc!@K4BOYPgdIPvf}QKuz^?T_!tM=gVb8{Ous38q?EB?s*uQB59M}>92eM&;C94ih`bUGkyj(&&b0{m_4*aKd;Kch zy>ShqZeEAzTQ?y3_6@jq`zFLh-h!Arx8eS;k??@DyLTWq>Q{IeeHR|xi-NeAXo$Oi z58|;UJcxmW*!%D}_5nP3i0x4p9h7cea?p>(h5F9aX|qT7ZyNCVIhdH!}uBwEZsw$|du7cX?YN)NLhPs*>sH?4k`r2BkuOqDvWc8%ggIq?M3>rw2 z%b}69h6YfO*4PM2g#uJcC8$-Tso*y?X=?cGH#Pj>x8L9ofA|gl_=i8hpZ@qq_|u>M z1b-&&&wqx$koK3qz+XxGD`|g)zx|E0zro*0`}^PFAEf=`AMnqA{uBQ7FVg-6|0eC< z|AznhpZ|gX{O3RLAN5i-{NKO-m#o0Q)WE5}UJG8EW2*)>H+=npH!ueGm%LYIO$4}0 z-p7mv%d;)-b7lg>koS-L!0od3y-=Am3*d4cSe1ZKBE2%UUEhqoV6_E=Ter=22lr+i ztwer~05sLP)jJ%Uyc4v%V^n3oZnE78!d<%qJhb@#sO?dX7yjTH#>=63j-3R~ms&li z@1C$UzSZ;B*U<^ZP0y{hnL}RHAMVHHf+_wgdT{zmP7@XB$=Tg+WGLSg;|;dwTJ>ZE zi|n@ZJ#l_oNpJrL&tATNvY3KR|_oU+1VxKL!NG+~gU;)r^AECxe+f)E71= z5B5&AvuUQ2-rs%rDNmPwYsaZfo-PXMR1IJ5%(t^^rb}N6X20-ss9{bT4ZDj{$serl z?;@t4g)%2tV4=~7XH&Fuk3^0YFT+E|b?C@*9E|%?k#Rrfpf@d^78MOfcR?5xwYjf$ zzi%LCm8>fN%4}P3;SmFIcNBTomJjafYEIEsp54LN6S(e9MwG{8vIYcE7P+*mDJN(_ zaJl2HS(;+Oi~@$J2%)@+vXmzt@$YZr&T}512II6~6LbNstPDY5WNHhn8H;TBwFpP* zy3bEf1~_-oQi~571J`58<|VxZhJ!b6G1>&e&0A)=X=M+?)mN20m~Rfe=a>82d$3+}L5wmu5H#5&>`o;%d02dT$b;cqv*huIf`e@JHIi&xV{_Fk; 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Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK pad for the PHY and the same 50 MHz clock are fed back to ETHRX via internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad using external pad-to-pad connection. Option (1) has two downsides. ETHCK_K is supplied directly from either PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and since the same PLL output is also used to supply SDMMC blocks, the performance of SD and eMMC access is affected. The second downside is that using this option, the EMI of the SoM is higher. Option (2) solves both of those problems, so implement it here. In this case, the PLL4_P is no longer limited and can be operated faster, at 100 MHz, which improves SDMMC performance (read performance is improved from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M count=1). The EMI interference also decreases. Ported from Linux kernel commit 73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM") Signed-off-by: Marek Vasut Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32mp15xx-dhcom-som.dtsi | 22 ++++++++++++++++++---- arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 14 ++++++++++++++ 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi index de761743b24..d3b85a8764d 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi @@ -118,13 +118,12 @@ ðernet0 { status = "okay"; - pinctrl-0 = <ðernet0_rmii_pins_a>; - pinctrl-1 = <ðernet0_rmii_sleep_pins_a>; + pinctrl-0 = <ðernet0_rmii_pins_c &mco2_pins_a>; + pinctrl-1 = <ðernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>; pinctrl-names = "default", "sleep"; phy-mode = "rmii"; max-speed = <100>; phy-handle = <&phy0>; - st,eth-ref-clk-sel; mdio0 { #address-cells = <1>; @@ -136,7 +135,7 @@ /* LAN8710Ai */ compatible = "ethernet-phy-id0007.c0f0", "ethernet-phy-ieee802.3-c22"; - clocks = <&rcc ETHCK_K>; + clocks = <&rcc CK_MCO2>; reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; reset-assert-us = <500>; reset-deassert-us = <500>; @@ -450,6 +449,21 @@ }; }; +&rcc { + /* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */ + clocks = <&rcc CK_MCO2>; + clock-names = "ETH_RX_CLK/ETH_REF_CLK"; + + /* + * Set PLL4P output to 100 MHz to supply SDMMC with faster clock, + * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2, + * so that MCO2 behaves as a divider for the ETHRX clock here. + */ + assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>; + assigned-clock-parents = <&rcc PLL4_P>; + assigned-clock-rates = <50000000>, <100000000>; +}; + &rng1 { status = "okay"; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index a808620e121..f12941b05f6 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -153,6 +153,20 @@ }; &rcc { + /* + * Reinstate clock names from stm32mp151.dtsi, the MCO2 trick + * used in stm32mp15xx-dhcom-som.dtsi is not supported by the + * U-Boot clock framework. + */ + clock-names = "hse", "hsi", "csi", "lse", "lsi"; + clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>, + <&clk_lse>, <&clk_lsi>; + + /* The MCO2 is already configured correctly, remove those. */ + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; + st,clksrc = < CLK_MPU_PLL1P CLK_AXI_PLL2P From 9e8cbea1a74516235820ccd50d513c961e43cb70 Mon Sep 17 00:00:00 2001 From: Valentin Caron Date: Fri, 4 Aug 2023 16:09:04 +0200 Subject: [PATCH 119/148] serial: stm32: extend TC timeout Waiting 150us TC bit couldn't be enough. If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time of 10 bits (1 byte in most use cases) at a baud rate of 115200). Fixes: b4dbc5d65a67 ("serial: stm32: Wait TC bit before performing initialization") Signed-off-by: Valentin Caron Signed-off-by: Patrice Chotard --- drivers/serial/serial_stm32.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 0085113f674..23d476fba28 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -22,6 +22,14 @@ #include "serial_stm32.h" #include +/* + * At 115200 bits/s + * 1 bit = 1 / 115200 = 8,68 us + * 8 bits = 69,444 us + * 10 bits are needed for worst case (8 bits + 1 start + 1 stop) = 86.806 us + */ +#define ONE_BYTE_B115200_US 87 + static void _stm32_serial_setbrg(fdt_addr_t base, struct stm32_uart_info *uart_info, u32 clock_rate, @@ -209,12 +217,10 @@ static int stm32_serial_probe(struct udevice *dev) * before uart initialization, wait for TC bit (Transmission Complete) * in case there is still chars from previous bootstage to transmit */ - ret = read_poll_timeout(readl, isr, isr & USART_ISR_TC, 10, 150, - plat->base + ISR_OFFSET(stm32f4)); - if (ret) { - clk_disable(&clk); - return ret; - } + ret = read_poll_timeout(readl, isr, isr & USART_ISR_TC, 50, + 16 * ONE_BYTE_B115200_US, plat->base + ISR_OFFSET(stm32f4)); + if (ret) + dev_dbg(dev, "FIFO not empty, some character can be lost (%d)\n", ret); ret = reset_get_by_index(dev, 0, &reset); if (!ret) { From 6831a4be29e6d165887b62abddcf4c5335a174dd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 7 Aug 2023 17:08:11 -0400 Subject: [PATCH 120/148] arm: Add arch/arm/dts/Makefile specifically to MAINTAINERS In order to reduce the number of people that are cc'd on a patch for simply touching arch/arm/dts/Makefile (which is a big common file) add an entry specifically to MAINTAINERS under the ARM entry. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 523c17ebae4..8b60db44841 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -132,6 +132,7 @@ M: Tom Rini S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-arm.git F: arch/arm/ +F: arch/arm/dts/Makefile F: cmd/arm/ ARM ALTERA SOCFPGA From 67969516b0389fc655ba892bf681897f0e7b53bf Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Wed, 9 Aug 2023 12:47:30 +0100 Subject: [PATCH 121/148] arm_ffa: use debug logs replace info logs with debug logs Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini Cc: Simon Glass Reviewed-by: Simon Glass --- doc/arch/arm64.ffa.rst | 2 +- drivers/firmware/arm-ffa/arm-ffa-uclass.c | 4 ++-- drivers/firmware/arm-ffa/arm-ffa.c | 2 +- drivers/firmware/arm-ffa/ffa-emul-uclass.c | 2 +- drivers/firmware/arm-ffa/sandbox_ffa.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst index 325fb80346e..4ecdc31716a 100644 --- a/doc/arch/arm64.ffa.rst +++ b/doc/arch/arm64.ffa.rst @@ -231,7 +231,7 @@ Please refer the command documentation at :doc:`../usage/cmd/armffa` Example of boot logs with FF-A enabled -------------------------------------- -For example, when using FF-A with Corstone-1000 the logs are as follows: +For example, when using FF-A with Corstone-1000, debug logs enabled, the output is as follows: :: diff --git a/drivers/firmware/arm-ffa/arm-ffa-uclass.c b/drivers/firmware/arm-ffa/arm-ffa-uclass.c index ffa9d81fa74..8c17b19eaf5 100644 --- a/drivers/firmware/arm-ffa/arm-ffa-uclass.c +++ b/drivers/firmware/arm-ffa/arm-ffa-uclass.c @@ -201,11 +201,11 @@ int ffa_get_version_hdlr(struct udevice *dev) major = GET_FFA_MAJOR_VERSION(res.a0); minor = GET_FFA_MINOR_VERSION(res.a0); - log_info("FF-A driver %d.%d\nFF-A framework %d.%d\n", + log_debug("FF-A driver %d.%d\nFF-A framework %d.%d\n", FFA_MAJOR_VERSION, FFA_MINOR_VERSION, major, minor); if (major == FFA_MAJOR_VERSION && minor >= FFA_MINOR_VERSION) { - log_info("FF-A versions are compatible\n"); + log_debug("FF-A versions are compatible\n"); if (dev) { uc_priv = dev_get_uclass_priv(dev); diff --git a/drivers/firmware/arm-ffa/arm-ffa.c b/drivers/firmware/arm-ffa/arm-ffa.c index 68df75bd9e5..ee0bf9a55b4 100644 --- a/drivers/firmware/arm-ffa/arm-ffa.c +++ b/drivers/firmware/arm-ffa/arm-ffa.c @@ -42,7 +42,7 @@ static bool arm_ffa_discover(struct udevice *dev) { int ret; - log_info("Arm FF-A framework discovery\n"); + log_debug("Arm FF-A framework discovery\n"); ret = ffa_get_version_hdlr(dev); if (ret) diff --git a/drivers/firmware/arm-ffa/ffa-emul-uclass.c b/drivers/firmware/arm-ffa/ffa-emul-uclass.c index 5562bbaac3a..4bf9f6041fe 100644 --- a/drivers/firmware/arm-ffa/ffa-emul-uclass.c +++ b/drivers/firmware/arm-ffa/ffa-emul-uclass.c @@ -695,7 +695,7 @@ int ffa_emul_find(struct udevice *dev, struct udevice **emulp) return ret; } - log_info("FF-A emulator ready to use\n"); + log_debug("FF-A emulator ready to use\n"); return 0; } diff --git a/drivers/firmware/arm-ffa/sandbox_ffa.c b/drivers/firmware/arm-ffa/sandbox_ffa.c index ef9491ccead..11142429c09 100644 --- a/drivers/firmware/arm-ffa/sandbox_ffa.c +++ b/drivers/firmware/arm-ffa/sandbox_ffa.c @@ -30,7 +30,7 @@ static int sandbox_ffa_discover(struct udevice *dev) int ret; struct udevice *emul; - log_info("Emulated FF-A framework discovery\n"); + log_debug("Emulated FF-A framework discovery\n"); ret = ffa_emul_find(dev, &emul); if (ret) { From 0d9a1262bb0aad6f5a93ec081eb7c4873d6a5226 Mon Sep 17 00:00:00 2001 From: Abdellatif El Khlifi Date: Fri, 11 Aug 2023 13:22:57 +0100 Subject: [PATCH 122/148] corstone1000: update maintainers Update MAINTAINERS of corstone1000 board. Signed-off-by: Xueliang Zhong Signed-off-by: Abdellatif El Khlifi --- board/armltd/corstone1000/MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/armltd/corstone1000/MAINTAINERS b/board/armltd/corstone1000/MAINTAINERS index 8c905686de7..1cc9aaa29a8 100644 --- a/board/armltd/corstone1000/MAINTAINERS +++ b/board/armltd/corstone1000/MAINTAINERS @@ -1,6 +1,6 @@ CORSTONE1000 BOARD -M: Rui Miguel Silva -M: Vishnu Banavath +M: Abdellatif El Khlifi +M: Xueliang Zhong S: Maintained F: board/armltd/corstone1000/ F: include/configs/corstone1000.h From c60e6a24dd432fa5975cdd9077cfbdbe34e0a588 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 11 Aug 2023 12:17:43 -0600 Subject: [PATCH 123/148] CI: x86: coreboot: Update to latest coreboot Use a recent coreboot build for this test. The coreboot commit is: 6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings This is build with default settings, i.e. QEMU x86 i440fx/piix4 Add some documentation as to how to update it next time. Signed-off-by: Simon Glass --- .azure-pipelines.yml | 2 +- .gitlab-ci.yml | 2 +- doc/board/coreboot/coreboot.rst | 20 ++++++++++++++++++++ 3 files changed, 22 insertions(+), 2 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 31850ae5718..53a83eef7db 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -426,7 +426,7 @@ stages: cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/; fi if [[ "${TEST_PY_BD}" == "coreboot" ]]; then - wget -O - "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" |xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom; + wget -O - "https://drive.google.com/uc?id=1uJ2VkUQ8czWFZmhJQ90Tp8V_zrJ6BrBH&export=download" |xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom; wget -O - "https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" >cbfstool; chmod a+x cbfstool; ./cbfstool ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom add-flat-binary -f ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.bin -n fallback/payload -c LZMA -l 0x1110000 -e 0x1110000; diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 8010afae951..1df13261c2d 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -69,7 +69,7 @@ stages: fi - if [[ "${TEST_PY_BD}" == "coreboot" ]]; then wget -O - - "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" | + "https://drive.google.com/uc?id=1uJ2VkUQ8czWFZmhJQ90Tp8V_zrJ6BrBH&export=download" | xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom; wget -O - "https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" > diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst index 21801a8a4d9..d660a223d9c 100644 --- a/doc/board/coreboot/coreboot.rst +++ b/doc/board/coreboot/coreboot.rst @@ -134,3 +134,23 @@ input clock is 1843200. So you can add the following CONFIG options:: CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y + +coreboot in CI +-------------- + +CI runs tests using a pre-built coreboot image. This ensures that U-Boot can +boot as a coreboot payload, based on a known-good build of coreboot. + +To update the `coreboot.rom` file which is used: + +#. Build coreboot with `CONFIG_LINEAR_FRAMEBUFFER=y`. If using `make menuconfig` + this is under + `Devices ->Display->Framebuffer mode->Linear "high resolution" framebuffer`. + +#. Compress the resulting `coreboot.rom`:: + + xz -c /path/to/coreboot/build/coreboot.rom >coreboot.rom.xz + +#. Upload the file to Google drive + +#. Send a patch to change the file ID used by wget in the CI yaml files. From 4901d2499c3b4d75fbb38dd91f98ccf660bf840f Mon Sep 17 00:00:00 2001 From: Neha Malcom Francis Date: Thu, 17 Aug 2023 17:39:14 +0530 Subject: [PATCH 124/148] MAINTAINERS: Update UFS maintainer Dropping Faiz Abbas from the UFS maintainer list as his e-mail ID is no longer valid. Adding Bhupesh Sharma who has been using this framework working on Qualcomm Snapdragon SoCs as well as sending out fixes. Adding myself as well to support in reviewing and testing patches. Signed-off-by: Neha Malcom Francis Reviewed-by: Nishanth Menon Acked-by: Marek Vasut --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 8b60db44841..84de9de5319 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1599,7 +1599,8 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-ubi.git F: drivers/mtd/ubi/ UFS -M: Faiz Abbas +M: Bhupesh Sharma +M: Neha Malcom Francis S: Maintained F: drivers/ufs/ From 11bb3c76bc12ad90f5f50382d779002c292a8d4e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 17 Aug 2023 06:04:34 +0000 Subject: [PATCH 125/148] doc: rockchip: Add supported RK3566/RK3568 boards Update Rockchip documentation to include RK3566/RK3568 boards already supported. Also list Pine64 boards under RK3566 and drop defconfig to match other listed boards. Signed-off-by: Jonas Karlman --- doc/board/rockchip/rockchip.rst | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 31aeb856760..4668e598515 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -91,18 +91,22 @@ List of mainline supported Rockchip boards: - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) * rk3566 - - Anbernic RGxx3 (rgxx3-rk3566) + - Anbernic RGxx3 (anbernic-rgxx3) + - Pine64 Quartz64-A Board (quartz64-a-rk3566) + - Pine64 Quartz64-B Board (quartz64-b-rk3566) + - Pine64 SOQuartz on Blade (soquartz-blade-rk3566) + - Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566) + - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566) + - Radxa CM3 IO Board (radxa-cm3-io-rk3566) * rk3568 - Rockchip Evb-RK3568 (evb-rk3568) - - EmbedFire Lubancat 2 (lubancat-2-rk3568_defconfig) + - EmbedFire LubanCat 2 (lubancat-2-rk3568) + - FriendlyElec NanoPi R5C (nanopi-r5c-rk3568) + - FriendlyElec NanoPi R5S (nanopi-r5s-rk3568) - Hardkernel ODROID-M1 (odroid-m1-rk3568) - - Pine64 Quartz64-A Board (quartz64-a-rk3566_defconfig) - - Pine64 Quartz64-B Board (quartz64-b-rk3566_defconfig) - - Pine64 SOQuartz on Blade (soquartz-blade-rk3566_defconfig) - - Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566_defconfig) - - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566_defconfig) - - Radxa E25 Carrier Board (radxa-e25-rk3568_defconfig) + - Radxa E25 Carrier Board (radxa-e25-rk3568) + - Radxa ROCK 3 Model A (rock-3a-rk3568) * rk3588 - Rockchip EVB (evb-rk3588) From d17e896d07dde976b824f6bf86dc89ffd7cfc587 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 17 Aug 2023 06:04:36 +0000 Subject: [PATCH 126/148] board: rockchip: rk35xx: Add device tree files to MAINTAINERS Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include related device tree files. Also replace space with tabs. Signed-off-by: Jonas Karlman Acked-by: Eugen Hristev --- board/anbernic/rgxx3_rk3566/MAINTAINERS | 3 ++ .../neural-compute-module-6/MAINTAINERS | 6 +++ board/radxa/rock5a-rk3588s/MAINTAINERS | 2 + board/radxa/rock5b-rk3588/MAINTAINERS | 4 +- board/rockchip/evb_rk3568/MAINTAINERS | 51 ++++++++++--------- board/rockchip/evb_rk3588/MAINTAINERS | 3 +- 6 files changed, 43 insertions(+), 26 deletions(-) diff --git a/board/anbernic/rgxx3_rk3566/MAINTAINERS b/board/anbernic/rgxx3_rk3566/MAINTAINERS index 1c0d3fe7b5b..6be16a47e8e 100644 --- a/board/anbernic/rgxx3_rk3566/MAINTAINERS +++ b/board/anbernic/rgxx3_rk3566/MAINTAINERS @@ -4,3 +4,6 @@ S: Maintained F: board/anbernic/rgxx3_rk3566 F: include/configs/anbernic-rgxx3-rk3566.h F: configs/anbernic-rgxx3_defconfig +F: arch/arm/dts/rk3566-anbernic-rgxx3.dts +F: arch/arm/dts/rk3566-anbernic-rgxx3.dtsi +F: arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi diff --git a/board/edgeble/neural-compute-module-6/MAINTAINERS b/board/edgeble/neural-compute-module-6/MAINTAINERS index bc7f9b0e680..42e5df506bf 100644 --- a/board/edgeble/neural-compute-module-6/MAINTAINERS +++ b/board/edgeble/neural-compute-module-6/MAINTAINERS @@ -5,3 +5,9 @@ F: board/edgeble/neural-compute-module-6 F: include/configs/neural-compute-module-6.h F: configs/neu6a-io-rk3588_defconfig F: configs/neu6b-io-rk3588_defconfig +F: arch/arm/dts/rk3588-edgeble-neu6a.dtsi +F: arch/arm/dts/rk3588-edgeble-neu6a-io.dts +F: arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi +F: arch/arm/dts/rk3588-edgeble-neu6b.dtsi +F: arch/arm/dts/rk3588-edgeble-neu6b-io.dts +F: arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi diff --git a/board/radxa/rock5a-rk3588s/MAINTAINERS b/board/radxa/rock5a-rk3588s/MAINTAINERS index 62fb6b4c0ee..05750269b8d 100644 --- a/board/radxa/rock5a-rk3588s/MAINTAINERS +++ b/board/radxa/rock5a-rk3588s/MAINTAINERS @@ -4,3 +4,5 @@ S: Maintained F: board/radxa/rock5a-rk3588s F: include/configs/rock5a-rk3588s.h F: configs/rock5a-rk3588s_defconfig +F: arch/arm/dts/rk3588s-rock-5a.dts +F: arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi diff --git a/board/radxa/rock5b-rk3588/MAINTAINERS b/board/radxa/rock5b-rk3588/MAINTAINERS index 693751e583d..734115a4a3d 100644 --- a/board/radxa/rock5b-rk3588/MAINTAINERS +++ b/board/radxa/rock5b-rk3588/MAINTAINERS @@ -2,5 +2,7 @@ ROCK5B-RK3588 M: Eugen Hristev S: Maintained F: board/radxa/rock5b-rk3588 -F: include/configs/rock5b-rk3588 +F: include/configs/rock5b-rk3588.h F: configs/rock5b-rk3588_defconfig +F: arch/arm/dts/rk3588-rock-5b.dts +F: arch/arm/dts/rk3588-rock-5b-u-boot.dtsi diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS index 1cdeafcf79b..5a2ec13e21e 100644 --- a/board/rockchip/evb_rk3568/MAINTAINERS +++ b/board/rockchip/evb_rk3568/MAINTAINERS @@ -1,13 +1,13 @@ EVB-RK3568 -M: Joseph Chen -S: Maintained -F: board/rockchip/evb_rk3568 -F: include/configs/evb_rk3568.h -F: configs/evb-rk3568_defconfig -F: arch/arm/dts/rk3568-evb-boot.dtsi +M: Joseph Chen +S: Maintained +F: board/rockchip/evb_rk3568 +F: include/configs/evb_rk3568.h +F: configs/evb-rk3568_defconfig +F: arch/arm/dts/rk3568-evb-u-boot.dtsi F: arch/arm/dts/rk3568-evb.dts -Lubancat-2 +LUBANCAT-2 M: Andy Yan S: Maintained F: configs/lubancat-2-rk3568_defconfig @@ -15,24 +15,27 @@ F: arch/arm/dts/rk3568-lubancat-2.dts F: arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi NANOPI-R5C -M: Tianling Shen -S: Maintained -F: configs/nanopi-r5c-rk3568_defconfig -F: arch/arm/dts/rk3568-nanopi-r5c.dts -F: arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi +M: Tianling Shen +S: Maintained +F: configs/nanopi-r5c-rk3568_defconfig +F: arch/arm/dts/rk3568-nanopi-r5c.dts +F: arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi NANOPI-R5S -M: Tianling Shen -S: Maintained -F: configs/nanopi-r5s-rk3568_defconfig -F: arch/arm/dts/rk3568-nanopi-r5s.dts -F: arch/arm/dts/rk3568-nanopi-r5s.dtsi -F: arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi +M: Tianling Shen +S: Maintained +F: configs/nanopi-r5s-rk3568_defconfig +F: arch/arm/dts/rk3568-nanopi-r5s.dts +F: arch/arm/dts/rk3568-nanopi-r5s.dtsi +F: arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi -RADXA-CM3 +RADXA-CM3-IO M: Jagan Teki S: Maintained F: configs/radxa-cm3-io-rk3566_defconfig +F: arch/arm/dts/rk3566-radxa-cm3.dtsi +F: arch/arm/dts/rk3566-radxa-cm3-io.dts +F: arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi RADXA-E25 M: Jonas Karlman @@ -43,8 +46,8 @@ F: arch/arm/dts/rk3568-radxa-e25.dts F: arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi ROCK-3A -M: Akash Gajjar -S: Maintained -F: configs/rock-3a-rk3568_defconfig -F: arch/arm/dts/rk3568-rock-3a.dts -F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi +M: Akash Gajjar +S: Maintained +F: configs/rock-3a-rk3568_defconfig +F: arch/arm/dts/rk3568-rock-3a.dts +F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS index 7b7df3c5a8a..6b2c257a170 100644 --- a/board/rockchip/evb_rk3588/MAINTAINERS +++ b/board/rockchip/evb_rk3588/MAINTAINERS @@ -4,4 +4,5 @@ S: Maintained F: board/rockchip/evb_rk3588 F: include/configs/evb_rk3588.h F: configs/evb-rk3588_defconfig -F: arch/arm/dts/rk3588-evb-u-boot.dtsi +F: arch/arm/dts/rk3588-evb1-v10.dts +F: arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi From a5ce494596ec31a8977527b6fafe3f41d4580f89 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 17 Aug 2023 06:04:38 +0000 Subject: [PATCH 127/148] board: rockchip: rk35xx: Add myself as reviewer to MAINTAINERS Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and can help with review and testing of defconfig and device tree changes. Signed-off-by: Jonas Karlman Acked-by: Eugen Hristev --- board/radxa/rock5a-rk3588s/MAINTAINERS | 1 + board/radxa/rock5b-rk3588/MAINTAINERS | 1 + board/rockchip/evb_rk3568/MAINTAINERS | 4 ++++ 3 files changed, 6 insertions(+) diff --git a/board/radxa/rock5a-rk3588s/MAINTAINERS b/board/radxa/rock5a-rk3588s/MAINTAINERS index 05750269b8d..a569efa74e3 100644 --- a/board/radxa/rock5a-rk3588s/MAINTAINERS +++ b/board/radxa/rock5a-rk3588s/MAINTAINERS @@ -1,5 +1,6 @@ ROCK5A-RK3588 M: Eugen Hristev +R: Jonas Karlman S: Maintained F: board/radxa/rock5a-rk3588s F: include/configs/rock5a-rk3588s.h diff --git a/board/radxa/rock5b-rk3588/MAINTAINERS b/board/radxa/rock5b-rk3588/MAINTAINERS index 734115a4a3d..4460c9971a9 100644 --- a/board/radxa/rock5b-rk3588/MAINTAINERS +++ b/board/radxa/rock5b-rk3588/MAINTAINERS @@ -1,5 +1,6 @@ ROCK5B-RK3588 M: Eugen Hristev +R: Jonas Karlman S: Maintained F: board/radxa/rock5b-rk3588 F: include/configs/rock5b-rk3588.h diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS index 5a2ec13e21e..cc9eb432a8b 100644 --- a/board/rockchip/evb_rk3568/MAINTAINERS +++ b/board/rockchip/evb_rk3568/MAINTAINERS @@ -16,6 +16,7 @@ F: arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi NANOPI-R5C M: Tianling Shen +R: Jonas Karlman S: Maintained F: configs/nanopi-r5c-rk3568_defconfig F: arch/arm/dts/rk3568-nanopi-r5c.dts @@ -23,6 +24,7 @@ F: arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi NANOPI-R5S M: Tianling Shen +R: Jonas Karlman S: Maintained F: configs/nanopi-r5s-rk3568_defconfig F: arch/arm/dts/rk3568-nanopi-r5s.dts @@ -31,6 +33,7 @@ F: arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi RADXA-CM3-IO M: Jagan Teki +R: Jonas Karlman S: Maintained F: configs/radxa-cm3-io-rk3566_defconfig F: arch/arm/dts/rk3566-radxa-cm3.dtsi @@ -47,6 +50,7 @@ F: arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi ROCK-3A M: Akash Gajjar +R: Jonas Karlman S: Maintained F: configs/rock-3a-rk3568_defconfig F: arch/arm/dts/rk3568-rock-3a.dts From e34efcf51df86eb2b07d9deb171596940586c666 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 17 Aug 2023 21:52:48 +0000 Subject: [PATCH 128/148] rockchip: rk3566-anbernic-rgxx3: Rename defconfig to include SoC name Rename defconfig to include SoC name, use similar pattern as other RK356x boards: -.dts -> -_defconfig Suggested-by: Kever Yang Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- board/anbernic/rgxx3_rk3566/MAINTAINERS | 2 +- ...anbernic-rgxx3_defconfig => anbernic-rgxx3-rk3566_defconfig} | 0 doc/board/rockchip/rockchip.rst | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) rename configs/{anbernic-rgxx3_defconfig => anbernic-rgxx3-rk3566_defconfig} (100%) diff --git a/board/anbernic/rgxx3_rk3566/MAINTAINERS b/board/anbernic/rgxx3_rk3566/MAINTAINERS index 6be16a47e8e..7970e5a4aad 100644 --- a/board/anbernic/rgxx3_rk3566/MAINTAINERS +++ b/board/anbernic/rgxx3_rk3566/MAINTAINERS @@ -3,7 +3,7 @@ M: Chris Morgan S: Maintained F: board/anbernic/rgxx3_rk3566 F: include/configs/anbernic-rgxx3-rk3566.h -F: configs/anbernic-rgxx3_defconfig +F: configs/anbernic-rgxx3-rk3566_defconfig F: arch/arm/dts/rk3566-anbernic-rgxx3.dts F: arch/arm/dts/rk3566-anbernic-rgxx3.dtsi F: arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi diff --git a/configs/anbernic-rgxx3_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig similarity index 100% rename from configs/anbernic-rgxx3_defconfig rename to configs/anbernic-rgxx3-rk3566_defconfig diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 4668e598515..de9fe8e642b 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -91,7 +91,7 @@ List of mainline supported Rockchip boards: - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) * rk3566 - - Anbernic RGxx3 (anbernic-rgxx3) + - Anbernic RGxx3 (anbernic-rgxx3-rk3566) - Pine64 Quartz64-A Board (quartz64-a-rk3566) - Pine64 Quartz64-B Board (quartz64-b-rk3566) - Pine64 SOQuartz on Blade (soquartz-blade-rk3566) From 97f4bc372f750fe4fba8b302f277e191a7157df0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 13 Aug 2023 08:26:40 -0600 Subject: [PATCH 129/148] fs/erofs: Quieten test for filesystem presence At present listing a partition produces lots of errors about this filesystem: => part list mmc 4 cannot find valid erofs superblock cannot find valid erofs superblock cannot read erofs superblock: -5 [9 more similar lines] Use debugging rather than errors when unable to find a signature, as is done with other filesystems. Signed-off-by: Simon Glass Reviewed-by: Gao Xiang Signed-off-by: Heinrich Schuchardt --- fs/erofs/super.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/fs/erofs/super.c b/fs/erofs/super.c index d33926281b4..d405d488fd2 100644 --- a/fs/erofs/super.c +++ b/fs/erofs/super.c @@ -68,14 +68,14 @@ int erofs_read_superblock(void) ret = erofs_blk_read(data, 0, erofs_blknr(sizeof(data))); if (ret < 0) { - erofs_err("cannot read erofs superblock: %d", ret); + erofs_dbg("cannot read erofs superblock: %d", ret); return -EIO; } dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET); ret = -EINVAL; if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) { - erofs_err("cannot find valid erofs superblock"); + erofs_dbg("cannot find valid erofs superblock"); return ret; } From 4ad85a9fea1ad5c401272102e68398f3bbdd20dd Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 15 Aug 2023 18:07:36 +0200 Subject: [PATCH 130/148] spl: don't assume NVMe partition 1 exists There is no requirement that a partition 1 exists in a partition table. We should not try to retrieve information about it. We should not even try reading with partition number CONFIG_SYS_NVME_BOOT_PARTITION here as this is done in the fs_set_blk_dev() call anyway. Fixes: 8ce6a2e17577 ("spl: blk: Support loading images from fs") Signed-off-by: Heinrich Schuchardt Reviewed-by: Tom Rini --- common/spl/spl_blk_fs.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/common/spl/spl_blk_fs.c b/common/spl/spl_blk_fs.c index 16ecece7023..eb6f5266896 100644 --- a/common/spl/spl_blk_fs.c +++ b/common/spl/spl_blk_fs.c @@ -44,7 +44,6 @@ int spl_blk_load_image(struct spl_image_info *spl_image, enum uclass_id uclass_id, int devnum, int partnum) { const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME; - struct disk_partition part_info = {}; struct legacy_img_hdr *header; struct blk_desc *blk_desc; loff_t actlen, filesize; @@ -59,11 +58,6 @@ int spl_blk_load_image(struct spl_image_info *spl_image, blk_show_device(uclass_id, devnum); header = spl_get_load_buffer(-sizeof(*header), sizeof(*header)); - ret = part_get_info(blk_desc, 1, &part_info); - if (ret) { - printf("spl: no partition table found. Err - %d\n", ret); - goto out; - } dev.ifname = blk_get_uclass_name(uclass_id); snprintf(dev.dev_part_str, sizeof(dev.dev_part_str) - 1, "%x:%x", From aab60a51284bce8f21e472d3e8943f76586edf42 Mon Sep 17 00:00:00 2001 From: Puhan Zhou Date: Sun, 13 Aug 2023 13:16:19 +0800 Subject: [PATCH 131/148] docs: fix wrong usage of proftool The usage of proftool in docs is incorrect. If proftool is used without '-o' argument, it will show the usage like following $ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace >trace.dat Must provide trace data, System.map file and output file Usage: proftool [-cmtv] Change '>' to '-o' to fix it. Signed-off-by: Puhan Zhou Reviewed-by: Simon Glass --- doc/develop/trace.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/doc/develop/trace.rst b/doc/develop/trace.rst index 9bbe1345d2d..546862020b1 100644 --- a/doc/develop/trace.rst +++ b/doc/develop/trace.rst @@ -139,7 +139,7 @@ There is a -f option available to select a function graph: .. code-block:: console - $ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace >trace.dat + $ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace -o trace.dat Again, you can use kernelshark or trace-cmd to look at the output. In this case you will see the time taken by each function shown against its exit record. @@ -171,7 +171,7 @@ command: .. code-block:: console - $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-flamegraph >trace.fg + $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-flamegraph -o trace.fg $ flamegraph.pl trace.fg >trace.svg You can load the .svg file into a viewer. If you use Chrome (and some other @@ -191,7 +191,7 @@ spend in each call stack: .. code-block:: console - $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-flamegraph -f timing >trace.fg + $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-flamegraph -f timing -o trace.fg $ flamegraph.pl trace.fg >trace.svg Note that trace collection does slow down execution so the timings will be From 68886a9941557f580fb650f39a76e7416b126534 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Mon, 14 Aug 2023 10:23:48 +0530 Subject: [PATCH 132/148] doc: printf() codes: Fix format specifier for unsigned int The format specifier for the "unsigned int" variable is documented as "%d". However, it should be "%u". Thus, fix it. Fixes: f5e9035043fb ("doc: printf() codes") Reported-by: Tom Rini Signed-off-by: Siddharth Vadapalli Reviewed-by: Tom Rini Reviewed-by: Heinrich Schuchardt Signed-off-by: Heinrich Schuchardt --- doc/develop/printf.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/doc/develop/printf.rst b/doc/develop/printf.rst index 7b9aea06876..99d05061b14 100644 --- a/doc/develop/printf.rst +++ b/doc/develop/printf.rst @@ -105,19 +105,19 @@ for the individual integer types. =================== ================== Type Format specifier =================== ================== -bool %d, %x +bool %d, %x char %d, %x unsigned char %u, %x short %d, %x unsigned short %u, %x int %d, %x -unsigned int %d, %x +unsigned int %u, %x long %ld, %lx unsigned long %lu, %lx long long %lld, %llx unsigned long long %llu, %llx off_t %llu, %llx -ptr_diff_t %td, %tx +ptr_diff_t %td, %tx fdt_addr_t %pa, see pointers fdt_size_t %pa, see pointers phys_addr_t %pa, see pointers From 52029b783bfb3b55f8845d7d88ba1bcc728c4e08 Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Mon, 14 Aug 2023 20:13:34 +0100 Subject: [PATCH 133/148] clk: Fix typo in header comment Signed-off-by: Paul Barker Reviewed-by: Heinrich Schuchardt --- include/clk-uclass.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/clk-uclass.h b/include/clk-uclass.h index 65ebff9ed27..a22f1a5d848 100644 --- a/include/clk-uclass.h +++ b/include/clk-uclass.h @@ -64,7 +64,7 @@ int of_xlate(struct clk *clock, struct ofnode_phandle_args *args); /** * request() - Request a translated clock. - * @clock: The clock struct to request; this has been fille in by + * @clock: The clock struct to request; this has been filled in by * a previoux xxx_xlate() function call, or by the caller * of clk_request(). * From 99a4e5865e34f7d493e5bb96f8d327e93066a802 Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Mon, 14 Aug 2023 20:13:35 +0100 Subject: [PATCH 134/148] irq: Fix typo in header comment Signed-off-by: Paul Barker Reviewed-by: Heinrich Schuchardt --- include/irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/irq.h b/include/irq.h index 1d08cb858d0..5638c10128e 100644 --- a/include/irq.h +++ b/include/irq.h @@ -109,7 +109,7 @@ struct irq_ops { * xxx_xlate() call, or as the only step in implementing a client's * irq_request() call. * - * @irq: The irq struct to request; this has been fille in by + * @irq: The irq struct to request; this has been filled in by * a previoux xxx_xlate() function call, or by the caller * of irq_request(). * @return 0 if OK, or a negative error code. From 951d63000e2daf8b128139cfed343fe2b2da5a93 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 15 Aug 2023 10:48:01 -0300 Subject: [PATCH 135/148] doc: csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line Originally, exporting the ATF_LOAD_ADDR was required, but since binman has been used to generate the flash.bin, it is no longer needed to do such manual export. The ATF address is now passed via binman. Remove the unneeded export ATF_LOAD_ADDR line. Signed-off-by: Fabio Estevam --- doc/imx/habv4/csf_examples/mx8m/csf.sh | 1 - 1 file changed, 1 deletion(-) diff --git a/doc/imx/habv4/csf_examples/mx8m/csf.sh b/doc/imx/habv4/csf_examples/mx8m/csf.sh index d87015f6c4e..65c143073cb 100644 --- a/doc/imx/habv4/csf_examples/mx8m/csf.sh +++ b/doc/imx/habv4/csf_examples/mx8m/csf.sh @@ -11,7 +11,6 @@ # 1) Build U-Boot (e.g. for i.MX8MM) # -# export ATF_LOAD_ADDR=0x920000 # cp -Lv /path/to/arm-trusted-firmware/build/imx8mm/release/bl31.bin . # cp -Lv /path/to/firmware-imx-8.14/firmware/ddr/synopsys/ddr3* . # make -j imx8mm_board_defconfig From dbada49554edd16da39134815635fd0015725c9e Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Fri, 18 Aug 2023 14:17:21 +0100 Subject: [PATCH 136/148] arm: rmobile: Fix off-by-one error in cpuinfo In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the rmobile_cpuinfo array. At the end of the loop, i is equal to the array size, i.e. rmobile_cpuinfo[i] accesses one entry past the end of the array. The last entry in the array is a fallback value so the loop should count to ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the index of the fallback value if no match is found. Signed-off-by: Paul Barker Reviewed-by: Biju Das Reviewed-by: Marek Vasut --- arch/arm/mach-rmobile/cpu_info.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index 1d33e2aa9da..7651e43bd0f 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -86,7 +86,7 @@ static int rmobile_cpuinfo_idx(void) int i = 0; u32 cpu_type = rmobile_get_cpu_type(); - for (; i < ARRAY_SIZE(rmobile_cpuinfo); i++) + for (; i < ARRAY_SIZE(rmobile_cpuinfo) - 1; i++) if (rmobile_cpuinfo[i].cpu_type == cpu_type) break; From ff547a6bc2ddbdd9fceaf2fe7be8524fc0233d95 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 02:15:53 +0200 Subject: [PATCH 137/148] configs: sandbox64: Enable SF bootdev Align the sandbox64 defconfig with sandbox defconfig. Enable missing SPI NOT bootdev. This fixes ut_bootstd_bootdev_test_cmd_hunt test . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 69e5efe8748..55a2b9aa17b 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -165,6 +165,7 @@ CONFIG_I2C_EEPROM=y CONFIG_MMC_SANDBOX=y CONFIG_MTD=y CONFIG_SPI_FLASH_SANDBOX=y +CONFIG_BOOTDEV_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_GIGADEVICE=y From 49147a0b0d21e7ee902edfbb01aa61cf90c5946a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 03:17:54 +0200 Subject: [PATCH 138/148] configs: sandbox64: Increase console record size to 0x6000 Align the sandbox64 defconfig with sandbox defconfig. Increase the console record size. This fixes ut_bootstd_bootflow_cmd_scan_e . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 55a2b9aa17b..0a694a57a09 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -21,7 +21,7 @@ CONFIG_BOOTSTAGE_FDT=y CONFIG_BOOTSTAGE_STASH=y CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y -CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 +CONFIG_CONSOLE_RECORD_OUT_SIZE=0x6000 CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_CPU=y From 226ddc0dccdb19fc2f66a6e4bde10a421da9160f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 04:57:01 +0200 Subject: [PATCH 139/148] configs: sandbox64: Enable MC34708 driver Align the sandbox64 defconfig with sandbox defconfig. Enable missing MC34708 PMIC driver. This fixes ut_dm_dm_test_power_pmic_mc34708_get test . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 0a694a57a09..28badf60ce5 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -188,6 +188,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y +CONFIG_DM_PMIC_MC34708=y CONFIG_PMIC_QCOM=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y From 09c0b2e71243b4640d05670402ad3b8802ac15dd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 05:05:52 +0200 Subject: [PATCH 140/148] configs: sandbox64: Enable BUTTON_ADC driver Align the sandbox64 defconfig with sandbox defconfig. Enable missing BUTTON ADC driver. This fixes ut_dm_dm_test_button_keys_adc test . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 28badf60ce5..b15b2cf099f 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -124,6 +124,7 @@ CONFIG_SYS_ATA_REG_OFFSET=1 CONFIG_SYS_ATA_ALT_OFFSET=2 CONFIG_SYS_ATA_IDE0_OFFSET=0 CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y CONFIG_BUTTON_GPIO=y CONFIG_CLK=y CONFIG_CLK_K210=y From 2fff2881c89d2488564572d4bfb8651d47f8555e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 05:32:08 +0200 Subject: [PATCH 141/148] test: dm: pinmux: Handle %pa in pinctrl-single mux output The pinctrl-single driver uses %pa to print register value in its single_get_pin_muxing() output. Handle this properly in the test based on CONFIG_PHYS_64BIT . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- test/dm/pinmux.c | 92 +++++++++++++++++++++++++++--------------------- 1 file changed, 51 insertions(+), 41 deletions(-) diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c index 265df4ccb97..6880b2d2cd9 100644 --- a/test/dm/pinmux.c +++ b/test/dm/pinmux.c @@ -15,6 +15,16 @@ static char buf[64]; ut_asserteq_str(expected, (char *)&buf); \ } while (0) +#define test_muxing_regaddr(selector, regaddr, expected) do { \ + char estr[64] = { 0 }; \ + if (IS_ENABLED(CONFIG_PHYS_64BIT)) \ + snprintf(estr, sizeof(estr), "0x%016llx %s", (u64)regaddr, expected); \ + else \ + snprintf(estr, sizeof(estr), "0x%08x %s", (u32)regaddr, expected); \ + ut_assertok(pinctrl_get_pin_muxing(dev, selector, buf, sizeof(buf))); \ + ut_asserteq_str(estr, (char *)&buf); \ +} while (0) + #define test_name(selector, expected) do { \ ut_assertok(pinctrl_get_pin_name(dev, selector, buf, sizeof(buf))); \ ut_asserteq_str(expected, (char *)&buf); \ @@ -79,14 +89,14 @@ static int dm_test_pinctrl_single(struct unit_test_state *uts) test_name(0, "PIN0"); test_name(141, "PIN141"); test_name(142, "Error"); - test_muxing(0, "0x00000000 0x00000000 UNCLAIMED"); - test_muxing(18, "0x00000048 0x00000006 pinmux_pwm_pins"); - test_muxing(28, "0x00000070 0x00000030 pinmux_uart0_pins"); - test_muxing(29, "0x00000074 0x00000000 pinmux_uart0_pins"); - test_muxing(100, "0x00000190 0x0000000c pinmux_spi0_pins"); - test_muxing(101, "0x00000194 0x0000000c pinmux_spi0_pins"); - test_muxing(102, "0x00000198 0x00000023 pinmux_spi0_pins"); - test_muxing(103, "0x0000019c 0x0000000c pinmux_spi0_pins"); + test_muxing_regaddr(0, 0x0, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(18, 0x48, "0x00000006 pinmux_pwm_pins"); + test_muxing_regaddr(28, 0x70, "0x00000030 pinmux_uart0_pins"); + test_muxing_regaddr(29, 0x74, "0x00000000 pinmux_uart0_pins"); + test_muxing_regaddr(100, 0x190, "0x0000000c pinmux_spi0_pins"); + test_muxing_regaddr(101, 0x194, "0x0000000c pinmux_spi0_pins"); + test_muxing_regaddr(102, 0x198, "0x00000023 pinmux_spi0_pins"); + test_muxing_regaddr(103, 0x19c, "0x0000000c pinmux_spi0_pins"); ret = pinctrl_get_pin_muxing(dev, 142, buf, sizeof(buf)); ut_asserteq(-EINVAL, ret); ut_assertok(uclass_get_device_by_name(UCLASS_I2C, "i2c@0", &dev)); @@ -97,39 +107,39 @@ static int dm_test_pinctrl_single(struct unit_test_state *uts) test_name(0, "PIN0"); test_name(159, "PIN159"); test_name(160, "Error"); - test_muxing(0, "0x00000000 0x00000000 UNCLAIMED"); - test_muxing(34, "0x00000010 0x00000200 pinmux_i2c0_pins"); - test_muxing(35, "0x00000010 0x00002000 pinmux_i2c0_pins"); - test_muxing(130, "0x00000040 0x00000200 pinmux_lcd_pins"); - test_muxing(131, "0x00000040 0x00002000 pinmux_lcd_pins"); - test_muxing(132, "0x00000040 0x00020000 pinmux_lcd_pins"); - test_muxing(133, "0x00000040 0x00200000 pinmux_lcd_pins"); - test_muxing(134, "0x00000040 0x02000000 pinmux_lcd_pins"); - test_muxing(135, "0x00000040 0x20000000 pinmux_lcd_pins"); - test_muxing(136, "0x00000044 0x00000002 pinmux_lcd_pins"); - test_muxing(137, "0x00000044 0x00000020 pinmux_lcd_pins"); - test_muxing(138, "0x00000044 0x00000200 pinmux_lcd_pins"); - test_muxing(139, "0x00000044 0x00002000 pinmux_lcd_pins"); - test_muxing(140, "0x00000044 0x00020000 pinmux_lcd_pins"); - test_muxing(141, "0x00000044 0x00200000 pinmux_lcd_pins"); - test_muxing(142, "0x00000044 0x02000000 pinmux_lcd_pins"); - test_muxing(143, "0x00000044 0x20000000 pinmux_lcd_pins"); - test_muxing(144, "0x00000048 0x00000002 pinmux_lcd_pins"); - test_muxing(145, "0x00000048 0x00000020 pinmux_lcd_pins"); - test_muxing(146, "0x00000048 0x00000000 UNCLAIMED"); - test_muxing(147, "0x00000048 0x00000000 UNCLAIMED"); - test_muxing(148, "0x00000048 0x00000000 UNCLAIMED"); - test_muxing(149, "0x00000048 0x00000000 UNCLAIMED"); - test_muxing(150, "0x00000048 0x02000000 pinmux_lcd_pins"); - test_muxing(151, "0x00000048 0x00000000 UNCLAIMED"); - test_muxing(152, "0x0000004c 0x00000002 pinmux_lcd_pins"); - test_muxing(153, "0x0000004c 0x00000020 pinmux_lcd_pins"); - test_muxing(154, "0x0000004c 0x00000000 UNCLAIMED"); - test_muxing(155, "0x0000004c 0x00000000 UNCLAIMED"); - test_muxing(156, "0x0000004c 0x00000000 UNCLAIMED"); - test_muxing(157, "0x0000004c 0x00000000 UNCLAIMED"); - test_muxing(158, "0x0000004c 0x02000000 pinmux_lcd_pins"); - test_muxing(159, "0x0000004c 0x00000000 UNCLAIMED"); + test_muxing_regaddr(0, 0x0, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(34, 0x10, "0x00000200 pinmux_i2c0_pins"); + test_muxing_regaddr(35, 0x10, "0x00002000 pinmux_i2c0_pins"); + test_muxing_regaddr(130, 0x40, "0x00000200 pinmux_lcd_pins"); + test_muxing_regaddr(131, 0x40, "0x00002000 pinmux_lcd_pins"); + test_muxing_regaddr(132, 0x40, "0x00020000 pinmux_lcd_pins"); + test_muxing_regaddr(133, 0x40, "0x00200000 pinmux_lcd_pins"); + test_muxing_regaddr(134, 0x40, "0x02000000 pinmux_lcd_pins"); + test_muxing_regaddr(135, 0x40, "0x20000000 pinmux_lcd_pins"); + test_muxing_regaddr(136, 0x44, "0x00000002 pinmux_lcd_pins"); + test_muxing_regaddr(137, 0x44, "0x00000020 pinmux_lcd_pins"); + test_muxing_regaddr(138, 0x44, "0x00000200 pinmux_lcd_pins"); + test_muxing_regaddr(139, 0x44, "0x00002000 pinmux_lcd_pins"); + test_muxing_regaddr(140, 0x44, "0x00020000 pinmux_lcd_pins"); + test_muxing_regaddr(141, 0x44, "0x00200000 pinmux_lcd_pins"); + test_muxing_regaddr(142, 0x44, "0x02000000 pinmux_lcd_pins"); + test_muxing_regaddr(143, 0x44, "0x20000000 pinmux_lcd_pins"); + test_muxing_regaddr(144, 0x48, "0x00000002 pinmux_lcd_pins"); + test_muxing_regaddr(145, 0x48, "0x00000020 pinmux_lcd_pins"); + test_muxing_regaddr(146, 0x48, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(147, 0x48, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(148, 0x48, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(149, 0x48, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(150, 0x48, "0x02000000 pinmux_lcd_pins"); + test_muxing_regaddr(151, 0x48, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(152, 0x4c, "0x00000002 pinmux_lcd_pins"); + test_muxing_regaddr(153, 0x4c, "0x00000020 pinmux_lcd_pins"); + test_muxing_regaddr(154, 0x4c, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(155, 0x4c, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(156, 0x4c, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(157, 0x4c, "0x00000000 UNCLAIMED"); + test_muxing_regaddr(158, 0x4c, "0x02000000 pinmux_lcd_pins"); + test_muxing_regaddr(159, 0x4c, "0x00000000 UNCLAIMED"); ret = pinctrl_get_pin_muxing(dev, 160, buf, sizeof(buf)); ut_asserteq(-EINVAL, ret); return 0; From d54c44b474874f1d91b77a76dfad77e7c771d390 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 05:32:09 +0200 Subject: [PATCH 142/148] configs: sandbox64: Enable PINCTRL_SINGLE driver Align the sandbox64 defconfig with sandbox defconfig. Enable missing PINCTRL single driver. This fixes ut_dm_dm_test_pinctrl_single test . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index b15b2cf099f..4612d4fc4d7 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -183,6 +183,7 @@ CONFIG_PHY_SANDBOX=y CONFIG_PINCTRL=y CONFIG_PINCONF=y CONFIG_PINCTRL_SANDBOX=y +CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_SANDBOX_POWER_DOMAIN=y CONFIG_DM_PMIC=y From 539485fd9ebd3611fcab2ef4cc50c5cdf77f87ae Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 07:15:05 +0200 Subject: [PATCH 143/148] configs: sandbox64: Enable video 16bpp and 24bpp support Align the sandbox64 defconfig with sandbox defconfig. Enable missing 16bpp and 24bpp video support. This fixes ut_dm_dm_test_video_bmp16 and ut_dm_dm_test_video_bmp24 tests . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 4612d4fc4d7..7d00282f2c8 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -244,6 +244,8 @@ CONFIG_I2C_EDID=y CONFIG_VIDEO_SANDBOX_SDL=y CONFIG_OSD=y CONFIG_SANDBOX_OSD=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y # CONFIG_WATCHDOG_AUTOSTART is not set CONFIG_WDT=y CONFIG_WDT_GPIO=y From 5d5d7e225d25de222bad16bc4c3a8a1618c934f8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 07:15:06 +0200 Subject: [PATCH 144/148] configs: sandbox64: Enable video 12x22 font support Align the sandbox64 defconfig with sandbox defconfig. Enable missing 12x22 font support. This fixes ut_dm_dm_test_video_text_12x22 test . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 7d00282f2c8..1db69ec65c7 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -237,6 +237,7 @@ CONFIG_USB=y CONFIG_USB_EMUL=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO=y +CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y From eaa5b5d7d2c7df82079848f39b8cccd64310e9f2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 21:50:29 +0200 Subject: [PATCH 145/148] configs: sandbox64: Enable clock CCF driver Align the sandbox64 defconfig with sandbox defconfig. Enable missing CCF and Sandbox CCF drivers. This fixes ut_dm_dm_test_clk_ccf test . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 1db69ec65c7..933c9e95810 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -127,8 +127,10 @@ CONFIG_BUTTON=y CONFIG_BUTTON_ADC=y CONFIG_BUTTON_GPIO=y CONFIG_CLK=y +CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_K210=y CONFIG_CLK_K210_SET_RATE=y +CONFIG_SANDBOX_CLK_CCF=y CONFIG_CPU=y CONFIG_DM_DEMO=y CONFIG_DM_DEMO_SIMPLE=y From ddfda552e7f700d748aa46ab91ec6c661b018710 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 21:51:50 +0200 Subject: [PATCH 146/148] configs: sandbox64: Enable PCI register multi-entry support Align the sandbox64 defconfig with sandbox defconfig. Enable missing PCI register multi-entry support. This fixes ut_dm_dm_test_pci_bus_to_phys test . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 933c9e95810..14c9d1b04cb 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -179,6 +179,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_NVMXIP_QSPI=y CONFIG_NVME_PCI=y +CONFIG_PCI_REGION_MULTI_ENTRY=y CONFIG_PCI_SANDBOX=y CONFIG_PHY=y CONFIG_PHY_SANDBOX=y From 25a9be71ec1ca779aac8bcb1d8a363725ff0ac7f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 13 Aug 2023 21:52:19 +0200 Subject: [PATCH 147/148] test: cpu: Handle both 32bit and 64bit CPUs Handle both 32bit and 64bit systems, i.e. sandbox and sandbox64 the same way drivers/cpu/cpu_sandbox.c does, that is in case CONFIG_PHYS_64BIT is enabled, assume 64bit address width, else assume 32bit address width. This fixes ut_dm_dm_test_cpu test failure on sandbox64. Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- test/dm/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/dm/cpu.c b/test/dm/cpu.c index d7e596ee396..5734cd0a92d 100644 --- a/test/dm/cpu.c +++ b/test/dm/cpu.c @@ -37,7 +37,7 @@ static int dm_test_cpu(struct unit_test_state *uts) ut_assertok(cpu_get_info(dev, &info)); ut_asserteq(info.cpu_freq, 42 * 42 * 42 * 42 * 42); ut_asserteq(info.features, 0x42424242); - ut_asserteq(info.address_width, 32); + ut_asserteq(info.address_width, IS_ENABLED(CONFIG_PHYS_64BIT) ? 64 : 32); ut_asserteq(cpu_get_count(dev), 42); From 976fb2ffa3875a7bed9866bf5cf939a81c423ef8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 21 Aug 2023 16:19:59 -0400 Subject: [PATCH 148/148] Prepare v2023.10-rc3 Signed-off-by: Tom Rini --- Makefile | 2 +- doc/develop/release_cycle.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 3954d86a26e..9b90204bfe6 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2023 PATCHLEVEL = 10 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc3 NAME = # *DOCUMENTATION* diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 752e1304d37..50d33df4211 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -68,7 +68,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2023.10-rc2 was released on Mon 07 August 2023. -.. * U-Boot v2023.10-rc3 was released on Mon 21 August 2023. +* U-Boot v2023.10-rc3 was released on Mon 21 August 2023. .. * U-Boot v2023.10-rc4 was released on Mon 04 September 2023.