arm: xea: Add support for reading SoM (CPU) board HW revision

The XEA board now has several HW revisions for SoM boards.
This patch provides support for reading this revision ID values in early
u-boot proper as production devices boot via falcon boot with correct DTB
flashed at production (so there is no need to alter SPL).

Additionally, the maximal SPL size (~55KiB) constraint is not allowing
having even simplified FIT support in it.

As a result it was necessary to handle reading GPIOs values solely in
u-boot proper as one configuration (i.e. 'single binary' -
imx28_xea_sb_defconfig) is not using SPL framework.

Moreover, the 'board_som_rev' environment variable will be used to point
correct configuration from the Linux FIT file.

Additionally, as now XEA has its second HW revision - this information is
printed when u-boot proper starts.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
Lukasz Majewski 2024-03-29 12:18:08 +01:00 committed by Fabio Estevam
parent 3603e64003
commit 7e1b8d8f1e
4 changed files with 62 additions and 0 deletions

View file

@ -231,6 +231,17 @@ const iomux_cfg_t iomux_setup[] = {
/* TIVA boot control */
MX28_PAD_GPMI_RDY3__GPIO_0_23 | MUX_CONFIG_BOOT, /* TIVA0 */
MX28_PAD_GPMI_WRN__GPIO_0_25 | MUX_CONFIG_BOOT, /* TIVA1 */
/* HW revision ID Base Board */
MX28_PAD_LCD_D12__GPIO_1_12,
MX28_PAD_LCD_D13__GPIO_1_13,
MX28_PAD_LCD_D14__GPIO_1_14,
/* HW revision ID (SoM) */
MX28_PAD_LCD_D15__GPIO_1_15,
MX28_PAD_LCD_D16__GPIO_1_16,
MX28_PAD_LCD_D17__GPIO_1_17,
MX28_PAD_LCD_D18__GPIO_1_18,
};
u32 mxs_dram_vals[] = {

View file

@ -216,6 +216,34 @@ int spl_start_uboot(void)
return !boot_tiva0 || !boot_tiva1;
}
#else
/*
* Reading the HW ID number for XEA SoM module
*
* GPIOs from Port 1 (GPIO1_15, GPIO1_16, GPIO1_17 and GPIO1_18)
* are used to store HW revision information.
* Reading of GPIOs values is performed before the Device Model is
* bring up as the proper DTB needs to be chosen first.
*
* Moreover, this approach is required as "single binary" configuration
* of U-Boot (imx28_xea_sb_defconfig) is NOT using SPL framework, so
* only minimal subset of functionality is provided when ID is read.
*
* Hence, the direct registers' access.
*/
#define XEA_SOM_HW_ID_GPIO_PORT (MXS_PINCTRL_BASE + (0x0900 + ((1) * 0x10)))
#define XEA_SOM_REV_MASK GENMASK(18, 15)
#define XEA_SOM_REV_SHIFT 15
static u8 get_som_rev(void)
{
struct mxs_register_32 *reg =
(struct mxs_register_32 *)XEA_SOM_HW_ID_GPIO_PORT;
u32 tmp = ~readl(&reg->reg);
u8 id = (tmp & XEA_SOM_REV_MASK) >> XEA_SOM_REV_SHIFT;
return id;
}
int board_early_init_f(void)
{
@ -253,6 +281,27 @@ int board_init(void)
return 0;
}
#if defined(CONFIG_BOARD_LATE_INIT)
int board_late_init(void)
{
int ret = env_set_ulong("board_som_rev", get_som_rev());
if (ret)
printf("Cannot set XEA's SoM revision env variable!\n");
return 0;
}
#endif
#if defined(CONFIG_DISPLAY_BOARDINFO)
int checkboard(void)
{
printf("Board: LWE XEA SoM HW rev %d\n", get_som_rev());
return 0;
}
#endif
int dram_init(void)
{
return mxs_dram_init();

View file

@ -39,6 +39,7 @@ CONFIG_BOOTCOMMAND="run ${bootpri} ; run ${bootsec}"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run prebootcmd"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set

View file

@ -23,6 +23,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run prebootcmd"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y