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spi, mpc8xx: Add support for chipselect via GPIO and fixups
This patch fixes the mpc8xx SPI driver: - A stub callbacks for mode and speed, - Use chip selects defined as GPIOs, - Write proper value to disable relocation, other it fails on mpc885, - Don't modify ports setup, ports can be different from one board to another and are already set by board_early_init_r(). This patch was originally written by Charles Frey who's email address is not valid anymore as he left the company. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
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0223939498
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1 changed files with 59 additions and 37 deletions
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@ -24,12 +24,29 @@
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#include <asm/cpm_8xx.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#define CPM_SPI_BASE_RX CPM_SPI_BASE
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#define CPM_SPI_BASE_TX (CPM_SPI_BASE + sizeof(cbd_t))
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#define MAX_BUFFER 0x104
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struct mpc8xx_priv {
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spi_t __iomem *spi;
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struct gpio_desc gpios[16];
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int max_cs;
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};
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static int mpc8xx_spi_set_mode(struct udevice *dev, uint mod)
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{
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return 0;
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}
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static int mpc8xx_spi_set_speed(struct udevice *dev, uint speed)
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{
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return 0;
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}
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static int mpc8xx_spi_probe(struct udevice *dev)
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{
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immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
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@ -38,42 +55,9 @@ static int mpc8xx_spi_probe(struct udevice *dev)
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cbd_t __iomem *tbdf, *rbdf;
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/* Disable relocation */
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out_be16(&spi->spi_rpbase, 0);
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out_be16(&spi->spi_rpbase, 0x1d80);
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/* 1 */
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/* ------------------------------------------------
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* Initialize Port B SPI pins -> page 34-8 MPC860UM
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* (we are only in Master Mode !)
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* ------------------------------------------------ */
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/* --------------------------------------------
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* GPIO or per. Function
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* PBPAR[28] = 1 [0x00000008] -> PERI: (SPIMISO)
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* PBPAR[29] = 1 [0x00000004] -> PERI: (SPIMOSI)
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* PBPAR[30] = 1 [0x00000002] -> PERI: (SPICLK)
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* PBPAR[31] = 0 [0x00000001] -> GPIO: (CS for PCUE/CCM-EEPROM)
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* -------------------------------------------- */
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clrsetbits_be32(&cp->cp_pbpar, 0x00000001, 0x0000000E); /* set bits */
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/* ----------------------------------------------
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* In/Out or per. Function 0/1
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* PBDIR[28] = 1 [0x00000008] -> PERI1: SPIMISO
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* PBDIR[29] = 1 [0x00000004] -> PERI1: SPIMOSI
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* PBDIR[30] = 1 [0x00000002] -> PERI1: SPICLK
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* PBDIR[31] = 1 [0x00000001] -> GPIO OUT: CS for PCUE/CCM-EEPROM
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* ---------------------------------------------- */
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setbits_be32(&cp->cp_pbdir, 0x0000000F);
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/* ----------------------------------------------
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* open drain or active output
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* PBODR[28] = 1 [0x00000008] -> open drain: SPIMISO
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* PBODR[29] = 0 [0x00000004] -> active output SPIMOSI
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* PBODR[30] = 0 [0x00000002] -> active output: SPICLK
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* PBODR[31] = 0 [0x00000001] -> active output GPIO OUT: CS for PCUE/CCM
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* ---------------------------------------------- */
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clrsetbits_be16(&cp->cp_pbodr, 0x00000007, 0x00000008);
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/* Initialize the parameter ram.
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* We need to make sure many things are initialized to zero
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*/
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@ -143,6 +127,22 @@ static int mpc8xx_spi_probe(struct udevice *dev)
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return 0;
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}
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static void mpc8xx_spi_cs_activate(struct udevice *dev)
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{
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struct mpc8xx_priv *priv = dev_get_priv(dev->parent);
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struct dm_spi_slave_plat *platdata = dev_get_parent_plat(dev);
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dm_gpio_set_value(&priv->gpios[platdata->cs], 1);
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}
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static void mpc8xx_spi_cs_deactivate(struct udevice *dev)
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{
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struct mpc8xx_priv *priv = dev_get_priv(dev->parent);
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struct dm_spi_slave_plat *platdata = dev_get_parent_plat(dev);
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dm_gpio_set_value(&priv->gpios[platdata->cs], 0);
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}
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static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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{
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@ -159,7 +159,8 @@ static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
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rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX];
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/* Set CS for device */
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clrbits_be32(&cp->cp_pbdat, 0x0001);
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if (flags & SPI_XFER_BEGIN)
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mpc8xx_spi_cs_activate(dev);
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/* Setting tx bd status and data length */
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out_be32(&tbdf->cbd_bufaddr, (ulong)dout);
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@ -186,21 +187,40 @@ static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
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for (tm = 0; tm < 1000; ++tm) {
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if (in_8(&cp->cp_spie) & SPI_TXB) /* Tx Buffer Empty */
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break;
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if ((in_be16(&tbdf->cbd_sc) & BD_SC_READY) == 0)
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break;
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udelay(1000);
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}
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if (tm >= 1000)
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printf("*** spi_xfer: Time out while xferring to/from SPI!\n");
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/* Clear CS for device */
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setbits_be32(&cp->cp_pbdat, 0x0001);
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if (flags & SPI_XFER_END)
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mpc8xx_spi_cs_deactivate(dev);
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return count;
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return 0;
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}
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static int mpc8xx_spi_ofdata_to_platdata(struct udevice *dev)
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{
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struct mpc8xx_priv *priv = dev_get_priv(dev);
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int ret;
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ret = gpio_request_list_by_name(dev, "gpios", priv->gpios,
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ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT);
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if (ret < 0)
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return ret;
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priv->max_cs = ret;
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return 0;
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}
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static const struct dm_spi_ops mpc8xx_spi_ops = {
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.xfer = mpc8xx_spi_xfer,
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.set_speed = mpc8xx_spi_set_speed,
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.set_mode = mpc8xx_spi_set_mode,
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};
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static const struct udevice_id mpc8xx_spi_ids[] = {
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@ -212,6 +232,8 @@ U_BOOT_DRIVER(mpc8xx_spi) = {
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.name = "mpc8xx_spi",
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.id = UCLASS_SPI,
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.of_match = mpc8xx_spi_ids,
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.of_to_plat = mpc8xx_spi_ofdata_to_platdata,
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.ops = &mpc8xx_spi_ops,
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.probe = mpc8xx_spi_probe,
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.priv_auto = sizeof(struct mpc8xx_priv),
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};
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