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powerpc/mpc8xxx: Add fine timing support for DDR3

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When the DDR3 speed goes higher, we need to utilize fine offset
from SPD.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
York Sun 2012-08-17 08:22:37 +00:00 • committed by Andy Fleming
parent 744713a6a3
commit 73b5396b25
4 changed files with 40 additions and 11 deletions
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7
include/ddr_spd.h
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@ -221,7 +221,12 @@ typedef struct ddr3_spd_eeprom_s {
unsigned char therm_ref_opt; /* 31 SDRAM Thermal and Refresh Opts */
unsigned char therm_sensor; /* 32 Module Thermal Sensor */
unsigned char device_type; /* 33 SDRAM device type */
unsigned char res_34_59[26]; /* 34-59 Reserved, General Section */
int8_t fine_tCK_min; /* 34 Fine offset for tCKmin */
int8_t fine_tAA_min; /* 35 Fine offset for tAAmin */
int8_t fine_tRCD_min; /* 36 Fine offset for tRCDmin */
int8_t fine_tRP_min; /* 37 Fine offset for tRPmin */
int8_t fine_tRC_min; /* 38 Fine offset for tRCmin */
unsigned char res_39_59[21]; /* 39-59 Reserved, General Section */
/* Module-Specific Section: Bytes 60-116 */
union {