Djam/u-boot
1
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2025-04-20 20:04:46 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

rockchip: spl: Enable caches to speed up checksum validation

Browse source 
FIT checksum validation is very slow in SPL due to D-cache not being
enabled.

Enable caches in SPL on ARM64 SoCs to speed up FIT checksum validation,
from seconds to milliseconds.

This change enables caches in SPL on all Rockchip ARM64 boards, the
Kconfig options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be used to
disable caches for a specific board or SoC if needed.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman 2024-02-17 12:34:04 +00:00 • committed by Kever Yang
parent 3e15dee38d
commit 6d8cdfd153
1 changed files with 15 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
arch/arm/mach-rockchip/spl.c
View file

@ -3,7 +3,7 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
#include <common.h>
#include <cpu_func.h>
#include <debug_uart.h>
#include <dm.h>
#include <hang.h>
@ -136,6 +136,20 @@ void board_init_f(ulong dummy)
}
gd->ram_top = gd->ram_base + get_effective_memsize();
gd->ram_top = board_get_usable_ram_top(gd->ram_size);
if (IS_ENABLED(CONFIG_ARM64) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) {
gd->relocaddr = gd->ram_top;
arch_reserve_mmu();
enable_caches();
}
#endif
preloader_console_init();
}
void spl_board_prepare_for_boot(void)
{
if (!IS_ENABLED(CONFIG_ARM64) || CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
return;
cleanup_before_linux();
}