From a2a14854f2fcefe91f839c00c310e19be5aeead6 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 26 Apr 2021 22:04:11 +0200 Subject: [PATCH 001/156] pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.12 Synchronize R-Car Gen2/Gen3 pinctrl tables with Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . This is a rather large commit, since the macros in sh-pfc.h also got updated, so all the PFC tables must be updated in lockstep. Signed-off-by: Marek Vasut --- drivers/pinctrl/renesas/pfc-r8a7790.c | 1019 +++++++++++++++--------- drivers/pinctrl/renesas/pfc-r8a7791.c | 20 +- drivers/pinctrl/renesas/pfc-r8a7792.c | 2 +- drivers/pinctrl/renesas/pfc-r8a7794.c | 2 +- drivers/pinctrl/renesas/pfc-r8a7795.c | 467 ++++++----- drivers/pinctrl/renesas/pfc-r8a7796.c | 492 +++++++----- drivers/pinctrl/renesas/pfc-r8a77965.c | 446 ++++++----- drivers/pinctrl/renesas/pfc-r8a77970.c | 104 ++- drivers/pinctrl/renesas/pfc-r8a77980.c | 80 +- drivers/pinctrl/renesas/pfc-r8a77990.c | 183 ++--- drivers/pinctrl/renesas/pfc-r8a77995.c | 4 +- drivers/pinctrl/renesas/sh_pfc.h | 130 ++- 12 files changed, 1834 insertions(+), 1115 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c index 5e1502ed969..1793000ab5c 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7790.c +++ b/drivers/pinctrl/renesas/pfc-r8a7790.c @@ -20,7 +20,7 @@ * All pins assigned to GPIO bank 3 can be used for SD interfaces in * which case they support both 3.3V and 1.8V signalling. */ -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_32(0, fn, sfx), \ PORT_GP_30(1, fn, sfx), \ PORT_GP_30(2, fn, sfx), \ @@ -28,6 +28,12 @@ PORT_GP_32(4, fn, sfx), \ PORT_GP_32(5, fn, sfx) +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP(IIC0_SDA, "AF15", fn), \ + PIN_NOGP(IIC0_SCL, "AG15", fn), \ + PIN_NOGP(IIC3_SDA, "AH15", fn), \ + PIN_NOGP(IIC3_SCL, "AJ15", fn) + enum { PINMUX_RESERVED = 0, @@ -1727,19 +1733,17 @@ static const u16 pinmux_data[] = { PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1), }; -/* R8A7790 has 6 banks with 32 GPIOs in each = 192 GPIOs */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 31 + (c) + 200) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) +/* + * Pins not associated with a GPIO port. + */ +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* Pins not associated with a GPIO port */ - SH_PFC_PIN_NAMED(ROW_GROUP_A('F'), 15, AF15), - SH_PFC_PIN_NAMED(ROW_GROUP_A('G'), 15, AG15), - SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15), - SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1867,6 +1871,86 @@ static const unsigned int avb_gmii_mux[] = { AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, AVB_COL_MARK, }; +/* - CAN0 ----------------------------------------------------------------- */ +static const unsigned int can0_data_pins[] = { + /* CAN0 RX */ + RCAR_GP_PIN(1, 17), + /* CAN0 TX */ + RCAR_GP_PIN(1, 19), +}; +static const unsigned int can0_data_mux[] = { + CAN0_RX_MARK, + CAN0_TX_MARK, +}; +static const unsigned int can0_data_b_pins[] = { + /* CAN0 RXB */ + RCAR_GP_PIN(4, 5), + /* CAN0 TXB */ + RCAR_GP_PIN(4, 4), +}; +static const unsigned int can0_data_b_mux[] = { + CAN0_RX_B_MARK, + CAN0_TX_B_MARK, +}; +static const unsigned int can0_data_c_pins[] = { + /* CAN0 RXC */ + RCAR_GP_PIN(4, 26), + /* CAN0 TXC */ + RCAR_GP_PIN(4, 23), +}; +static const unsigned int can0_data_c_mux[] = { + CAN0_RX_C_MARK, + CAN0_TX_C_MARK, +}; +static const unsigned int can0_data_d_pins[] = { + /* CAN0 RXD */ + RCAR_GP_PIN(4, 26), + /* CAN0 TXD */ + RCAR_GP_PIN(4, 18), +}; +static const unsigned int can0_data_d_mux[] = { + CAN0_RX_D_MARK, + CAN0_TX_D_MARK, +}; +/* - CAN1 ----------------------------------------------------------------- */ +static const unsigned int can1_data_pins[] = { + /* CAN1 RX */ + RCAR_GP_PIN(1, 22), + /* CAN1 TX */ + RCAR_GP_PIN(1, 18), +}; +static const unsigned int can1_data_mux[] = { + CAN1_RX_MARK, + CAN1_TX_MARK, +}; +static const unsigned int can1_data_b_pins[] = { + /* CAN1 RXB */ + RCAR_GP_PIN(4, 7), + /* CAN1 TXB */ + RCAR_GP_PIN(4, 6), +}; +static const unsigned int can1_data_b_mux[] = { + CAN1_RX_B_MARK, + CAN1_TX_B_MARK, +}; +/* - CAN Clock -------------------------------------------------------------- */ +static const unsigned int can_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(1, 21), +}; + +static const unsigned int can_clk_mux[] = { + CAN_CLK_MARK, +}; + +static const unsigned int can_clk_b_pins[] = { + /* CLK */ + RCAR_GP_PIN(4, 3), +}; + +static const unsigned int can_clk_b_mux[] = { + CAN_CLK_B_MARK, +}; /* - DU RGB ----------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -2135,7 +2219,7 @@ static const unsigned int hscif1_ctrl_b_mux[] = { /* - I2C0 ------------------------------------------------------------------- */ static const unsigned int i2c0_pins[] = { /* SCL, SDA */ - PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15), + PIN_IIC0_SCL, PIN_IIC0_SDA, }; static const unsigned int i2c0_mux[] = { I2C0_SCL_MARK, I2C0_SDA_MARK, @@ -2201,7 +2285,7 @@ static const unsigned int i2c2_e_mux[] = { /* - I2C3 ------------------------------------------------------------------- */ static const unsigned int i2c3_pins[] = { /* SCL, SDA */ - PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15), + PIN_IIC3_SCL, PIN_IIC3_SDA, }; static const unsigned int i2c3_mux[] = { I2C3_SCL_MARK, I2C3_SDA_MARK, @@ -2209,7 +2293,7 @@ static const unsigned int i2c3_mux[] = { /* - IIC0 (I2C4) ------------------------------------------------------------ */ static const unsigned int iic0_pins[] = { /* SCL, SDA */ - PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15), + PIN_IIC0_SCL, PIN_IIC0_SDA, }; static const unsigned int iic0_mux[] = { IIC0_SCL_MARK, IIC0_SDA_MARK, @@ -2274,8 +2358,8 @@ static const unsigned int iic2_e_mux[] = { }; /* - IIC3 (I2C7) ------------------------------------------------------------ */ static const unsigned int iic3_pins[] = { -/* SCL, SDA */ - PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15), + /* SCL, SDA */ + PIN_IIC3_SCL, PIN_IIC3_SDA, }; static const unsigned int iic3_mux[] = { IIC3_SCL_MARK, IIC3_SDA_MARK, @@ -2309,6 +2393,8 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_R8A7790 /* - MLB+ ------------------------------------------------------------------- */ static const unsigned int mlb_3pin_pins[] = { RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2), @@ -2316,6 +2402,8 @@ static const unsigned int mlb_3pin_pins[] = { static const unsigned int mlb_3pin_mux[] = { MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ + /* - MMCIF0 ----------------------------------------------------------------- */ static const unsigned int mmc0_data1_pins[] = { /* D[0] */ @@ -3607,6 +3695,13 @@ static const unsigned int usb1_pins[] = { static const unsigned int usb1_mux[] = { USB1_PWEN_MARK, USB1_OVC_MARK, }; +static const unsigned int usb1_pwen_pins[] = { + /* PWEN */ + RCAR_GP_PIN(5, 20), +}; +static const unsigned int usb1_pwen_mux[] = { + USB1_PWEN_MARK, +}; /* - USB2 ------------------------------------------------------------------- */ static const unsigned int usb2_pins[] = { /* PWEN, OVC */ @@ -3775,6 +3870,72 @@ static const unsigned int vin1_data18_mux[] = { VI1_R4_MARK, VI1_R5_MARK, VI1_R6_MARK, VI1_R7_MARK, }; +static const union vin_data vin1_data_b_pins = { + .data24 = { + /* B */ + RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + /* G */ + RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), + RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), + RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), + /* R */ + RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), + RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), + RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), + }, +}; +static const union vin_data vin1_data_b_mux = { + .data24 = { + /* B */ + VI1_DATA0_VI1_B0_B_MARK, VI1_DATA1_VI1_B1_B_MARK, + VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK, + VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK, + VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK, + /* G */ + VI1_G0_B_MARK, VI1_G1_B_MARK, + VI1_G2_B_MARK, VI1_G3_B_MARK, + VI1_G4_B_MARK, VI1_G5_B_MARK, + VI1_G6_B_MARK, VI1_G7_B_MARK, + /* R */ + VI1_R0_B_MARK, VI1_R1_B_MARK, + VI1_R2_B_MARK, VI1_R3_B_MARK, + VI1_R4_B_MARK, VI1_R5_B_MARK, + VI1_R6_B_MARK, VI1_R7_B_MARK, + }, +}; +static const unsigned int vin1_data18_b_pins[] = { + /* B */ + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + /* G */ + RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), + RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), + /* R */ + RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), + RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), +}; +static const unsigned int vin1_data18_b_mux[] = { + /* B */ + VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK, + VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK, + VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK, + /* G */ + VI1_G2_B_MARK, VI1_G3_B_MARK, + VI1_G4_B_MARK, VI1_G5_B_MARK, + VI1_G6_B_MARK, VI1_G7_B_MARK, + /* R */ + VI1_R2_B_MARK, VI1_R3_B_MARK, + VI1_R4_B_MARK, VI1_R5_B_MARK, + VI1_R6_B_MARK, VI1_R7_B_MARK, +}; static const unsigned int vin1_sync_pins[] = { RCAR_GP_PIN(1, 24), /* HSYNC */ RCAR_GP_PIN(1, 25), /* VSYNC */ @@ -3783,24 +3944,50 @@ static const unsigned int vin1_sync_mux[] = { VI1_HSYNC_N_MARK, VI1_VSYNC_N_MARK, }; +static const unsigned int vin1_sync_b_pins[] = { + RCAR_GP_PIN(1, 24), /* HSYNC */ + RCAR_GP_PIN(1, 25), /* VSYNC */ +}; +static const unsigned int vin1_sync_b_mux[] = { + VI1_HSYNC_N_B_MARK, + VI1_VSYNC_N_B_MARK, +}; static const unsigned int vin1_field_pins[] = { RCAR_GP_PIN(1, 13), }; static const unsigned int vin1_field_mux[] = { VI1_FIELD_MARK, }; +static const unsigned int vin1_field_b_pins[] = { + RCAR_GP_PIN(1, 13), +}; +static const unsigned int vin1_field_b_mux[] = { + VI1_FIELD_B_MARK, +}; static const unsigned int vin1_clkenb_pins[] = { RCAR_GP_PIN(1, 26), }; static const unsigned int vin1_clkenb_mux[] = { VI1_CLKENB_MARK, }; +static const unsigned int vin1_clkenb_b_pins[] = { + RCAR_GP_PIN(1, 26), +}; +static const unsigned int vin1_clkenb_b_mux[] = { + VI1_CLKENB_B_MARK, +}; static const unsigned int vin1_clk_pins[] = { RCAR_GP_PIN(2, 9), }; static const unsigned int vin1_clk_mux[] = { VI1_CLK_MARK, }; +static const unsigned int vin1_clk_b_pins[] = { + RCAR_GP_PIN(3, 15), +}; +static const unsigned int vin1_clk_b_mux[] = { + VI1_CLK_B_MARK, +}; /* - VIN2 ----------------------------------------------------------------- */ static const union vin_data vin2_data_pins = { .data24 = { @@ -3868,6 +4055,18 @@ static const unsigned int vin2_data18_mux[] = { VI2_R4_MARK, VI2_R5_MARK, VI2_R6_MARK, VI2_R7_MARK, }; +static const unsigned int vin2_g8_pins[] = { + RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), + RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10), + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), +}; +static const unsigned int vin2_g8_mux[] = { + VI2_G0_MARK, VI2_G1_MARK, + VI2_G2_MARK, VI2_G3_MARK, + VI2_G4_MARK, VI2_G5_MARK, + VI2_G6_MARK, VI2_G7_MARK, +}; static const unsigned int vin2_sync_pins[] = { RCAR_GP_PIN(1, 16), /* HSYNC */ RCAR_GP_PIN(1, 21), /* VSYNC */ @@ -3934,297 +4133,330 @@ static const unsigned int vin3_clk_mux[] = { VI3_CLK_MARK, }; -static const struct sh_pfc_pin_group pinmux_groups[] = { - SH_PFC_PIN_GROUP(audio_clk_a), - SH_PFC_PIN_GROUP(audio_clk_b), - SH_PFC_PIN_GROUP(audio_clk_c), - SH_PFC_PIN_GROUP(audio_clkout), - SH_PFC_PIN_GROUP(audio_clkout_b), - SH_PFC_PIN_GROUP(audio_clkout_c), - SH_PFC_PIN_GROUP(audio_clkout_d), - SH_PFC_PIN_GROUP(avb_link), - SH_PFC_PIN_GROUP(avb_magic), - SH_PFC_PIN_GROUP(avb_phy_int), - SH_PFC_PIN_GROUP(avb_mdio), - SH_PFC_PIN_GROUP(avb_mii), - SH_PFC_PIN_GROUP(avb_gmii), - SH_PFC_PIN_GROUP(du_rgb666), - SH_PFC_PIN_GROUP(du_rgb888), - SH_PFC_PIN_GROUP(du_clk_out_0), - SH_PFC_PIN_GROUP(du_clk_out_1), - SH_PFC_PIN_GROUP(du_sync_0), - SH_PFC_PIN_GROUP(du_sync_1), - SH_PFC_PIN_GROUP(du_cde), - SH_PFC_PIN_GROUP(du0_clk_in), - SH_PFC_PIN_GROUP(du1_clk_in), - SH_PFC_PIN_GROUP(du2_clk_in), - SH_PFC_PIN_GROUP(eth_link), - SH_PFC_PIN_GROUP(eth_magic), - SH_PFC_PIN_GROUP(eth_mdio), - SH_PFC_PIN_GROUP(eth_rmii), - SH_PFC_PIN_GROUP(hscif0_data), - SH_PFC_PIN_GROUP(hscif0_clk), - SH_PFC_PIN_GROUP(hscif0_ctrl), - SH_PFC_PIN_GROUP(hscif0_data_b), - SH_PFC_PIN_GROUP(hscif0_ctrl_b), - SH_PFC_PIN_GROUP(hscif0_data_c), - SH_PFC_PIN_GROUP(hscif0_ctrl_c), - SH_PFC_PIN_GROUP(hscif0_data_d), - SH_PFC_PIN_GROUP(hscif0_ctrl_d), - SH_PFC_PIN_GROUP(hscif0_data_e), - SH_PFC_PIN_GROUP(hscif0_ctrl_e), - SH_PFC_PIN_GROUP(hscif0_data_f), - SH_PFC_PIN_GROUP(hscif0_ctrl_f), - SH_PFC_PIN_GROUP(hscif1_data), - SH_PFC_PIN_GROUP(hscif1_clk), - SH_PFC_PIN_GROUP(hscif1_ctrl), - SH_PFC_PIN_GROUP(hscif1_data_b), - SH_PFC_PIN_GROUP(hscif1_clk_b), - SH_PFC_PIN_GROUP(hscif1_ctrl_b), - SH_PFC_PIN_GROUP(i2c0), - SH_PFC_PIN_GROUP(i2c1), - SH_PFC_PIN_GROUP(i2c1_b), - SH_PFC_PIN_GROUP(i2c1_c), - SH_PFC_PIN_GROUP(i2c2), - SH_PFC_PIN_GROUP(i2c2_b), - SH_PFC_PIN_GROUP(i2c2_c), - SH_PFC_PIN_GROUP(i2c2_d), - SH_PFC_PIN_GROUP(i2c2_e), - SH_PFC_PIN_GROUP(i2c3), - SH_PFC_PIN_GROUP(iic0), - SH_PFC_PIN_GROUP(iic1), - SH_PFC_PIN_GROUP(iic1_b), - SH_PFC_PIN_GROUP(iic1_c), - SH_PFC_PIN_GROUP(iic2), - SH_PFC_PIN_GROUP(iic2_b), - SH_PFC_PIN_GROUP(iic2_c), - SH_PFC_PIN_GROUP(iic2_d), - SH_PFC_PIN_GROUP(iic2_e), - SH_PFC_PIN_GROUP(iic3), - SH_PFC_PIN_GROUP(intc_irq0), - SH_PFC_PIN_GROUP(intc_irq1), - SH_PFC_PIN_GROUP(intc_irq2), - SH_PFC_PIN_GROUP(intc_irq3), - SH_PFC_PIN_GROUP(mlb_3pin), - SH_PFC_PIN_GROUP(mmc0_data1), - SH_PFC_PIN_GROUP(mmc0_data4), - SH_PFC_PIN_GROUP(mmc0_data8), - SH_PFC_PIN_GROUP(mmc0_ctrl), - SH_PFC_PIN_GROUP(mmc1_data1), - SH_PFC_PIN_GROUP(mmc1_data4), - SH_PFC_PIN_GROUP(mmc1_data8), - SH_PFC_PIN_GROUP(mmc1_ctrl), - SH_PFC_PIN_GROUP(msiof0_clk), - SH_PFC_PIN_GROUP(msiof0_sync), - SH_PFC_PIN_GROUP(msiof0_ss1), - SH_PFC_PIN_GROUP(msiof0_ss2), - SH_PFC_PIN_GROUP(msiof0_rx), - SH_PFC_PIN_GROUP(msiof0_tx), - SH_PFC_PIN_GROUP(msiof0_clk_b), - SH_PFC_PIN_GROUP(msiof0_ss1_b), - SH_PFC_PIN_GROUP(msiof0_ss2_b), - SH_PFC_PIN_GROUP(msiof0_rx_b), - SH_PFC_PIN_GROUP(msiof0_tx_b), - SH_PFC_PIN_GROUP(msiof1_clk), - SH_PFC_PIN_GROUP(msiof1_sync), - SH_PFC_PIN_GROUP(msiof1_ss1), - SH_PFC_PIN_GROUP(msiof1_ss2), - SH_PFC_PIN_GROUP(msiof1_rx), - SH_PFC_PIN_GROUP(msiof1_tx), - SH_PFC_PIN_GROUP(msiof1_clk_b), - SH_PFC_PIN_GROUP(msiof1_ss1_b), - SH_PFC_PIN_GROUP(msiof1_ss2_b), - SH_PFC_PIN_GROUP(msiof1_rx_b), - SH_PFC_PIN_GROUP(msiof1_tx_b), - SH_PFC_PIN_GROUP(msiof2_clk), - SH_PFC_PIN_GROUP(msiof2_sync), - SH_PFC_PIN_GROUP(msiof2_ss1), - SH_PFC_PIN_GROUP(msiof2_ss2), - SH_PFC_PIN_GROUP(msiof2_rx), - SH_PFC_PIN_GROUP(msiof2_tx), - SH_PFC_PIN_GROUP(msiof3_clk), - SH_PFC_PIN_GROUP(msiof3_sync), - SH_PFC_PIN_GROUP(msiof3_ss1), - SH_PFC_PIN_GROUP(msiof3_ss2), - SH_PFC_PIN_GROUP(msiof3_rx), - SH_PFC_PIN_GROUP(msiof3_tx), - SH_PFC_PIN_GROUP(msiof3_clk_b), - SH_PFC_PIN_GROUP(msiof3_sync_b), - SH_PFC_PIN_GROUP(msiof3_rx_b), - SH_PFC_PIN_GROUP(msiof3_tx_b), - SH_PFC_PIN_GROUP(pwm0), - SH_PFC_PIN_GROUP(pwm0_b), - SH_PFC_PIN_GROUP(pwm1), - SH_PFC_PIN_GROUP(pwm1_b), - SH_PFC_PIN_GROUP(pwm2), - SH_PFC_PIN_GROUP(pwm3), - SH_PFC_PIN_GROUP(pwm4), - SH_PFC_PIN_GROUP(pwm5), - SH_PFC_PIN_GROUP(pwm6), - SH_PFC_PIN_GROUP(qspi_ctrl), - SH_PFC_PIN_GROUP(qspi_data2), - SH_PFC_PIN_GROUP(qspi_data4), - SH_PFC_PIN_GROUP(scif0_data), - SH_PFC_PIN_GROUP(scif0_clk), - SH_PFC_PIN_GROUP(scif0_ctrl), - SH_PFC_PIN_GROUP(scif0_data_b), - SH_PFC_PIN_GROUP(scif1_data), - SH_PFC_PIN_GROUP(scif1_clk), - SH_PFC_PIN_GROUP(scif1_ctrl), - SH_PFC_PIN_GROUP(scif1_data_b), - SH_PFC_PIN_GROUP(scif1_data_c), - SH_PFC_PIN_GROUP(scif1_data_d), - SH_PFC_PIN_GROUP(scif1_clk_d), - SH_PFC_PIN_GROUP(scif1_data_e), - SH_PFC_PIN_GROUP(scif1_clk_e), - SH_PFC_PIN_GROUP(scif2_data), - SH_PFC_PIN_GROUP(scif2_clk), - SH_PFC_PIN_GROUP(scif2_data_b), - SH_PFC_PIN_GROUP(scifa0_data), - SH_PFC_PIN_GROUP(scifa0_clk), - SH_PFC_PIN_GROUP(scifa0_ctrl), - SH_PFC_PIN_GROUP(scifa0_data_b), - SH_PFC_PIN_GROUP(scifa0_clk_b), - SH_PFC_PIN_GROUP(scifa0_ctrl_b), - SH_PFC_PIN_GROUP(scifa1_data), - SH_PFC_PIN_GROUP(scifa1_clk), - SH_PFC_PIN_GROUP(scifa1_ctrl), - SH_PFC_PIN_GROUP(scifa1_data_b), - SH_PFC_PIN_GROUP(scifa1_clk_b), - SH_PFC_PIN_GROUP(scifa1_ctrl_b), - SH_PFC_PIN_GROUP(scifa1_data_c), - SH_PFC_PIN_GROUP(scifa1_clk_c), - SH_PFC_PIN_GROUP(scifa1_ctrl_c), - SH_PFC_PIN_GROUP(scifa1_data_d), - SH_PFC_PIN_GROUP(scifa1_clk_d), - SH_PFC_PIN_GROUP(scifa1_ctrl_d), - SH_PFC_PIN_GROUP(scifa2_data), - SH_PFC_PIN_GROUP(scifa2_clk), - SH_PFC_PIN_GROUP(scifa2_ctrl), - SH_PFC_PIN_GROUP(scifa2_data_b), - SH_PFC_PIN_GROUP(scifa2_data_c), - SH_PFC_PIN_GROUP(scifa2_clk_c), - SH_PFC_PIN_GROUP(scifb0_data), - SH_PFC_PIN_GROUP(scifb0_clk), - SH_PFC_PIN_GROUP(scifb0_ctrl), - SH_PFC_PIN_GROUP(scifb0_data_b), - SH_PFC_PIN_GROUP(scifb0_clk_b), - SH_PFC_PIN_GROUP(scifb0_ctrl_b), - SH_PFC_PIN_GROUP(scifb0_data_c), - SH_PFC_PIN_GROUP(scifb1_data), - SH_PFC_PIN_GROUP(scifb1_clk), - SH_PFC_PIN_GROUP(scifb1_ctrl), - SH_PFC_PIN_GROUP(scifb1_data_b), - SH_PFC_PIN_GROUP(scifb1_clk_b), - SH_PFC_PIN_GROUP(scifb1_ctrl_b), - SH_PFC_PIN_GROUP(scifb1_data_c), - SH_PFC_PIN_GROUP(scifb1_data_d), - SH_PFC_PIN_GROUP(scifb1_data_e), - SH_PFC_PIN_GROUP(scifb1_clk_e), - SH_PFC_PIN_GROUP(scifb1_data_f), - SH_PFC_PIN_GROUP(scifb1_data_g), - SH_PFC_PIN_GROUP(scifb1_clk_g), - SH_PFC_PIN_GROUP(scifb2_data), - SH_PFC_PIN_GROUP(scifb2_clk), - SH_PFC_PIN_GROUP(scifb2_ctrl), - SH_PFC_PIN_GROUP(scifb2_data_b), - SH_PFC_PIN_GROUP(scifb2_clk_b), - SH_PFC_PIN_GROUP(scifb2_ctrl_b), - SH_PFC_PIN_GROUP(scifb2_data_c), - SH_PFC_PIN_GROUP(scif_clk), - SH_PFC_PIN_GROUP(scif_clk_b), - SH_PFC_PIN_GROUP(sdhi0_data1), - SH_PFC_PIN_GROUP(sdhi0_data4), - SH_PFC_PIN_GROUP(sdhi0_ctrl), - SH_PFC_PIN_GROUP(sdhi0_cd), - SH_PFC_PIN_GROUP(sdhi0_wp), - SH_PFC_PIN_GROUP(sdhi1_data1), - SH_PFC_PIN_GROUP(sdhi1_data4), - SH_PFC_PIN_GROUP(sdhi1_ctrl), - SH_PFC_PIN_GROUP(sdhi1_cd), - SH_PFC_PIN_GROUP(sdhi1_wp), - SH_PFC_PIN_GROUP(sdhi2_data1), - SH_PFC_PIN_GROUP(sdhi2_data4), - SH_PFC_PIN_GROUP(sdhi2_ctrl), - SH_PFC_PIN_GROUP(sdhi2_cd), - SH_PFC_PIN_GROUP(sdhi2_wp), - SH_PFC_PIN_GROUP(sdhi3_data1), - SH_PFC_PIN_GROUP(sdhi3_data4), - SH_PFC_PIN_GROUP(sdhi3_ctrl), - SH_PFC_PIN_GROUP(sdhi3_cd), - SH_PFC_PIN_GROUP(sdhi3_wp), - SH_PFC_PIN_GROUP(ssi0_data), - SH_PFC_PIN_GROUP(ssi0129_ctrl), - SH_PFC_PIN_GROUP(ssi1_data), - SH_PFC_PIN_GROUP(ssi1_ctrl), - SH_PFC_PIN_GROUP(ssi2_data), - SH_PFC_PIN_GROUP(ssi2_ctrl), - SH_PFC_PIN_GROUP(ssi3_data), - SH_PFC_PIN_GROUP(ssi34_ctrl), - SH_PFC_PIN_GROUP(ssi4_data), - SH_PFC_PIN_GROUP(ssi4_ctrl), - SH_PFC_PIN_GROUP(ssi5), - SH_PFC_PIN_GROUP(ssi5_b), - SH_PFC_PIN_GROUP(ssi5_c), - SH_PFC_PIN_GROUP(ssi6), - SH_PFC_PIN_GROUP(ssi6_b), - SH_PFC_PIN_GROUP(ssi7_data), - SH_PFC_PIN_GROUP(ssi7_b_data), - SH_PFC_PIN_GROUP(ssi7_c_data), - SH_PFC_PIN_GROUP(ssi78_ctrl), - SH_PFC_PIN_GROUP(ssi78_b_ctrl), - SH_PFC_PIN_GROUP(ssi78_c_ctrl), - SH_PFC_PIN_GROUP(ssi8_data), - SH_PFC_PIN_GROUP(ssi8_b_data), - SH_PFC_PIN_GROUP(ssi8_c_data), - SH_PFC_PIN_GROUP(ssi9_data), - SH_PFC_PIN_GROUP(ssi9_ctrl), - SH_PFC_PIN_GROUP(tpu0_to0), - SH_PFC_PIN_GROUP(tpu0_to1), - SH_PFC_PIN_GROUP(tpu0_to2), - SH_PFC_PIN_GROUP(tpu0_to3), - SH_PFC_PIN_GROUP(usb0), - SH_PFC_PIN_GROUP(usb0_ovc_vbus), - SH_PFC_PIN_GROUP(usb1), - SH_PFC_PIN_GROUP(usb2), - VIN_DATA_PIN_GROUP(vin0_data, 24), - VIN_DATA_PIN_GROUP(vin0_data, 20), - SH_PFC_PIN_GROUP(vin0_data18), - VIN_DATA_PIN_GROUP(vin0_data, 16), - VIN_DATA_PIN_GROUP(vin0_data, 12), - VIN_DATA_PIN_GROUP(vin0_data, 10), - VIN_DATA_PIN_GROUP(vin0_data, 8), - VIN_DATA_PIN_GROUP(vin0_data, 4), - SH_PFC_PIN_GROUP(vin0_sync), - SH_PFC_PIN_GROUP(vin0_field), - SH_PFC_PIN_GROUP(vin0_clkenb), - SH_PFC_PIN_GROUP(vin0_clk), - VIN_DATA_PIN_GROUP(vin1_data, 24), - VIN_DATA_PIN_GROUP(vin1_data, 20), - SH_PFC_PIN_GROUP(vin1_data18), - VIN_DATA_PIN_GROUP(vin1_data, 16), - VIN_DATA_PIN_GROUP(vin1_data, 12), - VIN_DATA_PIN_GROUP(vin1_data, 10), - VIN_DATA_PIN_GROUP(vin1_data, 8), - VIN_DATA_PIN_GROUP(vin1_data, 4), - SH_PFC_PIN_GROUP(vin1_sync), - SH_PFC_PIN_GROUP(vin1_field), - SH_PFC_PIN_GROUP(vin1_clkenb), - SH_PFC_PIN_GROUP(vin1_clk), - VIN_DATA_PIN_GROUP(vin2_data, 24), - SH_PFC_PIN_GROUP(vin2_data18), - VIN_DATA_PIN_GROUP(vin2_data, 16), - VIN_DATA_PIN_GROUP(vin2_data, 8), - VIN_DATA_PIN_GROUP(vin2_data, 4), - SH_PFC_PIN_GROUP(vin2_sync), - SH_PFC_PIN_GROUP(vin2_field), - SH_PFC_PIN_GROUP(vin2_clkenb), - SH_PFC_PIN_GROUP(vin2_clk), - SH_PFC_PIN_GROUP(vin3_data8), - SH_PFC_PIN_GROUP(vin3_sync), - SH_PFC_PIN_GROUP(vin3_field), - SH_PFC_PIN_GROUP(vin3_clkenb), - SH_PFC_PIN_GROUP(vin3_clk), +static const struct { + struct sh_pfc_pin_group common[311]; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + struct sh_pfc_pin_group automotive[1]; +#endif +} pinmux_groups = { + .common = { + SH_PFC_PIN_GROUP(audio_clk_a), + SH_PFC_PIN_GROUP(audio_clk_b), + SH_PFC_PIN_GROUP(audio_clk_c), + SH_PFC_PIN_GROUP(audio_clkout), + SH_PFC_PIN_GROUP(audio_clkout_b), + SH_PFC_PIN_GROUP(audio_clkout_c), + SH_PFC_PIN_GROUP(audio_clkout_d), + SH_PFC_PIN_GROUP(avb_link), + SH_PFC_PIN_GROUP(avb_magic), + SH_PFC_PIN_GROUP(avb_phy_int), + SH_PFC_PIN_GROUP(avb_mdio), + SH_PFC_PIN_GROUP(avb_mii), + SH_PFC_PIN_GROUP(avb_gmii), + SH_PFC_PIN_GROUP(can0_data), + SH_PFC_PIN_GROUP(can0_data_b), + SH_PFC_PIN_GROUP(can0_data_c), + SH_PFC_PIN_GROUP(can0_data_d), + SH_PFC_PIN_GROUP(can1_data), + SH_PFC_PIN_GROUP(can1_data_b), + SH_PFC_PIN_GROUP(can_clk), + SH_PFC_PIN_GROUP(can_clk_b), + SH_PFC_PIN_GROUP(du_rgb666), + SH_PFC_PIN_GROUP(du_rgb888), + SH_PFC_PIN_GROUP(du_clk_out_0), + SH_PFC_PIN_GROUP(du_clk_out_1), + SH_PFC_PIN_GROUP(du_sync_0), + SH_PFC_PIN_GROUP(du_sync_1), + SH_PFC_PIN_GROUP(du_cde), + SH_PFC_PIN_GROUP(du0_clk_in), + SH_PFC_PIN_GROUP(du1_clk_in), + SH_PFC_PIN_GROUP(du2_clk_in), + SH_PFC_PIN_GROUP(eth_link), + SH_PFC_PIN_GROUP(eth_magic), + SH_PFC_PIN_GROUP(eth_mdio), + SH_PFC_PIN_GROUP(eth_rmii), + SH_PFC_PIN_GROUP(hscif0_data), + SH_PFC_PIN_GROUP(hscif0_clk), + SH_PFC_PIN_GROUP(hscif0_ctrl), + SH_PFC_PIN_GROUP(hscif0_data_b), + SH_PFC_PIN_GROUP(hscif0_ctrl_b), + SH_PFC_PIN_GROUP(hscif0_data_c), + SH_PFC_PIN_GROUP(hscif0_ctrl_c), + SH_PFC_PIN_GROUP(hscif0_data_d), + SH_PFC_PIN_GROUP(hscif0_ctrl_d), + SH_PFC_PIN_GROUP(hscif0_data_e), + SH_PFC_PIN_GROUP(hscif0_ctrl_e), + SH_PFC_PIN_GROUP(hscif0_data_f), + SH_PFC_PIN_GROUP(hscif0_ctrl_f), + SH_PFC_PIN_GROUP(hscif1_data), + SH_PFC_PIN_GROUP(hscif1_clk), + SH_PFC_PIN_GROUP(hscif1_ctrl), + SH_PFC_PIN_GROUP(hscif1_data_b), + SH_PFC_PIN_GROUP(hscif1_clk_b), + SH_PFC_PIN_GROUP(hscif1_ctrl_b), + SH_PFC_PIN_GROUP(i2c0), + SH_PFC_PIN_GROUP(i2c1), + SH_PFC_PIN_GROUP(i2c1_b), + SH_PFC_PIN_GROUP(i2c1_c), + SH_PFC_PIN_GROUP(i2c2), + SH_PFC_PIN_GROUP(i2c2_b), + SH_PFC_PIN_GROUP(i2c2_c), + SH_PFC_PIN_GROUP(i2c2_d), + SH_PFC_PIN_GROUP(i2c2_e), + SH_PFC_PIN_GROUP(i2c3), + SH_PFC_PIN_GROUP(iic0), + SH_PFC_PIN_GROUP(iic1), + SH_PFC_PIN_GROUP(iic1_b), + SH_PFC_PIN_GROUP(iic1_c), + SH_PFC_PIN_GROUP(iic2), + SH_PFC_PIN_GROUP(iic2_b), + SH_PFC_PIN_GROUP(iic2_c), + SH_PFC_PIN_GROUP(iic2_d), + SH_PFC_PIN_GROUP(iic2_e), + SH_PFC_PIN_GROUP(iic3), + SH_PFC_PIN_GROUP(intc_irq0), + SH_PFC_PIN_GROUP(intc_irq1), + SH_PFC_PIN_GROUP(intc_irq2), + SH_PFC_PIN_GROUP(intc_irq3), + SH_PFC_PIN_GROUP(mmc0_data1), + SH_PFC_PIN_GROUP(mmc0_data4), + SH_PFC_PIN_GROUP(mmc0_data8), + SH_PFC_PIN_GROUP(mmc0_ctrl), + SH_PFC_PIN_GROUP(mmc1_data1), + SH_PFC_PIN_GROUP(mmc1_data4), + SH_PFC_PIN_GROUP(mmc1_data8), + SH_PFC_PIN_GROUP(mmc1_ctrl), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), + SH_PFC_PIN_GROUP(msiof0_ss2), + SH_PFC_PIN_GROUP(msiof0_rx), + SH_PFC_PIN_GROUP(msiof0_tx), + SH_PFC_PIN_GROUP(msiof0_clk_b), + SH_PFC_PIN_GROUP(msiof0_ss1_b), + SH_PFC_PIN_GROUP(msiof0_ss2_b), + SH_PFC_PIN_GROUP(msiof0_rx_b), + SH_PFC_PIN_GROUP(msiof0_tx_b), + SH_PFC_PIN_GROUP(msiof1_clk), + SH_PFC_PIN_GROUP(msiof1_sync), + SH_PFC_PIN_GROUP(msiof1_ss1), + SH_PFC_PIN_GROUP(msiof1_ss2), + SH_PFC_PIN_GROUP(msiof1_rx), + SH_PFC_PIN_GROUP(msiof1_tx), + SH_PFC_PIN_GROUP(msiof1_clk_b), + SH_PFC_PIN_GROUP(msiof1_ss1_b), + SH_PFC_PIN_GROUP(msiof1_ss2_b), + SH_PFC_PIN_GROUP(msiof1_rx_b), + SH_PFC_PIN_GROUP(msiof1_tx_b), + SH_PFC_PIN_GROUP(msiof2_clk), + SH_PFC_PIN_GROUP(msiof2_sync), + SH_PFC_PIN_GROUP(msiof2_ss1), + SH_PFC_PIN_GROUP(msiof2_ss2), + SH_PFC_PIN_GROUP(msiof2_rx), + SH_PFC_PIN_GROUP(msiof2_tx), + SH_PFC_PIN_GROUP(msiof3_clk), + SH_PFC_PIN_GROUP(msiof3_sync), + SH_PFC_PIN_GROUP(msiof3_ss1), + SH_PFC_PIN_GROUP(msiof3_ss2), + SH_PFC_PIN_GROUP(msiof3_rx), + SH_PFC_PIN_GROUP(msiof3_tx), + SH_PFC_PIN_GROUP(msiof3_clk_b), + SH_PFC_PIN_GROUP(msiof3_sync_b), + SH_PFC_PIN_GROUP(msiof3_rx_b), + SH_PFC_PIN_GROUP(msiof3_tx_b), + SH_PFC_PIN_GROUP(pwm0), + SH_PFC_PIN_GROUP(pwm0_b), + SH_PFC_PIN_GROUP(pwm1), + SH_PFC_PIN_GROUP(pwm1_b), + SH_PFC_PIN_GROUP(pwm2), + SH_PFC_PIN_GROUP(pwm3), + SH_PFC_PIN_GROUP(pwm4), + SH_PFC_PIN_GROUP(pwm5), + SH_PFC_PIN_GROUP(pwm6), + SH_PFC_PIN_GROUP(qspi_ctrl), + SH_PFC_PIN_GROUP(qspi_data2), + SH_PFC_PIN_GROUP(qspi_data4), + SH_PFC_PIN_GROUP(scif0_data), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), + SH_PFC_PIN_GROUP(scif0_data_b), + SH_PFC_PIN_GROUP(scif1_data), + SH_PFC_PIN_GROUP(scif1_clk), + SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif1_data_c), + SH_PFC_PIN_GROUP(scif1_data_d), + SH_PFC_PIN_GROUP(scif1_clk_d), + SH_PFC_PIN_GROUP(scif1_data_e), + SH_PFC_PIN_GROUP(scif1_clk_e), + SH_PFC_PIN_GROUP(scif2_data), + SH_PFC_PIN_GROUP(scif2_clk), + SH_PFC_PIN_GROUP(scif2_data_b), + SH_PFC_PIN_GROUP(scifa0_data), + SH_PFC_PIN_GROUP(scifa0_clk), + SH_PFC_PIN_GROUP(scifa0_ctrl), + SH_PFC_PIN_GROUP(scifa0_data_b), + SH_PFC_PIN_GROUP(scifa0_clk_b), + SH_PFC_PIN_GROUP(scifa0_ctrl_b), + SH_PFC_PIN_GROUP(scifa1_data), + SH_PFC_PIN_GROUP(scifa1_clk), + SH_PFC_PIN_GROUP(scifa1_ctrl), + SH_PFC_PIN_GROUP(scifa1_data_b), + SH_PFC_PIN_GROUP(scifa1_clk_b), + SH_PFC_PIN_GROUP(scifa1_ctrl_b), + SH_PFC_PIN_GROUP(scifa1_data_c), + SH_PFC_PIN_GROUP(scifa1_clk_c), + SH_PFC_PIN_GROUP(scifa1_ctrl_c), + SH_PFC_PIN_GROUP(scifa1_data_d), + SH_PFC_PIN_GROUP(scifa1_clk_d), + SH_PFC_PIN_GROUP(scifa1_ctrl_d), + SH_PFC_PIN_GROUP(scifa2_data), + SH_PFC_PIN_GROUP(scifa2_clk), + SH_PFC_PIN_GROUP(scifa2_ctrl), + SH_PFC_PIN_GROUP(scifa2_data_b), + SH_PFC_PIN_GROUP(scifa2_data_c), + SH_PFC_PIN_GROUP(scifa2_clk_c), + SH_PFC_PIN_GROUP(scifb0_data), + SH_PFC_PIN_GROUP(scifb0_clk), + SH_PFC_PIN_GROUP(scifb0_ctrl), + SH_PFC_PIN_GROUP(scifb0_data_b), + SH_PFC_PIN_GROUP(scifb0_clk_b), + SH_PFC_PIN_GROUP(scifb0_ctrl_b), + SH_PFC_PIN_GROUP(scifb0_data_c), + SH_PFC_PIN_GROUP(scifb1_data), + SH_PFC_PIN_GROUP(scifb1_clk), + SH_PFC_PIN_GROUP(scifb1_ctrl), + SH_PFC_PIN_GROUP(scifb1_data_b), + SH_PFC_PIN_GROUP(scifb1_clk_b), + SH_PFC_PIN_GROUP(scifb1_ctrl_b), + SH_PFC_PIN_GROUP(scifb1_data_c), + SH_PFC_PIN_GROUP(scifb1_data_d), + SH_PFC_PIN_GROUP(scifb1_data_e), + SH_PFC_PIN_GROUP(scifb1_clk_e), + SH_PFC_PIN_GROUP(scifb1_data_f), + SH_PFC_PIN_GROUP(scifb1_data_g), + SH_PFC_PIN_GROUP(scifb1_clk_g), + SH_PFC_PIN_GROUP(scifb2_data), + SH_PFC_PIN_GROUP(scifb2_clk), + SH_PFC_PIN_GROUP(scifb2_ctrl), + SH_PFC_PIN_GROUP(scifb2_data_b), + SH_PFC_PIN_GROUP(scifb2_clk_b), + SH_PFC_PIN_GROUP(scifb2_ctrl_b), + SH_PFC_PIN_GROUP(scifb2_data_c), + SH_PFC_PIN_GROUP(scif_clk), + SH_PFC_PIN_GROUP(scif_clk_b), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi1_cd), + SH_PFC_PIN_GROUP(sdhi1_wp), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(sdhi2_cd), + SH_PFC_PIN_GROUP(sdhi2_wp), + SH_PFC_PIN_GROUP(sdhi3_data1), + SH_PFC_PIN_GROUP(sdhi3_data4), + SH_PFC_PIN_GROUP(sdhi3_ctrl), + SH_PFC_PIN_GROUP(sdhi3_cd), + SH_PFC_PIN_GROUP(sdhi3_wp), + SH_PFC_PIN_GROUP(ssi0_data), + SH_PFC_PIN_GROUP(ssi0129_ctrl), + SH_PFC_PIN_GROUP(ssi1_data), + SH_PFC_PIN_GROUP(ssi1_ctrl), + SH_PFC_PIN_GROUP(ssi2_data), + SH_PFC_PIN_GROUP(ssi2_ctrl), + SH_PFC_PIN_GROUP(ssi3_data), + SH_PFC_PIN_GROUP(ssi34_ctrl), + SH_PFC_PIN_GROUP(ssi4_data), + SH_PFC_PIN_GROUP(ssi4_ctrl), + SH_PFC_PIN_GROUP(ssi5), + SH_PFC_PIN_GROUP(ssi5_b), + SH_PFC_PIN_GROUP(ssi5_c), + SH_PFC_PIN_GROUP(ssi6), + SH_PFC_PIN_GROUP(ssi6_b), + SH_PFC_PIN_GROUP(ssi7_data), + SH_PFC_PIN_GROUP(ssi7_b_data), + SH_PFC_PIN_GROUP(ssi7_c_data), + SH_PFC_PIN_GROUP(ssi78_ctrl), + SH_PFC_PIN_GROUP(ssi78_b_ctrl), + SH_PFC_PIN_GROUP(ssi78_c_ctrl), + SH_PFC_PIN_GROUP(ssi8_data), + SH_PFC_PIN_GROUP(ssi8_b_data), + SH_PFC_PIN_GROUP(ssi8_c_data), + SH_PFC_PIN_GROUP(ssi9_data), + SH_PFC_PIN_GROUP(ssi9_ctrl), + SH_PFC_PIN_GROUP(tpu0_to0), + SH_PFC_PIN_GROUP(tpu0_to1), + SH_PFC_PIN_GROUP(tpu0_to2), + SH_PFC_PIN_GROUP(tpu0_to3), + SH_PFC_PIN_GROUP(usb0), + SH_PFC_PIN_GROUP(usb0_ovc_vbus), + SH_PFC_PIN_GROUP(usb1), + SH_PFC_PIN_GROUP(usb1_pwen), + SH_PFC_PIN_GROUP(usb2), + VIN_DATA_PIN_GROUP(vin0_data, 24), + VIN_DATA_PIN_GROUP(vin0_data, 20), + SH_PFC_PIN_GROUP(vin0_data18), + VIN_DATA_PIN_GROUP(vin0_data, 16), + VIN_DATA_PIN_GROUP(vin0_data, 12), + VIN_DATA_PIN_GROUP(vin0_data, 10), + VIN_DATA_PIN_GROUP(vin0_data, 8), + VIN_DATA_PIN_GROUP(vin0_data, 4), + SH_PFC_PIN_GROUP(vin0_sync), + SH_PFC_PIN_GROUP(vin0_field), + SH_PFC_PIN_GROUP(vin0_clkenb), + SH_PFC_PIN_GROUP(vin0_clk), + VIN_DATA_PIN_GROUP(vin1_data, 24), + VIN_DATA_PIN_GROUP(vin1_data, 20), + SH_PFC_PIN_GROUP(vin1_data18), + VIN_DATA_PIN_GROUP(vin1_data, 16), + VIN_DATA_PIN_GROUP(vin1_data, 12), + VIN_DATA_PIN_GROUP(vin1_data, 10), + VIN_DATA_PIN_GROUP(vin1_data, 8), + VIN_DATA_PIN_GROUP(vin1_data, 4), + VIN_DATA_PIN_GROUP(vin1_data, 24, _b), + VIN_DATA_PIN_GROUP(vin1_data, 20, _b), + SH_PFC_PIN_GROUP(vin1_data18_b), + VIN_DATA_PIN_GROUP(vin1_data, 16, _b), + VIN_DATA_PIN_GROUP(vin1_data, 12, _b), + VIN_DATA_PIN_GROUP(vin1_data, 10, _b), + VIN_DATA_PIN_GROUP(vin1_data, 8, _b), + VIN_DATA_PIN_GROUP(vin1_data, 4, _b), + SH_PFC_PIN_GROUP(vin1_sync), + SH_PFC_PIN_GROUP(vin1_sync_b), + SH_PFC_PIN_GROUP(vin1_field), + SH_PFC_PIN_GROUP(vin1_field_b), + SH_PFC_PIN_GROUP(vin1_clkenb), + SH_PFC_PIN_GROUP(vin1_clkenb_b), + SH_PFC_PIN_GROUP(vin1_clk), + SH_PFC_PIN_GROUP(vin1_clk_b), + VIN_DATA_PIN_GROUP(vin2_data, 24), + SH_PFC_PIN_GROUP(vin2_data18), + VIN_DATA_PIN_GROUP(vin2_data, 16), + VIN_DATA_PIN_GROUP(vin2_data, 8), + VIN_DATA_PIN_GROUP(vin2_data, 4), + SH_PFC_PIN_GROUP(vin2_g8), + SH_PFC_PIN_GROUP(vin2_sync), + SH_PFC_PIN_GROUP(vin2_field), + SH_PFC_PIN_GROUP(vin2_clkenb), + SH_PFC_PIN_GROUP(vin2_clk), + SH_PFC_PIN_GROUP(vin3_data8), + SH_PFC_PIN_GROUP(vin3_sync), + SH_PFC_PIN_GROUP(vin3_field), + SH_PFC_PIN_GROUP(vin3_clkenb), + SH_PFC_PIN_GROUP(vin3_clk), + }, +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + .automotive = { + SH_PFC_PIN_GROUP(mlb_3pin), + } +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ }; static const char * const audio_clk_groups[] = { @@ -4246,6 +4478,23 @@ static const char * const avb_groups[] = { "avb_gmii", }; +static const char * const can0_groups[] = { + "can0_data", + "can0_data_b", + "can0_data_c", + "can0_data_d", +}; + +static const char * const can1_groups[] = { + "can1_data", + "can1_data_b", +}; + +static const char * const can_clk_groups[] = { + "can_clk", + "can_clk_b", +}; + static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4351,9 +4600,11 @@ static const char * const intc_groups[] = { "intc_irq3", }; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 static const char * const mlb_groups[] = { "mlb_3pin", }; +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ static const char * const mmc0_groups[] = { "mmc0_data1", @@ -4629,6 +4880,7 @@ static const char * const usb0_groups[] = { static const char * const usb1_groups[] = { "usb1", + "usb1_pwen", }; static const char * const usb2_groups[] = { @@ -4659,10 +4911,22 @@ static const char * const vin1_groups[] = { "vin1_data10", "vin1_data8", "vin1_data4", + "vin1_data24_b", + "vin1_data20_b", + "vin1_data18_b", + "vin1_data16_b", + "vin1_data12_b", + "vin1_data10_b", + "vin1_data8_b", + "vin1_data4_b", "vin1_sync", + "vin1_sync_b", "vin1_field", + "vin1_field_b", "vin1_clkenb", + "vin1_clkenb_b", "vin1_clk", + "vin1_clk_b", }; static const char * const vin2_groups[] = { @@ -4671,6 +4935,7 @@ static const char * const vin2_groups[] = { "vin2_data16", "vin2_data8", "vin2_data4", + "vin2_g8", "vin2_sync", "vin2_field", "vin2_clkenb", @@ -4685,63 +4950,77 @@ static const char * const vin3_groups[] = { "vin3_clk", }; -static const struct sh_pfc_function pinmux_functions[] = { - SH_PFC_FUNCTION(audio_clk), - SH_PFC_FUNCTION(avb), - SH_PFC_FUNCTION(du), - SH_PFC_FUNCTION(du0), - SH_PFC_FUNCTION(du1), - SH_PFC_FUNCTION(du2), - SH_PFC_FUNCTION(eth), - SH_PFC_FUNCTION(hscif0), - SH_PFC_FUNCTION(hscif1), - SH_PFC_FUNCTION(i2c0), - SH_PFC_FUNCTION(i2c1), - SH_PFC_FUNCTION(i2c2), - SH_PFC_FUNCTION(i2c3), - SH_PFC_FUNCTION(iic0), - SH_PFC_FUNCTION(iic1), - SH_PFC_FUNCTION(iic2), - SH_PFC_FUNCTION(iic3), - SH_PFC_FUNCTION(intc), - SH_PFC_FUNCTION(mlb), - SH_PFC_FUNCTION(mmc0), - SH_PFC_FUNCTION(mmc1), - SH_PFC_FUNCTION(msiof0), - SH_PFC_FUNCTION(msiof1), - SH_PFC_FUNCTION(msiof2), - SH_PFC_FUNCTION(msiof3), - SH_PFC_FUNCTION(pwm0), - SH_PFC_FUNCTION(pwm1), - SH_PFC_FUNCTION(pwm2), - SH_PFC_FUNCTION(pwm3), - SH_PFC_FUNCTION(pwm4), - SH_PFC_FUNCTION(pwm5), - SH_PFC_FUNCTION(pwm6), - SH_PFC_FUNCTION(qspi), - SH_PFC_FUNCTION(scif0), - SH_PFC_FUNCTION(scif1), - SH_PFC_FUNCTION(scif2), - SH_PFC_FUNCTION(scifa0), - SH_PFC_FUNCTION(scifa1), - SH_PFC_FUNCTION(scifa2), - SH_PFC_FUNCTION(scifb0), - SH_PFC_FUNCTION(scifb1), - SH_PFC_FUNCTION(scifb2), - SH_PFC_FUNCTION(scif_clk), - SH_PFC_FUNCTION(sdhi0), - SH_PFC_FUNCTION(sdhi1), - SH_PFC_FUNCTION(sdhi2), - SH_PFC_FUNCTION(sdhi3), - SH_PFC_FUNCTION(ssi), - SH_PFC_FUNCTION(tpu0), - SH_PFC_FUNCTION(usb0), - SH_PFC_FUNCTION(usb1), - SH_PFC_FUNCTION(usb2), - SH_PFC_FUNCTION(vin0), - SH_PFC_FUNCTION(vin1), - SH_PFC_FUNCTION(vin2), - SH_PFC_FUNCTION(vin3), +static const struct { + struct sh_pfc_function common[58]; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + struct sh_pfc_function automotive[1]; +#endif +} pinmux_functions = { + .common = { + SH_PFC_FUNCTION(audio_clk), + SH_PFC_FUNCTION(avb), + SH_PFC_FUNCTION(du), + SH_PFC_FUNCTION(can0), + SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), + SH_PFC_FUNCTION(du0), + SH_PFC_FUNCTION(du1), + SH_PFC_FUNCTION(du2), + SH_PFC_FUNCTION(eth), + SH_PFC_FUNCTION(hscif0), + SH_PFC_FUNCTION(hscif1), + SH_PFC_FUNCTION(i2c0), + SH_PFC_FUNCTION(i2c1), + SH_PFC_FUNCTION(i2c2), + SH_PFC_FUNCTION(i2c3), + SH_PFC_FUNCTION(iic0), + SH_PFC_FUNCTION(iic1), + SH_PFC_FUNCTION(iic2), + SH_PFC_FUNCTION(iic3), + SH_PFC_FUNCTION(intc), + SH_PFC_FUNCTION(mmc0), + SH_PFC_FUNCTION(mmc1), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), + SH_PFC_FUNCTION(msiof3), + SH_PFC_FUNCTION(pwm0), + SH_PFC_FUNCTION(pwm1), + SH_PFC_FUNCTION(pwm2), + SH_PFC_FUNCTION(pwm3), + SH_PFC_FUNCTION(pwm4), + SH_PFC_FUNCTION(pwm5), + SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi), + SH_PFC_FUNCTION(scif0), + SH_PFC_FUNCTION(scif1), + SH_PFC_FUNCTION(scif2), + SH_PFC_FUNCTION(scifa0), + SH_PFC_FUNCTION(scifa1), + SH_PFC_FUNCTION(scifa2), + SH_PFC_FUNCTION(scifb0), + SH_PFC_FUNCTION(scifb1), + SH_PFC_FUNCTION(scifb2), + SH_PFC_FUNCTION(scif_clk), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(sdhi3), + SH_PFC_FUNCTION(ssi), + SH_PFC_FUNCTION(tpu0), + SH_PFC_FUNCTION(usb0), + SH_PFC_FUNCTION(usb1), + SH_PFC_FUNCTION(usb2), + SH_PFC_FUNCTION(vin0), + SH_PFC_FUNCTION(vin1), + SH_PFC_FUNCTION(vin2), + SH_PFC_FUNCTION(vin3), + }, +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + .automotive = { + SH_PFC_FUNCTION(mlb), + } +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { @@ -5728,6 +6007,7 @@ static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = { .pin_to_pocctrl = r8a7790_pin_to_pocctrl, }; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 const struct sh_pfc_soc_info r8a7790_pinmux_info = { .name = "r8a77900_pfc", .ops = &r8a7790_pinmux_ops, @@ -5737,13 +6017,16 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = { .pins = pinmux_pins, .nr_pins = ARRAY_SIZE(pinmux_pins), - .groups = pinmux_groups, - .nr_groups = ARRAY_SIZE(pinmux_groups), - .functions = pinmux_functions, - .nr_functions = ARRAY_SIZE(pinmux_functions), + .groups = pinmux_groups.common, + .nr_groups = ARRAY_SIZE(pinmux_groups.common) + + ARRAY_SIZE(pinmux_groups.automotive), + .functions = pinmux_functions.common, + .nr_functions = ARRAY_SIZE(pinmux_functions.common) + + ARRAY_SIZE(pinmux_functions.automotive), .cfg_regs = pinmux_config_regs, .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), }; +#endif diff --git a/drivers/pinctrl/renesas/pfc-r8a7791.c b/drivers/pinctrl/renesas/pfc-r8a7791.c index d6095d6f674..7c8db5dc2cb 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7791.c +++ b/drivers/pinctrl/renesas/pfc-r8a7791.c @@ -18,7 +18,7 @@ * Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in * which case they support both 3.3V and 1.8V signalling. */ -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_32(0, fn, sfx), \ PORT_GP_26(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ @@ -1703,6 +1703,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), }; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) /* - ADI -------------------------------------------------------------------- */ static const unsigned int adi_common_pins[] = { /* ADIDATA, ADICS/SAMP, ADICLK */ @@ -1768,6 +1769,7 @@ static const unsigned int adi_chsel2_b_mux[] = { /* ADICHS B 2 */ ADICHS2_B_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ /* - Audio Clock ------------------------------------------------------------ */ static const unsigned int audio_clk_a_pins[] = { @@ -2556,6 +2558,8 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; + +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) /* - MLB+ ------------------------------------------------------------------- */ static const unsigned int mlb_3pin_pins[] = { RCAR_GP_PIN(7, 7), RCAR_GP_PIN(7, 8), RCAR_GP_PIN(7, 9), @@ -2563,6 +2567,8 @@ static const unsigned int mlb_3pin_pins[] = { static const unsigned int mlb_3pin_mux[] = { MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ + /* - MMCIF ------------------------------------------------------------------ */ static const unsigned int mmc_data1_pins[] = { /* D[0] */ @@ -4455,7 +4461,9 @@ static const unsigned int vin2_clk_mux[] = { static const struct { struct sh_pfc_pin_group common[346]; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) struct sh_pfc_pin_group automotive[9]; +#endif } pinmux_groups = { .common = { SH_PFC_PIN_GROUP(audio_clk_a), @@ -4805,6 +4813,7 @@ static const struct { SH_PFC_PIN_GROUP(vin2_clkenb), SH_PFC_PIN_GROUP(vin2_clk), }, +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) .automotive = { SH_PFC_PIN_GROUP(adi_common), SH_PFC_PIN_GROUP(adi_chsel0), @@ -4816,8 +4825,10 @@ static const struct { SH_PFC_PIN_GROUP(adi_chsel2_b), SH_PFC_PIN_GROUP(mlb_3pin), } +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ }; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) static const char * const adi_groups[] = { "adi_common", "adi_chsel0", @@ -4828,6 +4839,7 @@ static const char * const adi_groups[] = { "adi_chsel1_b", "adi_chsel2_b", }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ static const char * const audio_clk_groups[] = { "audio_clk_a", @@ -5005,9 +5017,11 @@ static const char * const intc_groups[] = { "intc_irq3", }; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) static const char * const mlb_groups[] = { "mlb_3pin", }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ static const char * const mmc_groups[] = { "mmc_data1", @@ -5362,7 +5376,9 @@ static const char * const vin2_groups[] = { static const struct { struct sh_pfc_function common[58]; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) struct sh_pfc_function automotive[2]; +#endif } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), @@ -5424,10 +5440,12 @@ static const struct { SH_PFC_FUNCTION(vin1), SH_PFC_FUNCTION(vin2), }, +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) .automotive = { SH_PFC_FUNCTION(adi), SH_PFC_FUNCTION(mlb), } +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { diff --git a/drivers/pinctrl/renesas/pfc-r8a7792.c b/drivers/pinctrl/renesas/pfc-r8a7792.c index 1c904120937..054c02a4ae0 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7792.c +++ b/drivers/pinctrl/renesas/pfc-r8a7792.c @@ -14,7 +14,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_29(0, fn, sfx), \ PORT_GP_23(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c index 91ac815f3da..9495603f7c7 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7794.c +++ b/drivers/pinctrl/renesas/pfc-r8a7794.c @@ -15,7 +15,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_32(0, fn, sfx), \ PORT_GP_26(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ diff --git a/drivers/pinctrl/renesas/pfc-r8a7795.c b/drivers/pinctrl/renesas/pfc-r8a7795.c index 898f837950d..015a50f1deb 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7795.c +++ b/drivers/pinctrl/renesas/pfc-r8a7795.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * R8A7795 ES2.0+ processor support - PFC hardware block. + * R8A77951 processor support - PFC hardware block. * * Copyright (C) 2015-2019 Renesas Electronics Corporation */ @@ -13,11 +13,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ - SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ @@ -30,6 +28,52 @@ PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD0, "AVB_RD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD1, "AVB_RD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD2, "AVB_RD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD3, "AVB_RD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RXC, "AVB_RXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RX_CTL, "AVB_RX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXCREFCLK, "AVB_TXCREFCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN0, "DU_DOTCLKIN0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN1, "DU_DOTCLKIN1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN2, "DU_DOTCLKIN2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN3, "DU_DOTCLKIN3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),\ + PIN_NOGP_CFG(FSCLKST_N, "FSCLKST#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO2, "QSPI0_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO3, "QSPI0_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MISO_IO1, "QSPI0_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MOSI_IO0, "QSPI0_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SPCLK, "QSPI0_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SSL, "QSPI0_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO2, "QSPI1_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO3, "QSPI1_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MISO_IO1, "QSPI1_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MOSI_IO0, "QSPI1_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SPCLK, "QSPI1_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SSL, "QSPI1_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_INT_N, "RPC_INT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_RESET_N, "RPC_RESET#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_WP_N, "RPC_WP#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -1509,68 +1553,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A7795 has 8 banks with 32 GPIOs in each => 256 GPIOs. - * Physical layout rows: A - AW, cols: 1 - 39. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different r8a7795 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R-Car H3SiP to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 7, DU_DOTCLKIN2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1718,7 +1710,7 @@ static const unsigned int avb_phy_int_mux[] = { }; static const unsigned int avb_mdio_pins[] = { /* AVB_MDC, AVB_MDIO */ - RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), + RCAR_GP_PIN(2, 9), PIN_AVB_MDIO, }; static const unsigned int avb_mdio_mux[] = { AVB_MDC_MARK, AVB_MDIO_MARK, @@ -1731,12 +1723,11 @@ static const unsigned int avb_mii_pins[] = { * AVB_RD1, AVB_RD2, AVB_RD3, * AVB_TXCREFCLK */ - PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), - PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), - PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), - PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), - PIN_NUMBER('A', 12), - + PIN_AVB_TX_CTL, PIN_AVB_TXC, PIN_AVB_TD0, + PIN_AVB_TD1, PIN_AVB_TD2, PIN_AVB_TD3, + PIN_AVB_RX_CTL, PIN_AVB_RXC, PIN_AVB_RD0, + PIN_AVB_RD1, PIN_AVB_RD2, PIN_AVB_RD3, + PIN_AVB_TXCREFCLK, }; static const unsigned int avb_mii_mux[] = { AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, @@ -3261,6 +3252,57 @@ static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +/* - QSPI0 ------------------------------------------------------------------ */ +static const unsigned int qspi0_ctrl_pins[] = { + /* QSPI0_SPCLK, QSPI0_SSL */ + PIN_QSPI0_SPCLK, PIN_QSPI0_SSL, +}; +static const unsigned int qspi0_ctrl_mux[] = { + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK, +}; +static const unsigned int qspi0_data2_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, +}; +static const unsigned int qspi0_data2_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, +}; +static const unsigned int qspi0_data4_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, + /* QSPI0_IO2, QSPI0_IO3 */ + PIN_QSPI0_IO2, PIN_QSPI0_IO3, +}; +static const unsigned int qspi0_data4_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, +}; +/* - QSPI1 ------------------------------------------------------------------ */ +static const unsigned int qspi1_ctrl_pins[] = { + /* QSPI1_SPCLK, QSPI1_SSL */ + PIN_QSPI1_SPCLK, PIN_QSPI1_SSL, +}; +static const unsigned int qspi1_ctrl_mux[] = { + QSPI1_SPCLK_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int qspi1_data2_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, +}; +static const unsigned int qspi1_data2_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, +}; +static const unsigned int qspi1_data4_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, + /* QSPI1_IO2, QSPI1_IO3 */ + PIN_QSPI1_IO2, PIN_QSPI1_IO3, +}; +static const unsigned int qspi1_data4_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; + /* - SATA --------------------------------------------------------------------*/ static const unsigned int sata0_devslp_a_pins[] = { /* DEVSLP */ @@ -4169,7 +4211,7 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[320]; + struct sh_pfc_pin_group common[326]; #ifdef CONFIG_PINCTRL_PFC_R8A7795 struct sh_pfc_pin_group automotive[30]; #endif @@ -4374,6 +4416,12 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(qspi0_ctrl), + SH_PFC_PIN_GROUP(qspi0_data2), + SH_PFC_PIN_GROUP(qspi0_data4), + SH_PFC_PIN_GROUP(qspi1_ctrl), + SH_PFC_PIN_GROUP(qspi1_data2), + SH_PFC_PIN_GROUP(qspi1_data4), SH_PFC_PIN_GROUP(sata0_devslp_a), SH_PFC_PIN_GROUP(sata0_devslp_b), SH_PFC_PIN_GROUP(scif0_data), @@ -4868,6 +4916,18 @@ static const char * const pwm6_groups[] = { "pwm6_b", }; +static const char * const qspi0_groups[] = { + "qspi0_ctrl", + "qspi0_data2", + "qspi0_data4", +}; + +static const char * const qspi1_groups[] = { + "qspi1_ctrl", + "qspi1_data2", + "qspi1_data4", +}; + static const char * const sata0_groups[] = { "sata0_devslp_a", "sata0_devslp_b", @@ -5056,7 +5116,7 @@ static const char * const vin5_groups[] = { }; static const struct { - struct sh_pfc_function common[53]; + struct sh_pfc_function common[55]; #ifdef CONFIG_PINCTRL_PFC_R8A7795 struct sh_pfc_function automotive[4]; #endif @@ -5093,6 +5153,8 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi0), + SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(sata0), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), @@ -5692,44 +5754,44 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_drive_reg pinmux_drive_regs[] = { { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { - { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ - { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ - { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ - { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ - { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ - { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ - { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ - { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + { PIN_QSPI0_SPCLK, 28, 2 }, /* QSPI0_SPCLK */ + { PIN_QSPI0_MOSI_IO0, 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_QSPI0_MISO_IO1, 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_QSPI0_IO2, 16, 2 }, /* QSPI0_IO2 */ + { PIN_QSPI0_IO3, 12, 2 }, /* QSPI0_IO3 */ + { PIN_QSPI0_SSL, 8, 2 }, /* QSPI0_SSL */ + { PIN_QSPI1_SPCLK, 4, 2 }, /* QSPI1_SPCLK */ + { PIN_QSPI1_MOSI_IO0, 0, 2 }, /* QSPI1_MOSI_IO0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { - { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ - { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ - { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ - { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ - { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ - { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ - { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ - { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + { PIN_QSPI1_MISO_IO1, 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_QSPI1_IO2, 24, 2 }, /* QSPI1_IO2 */ + { PIN_QSPI1_IO3, 20, 2 }, /* QSPI1_IO3 */ + { PIN_QSPI1_SSL, 16, 2 }, /* QSPI1_SSL */ + { PIN_RPC_INT_N, 12, 2 }, /* RPC_INT# */ + { PIN_RPC_WP_N, 8, 2 }, /* RPC_WP# */ + { PIN_RPC_RESET_N, 4, 2 }, /* RPC_RESET# */ + { PIN_AVB_RX_CTL, 0, 3 }, /* AVB_RX_CTL */ } }, { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { - { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ - { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ - { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ - { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ - { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ - { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ - { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ - { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + { PIN_AVB_RXC, 28, 3 }, /* AVB_RXC */ + { PIN_AVB_RD0, 24, 3 }, /* AVB_RD0 */ + { PIN_AVB_RD1, 20, 3 }, /* AVB_RD1 */ + { PIN_AVB_RD2, 16, 3 }, /* AVB_RD2 */ + { PIN_AVB_RD3, 12, 3 }, /* AVB_RD3 */ + { PIN_AVB_TX_CTL, 8, 3 }, /* AVB_TX_CTL */ + { PIN_AVB_TXC, 4, 3 }, /* AVB_TXC */ + { PIN_AVB_TD0, 0, 3 }, /* AVB_TD0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { - { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ - { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ - { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ - { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ - { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ - { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ - { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ - { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + { PIN_AVB_TD1, 28, 3 }, /* AVB_TD1 */ + { PIN_AVB_TD2, 24, 3 }, /* AVB_TD2 */ + { PIN_AVB_TD3, 20, 3 }, /* AVB_TD3 */ + { PIN_AVB_TXCREFCLK, 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_AVB_MDIO, 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ } }, { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ @@ -5783,7 +5845,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { } }, { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ - { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { PIN_PRESETOUT_N, 24, 3 }, /* PRESETOUT# */ { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ @@ -5802,30 +5864,32 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ } }, { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { - { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ - { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ - { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ - { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ - { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ - { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ - { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ - { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ + { PIN_DU_DOTCLKIN0, 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_DU_DOTCLKIN1, 0, 2 }, /* DU_DOTCLKIN1 */ } }, { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { - { PIN_A_NUMBER('R', 7), 28, 2 }, /* DU_DOTCLKIN2 */ - { PIN_A_NUMBER('R', 8), 24, 2 }, /* DU_DOTCLKIN3 */ - { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST# */ - { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ +#ifdef CONFIG_PINCTRL_PFC_R8A7795 + { PIN_DU_DOTCLKIN2, 28, 2 }, /* DU_DOTCLKIN2 */ +#endif + { PIN_DU_DOTCLKIN3, 24, 2 }, /* DU_DOTCLKIN3 */ + { PIN_FSCLKST_N, 20, 2 }, /* FSCLKST# */ + { PIN_TMS, 4, 2 }, /* TMS */ } }, { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { - { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ - { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ - { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ - { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ - { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ - { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ - { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ - { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + { PIN_TDO, 28, 2 }, /* TDO */ + { PIN_ASEBRK, 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ } }, { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ @@ -5894,7 +5958,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ - { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { PIN_MLB_REF, 4, 3 }, /* MLB_REF */ { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ } }, { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { @@ -5933,8 +5997,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(6, 27), 20, 3 }, /* USB1_OVC */ { RCAR_GP_PIN(6, 28), 16, 3 }, /* USB30_PWEN */ { RCAR_GP_PIN(6, 29), 12, 3 }, /* USB30_OVC */ - { RCAR_GP_PIN(6, 30), 8, 3 }, /* USB2_CH3_PWEN */ - { RCAR_GP_PIN(6, 31), 4, 3 }, /* USB2_CH3_OVC */ + { RCAR_GP_PIN(6, 30), 8, 3 }, /* GP6_30/USB2_CH3_PWEN */ + { RCAR_GP_PIN(6, 31), 4, 3 }, /* GP6_31/USB2_CH3_OVC */ } }, { }, }; @@ -5950,7 +6014,8 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { { /* sentinel */ }, }; -static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) +static int r8a77951_pin_to_pocctrl(struct sh_pfc *pfc, + unsigned int pin, u32 *pocctrl) { int bit = -EINVAL; @@ -5967,35 +6032,35 @@ static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *poc static const struct pinmux_bias_reg pinmux_bias_regs[] = { { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) { - [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */ - [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */ - [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */ - [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */ - [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */ - [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */ - [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */ - [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */ - [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */ - [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */ - [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */ - [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */ - [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */ - [13] = PIN_NUMBER('V', 6), /* RPC_WP# */ - [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */ - [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */ - [16] = PIN_NUMBER('B', 19), /* AVB_RXC */ - [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */ - [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */ - [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */ - [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */ - [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */ - [22] = PIN_NUMBER('A', 19), /* AVB_TXC */ - [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */ - [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */ - [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */ - [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */ - [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */ - [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */ + [ 0] = PIN_QSPI0_SPCLK, /* QSPI0_SPCLK */ + [ 1] = PIN_QSPI0_MOSI_IO0, /* QSPI0_MOSI_IO0 */ + [ 2] = PIN_QSPI0_MISO_IO1, /* QSPI0_MISO_IO1 */ + [ 3] = PIN_QSPI0_IO2, /* QSPI0_IO2 */ + [ 4] = PIN_QSPI0_IO3, /* QSPI0_IO3 */ + [ 5] = PIN_QSPI0_SSL, /* QSPI0_SSL */ + [ 6] = PIN_QSPI1_SPCLK, /* QSPI1_SPCLK */ + [ 7] = PIN_QSPI1_MOSI_IO0, /* QSPI1_MOSI_IO0 */ + [ 8] = PIN_QSPI1_MISO_IO1, /* QSPI1_MISO_IO1 */ + [ 9] = PIN_QSPI1_IO2, /* QSPI1_IO2 */ + [10] = PIN_QSPI1_IO3, /* QSPI1_IO3 */ + [11] = PIN_QSPI1_SSL, /* QSPI1_SSL */ + [12] = PIN_RPC_INT_N, /* RPC_INT# */ + [13] = PIN_RPC_WP_N, /* RPC_WP# */ + [14] = PIN_RPC_RESET_N, /* RPC_RESET# */ + [15] = PIN_AVB_RX_CTL, /* AVB_RX_CTL */ + [16] = PIN_AVB_RXC, /* AVB_RXC */ + [17] = PIN_AVB_RD0, /* AVB_RD0 */ + [18] = PIN_AVB_RD1, /* AVB_RD1 */ + [19] = PIN_AVB_RD2, /* AVB_RD2 */ + [20] = PIN_AVB_RD3, /* AVB_RD3 */ + [21] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ + [22] = PIN_AVB_TXC, /* AVB_TXC */ + [23] = PIN_AVB_TD0, /* AVB_TD0 */ + [24] = PIN_AVB_TD1, /* AVB_TD1 */ + [25] = PIN_AVB_TD2, /* AVB_TD2 */ + [26] = PIN_AVB_TD3, /* AVB_TD3 */ + [27] = PIN_AVB_TXCREFCLK, /* AVB_TXCREFCLK */ + [28] = PIN_AVB_MDIO, /* AVB_MDIO */ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */ @@ -6044,7 +6109,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */ - [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */ + [ 9] = PIN_PRESETOUT_N, /* PRESETOUT# */ [10] = RCAR_GP_PIN(0, 0), /* D0 */ [11] = RCAR_GP_PIN(0, 1), /* D1 */ [12] = RCAR_GP_PIN(0, 2), /* D2 */ @@ -6065,20 +6130,20 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = RCAR_GP_PIN(7, 1), /* AVS2 */ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */ - [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */ - [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */ + [30] = PIN_DU_DOTCLKIN0, /* DU_DOTCLKIN0 */ + [31] = PIN_DU_DOTCLKIN1, /* DU_DOTCLKIN1 */ } }, { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) { - [ 0] = PIN_A_NUMBER('R', 7), /* DU_DOTCLKIN2 */ - [ 1] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN3 */ - [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST# */ - [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/ - [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */ - [ 5] = PIN_A_NUMBER('T', 27), /* TCK */ - [ 6] = PIN_A_NUMBER('R', 30), /* TMS */ - [ 7] = PIN_A_NUMBER('R', 29), /* TDI */ - [ 8] = PIN_NONE, - [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */ + [ 0] = PIN_DU_DOTCLKIN2, /* DU_DOTCLKIN2 */ + [ 1] = PIN_DU_DOTCLKIN3, /* DU_DOTCLKIN3 */ + [ 2] = PIN_FSCLKST_N, /* FSCLKST# */ + [ 3] = PIN_EXTALR, /* EXTALR*/ + [ 4] = PIN_TRST_N, /* TRST# */ + [ 5] = PIN_TCK, /* TCK */ + [ 6] = PIN_TMS, /* TMS */ + [ 7] = PIN_TDI, /* TDI */ + [ 8] = SH_PFC_PIN_NONE, + [ 9] = PIN_ASEBRK, /* ASEBRK */ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */ @@ -6143,7 +6208,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */ - [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */ + [ 6] = PIN_MLB_REF, /* MLB_REF */ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ @@ -6178,31 +6243,31 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */ [ 5] = RCAR_GP_PIN(6, 30), /* USB2_CH3_PWEN */ [ 6] = RCAR_GP_PIN(6, 31), /* USB2_CH3_OVC */ - [ 7] = PIN_NONE, - [ 8] = PIN_NONE, - [ 9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, - [30] = PIN_NONE, - [31] = PIN_NONE, + [ 7] = SH_PFC_PIN_NONE, + [ 8] = SH_PFC_PIN_NONE, + [ 9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, + [30] = SH_PFC_PIN_NONE, + [31] = SH_PFC_PIN_NONE, } }, { /* sentinel */ }, }; @@ -6248,8 +6313,8 @@ static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, sh_pfc_write(pfc, reg->puen, enable); } -static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = { - .pin_to_pocctrl = r8a7795_pin_to_pocctrl, +static const struct sh_pfc_soc_operations r8a77951_pinmux_ops = { + .pin_to_pocctrl = r8a77951_pin_to_pocctrl, .get_bias = r8a7795_pinmux_get_bias, .set_bias = r8a7795_pinmux_set_bias, }; @@ -6257,7 +6322,7 @@ static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = { #ifdef CONFIG_PINCTRL_PFC_R8A774E1 const struct sh_pfc_soc_info r8a774e1_pinmux_info = { .name = "r8a774e1_pfc", - .ops = &r8a7795_pinmux_ops, + .ops = &r8a77951_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, @@ -6282,7 +6347,7 @@ const struct sh_pfc_soc_info r8a774e1_pinmux_info = { #ifdef CONFIG_PINCTRL_PFC_R8A7795 const struct sh_pfc_soc_info r8a7795_pinmux_info = { .name = "r8a77951_pfc", - .ops = &r8a7795_pinmux_ops, + .ops = &r8a77951_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c index da7901ea6eb..06cae74fb51 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7796.c +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 /* - * R8A7796 processor support - PFC hardware block. + * R8A7796 (R-Car M3-W/W+) support - PFC hardware block. * * Copyright (C) 2016-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -19,11 +19,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ - SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ @@ -36,6 +34,51 @@ PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD0, "AVB_RD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD1, "AVB_RD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD2, "AVB_RD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD3, "AVB_RD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RXC, "AVB_RXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RX_CTL, "AVB_RX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXCREFCLK, "AVB_TXCREFCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN0, "DU_DOTCLKIN0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN1, "DU_DOTCLKIN1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN2, "DU_DOTCLKIN2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),\ + PIN_NOGP_CFG(FSCLKST, "FSCLKST", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO2, "QSPI0_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO3, "QSPI0_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MISO_IO1, "QSPI0_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MOSI_IO0, "QSPI0_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SPCLK, "QSPI0_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SSL, "QSPI0_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO2, "QSPI1_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO3, "QSPI1_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MISO_IO1, "QSPI1_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MOSI_IO0, "QSPI1_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SPCLK, "QSPI1_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SSL, "QSPI1_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_INT_N, "RPC_INT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_RESET_N, "RPC_RESET#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_WP_N, "RPC_WP#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -688,7 +731,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_PHYS_MSEL(IP1_23_20, HRX3_D, I2C_SEL_3_0, SEL_HSCIF3_3), PINMUX_IPSR_PHYS_MSEL(IP1_23_20, VI4_DATA7_B, I2C_SEL_3_0, SEL_VIN4_1), PINMUX_IPSR_PHYS_MSEL(IP1_23_20, IERX_B, I2C_SEL_3_0, SEL_IEBUS_1), - PINMUX_IPSR_PHYS(IP0_23_20, SCL3, I2C_SEL_3_1), + PINMUX_IPSR_PHYS(IP1_23_20, SCL3, I2C_SEL_3_1), PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0), PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3), @@ -1514,67 +1557,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A7796 has 8 banks with 32 GPIOs in each => 256 GPIOs. - * Physical layout rows: A - AW, cols: 1 - 39. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different r8a7796 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R-Car M3SiP to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1723,7 +1715,7 @@ static const unsigned int avb_phy_int_mux[] = { }; static const unsigned int avb_mdio_pins[] = { /* AVB_MDC, AVB_MDIO */ - RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), + RCAR_GP_PIN(2, 9), PIN_AVB_MDIO, }; static const unsigned int avb_mdio_mux[] = { AVB_MDC_MARK, AVB_MDIO_MARK, @@ -1736,12 +1728,11 @@ static const unsigned int avb_mii_pins[] = { * AVB_RD1, AVB_RD2, AVB_RD3, * AVB_TXCREFCLK */ - PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), - PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), - PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), - PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), - PIN_NUMBER('A', 12), - + PIN_AVB_TX_CTL, PIN_AVB_TXC, PIN_AVB_TD0, + PIN_AVB_TD1, PIN_AVB_TD2, PIN_AVB_TD3, + PIN_AVB_RX_CTL, PIN_AVB_RXC, PIN_AVB_RD0, + PIN_AVB_RD1, PIN_AVB_RD2, PIN_AVB_RD3, + PIN_AVB_TXCREFCLK, }; static const unsigned int avb_mii_mux[] = { AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, @@ -3267,6 +3258,57 @@ static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +/* - QSPI0 ------------------------------------------------------------------ */ +static const unsigned int qspi0_ctrl_pins[] = { + /* QSPI0_SPCLK, QSPI0_SSL */ + PIN_QSPI0_SPCLK, PIN_QSPI0_SSL, +}; +static const unsigned int qspi0_ctrl_mux[] = { + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK, +}; +static const unsigned int qspi0_data2_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, +}; +static const unsigned int qspi0_data2_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, +}; +static const unsigned int qspi0_data4_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, + /* QSPI0_IO2, QSPI0_IO3 */ + PIN_QSPI0_IO2, PIN_QSPI0_IO3, +}; +static const unsigned int qspi0_data4_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, +}; +/* - QSPI1 ------------------------------------------------------------------ */ +static const unsigned int qspi1_ctrl_pins[] = { + /* QSPI1_SPCLK, QSPI1_SSL */ + PIN_QSPI1_SPCLK, PIN_QSPI1_SSL, +}; +static const unsigned int qspi1_ctrl_mux[] = { + QSPI1_SPCLK_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int qspi1_data2_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, +}; +static const unsigned int qspi1_data2_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, +}; +static const unsigned int qspi1_data4_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, + /* QSPI1_IO2, QSPI1_IO3 */ + PIN_QSPI1_IO2, PIN_QSPI1_IO3, +}; +static const unsigned int qspi1_data4_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; + /* - SCIF0 ------------------------------------------------------------------ */ static const unsigned int scif0_data_pins[] = { /* RX, TX */ @@ -3895,6 +3937,36 @@ static const unsigned int tmu_tclk2_b_mux[] = { TCLK2_B_MARK, }; +/* - TPU ------------------------------------------------------------------- */ +static const unsigned int tpu_to0_pins[] = { + /* TPU0TO0 */ + RCAR_GP_PIN(6, 28), +}; +static const unsigned int tpu_to0_mux[] = { + TPU0TO0_MARK, +}; +static const unsigned int tpu_to1_pins[] = { + /* TPU0TO1 */ + RCAR_GP_PIN(6, 29), +}; +static const unsigned int tpu_to1_mux[] = { + TPU0TO1_MARK, +}; +static const unsigned int tpu_to2_pins[] = { + /* TPU0TO2 */ + RCAR_GP_PIN(6, 30), +}; +static const unsigned int tpu_to2_mux[] = { + TPU0TO2_MARK, +}; +static const unsigned int tpu_to3_pins[] = { + /* TPU0TO3 */ + RCAR_GP_PIN(6, 31), +}; +static const unsigned int tpu_to3_mux[] = { + TPU0TO3_MARK, +}; + /* - USB0 ------------------------------------------------------------------- */ static const unsigned int usb0_pins[] = { /* PWEN, OVC */ @@ -4114,7 +4186,7 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[312]; + struct sh_pfc_pin_group common[322]; #if defined(CONFIG_PINCTRL_PFC_R8A7796) struct sh_pfc_pin_group automotive[30]; #endif @@ -4319,6 +4391,12 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(qspi0_ctrl), + SH_PFC_PIN_GROUP(qspi0_data2), + SH_PFC_PIN_GROUP(qspi0_data4), + SH_PFC_PIN_GROUP(qspi1_ctrl), + SH_PFC_PIN_GROUP(qspi1_data2), + SH_PFC_PIN_GROUP(qspi1_data4), SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), @@ -4403,6 +4481,10 @@ static const struct { SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(tmu_tclk2_a), SH_PFC_PIN_GROUP(tmu_tclk2_b), + SH_PFC_PIN_GROUP(tpu_to0), + SH_PFC_PIN_GROUP(tpu_to1), + SH_PFC_PIN_GROUP(tpu_to2), + SH_PFC_PIN_GROUP(tpu_to3), SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb1), SH_PFC_PIN_GROUP(usb30), @@ -4805,6 +4887,18 @@ static const char * const pwm6_groups[] = { "pwm6_b", }; +static const char * const qspi0_groups[] = { + "qspi0_ctrl", + "qspi0_data2", + "qspi0_data4", +}; + +static const char * const qspi1_groups[] = { + "qspi1_ctrl", + "qspi1_data2", + "qspi1_data4", +}; + static const char * const scif0_groups[] = { "scif0_data", "scif0_clk", @@ -4928,6 +5022,13 @@ static const char * const tmu_groups[] = { "tmu_tclk2_b", }; +static const char * const tpu_groups[] = { + "tpu_to0", + "tpu_to1", + "tpu_to2", + "tpu_to3", +}; + static const char * const usb0_groups[] = { "usb0", }; @@ -4973,7 +5074,7 @@ static const char * const vin5_groups[] = { }; static const struct { - struct sh_pfc_function common[49]; + struct sh_pfc_function common[52]; #if defined(CONFIG_PINCTRL_PFC_R8A7796) struct sh_pfc_function automotive[4]; #endif @@ -5010,6 +5111,8 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi0), + SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif2), @@ -5023,6 +5126,7 @@ static const struct { SH_PFC_FUNCTION(sdhi3), SH_PFC_FUNCTION(ssi), SH_PFC_FUNCTION(tmu), + SH_PFC_FUNCTION(tpu), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(usb30), @@ -5604,44 +5708,44 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_drive_reg pinmux_drive_regs[] = { { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { - { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ - { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ - { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ - { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ - { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ - { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ - { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ - { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + { PIN_QSPI0_SPCLK, 28, 2 }, /* QSPI0_SPCLK */ + { PIN_QSPI0_MOSI_IO0, 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_QSPI0_MISO_IO1, 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_QSPI0_IO2, 16, 2 }, /* QSPI0_IO2 */ + { PIN_QSPI0_IO3, 12, 2 }, /* QSPI0_IO3 */ + { PIN_QSPI0_SSL, 8, 2 }, /* QSPI0_SSL */ + { PIN_QSPI1_SPCLK, 4, 2 }, /* QSPI1_SPCLK */ + { PIN_QSPI1_MOSI_IO0, 0, 2 }, /* QSPI1_MOSI_IO0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { - { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ - { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ - { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ - { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ - { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ - { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ - { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ - { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + { PIN_QSPI1_MISO_IO1, 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_QSPI1_IO2, 24, 2 }, /* QSPI1_IO2 */ + { PIN_QSPI1_IO3, 20, 2 }, /* QSPI1_IO3 */ + { PIN_QSPI1_SSL, 16, 2 }, /* QSPI1_SSL */ + { PIN_RPC_INT_N, 12, 2 }, /* RPC_INT# */ + { PIN_RPC_WP_N, 8, 2 }, /* RPC_WP# */ + { PIN_RPC_RESET_N, 4, 2 }, /* RPC_RESET# */ + { PIN_AVB_RX_CTL, 0, 3 }, /* AVB_RX_CTL */ } }, { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { - { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ - { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ - { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ - { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ - { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ - { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ - { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ - { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + { PIN_AVB_RXC, 28, 3 }, /* AVB_RXC */ + { PIN_AVB_RD0, 24, 3 }, /* AVB_RD0 */ + { PIN_AVB_RD1, 20, 3 }, /* AVB_RD1 */ + { PIN_AVB_RD2, 16, 3 }, /* AVB_RD2 */ + { PIN_AVB_RD3, 12, 3 }, /* AVB_RD3 */ + { PIN_AVB_TX_CTL, 8, 3 }, /* AVB_TX_CTL */ + { PIN_AVB_TXC, 4, 3 }, /* AVB_TXC */ + { PIN_AVB_TD0, 0, 3 }, /* AVB_TD0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { - { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ - { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ - { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ - { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ - { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ - { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ - { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ - { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + { PIN_AVB_TD1, 28, 3 }, /* AVB_TD1 */ + { PIN_AVB_TD2, 24, 3 }, /* AVB_TD2 */ + { PIN_AVB_TD3, 20, 3 }, /* AVB_TD3 */ + { PIN_AVB_TXCREFCLK, 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_AVB_MDIO, 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ } }, { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ @@ -5695,7 +5799,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { } }, { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ - { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { PIN_PRESETOUT_N, 24, 3 }, /* PRESETOUT# */ { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ @@ -5714,29 +5818,29 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ } }, { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { - { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ - { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ - { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ - { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ - { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ - { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ - { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ - { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ + { PIN_DU_DOTCLKIN0, 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_DU_DOTCLKIN1, 0, 2 }, /* DU_DOTCLKIN1 */ } }, { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { - { PIN_A_NUMBER('R', 8), 28, 2 }, /* DU_DOTCLKIN2 */ - { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST */ - { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ + { PIN_DU_DOTCLKIN2, 28, 2 }, /* DU_DOTCLKIN2 */ + { PIN_FSCLKST, 20, 2 }, /* FSCLKST */ + { PIN_TMS, 4, 2 }, /* TMS */ } }, { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { - { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ - { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ - { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ - { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ - { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ - { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ - { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ - { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + { PIN_TDO, 28, 2 }, /* TDO */ + { PIN_ASEBRK, 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ } }, { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ @@ -5805,7 +5909,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ - { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { PIN_MLB_REF, 4, 3 }, /* MLB_REF */ { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ } }, { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { @@ -5878,35 +5982,35 @@ static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *poc static const struct pinmux_bias_reg pinmux_bias_regs[] = { { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) { - [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */ - [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */ - [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */ - [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */ - [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */ - [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */ - [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */ - [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */ - [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */ - [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */ - [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */ - [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */ - [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */ - [13] = PIN_NUMBER('V', 6), /* RPC_WP# */ - [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */ - [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */ - [16] = PIN_NUMBER('B', 19), /* AVB_RXC */ - [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */ - [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */ - [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */ - [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */ - [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */ - [22] = PIN_NUMBER('A', 19), /* AVB_TXC */ - [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */ - [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */ - [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */ - [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */ - [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */ - [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */ + [ 0] = PIN_QSPI0_SPCLK, /* QSPI0_SPCLK */ + [ 1] = PIN_QSPI0_MOSI_IO0, /* QSPI0_MOSI_IO0 */ + [ 2] = PIN_QSPI0_MISO_IO1, /* QSPI0_MISO_IO1 */ + [ 3] = PIN_QSPI0_IO2, /* QSPI0_IO2 */ + [ 4] = PIN_QSPI0_IO3, /* QSPI0_IO3 */ + [ 5] = PIN_QSPI0_SSL, /* QSPI0_SSL */ + [ 6] = PIN_QSPI1_SPCLK, /* QSPI1_SPCLK */ + [ 7] = PIN_QSPI1_MOSI_IO0, /* QSPI1_MOSI_IO0 */ + [ 8] = PIN_QSPI1_MISO_IO1, /* QSPI1_MISO_IO1 */ + [ 9] = PIN_QSPI1_IO2, /* QSPI1_IO2 */ + [10] = PIN_QSPI1_IO3, /* QSPI1_IO3 */ + [11] = PIN_QSPI1_SSL, /* QSPI1_SSL */ + [12] = PIN_RPC_INT_N, /* RPC_INT# */ + [13] = PIN_RPC_WP_N, /* RPC_WP# */ + [14] = PIN_RPC_RESET_N, /* RPC_RESET# */ + [15] = PIN_AVB_RX_CTL, /* AVB_RX_CTL */ + [16] = PIN_AVB_RXC, /* AVB_RXC */ + [17] = PIN_AVB_RD0, /* AVB_RD0 */ + [18] = PIN_AVB_RD1, /* AVB_RD1 */ + [19] = PIN_AVB_RD2, /* AVB_RD2 */ + [20] = PIN_AVB_RD3, /* AVB_RD3 */ + [21] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ + [22] = PIN_AVB_TXC, /* AVB_TXC */ + [23] = PIN_AVB_TD0, /* AVB_TD0 */ + [24] = PIN_AVB_TD1, /* AVB_TD1 */ + [25] = PIN_AVB_TD2, /* AVB_TD2 */ + [26] = PIN_AVB_TD3, /* AVB_TD3 */ + [27] = PIN_AVB_TXCREFCLK, /* AVB_TXCREFCLK */ + [28] = PIN_AVB_MDIO, /* AVB_MDIO */ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */ @@ -5955,7 +6059,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */ - [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */ + [ 9] = PIN_PRESETOUT_N, /* PRESETOUT# */ [10] = RCAR_GP_PIN(0, 0), /* D0 */ [11] = RCAR_GP_PIN(0, 1), /* D1 */ [12] = RCAR_GP_PIN(0, 2), /* D2 */ @@ -5976,20 +6080,20 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = RCAR_GP_PIN(7, 1), /* AVS2 */ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */ - [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */ - [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */ + [30] = PIN_DU_DOTCLKIN0, /* DU_DOTCLKIN0 */ + [31] = PIN_DU_DOTCLKIN1, /* DU_DOTCLKIN1 */ } }, { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) { - [ 0] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN2 */ - [ 1] = PIN_NONE, - [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST */ - [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/ - [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */ - [ 5] = PIN_A_NUMBER('T', 27), /* TCK */ - [ 6] = PIN_A_NUMBER('R', 30), /* TMS */ - [ 7] = PIN_A_NUMBER('R', 29), /* TDI */ - [ 8] = PIN_NONE, - [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */ + [ 0] = PIN_DU_DOTCLKIN2, /* DU_DOTCLKIN2 */ + [ 1] = SH_PFC_PIN_NONE, + [ 2] = PIN_FSCLKST, /* FSCLKST */ + [ 3] = PIN_EXTALR, /* EXTALR*/ + [ 4] = PIN_TRST_N, /* TRST# */ + [ 5] = PIN_TCK, /* TCK */ + [ 6] = PIN_TMS, /* TMS */ + [ 7] = PIN_TDI, /* TDI */ + [ 8] = SH_PFC_PIN_NONE, + [ 9] = PIN_ASEBRK, /* ASEBRK */ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */ @@ -6054,7 +6158,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */ - [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */ + [ 6] = PIN_MLB_REF, /* MLB_REF */ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ @@ -6089,31 +6193,31 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */ [ 5] = RCAR_GP_PIN(6, 30), /* GP6_30 */ [ 6] = RCAR_GP_PIN(6, 31), /* GP6_31 */ - [ 7] = PIN_NONE, - [ 8] = PIN_NONE, - [ 9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, - [30] = PIN_NONE, - [31] = PIN_NONE, + [ 7] = SH_PFC_PIN_NONE, + [ 8] = SH_PFC_PIN_NONE, + [ 9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, + [30] = SH_PFC_PIN_NONE, + [31] = SH_PFC_PIN_NONE, } }, { /* sentinel */ }, }; diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c index d143750c2dd..fae29d535c8 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77965.c +++ b/drivers/pinctrl/renesas/pfc-r8a77965.c @@ -5,7 +5,7 @@ * Copyright (C) 2018 Jacopo Mondi * Copyright (C) 2016-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -20,11 +20,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ - SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ @@ -37,6 +35,51 @@ PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD0, "AVB_RD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD1, "AVB_RD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD2, "AVB_RD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD3, "AVB_RD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RXC, "AVB_RXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RX_CTL, "AVB_RX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXCREFCLK, "AVB_TXCREFCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN0, "DU_DOTCLKIN0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN1, "DU_DOTCLKIN1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN3, "DU_DOTCLKIN3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),\ + PIN_NOGP_CFG(FSCLKST, "FSCLKST", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO2, "QSPI0_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO3, "QSPI0_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MISO_IO1, "QSPI0_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MOSI_IO0, "QSPI0_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SPCLK, "QSPI0_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SSL, "QSPI0_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO2, "QSPI1_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO3, "QSPI1_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MISO_IO1, "QSPI1_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MOSI_IO0, "QSPI1_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SPCLK, "QSPI1_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SSL, "QSPI1_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_INT_N, "RPC_INT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_RESET_N, "RPC_RESET#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_WP_N, "RPC_WP#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -1519,67 +1562,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A77965 has 8 banks with 32 GPIOs in each => 256 GPIOs. - * Physical layout rows: A - AW, cols: 1 - 39. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different r8a77965 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R-Car M3SiP to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1728,7 +1720,7 @@ static const unsigned int avb_phy_int_mux[] = { }; static const unsigned int avb_mdio_pins[] = { /* AVB_MDC, AVB_MDIO */ - RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), + RCAR_GP_PIN(2, 9), PIN_AVB_MDIO, }; static const unsigned int avb_mdio_mux[] = { AVB_MDC_MARK, AVB_MDIO_MARK, @@ -1741,12 +1733,11 @@ static const unsigned int avb_mii_pins[] = { * AVB_RD1, AVB_RD2, AVB_RD3, * AVB_TXCREFCLK */ - PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), - PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), - PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), - PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), - PIN_NUMBER('A', 12), - + PIN_AVB_TX_CTL, PIN_AVB_TXC, PIN_AVB_TD0, + PIN_AVB_TD1, PIN_AVB_TD2, PIN_AVB_TD3, + PIN_AVB_RX_CTL, PIN_AVB_RXC, PIN_AVB_RD0, + PIN_AVB_RD1, PIN_AVB_RD2, PIN_AVB_RD3, + PIN_AVB_TXCREFCLK, }; static const unsigned int avb_mii_mux[] = { AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, @@ -3418,6 +3409,57 @@ static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +/* - QSPI0 ------------------------------------------------------------------ */ +static const unsigned int qspi0_ctrl_pins[] = { + /* QSPI0_SPCLK, QSPI0_SSL */ + PIN_QSPI0_SPCLK, PIN_QSPI0_SSL, +}; +static const unsigned int qspi0_ctrl_mux[] = { + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK, +}; +static const unsigned int qspi0_data2_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, +}; +static const unsigned int qspi0_data2_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, +}; +static const unsigned int qspi0_data4_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, + /* QSPI0_IO2, QSPI0_IO3 */ + PIN_QSPI0_IO2, PIN_QSPI0_IO3, +}; +static const unsigned int qspi0_data4_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, +}; +/* - QSPI1 ------------------------------------------------------------------ */ +static const unsigned int qspi1_ctrl_pins[] = { + /* QSPI1_SPCLK, QSPI1_SSL */ + PIN_QSPI1_SPCLK, PIN_QSPI1_SSL, +}; +static const unsigned int qspi1_ctrl_mux[] = { + QSPI1_SPCLK_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int qspi1_data2_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, +}; +static const unsigned int qspi1_data2_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, +}; +static const unsigned int qspi1_data4_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, + /* QSPI1_IO2, QSPI1_IO3 */ + PIN_QSPI1_IO2, PIN_QSPI1_IO3, +}; +static const unsigned int qspi1_data4_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; + /* - SATA --------------------------------------------------------------------*/ static const unsigned int sata0_devslp_a_pins[] = { /* DEVSLP */ @@ -4391,7 +4433,7 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[318]; + struct sh_pfc_pin_group common[324]; #ifdef CONFIG_PINCTRL_PFC_R8A77965 struct sh_pfc_pin_group automotive[30]; #endif @@ -4596,6 +4638,12 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(qspi0_ctrl), + SH_PFC_PIN_GROUP(qspi0_data2), + SH_PFC_PIN_GROUP(qspi0_data4), + SH_PFC_PIN_GROUP(qspi1_ctrl), + SH_PFC_PIN_GROUP(qspi1_data2), + SH_PFC_PIN_GROUP(qspi1_data4), SH_PFC_PIN_GROUP(sata0_devslp_a), SH_PFC_PIN_GROUP(sata0_devslp_b), SH_PFC_PIN_GROUP(scif0_data), @@ -5088,6 +5136,18 @@ static const char * const pwm6_groups[] = { "pwm6_b", }; +static const char * const qspi0_groups[] = { + "qspi0_ctrl", + "qspi0_data2", + "qspi0_data4", +}; + +static const char * const qspi1_groups[] = { + "qspi1_ctrl", + "qspi1_data2", + "qspi1_data4", +}; + static const char * const sata0_groups[] = { "sata0_devslp_a", "sata0_devslp_b", @@ -5267,7 +5327,7 @@ static const char * const vin5_groups[] = { }; static const struct { - struct sh_pfc_function common[51]; + struct sh_pfc_function common[53]; #ifdef CONFIG_PINCTRL_PFC_R8A77965 struct sh_pfc_function automotive[4]; #endif @@ -5304,6 +5364,8 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi0), + SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(sata0), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), @@ -5900,44 +5962,44 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_drive_reg pinmux_drive_regs[] = { { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { - { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ - { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ - { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ - { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ - { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ - { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ - { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ - { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + { PIN_QSPI0_SPCLK, 28, 2 }, /* QSPI0_SPCLK */ + { PIN_QSPI0_MOSI_IO0, 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_QSPI0_MISO_IO1, 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_QSPI0_IO2, 16, 2 }, /* QSPI0_IO2 */ + { PIN_QSPI0_IO3, 12, 2 }, /* QSPI0_IO3 */ + { PIN_QSPI0_SSL, 8, 2 }, /* QSPI0_SSL */ + { PIN_QSPI1_SPCLK, 4, 2 }, /* QSPI1_SPCLK */ + { PIN_QSPI1_MOSI_IO0, 0, 2 }, /* QSPI1_MOSI_IO0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { - { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ - { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ - { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ - { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ - { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ - { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ - { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ - { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + { PIN_QSPI1_MISO_IO1, 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_QSPI1_IO2, 24, 2 }, /* QSPI1_IO2 */ + { PIN_QSPI1_IO3, 20, 2 }, /* QSPI1_IO3 */ + { PIN_QSPI1_SSL, 16, 2 }, /* QSPI1_SSL */ + { PIN_RPC_INT_N, 12, 2 }, /* RPC_INT# */ + { PIN_RPC_WP_N, 8, 2 }, /* RPC_WP# */ + { PIN_RPC_RESET_N, 4, 2 }, /* RPC_RESET# */ + { PIN_AVB_RX_CTL, 0, 3 }, /* AVB_RX_CTL */ } }, { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { - { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ - { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ - { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ - { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ - { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ - { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ - { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ - { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + { PIN_AVB_RXC, 28, 3 }, /* AVB_RXC */ + { PIN_AVB_RD0, 24, 3 }, /* AVB_RD0 */ + { PIN_AVB_RD1, 20, 3 }, /* AVB_RD1 */ + { PIN_AVB_RD2, 16, 3 }, /* AVB_RD2 */ + { PIN_AVB_RD3, 12, 3 }, /* AVB_RD3 */ + { PIN_AVB_TX_CTL, 8, 3 }, /* AVB_TX_CTL */ + { PIN_AVB_TXC, 4, 3 }, /* AVB_TXC */ + { PIN_AVB_TD0, 0, 3 }, /* AVB_TD0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { - { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ - { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ - { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ - { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ - { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ - { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ - { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ - { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + { PIN_AVB_TD1, 28, 3 }, /* AVB_TD1 */ + { PIN_AVB_TD2, 24, 3 }, /* AVB_TD2 */ + { PIN_AVB_TD3, 20, 3 }, /* AVB_TD3 */ + { PIN_AVB_TXCREFCLK, 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_AVB_MDIO, 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ } }, { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ @@ -5991,7 +6053,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { } }, { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ - { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { PIN_PRESETOUT_N, 24, 3 }, /* PRESETOUT# */ { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ @@ -6010,29 +6072,29 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ } }, { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { - { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ - { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ - { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ - { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ - { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ - { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ - { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ - { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ + { PIN_DU_DOTCLKIN0, 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_DU_DOTCLKIN1, 0, 2 }, /* DU_DOTCLKIN1 */ } }, { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { - { PIN_A_NUMBER('R', 8), 28, 2 }, /* DU_DOTCLKIN3 */ - { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST */ - { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ + { PIN_DU_DOTCLKIN3, 24, 2 }, /* DU_DOTCLKIN3 */ + { PIN_FSCLKST, 20, 2 }, /* FSCLKST */ + { PIN_TMS, 4, 2 }, /* TMS */ } }, { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { - { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ - { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ - { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ - { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ - { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ - { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ - { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ - { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + { PIN_TDO, 28, 2 }, /* TDO */ + { PIN_ASEBRK, 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ } }, { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ @@ -6101,7 +6163,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ - { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { PIN_MLB_REF, 4, 3 }, /* MLB_REF */ { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ } }, { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { @@ -6174,35 +6236,35 @@ static int r8a77965_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *po static const struct pinmux_bias_reg pinmux_bias_regs[] = { { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) { - [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */ - [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */ - [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */ - [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */ - [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */ - [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */ - [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */ - [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */ - [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */ - [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */ - [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */ - [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */ - [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */ - [13] = PIN_NUMBER('V', 6), /* RPC_WP# */ - [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */ - [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */ - [16] = PIN_NUMBER('B', 19), /* AVB_RXC */ - [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */ - [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */ - [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */ - [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */ - [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */ - [22] = PIN_NUMBER('A', 19), /* AVB_TXC */ - [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */ - [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */ - [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */ - [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */ - [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */ - [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */ + [ 0] = PIN_QSPI0_SPCLK, /* QSPI0_SPCLK */ + [ 1] = PIN_QSPI0_MOSI_IO0, /* QSPI0_MOSI_IO0 */ + [ 2] = PIN_QSPI0_MISO_IO1, /* QSPI0_MISO_IO1 */ + [ 3] = PIN_QSPI0_IO2, /* QSPI0_IO2 */ + [ 4] = PIN_QSPI0_IO3, /* QSPI0_IO3 */ + [ 5] = PIN_QSPI0_SSL, /* QSPI0_SSL */ + [ 6] = PIN_QSPI1_SPCLK, /* QSPI1_SPCLK */ + [ 7] = PIN_QSPI1_MOSI_IO0, /* QSPI1_MOSI_IO0 */ + [ 8] = PIN_QSPI1_MISO_IO1, /* QSPI1_MISO_IO1 */ + [ 9] = PIN_QSPI1_IO2, /* QSPI1_IO2 */ + [10] = PIN_QSPI1_IO3, /* QSPI1_IO3 */ + [11] = PIN_QSPI1_SSL, /* QSPI1_SSL */ + [12] = PIN_RPC_INT_N, /* RPC_INT# */ + [13] = PIN_RPC_WP_N, /* RPC_WP# */ + [14] = PIN_RPC_RESET_N, /* RPC_RESET# */ + [15] = PIN_AVB_RX_CTL, /* AVB_RX_CTL */ + [16] = PIN_AVB_RXC, /* AVB_RXC */ + [17] = PIN_AVB_RD0, /* AVB_RD0 */ + [18] = PIN_AVB_RD1, /* AVB_RD1 */ + [19] = PIN_AVB_RD2, /* AVB_RD2 */ + [20] = PIN_AVB_RD3, /* AVB_RD3 */ + [21] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ + [22] = PIN_AVB_TXC, /* AVB_TXC */ + [23] = PIN_AVB_TD0, /* AVB_TD0 */ + [24] = PIN_AVB_TD1, /* AVB_TD1 */ + [25] = PIN_AVB_TD2, /* AVB_TD2 */ + [26] = PIN_AVB_TD3, /* AVB_TD3 */ + [27] = PIN_AVB_TXCREFCLK, /* AVB_TXCREFCLK */ + [28] = PIN_AVB_MDIO, /* AVB_MDIO */ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */ @@ -6251,7 +6313,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */ - [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */ + [ 9] = PIN_PRESETOUT_N, /* PRESETOUT# */ [10] = RCAR_GP_PIN(0, 0), /* D0 */ [11] = RCAR_GP_PIN(0, 1), /* D1 */ [12] = RCAR_GP_PIN(0, 2), /* D2 */ @@ -6272,20 +6334,20 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = RCAR_GP_PIN(7, 1), /* AVS2 */ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */ - [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */ - [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */ + [30] = PIN_DU_DOTCLKIN0, /* DU_DOTCLKIN0 */ + [31] = PIN_DU_DOTCLKIN1, /* DU_DOTCLKIN1 */ } }, { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) { - [ 0] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN3 */ - [ 1] = PIN_NONE, - [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST */ - [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/ - [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */ - [ 5] = PIN_A_NUMBER('T', 27), /* TCK */ - [ 6] = PIN_A_NUMBER('R', 30), /* TMS */ - [ 7] = PIN_A_NUMBER('R', 29), /* TDI */ - [ 8] = PIN_NONE, - [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */ + [ 0] = SH_PFC_PIN_NONE, + [ 1] = PIN_DU_DOTCLKIN3, /* DU_DOTCLKIN3 */ + [ 2] = PIN_FSCLKST, /* FSCLKST */ + [ 3] = PIN_EXTALR, /* EXTALR*/ + [ 4] = PIN_TRST_N, /* TRST# */ + [ 5] = PIN_TCK, /* TCK */ + [ 6] = PIN_TMS, /* TMS */ + [ 7] = PIN_TDI, /* TDI */ + [ 8] = SH_PFC_PIN_NONE, + [ 9] = PIN_ASEBRK, /* ASEBRK */ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */ @@ -6350,7 +6412,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */ - [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */ + [ 6] = PIN_MLB_REF, /* MLB_REF */ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ @@ -6385,31 +6447,31 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */ [ 5] = RCAR_GP_PIN(6, 30), /* GP6_30 */ [ 6] = RCAR_GP_PIN(6, 31), /* GP6_31 */ - [ 7] = PIN_NONE, - [ 8] = PIN_NONE, - [ 9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, - [30] = PIN_NONE, - [31] = PIN_NONE, + [ 7] = SH_PFC_PIN_NONE, + [ 8] = SH_PFC_PIN_NONE, + [ 9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, + [30] = SH_PFC_PIN_NONE, + [31] = SH_PFC_PIN_NONE, } }, { /* sentinel */ }, }; diff --git a/drivers/pinctrl/renesas/pfc-r8a77970.c b/drivers/pinctrl/renesas/pfc-r8a77970.c index 33ecd933986..4e6f406214d 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77970.c +++ b/drivers/pinctrl/renesas/pfc-r8a77970.c @@ -5,7 +5,7 @@ * Copyright (C) 2016 Renesas Electronics Corp. * Copyright (C) 2017 Cogent Embedded, Inc. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -20,7 +20,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_28(1, fn, sfx), \ PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ @@ -206,8 +206,8 @@ #define IP6_19_16 FM(VI1_DATA8) F_(0, 0) FM(CTS4_N) FM(D11) FM(MMC_D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP6_23_20 FM(VI1_DATA9) F_(0, 0) FM(RTS4_N) FM(D12) FM(MMC_D6) FM(SCL3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP6_27_24 FM(VI1_DATA10) F_(0, 0) F_(0, 0) FM(D13) FM(MMC_D7) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) FM(MMC_WP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP7_3_0 FM(VI1_FIELD) FM(SDA4) FM(IRQ5) FM(D15) FM(MMC_CD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_3_0 FM(VI1_FIELD) FM(SDA4) FM(IRQ5) FM(D15) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP7_7_4 FM(SCL0) FM(DU_DR0) FM(TPU0TO0) FM(CLKOUT) F_(0, 0) FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP7_11_8 FM(SDA0) FM(DU_DR1) FM(TPU0TO1) FM(BS_N) FM(SCK0) FM(MSIOF0_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP7_15_12 FM(SCL1) FM(DU_DG0) FM(TPU0TO2) FM(RD_N) FM(CTS0_N) FM(MSIOF0_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) @@ -632,14 +632,12 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_GPSR(IP6_31_28, SCL4), PINMUX_IPSR_GPSR(IP6_31_28, IRQ4), PINMUX_IPSR_GPSR(IP6_31_28, D14), - PINMUX_IPSR_GPSR(IP6_31_28, MMC_WP), /* IPSR7 */ PINMUX_IPSR_GPSR(IP7_3_0, VI1_FIELD), PINMUX_IPSR_GPSR(IP7_3_0, SDA4), PINMUX_IPSR_GPSR(IP7_3_0, IRQ5), PINMUX_IPSR_GPSR(IP7_3_0, D15), - PINMUX_IPSR_GPSR(IP7_3_0, MMC_CD), PINMUX_IPSR_GPSR(IP7_7_4, SCL0), PINMUX_IPSR_GPSR(IP7_7_4, DU_DR0), @@ -1122,20 +1120,6 @@ static const unsigned int mmc_ctrl_pins[] = { static const unsigned int mmc_ctrl_mux[] = { MMC_CLK_MARK, MMC_CMD_MARK, }; -static const unsigned int mmc_cd_pins[] = { - /* CD */ - RCAR_GP_PIN(3, 16), -}; -static const unsigned int mmc_cd_mux[] = { - MMC_CD_MARK, -}; -static const unsigned int mmc_wp_pins[] = { - /* WP */ - RCAR_GP_PIN(3, 15), -}; -static const unsigned int mmc_wp_mux[] = { - MMC_WP_MARK, -}; /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { @@ -1433,6 +1417,64 @@ static const unsigned int qspi1_data4_mux[] = { QSPI1_IO2_MARK, QSPI1_IO3_MARK }; +/* - RPC -------------------------------------------------------------------- */ +static const unsigned int rpc_clk1_pins[] = { + /* Octal-SPI flash: C/SCLK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int rpc_clk1_mux[] = { + QSPI0_SPCLK_MARK, +}; +static const unsigned int rpc_clk2_pins[] = { + /* HyperFlash: CK, CK# */ + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 6), +}; +static const unsigned int rpc_clk2_mux[] = { + QSPI0_SPCLK_MARK, QSPI1_SPCLK_MARK, +}; +static const unsigned int rpc_ctrl_pins[] = { + /* Octal-SPI flash: S#/CS, DQS */ + /* HyperFlash: CS#, RDS */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11), +}; +static const unsigned int rpc_ctrl_mux[] = { + QSPI0_SSL_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int rpc_data_pins[] = { + /* DQ[0:7] */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), + RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), + RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), + RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), +}; +static const unsigned int rpc_data_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; +static const unsigned int rpc_reset_pins[] = { + /* RPC_RESET# */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int rpc_reset_mux[] = { + RPC_RESET_N_MARK, +}; +static const unsigned int rpc_int_pins[] = { + /* RPC_INT# */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int rpc_int_mux[] = { + RPC_INT_N_MARK, +}; +static const unsigned int rpc_wp_pins[] = { + /* RPC_WP# */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int rpc_wp_mux[] = { + RPC_WP_N_MARK, +}; + /* - SCIF Clock ------------------------------------------------------------- */ static const unsigned int scif_clk_a_pins[] = { /* SCIF_CLK */ @@ -1727,8 +1769,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc_data4), SH_PFC_PIN_GROUP(mmc_data8), SH_PFC_PIN_GROUP(mmc_ctrl), - SH_PFC_PIN_GROUP(mmc_cd), - SH_PFC_PIN_GROUP(mmc_wp), SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -1769,6 +1809,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(qspi1_ctrl), SH_PFC_PIN_GROUP(qspi1_data2), SH_PFC_PIN_GROUP(qspi1_data4), + SH_PFC_PIN_GROUP(rpc_clk1), + SH_PFC_PIN_GROUP(rpc_clk2), + SH_PFC_PIN_GROUP(rpc_ctrl), + SH_PFC_PIN_GROUP(rpc_data), + SH_PFC_PIN_GROUP(rpc_reset), + SH_PFC_PIN_GROUP(rpc_int), + SH_PFC_PIN_GROUP(rpc_wp), SH_PFC_PIN_GROUP(scif_clk_a), SH_PFC_PIN_GROUP(scif_clk_b), SH_PFC_PIN_GROUP(scif0_data), @@ -1898,8 +1945,6 @@ static const char * const mmc_groups[] = { "mmc_data4", "mmc_data8", "mmc_ctrl", - "mmc_cd", - "mmc_wp", }; static const char * const msiof0_groups[] = { @@ -1975,6 +2020,16 @@ static const char * const qspi1_groups[] = { "qspi1_data4", }; +static const char * const rpc_groups[] = { + "rpc_clk1", + "rpc_clk2", + "rpc_ctrl", + "rpc_data", + "rpc_reset", + "rpc_int", + "rpc_wp", +}; + static const char * const scif_clk_groups[] = { "scif_clk_a", "scif_clk_b", @@ -2060,6 +2115,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), + SH_PFC_FUNCTION(rpc), SH_PFC_FUNCTION(scif_clk), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), diff --git a/drivers/pinctrl/renesas/pfc-r8a77980.c b/drivers/pinctrl/renesas/pfc-r8a77980.c index 32efb4409c6..2d15500f0f0 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77980.c +++ b/drivers/pinctrl/renesas/pfc-r8a77980.c @@ -5,7 +5,7 @@ * Copyright (C) 2018 Renesas Electronics Corp. * Copyright (C) 2018 Cogent Embedded, Inc. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -20,7 +20,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_28(1, fn, sfx), \ PORT_GP_CFG_30(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ @@ -1711,6 +1711,64 @@ static const unsigned int qspi1_data4_mux[] = { QSPI1_IO2_MARK, QSPI1_IO3_MARK }; +/* - RPC -------------------------------------------------------------------- */ +static const unsigned int rpc_clk1_pins[] = { + /* Octal-SPI flash: C/SCLK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int rpc_clk1_mux[] = { + QSPI0_SPCLK_MARK, +}; +static const unsigned int rpc_clk2_pins[] = { + /* HyperFlash: CK, CK# */ + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 6), +}; +static const unsigned int rpc_clk2_mux[] = { + QSPI0_SPCLK_MARK, QSPI1_SPCLK_MARK, +}; +static const unsigned int rpc_ctrl_pins[] = { + /* Octal-SPI flash: S#/CS, DQS */ + /* HyperFlash: CS#, RDS */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11), +}; +static const unsigned int rpc_ctrl_mux[] = { + QSPI0_SSL_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int rpc_data_pins[] = { + /* DQ[0:7] */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), + RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), + RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), + RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), +}; +static const unsigned int rpc_data_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; +static const unsigned int rpc_reset_pins[] = { + /* RPC_RESET# */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int rpc_reset_mux[] = { + RPC_RESET_N_MARK, +}; +static const unsigned int rpc_int_pins[] = { + /* RPC_INT# */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int rpc_int_mux[] = { + RPC_INT_N_MARK, +}; +static const unsigned int rpc_wp_pins[] = { + /* RPC_WP# */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int rpc_wp_mux[] = { + RPC_WP_N_MARK, +}; + /* - SCIF0 ------------------------------------------------------------------ */ static const unsigned int scif0_data_pins[] = { /* RX0, TX0 */ @@ -2127,6 +2185,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(qspi1_ctrl), SH_PFC_PIN_GROUP(qspi1_data2), SH_PFC_PIN_GROUP(qspi1_data4), + SH_PFC_PIN_GROUP(rpc_clk1), + SH_PFC_PIN_GROUP(rpc_clk2), + SH_PFC_PIN_GROUP(rpc_ctrl), + SH_PFC_PIN_GROUP(rpc_data), + SH_PFC_PIN_GROUP(rpc_reset), + SH_PFC_PIN_GROUP(rpc_int), + SH_PFC_PIN_GROUP(rpc_wp), SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), @@ -2363,6 +2428,16 @@ static const char * const qspi1_groups[] = { "qspi1_data4", }; +static const char * const rpc_groups[] = { + "rpc_clk1", + "rpc_clk2", + "rpc_ctrl", + "rpc_data", + "rpc_reset", + "rpc_int", + "rpc_wp", +}; + static const char * const scif0_groups[] = { "scif0_data", "scif0_clk", @@ -2461,6 +2536,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), + SH_PFC_FUNCTION(rpc), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif3), diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c index 572b041b83e..78b46de0417 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77990.c +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -4,7 +4,7 @@ * * Copyright (C) 2018-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R8A7796 processor support - PFC hardware block. * @@ -20,10 +20,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_23(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_26(2, fn, sfx, CFG_FLAGS), \ @@ -44,6 +43,25 @@ PORT_GP_CFG_1(6, 15, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_1(6, 16, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_1(6, 17, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDC, "AVB_MDC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(FSCLKST_N, "FSCLKST_N", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT_N", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TDI, "TDI", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST_N", fn, CFG_FLAGS) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -1283,41 +1301,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A77990 has 7 banks with 32 GPIOs in each => 224 GPIOs. - * Physical layout rows: A - AE, cols: 1 - 25. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 25 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different R8A77990 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R8A77990 to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('F', 1, TRST_N, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('F', 3, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('F', 4, TCK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('G', 2, TDI, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('G', 3, FSCLKST_N, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 1, ASEBRK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 1, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 2, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 3, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 5, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 6, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('P', 3, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('P', 4, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('P', 5, AVB_MDC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('T', 21, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 3, PRESETOUT_N, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -5115,15 +5108,15 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [0] = RCAR_GP_PIN(2, 23), /* RD# */ [1] = RCAR_GP_PIN(2, 22), /* BS# */ [2] = RCAR_GP_PIN(2, 21), /* AVB_PHY_INT */ - [3] = PIN_NUMBER('P', 5), /* AVB_MDC */ - [4] = PIN_NUMBER('P', 4), /* AVB_MDIO */ + [3] = PIN_AVB_MDC, /* AVB_MDC */ + [4] = PIN_AVB_MDIO, /* AVB_MDIO */ [5] = RCAR_GP_PIN(2, 20), /* AVB_TXCREFCLK */ - [6] = PIN_NUMBER('N', 6), /* AVB_TD3 */ - [7] = PIN_NUMBER('N', 5), /* AVB_TD2 */ - [8] = PIN_NUMBER('N', 3), /* AVB_TD1 */ - [9] = PIN_NUMBER('N', 2), /* AVB_TD0 */ - [10] = PIN_NUMBER('N', 1), /* AVB_TXC */ - [11] = PIN_NUMBER('P', 3), /* AVB_TX_CTL */ + [6] = PIN_AVB_TD3, /* AVB_TD3 */ + [7] = PIN_AVB_TD2, /* AVB_TD2 */ + [8] = PIN_AVB_TD1, /* AVB_TD1 */ + [9] = PIN_AVB_TD0, /* AVB_TD0 */ + [10] = PIN_AVB_TXC, /* AVB_TXC */ + [11] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ [12] = RCAR_GP_PIN(2, 19), /* AVB_RD3 */ [13] = RCAR_GP_PIN(2, 18), /* AVB_RD2 */ [14] = RCAR_GP_PIN(2, 17), /* AVB_RD1 */ @@ -5174,33 +5167,33 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [25] = RCAR_GP_PIN(1, 2), /* A2 */ [26] = RCAR_GP_PIN(1, 1), /* A1 */ [27] = RCAR_GP_PIN(1, 0), /* A0 */ - [28] = PIN_NONE, - [29] = PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, [30] = RCAR_GP_PIN(2, 25), /* PUEN_EX_WAIT0 */ [31] = RCAR_GP_PIN(2, 24), /* PUEN_RD/WR# */ } }, { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) { [0] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [1] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ - [2] = PIN_NUMBER('H', 1), /* ASEBRK */ - [3] = PIN_NONE, - [4] = PIN_NUMBER('G', 2), /* TDI */ - [5] = PIN_NUMBER('F', 3), /* TMS */ - [6] = PIN_NUMBER('F', 4), /* TCK */ - [7] = PIN_NUMBER('F', 1), /* TRST# */ - [8] = PIN_NONE, - [9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NUMBER('G', 3), /* FSCLKST# */ + [2] = PIN_ASEBRK, /* ASEBRK */ + [3] = SH_PFC_PIN_NONE, + [4] = PIN_TDI, /* TDI */ + [5] = PIN_TMS, /* TMS */ + [6] = PIN_TCK, /* TCK */ + [7] = PIN_TRST_N, /* TRST# */ + [8] = SH_PFC_PIN_NONE, + [9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = PIN_FSCLKST_N, /* FSCLKST# */ [16] = RCAR_GP_PIN(0, 17), /* SDA4 */ [17] = RCAR_GP_PIN(0, 16), /* SCL4 */ - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_A_NUMBER('D', 3), /* PRESETOUT# */ + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = PIN_PRESETOUT_N, /* PRESETOUT# */ [21] = RCAR_GP_PIN(0, 15), /* D15 */ [22] = RCAR_GP_PIN(0, 14), /* D14 */ [23] = RCAR_GP_PIN(0, 13), /* D13 */ @@ -5219,8 +5212,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [2] = RCAR_GP_PIN(5, 3), /* CTS0#_A */ [3] = RCAR_GP_PIN(5, 2), /* TX0_A */ [4] = RCAR_GP_PIN(5, 1), /* RX0_A */ - [5] = PIN_NONE, - [6] = PIN_NONE, + [5] = SH_PFC_PIN_NONE, + [6] = SH_PFC_PIN_NONE, [7] = RCAR_GP_PIN(3, 15), /* SD1_WP */ [8] = RCAR_GP_PIN(3, 14), /* SD1_CD */ [9] = RCAR_GP_PIN(3, 13), /* SD0_WP */ @@ -5264,7 +5257,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [13] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ [14] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [15] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ - [16] = PIN_NUMBER('T', 21), /* MLB_REF */ + [16] = PIN_MLB_REF, /* MLB_REF */ [17] = RCAR_GP_PIN(5, 19), /* MLB_DAT */ [18] = RCAR_GP_PIN(5, 18), /* MLB_SIG */ [19] = RCAR_GP_PIN(5, 17), /* MLB_CLK */ @@ -5282,36 +5275,36 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [31] = RCAR_GP_PIN(5, 5), /* RX1 */ } }, { PINMUX_BIAS_REG("PUEN5", 0xe6060414, "PUD5", 0xe6060454) { - [0] = PIN_NONE, - [1] = PIN_NONE, - [2] = PIN_NONE, - [3] = PIN_NONE, - [4] = PIN_NONE, - [5] = PIN_NONE, - [6] = PIN_NONE, - [7] = PIN_NONE, - [8] = PIN_NONE, - [9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, + [0] = SH_PFC_PIN_NONE, + [1] = SH_PFC_PIN_NONE, + [2] = SH_PFC_PIN_NONE, + [3] = SH_PFC_PIN_NONE, + [4] = SH_PFC_PIN_NONE, + [5] = SH_PFC_PIN_NONE, + [6] = SH_PFC_PIN_NONE, + [7] = SH_PFC_PIN_NONE, + [8] = SH_PFC_PIN_NONE, + [9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, [30] = RCAR_GP_PIN(6, 9), /* PUEN_USB30_OVC */ [31] = RCAR_GP_PIN(6, 17), /* PUEN_USB30_PWEN */ } }, diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c index 724cf4ae3c9..4ff1b76588c 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77995.c +++ b/drivers/pinctrl/renesas/pfc-r8a77995.c @@ -4,7 +4,7 @@ * * Copyright (C) 2017 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -19,7 +19,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_9(0, fn, sfx), \ PORT_GP_32(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index d5a245f4fd3..48d737a1414 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -1,11 +1,8 @@ -/* +/* SPDX-License-Identifier: GPL-2.0 + * * SuperH Pin Function Controller Support * * Copyright (c) 2008 Magnus Damm - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. */ #ifndef __SH_PFC_H @@ -21,19 +18,32 @@ enum { PINMUX_TYPE_INPUT, }; +#define SH_PFC_PIN_NONE U16_MAX + #define SH_PFC_PIN_CFG_INPUT (1 << 0) #define SH_PFC_PIN_CFG_OUTPUT (1 << 1) #define SH_PFC_PIN_CFG_PULL_UP (1 << 2) #define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3) +#define SH_PFC_PIN_CFG_PULL_UP_DOWN (SH_PFC_PIN_CFG_PULL_UP | \ + SH_PFC_PIN_CFG_PULL_DOWN) #define SH_PFC_PIN_CFG_IO_VOLTAGE (1 << 4) #define SH_PFC_PIN_CFG_DRIVE_STRENGTH (1 << 5) + +#define SH_PFC_PIN_VOLTAGE_18_33 (0 << 6) +#define SH_PFC_PIN_VOLTAGE_25_33 (1 << 6) + +#define SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 (SH_PFC_PIN_CFG_IO_VOLTAGE | \ + SH_PFC_PIN_VOLTAGE_18_33) +#define SH_PFC_PIN_CFG_IO_VOLTAGE_25_33 (SH_PFC_PIN_CFG_IO_VOLTAGE | \ + SH_PFC_PIN_VOLTAGE_25_33) + #define SH_PFC_PIN_CFG_NO_GPIO (1 << 31) struct sh_pfc_pin { - u16 pin; - u16 enum_id; const char *name; unsigned int configs; + u16 pin; + u16 enum_id; }; #define SH_PFC_PIN_GROUP_ALIAS(alias, n) \ @@ -393,12 +403,12 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; /* * Describe a pinmux configuration in which a pin is physically multiplexed * with other pins. - * - ipsr: IPSR field (unused, for documentation purposes only) + * - ipsr: IPSR field * - fn: Function name * - psel: Physical multiplexing selector */ #define PINMUX_IPSR_PHYS(ipsr, fn, psel) \ - PINMUX_DATA(fn##_MARK, FN_##psel) + PINMUX_DATA(fn##_MARK, FN_##psel, FN_##ipsr) /* * Describe a pinmux configuration for a single-function pin with GPIO @@ -416,9 +426,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; fn(bank, pin, GP_##bank##_##pin, sfx, cfg) #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) -#define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_2(bank, fn, sfx, cfg) \ PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 1, fn, sfx, cfg) +#define PORT_GP_2(bank, fn, sfx) PORT_GP_CFG_2(bank, fn, sfx, 0) + +#define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ + PORT_GP_CFG_2(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 3, fn, sfx, cfg) #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) @@ -517,9 +531,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PORT_GP_CFG_1(bank, 25, fn, sfx, cfg) #define PORT_GP_26(bank, fn, sfx) PORT_GP_CFG_26(bank, fn, sfx, 0) -#define PORT_GP_CFG_28(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_27(bank, fn, sfx, cfg) \ PORT_GP_CFG_26(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 26, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 26, fn, sfx, cfg) +#define PORT_GP_27(bank, fn, sfx) PORT_GP_CFG_27(bank, fn, sfx, 0) + +#define PORT_GP_CFG_28(bank, fn, sfx, cfg) \ + PORT_GP_CFG_27(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 27, fn, sfx, cfg) #define PORT_GP_28(bank, fn, sfx) PORT_GP_CFG_28(bank, fn, sfx, 0) @@ -533,9 +551,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PORT_GP_CFG_1(bank, 29, fn, sfx, cfg) #define PORT_GP_30(bank, fn, sfx) PORT_GP_CFG_30(bank, fn, sfx, 0) -#define PORT_GP_CFG_32(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_31(bank, fn, sfx, cfg) \ PORT_GP_CFG_30(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 30, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 30, fn, sfx, cfg) +#define PORT_GP_31(bank, fn, sfx) PORT_GP_CFG_31(bank, fn, sfx, 0) + +#define PORT_GP_CFG_32(bank, fn, sfx, cfg) \ + PORT_GP_CFG_31(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 31, fn, sfx, cfg) #define PORT_GP_32(bank, fn, sfx) PORT_GP_CFG_32(bank, fn, sfx, 0) @@ -559,7 +581,7 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; /* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */ #define _GP_ALL(bank, pin, name, sfx, cfg) name##_##sfx -#define GP_ALL(str) CPU_ALL_PORT(_GP_ALL, str) +#define GP_ALL(str) CPU_ALL_GP(_GP_ALL, str) /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */ #define _GP_GPIO(bank, _pin, _name, sfx, cfg) \ @@ -569,11 +591,29 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; .enum_id = _name##_DATA, \ .configs = cfg, \ } -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused) +#define PINMUX_GPIO_GP_ALL() CPU_ALL_GP(_GP_GPIO, unused) /* PINMUX_DATA_GP_ALL - Expand to a list of name_DATA, name_FN marks */ #define _GP_DATA(bank, pin, name, sfx, cfg) PINMUX_DATA(name##_DATA, name##_FN) -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused) +#define PINMUX_DATA_GP_ALL() CPU_ALL_GP(_GP_DATA, unused) + +/* + * GP_ASSIGN_LAST() - Expand to an enum definition for the last GP pin + * + * The largest GP pin index is obtained by taking the size of a union, + * containing one array per GP pin, sized by the corresponding pin index. + * As the fields in the CPU_ALL_GP() macro definition are separated by commas, + * while the members of a union must be terminated by semicolons, the commas + * are absorbed by wrapping them inside dummy attributes. + */ +#define _GP_ENTRY(bank, pin, name, sfx, cfg) \ + deprecated)); char name[(bank * 32) + pin] __attribute__((deprecated +#define GP_ASSIGN_LAST() \ + GP_LAST = sizeof(union { \ + char dummy[0] __attribute__((deprecated, \ + CPU_ALL_GP(_GP_ENTRY, unused), \ + deprecated)); \ + }) /* * PORT style (linear pin space) @@ -616,22 +656,6 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; .configs = cfgs, \ } -/* SH_PFC_PIN_NAMED - Expand to a sh_pfc_pin entry with the given name */ -#define SH_PFC_PIN_NAMED(row, col, _name) \ - { \ - .pin = PIN_NUMBER(row, col), \ - .name = __stringify(PIN_##_name), \ - .configs = SH_PFC_PIN_CFG_NO_GPIO, \ - } - -/* SH_PFC_PIN_NAMED_CFG - Expand to a sh_pfc_pin entry with the given name */ -#define SH_PFC_PIN_NAMED_CFG(row, col, _name, cfgs) \ - { \ - .pin = PIN_NUMBER(row, col), \ - .name = __stringify(PIN_##_name), \ - .configs = SH_PFC_PIN_CFG_NO_GPIO | cfgs, \ - } - /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0, * PORT_name_OUT, PORT_name_IN marks */ @@ -640,6 +664,24 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PORT##pfx##_OUT, PORT##pfx##_IN) #define PINMUX_DATA_ALL() CPU_ALL_PORT(_PORT_DATA, , unused) +/* + * PORT_ASSIGN_LAST() - Expand to an enum definition for the last PORT pin + * + * The largest PORT pin index is obtained by taking the size of a union, + * containing one array per PORT pin, sized by the corresponding pin index. + * As the fields in the CPU_ALL_PORT() macro definition are separated by + * commas, while the members of a union must be terminated by semicolons, the + * commas are absorbed by wrapping them inside dummy attributes. + */ +#define _PORT_ENTRY(pn, pfx, sfx) \ + deprecated)); char pfx[pn] __attribute__((deprecated +#define PORT_ASSIGN_LAST() \ + PORT_LAST = sizeof(union { \ + char dummy[0] __attribute__((deprecated, \ + CPU_ALL_PORT(_PORT_ENTRY, PORT, unused), \ + deprecated)); \ + }) + /* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */ #define PINMUX_GPIO_FN(gpio, base, data_or_mark) \ [gpio - (base)] = { \ @@ -649,6 +691,26 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; #define GPIO_FN(str) \ PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK) +/* + * Pins not associated with a GPIO port + */ + +#define PIN_NOGP_CFG(pin, name, fn, cfg) fn(pin, name, cfg) +#define PIN_NOGP(pin, name, fn) fn(pin, name, 0) + +/* NOGP_ALL - Expand to a list of PIN_id */ +#define _NOGP_ALL(pin, name, cfg) PIN_##pin +#define NOGP_ALL() CPU_ALL_NOGP(_NOGP_ALL) + +/* PINMUX_NOGP_ALL - Expand to a list of sh_pfc_pin entries */ +#define _NOGP_PINMUX(_pin, _name, cfg) \ + { \ + .pin = PIN_##_pin, \ + .name = "PIN_" _name, \ + .configs = SH_PFC_PIN_CFG_NO_GPIO | cfg, \ + } +#define PINMUX_NOGP_ALL() CPU_ALL_NOGP(_NOGP_PINMUX) + /* * PORTnCR helper macro for SH-Mobile/R-Mobile */ From c2d21e0ac087a153f1c4632e4ce46668bbf83633 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Tue, 1 Jun 2021 16:26:16 +0530 Subject: [PATCH 002/156] usb: cdns3: cdns3-ti: Fix clk_get_by_name() to get the correct name Kernel device tree got updated to use clock name as "ref" instead of "usb2_refclk". Fix cdns3-ti.c to use the correct name. Fixes: 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") Fixes: 6239cc8c4e84 ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot") Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Aswath Govindraju --- drivers/usb/cdns3/cdns3-ti.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index 7b205c56567..43171678ee1 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++ b/drivers/usb/cdns3/cdns3-ti.c @@ -101,7 +101,7 @@ static int cdns_ti_probe(struct udevice *dev) if (!data->usbss) return -EINVAL; - ret = clk_get_by_name(dev, "usb2_refclk", &usb2_refclk); + ret = clk_get_by_name(dev, "ref", &usb2_refclk); if (ret) { dev_err(dev, "Failed to get usb2_refclk\n"); return ret; From 0703f5923baa92026fab87272ca208825901809e Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 2 Jun 2021 10:11:19 +0200 Subject: [PATCH 003/156] doc: usage: reorder commands in index.rst Reorder alphabetically the command in the index of usage in U-Boot documentation. Signed-off-by: Patrick Delaunay Reviewed-by: Heinrich Schuchardt --- doc/usage/index.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/doc/usage/index.rst b/doc/usage/index.rst index c1f9b6a53b3..41b247bc624 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -34,12 +34,12 @@ Shell commands load loady mbr - mmc md + mmc pstore qfw + reset sbi + scp03 size true - scp03 - reset From ed9720d0550693cd8a9087906cc8264f86f59fd7 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 2 Jun 2021 13:56:45 +0200 Subject: [PATCH 004/156] doc: usage: man-page for pinmux command Provide a man-page for the pinmux command. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- doc/usage/index.rst | 1 + doc/usage/pinmux.rst | 95 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 96 insertions(+) create mode 100644 doc/usage/pinmux.rst diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 41b247bc624..e5717b71414 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -36,6 +36,7 @@ Shell commands mbr md mmc + pinmux pstore qfw reset diff --git a/doc/usage/pinmux.rst b/doc/usage/pinmux.rst new file mode 100644 index 00000000000..9f4392cd0db --- /dev/null +++ b/doc/usage/pinmux.rst @@ -0,0 +1,95 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +pinmux command +============== + +Synopsis +-------- + +:: + + pinmux list + pinmux dev [pincontroller-name] + pinmux status [-a | pin-name] + +Description +----------- + +The pinmux command is used to show the pin-controller muxing. + +The 'pinmux list' command diplays the available pin-controller. + +The 'pinmux dev' command selects the pin-controller for next commands. + + pincontroller-name + name of the pin-controller to select + +The 'pinmux status' command displays the pin muxing information. + + \-a + display pin muxing of all pin-controllers. + pin-name + name of the pin to display + +Example +------- + +:: + + => pinmux list + | Device | Driver | Parent + | pinctrl-gpio | sandbox_pinctrl_gpio | root_driver + | pinctrl | sandbox_pinctrl | root_driver + => + => pinmux dev pinctrl + dev: pinctrl + => + => pinmux status + P0 : UART TX. + P1 : UART RX. + P2 : I2S SCK. + P3 : I2S SD. + P4 : I2S WS. + P5 : GPIO0 bias-pull-up input-disable. + P6 : GPIO1 drive-open-drain. + P7 : GPIO2 bias-pull-down input-enable. + P8 : GPIO3 bias-disable. + => + => pinmux status P0 + P0 : UART TX. + => + => pinmux status -a + -------------------------- + pinctrl-gpio: + a0 : gpio input . + a1 : gpio input . + a2 : gpio input . + a3 : gpio input . + a4 : gpio input . + a5 : gpio output . + a6 : gpio output . + a7 : gpio input . + a8 : gpio input . + a9 : gpio input . + -------------------------- + pinctrl: + P0 : UART TX. + P1 : UART RX. + P2 : I2S SCK. + P3 : I2S SD. + P4 : I2S WS. + P5 : GPIO0 bias-pull-up input-disable. + P6 : GPIO1 drive-open-drain. + P7 : GPIO2 bias-pull-down input-enable. + P8 : GPIO3 bias-disable. + +Configuration +------------- + +The pinmux command is only available if CONFIG_CMD_PINMUX=y. + +Return value +------------ + +The return value $? is set to 0 (true) if the command succeded and to 1 (false) +otherwise. From 6b8d9c92fc5bebc190a3926be8bd1937ea459b0b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 4 Jun 2021 18:51:46 +0200 Subject: [PATCH 005/156] cmd: Add dependency for ums command Add the missing dependency for the command ums: - CONFIG_BLK: call of blk_* functions in usb_mass_storage.c - CONFIG_USB_GADGET: required to select CONFIG_USB_FUNCTION_MASS_STORAGE Signed-off-by: Patrick Delaunay Reviewed-by: Heinrich Schuchardt --- cmd/Kconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index f962bb71411..a9fb4eead29 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1346,8 +1346,11 @@ config CMD_ROCKUSB config CMD_USB_MASS_STORAGE bool "UMS usb mass storage" select USB_FUNCTION_MASS_STORAGE + depends on BLK && USB_GADGET help - USB mass storage support + Enables the command "ums" and the USB mass storage support to the + export a block device: U-Boot, the USB device, acts as a simple + external hard drive plugged on the host USB port. config CMD_PVBLOCK bool "Xen para-virtualized block device" From 6a1d65e59f43ffcaf19fc75fd272bc4cc6dbe85d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 4 Jun 2021 18:51:47 +0200 Subject: [PATCH 006/156] doc: usage: man-page for ums command Provide a man-page for the ums command - USB Mass Storage. Signed-off-by: Patrick Delaunay Reviewed-by: Heinrich Schuchardt --- doc/usage/index.rst | 1 + doc/usage/ums.rst | 57 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 doc/usage/ums.rst diff --git a/doc/usage/index.rst b/doc/usage/index.rst index e5717b71414..843b4371f13 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -44,3 +44,4 @@ Shell commands scp03 size true + ums diff --git a/doc/usage/ums.rst b/doc/usage/ums.rst new file mode 100644 index 00000000000..3cde5fa1f2a --- /dev/null +++ b/doc/usage/ums.rst @@ -0,0 +1,57 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +ums command +=========== + +Synopsis +-------- + +:: + + ums [] + +Description +----------- + +Use the USB Mass Storage class (also known as UMS) to make accessible an U-Boot +block device (fully or with :ref:`U-Boot's partition syntax `) +to a USB host and to enable file transfers. U-Boot, the USB device, acts as a +simple external hard drive plugged on the host USB port. + +This command "ums" stays in the USB's treatment loop until user enters Ctrl-C. + +dev + USB gadget device number + +interface + interface for accessing the block device (mmc, sata, scsi, usb, ....) + defaults is "mmc" + +devnum + device number for selected interface + +partnum + partition number or 0 to expose all partitions, defaults to 0 + +Example +------- + +:: + + => ums 0 mmc 0 + => ums 0 usb 1:2 + +Configuration +------------- + +The ums command is only available if CONFIG_CMD_USB_MASS_STORAGE=y +and depends on CONFIG_USB_USB_GADGET and CONFIG_BLK. + +Return value +------------ + +The return value $? is set to 0 (true) when the USB stack was successfully +started and interrupted, with Ctrl-C or after USB cable issue (detection +timeout or cable removal). + +If an error occurs, the return value $? is set to 1 (false). From 3dca77b1dc1b6dbf9c8b51572fe4b0553cef009f Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 25 May 2021 18:00:13 +0200 Subject: [PATCH 007/156] efi_loader: partition numbers are hexadecimal If we want to address partition 15 of virtio block device 11, we have to write: virtio b:f When calling sprintf() we must use %x for the device and partition numbers. Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_disk.c | 4 ++-- lib/efi_loader/efi_var_file.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c index 307d5d759b8..988907ecb91 100644 --- a/lib/efi_loader/efi_disk.c +++ b/lib/efi_loader/efi_disk.c @@ -476,7 +476,7 @@ static efi_status_t efi_disk_add_dev( efi_system_partition.if_type = desc->if_type; efi_system_partition.devnum = desc->devnum; efi_system_partition.part = part; - EFI_PRINT("EFI system partition: %s %d:%d\n", + EFI_PRINT("EFI system partition: %s %x:%x\n", blk_get_if_type_name(desc->if_type), desc->devnum, part); } @@ -521,7 +521,7 @@ int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc, if (part_get_info(desc, part, &info)) continue; - snprintf(devname, sizeof(devname), "%s:%d", pdevname, + snprintf(devname, sizeof(devname), "%s:%x", pdevname, part); ret = efi_disk_add_dev(parent, dp, if_typename, desc, diskid, &info, part, NULL); diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c index b171d2d1a8f..de076b8cbc4 100644 --- a/lib/efi_loader/efi_var_file.c +++ b/lib/efi_loader/efi_var_file.c @@ -35,7 +35,7 @@ static efi_status_t __maybe_unused efi_set_blk_dev_to_system_partition(void) log_err("No EFI system partition\n"); return EFI_DEVICE_ERROR; } - snprintf(part_str, PART_STR_LEN, "%u:%u", + snprintf(part_str, PART_STR_LEN, "%x:%x", efi_system_partition.devnum, efi_system_partition.part); r = fs_set_blk_dev(blk_get_if_type_name(efi_system_partition.if_type), part_str, FS_TYPE_ANY); From e27b0ff1b7135f966c1379acde48134dd6b15545 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 2 Jun 2021 19:28:22 +0200 Subject: [PATCH 008/156] efi_loader: efi_capsule_delete_file() NULL dereference If opening a file fails, the file handle pointer is not valid and must not be dereferenced. Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_capsule.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index 9ead0d2c781..60309d4a07d 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -901,7 +901,8 @@ static efi_status_t efi_capsule_delete_file(const u16 *filename) /* ignore an error */ EFI_CALL((*dirh->close)(dirh)); - ret = EFI_CALL((*fh->delete)(fh)); + if (ret == EFI_SUCCESS) + ret = EFI_CALL((*fh->delete)(fh)); return ret; } From dcd2bbe0510d7d47d745eeea063496a83cb3b08e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Loureiro?= Date: Wed, 17 Mar 2021 16:52:21 +0100 Subject: [PATCH 009/156] usb: dwc2: Avoid delay when initializing USB peripheral by dwc2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When `usb start` is called on the terminal, the dwc2 driver will try to start every USB device as host first, even if it is explicitly configured as peripheral in the device tree (dr_mode = "peripheral"). So to avoid an unwanted 15 seconds delay when initializing the usb (one second per channel = 1s x 15), this patch adds a check to the initialization, and will skip host initialization of the device is explicitly set as peripheral. The checking is already done similarly in the `drivers/usb/gadget/dwc2_udc_otg.c` driver. Signed-off-by: João Loureiro --- drivers/usb/host/dwc2.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index ec643e9f45b..43cc2e04339 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -1204,7 +1205,13 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv) #endif dwc_otg_core_init(dev); - dwc_otg_core_host_init(dev, regs); + + if (usb_get_dr_mode(dev_ofnode(dev)) == USB_DR_MODE_PERIPHERAL) { + dev_dbg(dev, "USB device %s dr_mode set to %d. Skipping host_init.\n", + dev->name, usb_get_dr_mode(dev_ofnode(dev))); + } else { + dwc_otg_core_host_init(dev, regs); + } clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | DWC2_HPRT0_PRTENCHNG | From b95e5edc424a14c1d03848c03f92389a945d3e61 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 9 Jun 2021 00:21:24 +0200 Subject: [PATCH 010/156] efi_loader: fix Sphinx warning Brackets '[' need to be escaped to avoid a build warning lib/efi_loader/efi_image_loader.c:223: WARNING: Inline strong start-string without end-string. Signed-off-by: Heinrich Schuchardt Reviewed-by: Masahisa Kojima --- lib/efi_loader/efi_image_loader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index bcd57f7fccc..a0eb63fcebe 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -220,7 +220,7 @@ static void efi_set_code_and_data_type( * @end: End address of region (excluded) * @nocheck: flag against overlapped regions * - * Take one entry of region [@start, @end[ and insert it into the list. + * Take one entry of region \[@start, @end\[ and insert it into the list. * * * If @nocheck is false, the list will be sorted ascending by address. * Overlapping entries will not be allowed. From 55ad6123067d1f4158c4b011672a354038bca373 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:30 +0200 Subject: [PATCH 011/156] arm: imxrt: soc: make mpu regions generic This mpu handling works for every i.MXRT SoC that we have, so let's generalize imxrt1050_region_config to imxrt_region_config. Signed-off-by: Giulio Benetti --- arch/arm/mach-imx/imxrt/soc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c index 8e7d15160da..c533f3554ae 100644 --- a/arch/arm/mach-imx/imxrt/soc.c +++ b/arch/arm/mach-imx/imxrt/soc.c @@ -14,7 +14,7 @@ int arch_cpu_init(void) { int i; - struct mpu_region_config imxrt1050_region_config[] = { + struct mpu_region_config imxrt_region_config[] = { { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, STRONG_ORDER, REGION_4GB }, { PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW, @@ -29,8 +29,8 @@ int arch_cpu_init(void) * the whole 4GB address space. */ disable_mpu(); - for (i = 0; i < ARRAY_SIZE(imxrt1050_region_config); i++) - mpu_config(&imxrt1050_region_config[i]); + for (i = 0; i < ARRAY_SIZE(imxrt_region_config); i++) + mpu_config(&imxrt_region_config[i]); enable_mpu(); return 0; From f8c8573b85765f60d4c4ef022a1fc57bbb2dd704 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:31 +0200 Subject: [PATCH 012/156] timer: imx-gpt: Add timer support for i.MX SoCs family This timer driver uses GPT Timer (General Purpose Timer) available on a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator as well as peripheral clock. Signed-off-by: Giulio Benetti [Giulio: added the driver's stub and handled peripheral clock prescaler setting making driver to work correctly] Signed-off-by: Jesse Taube [Jesse: added init, setting prescaler for 24Mhz support and enabling timer] --- drivers/timer/Kconfig | 7 ++ drivers/timer/Makefile | 1 + drivers/timer/imx-gpt-timer.c | 162 ++++++++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 drivers/timer/imx-gpt-timer.c diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 80743a25519..ee81dfa7768 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -227,4 +227,11 @@ config MCHP_PIT64B_TIMER Select this to enable support for Microchip 64-bit periodic interval timer. +config IMX_GPT_TIMER + bool "NXP i.MX GPT timer support" + depends on TIMER + help + Select this to enable support for the timer found on + NXP i.MX devices. + endmenu diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index 2ebdeab0ce1..e2bd530eb04 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -25,3 +25,4 @@ obj-$(CONFIG_STM32_TIMER) += stm32_timer.o obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o obj-$(CONFIG_MTK_TIMER) += mtk_timer.o obj-$(CONFIG_MCHP_PIT64B_TIMER) += mchp-pit64b-timer.o +obj-$(CONFIG_IMX_GPT_TIMER) += imx-gpt-timer.o diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c new file mode 100644 index 00000000000..72be2977547 --- /dev/null +++ b/drivers/timer/imx-gpt-timer.c @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 + * Author(s): Giulio Benetti + */ + +#include +#include +#include +#include +#include +#include + +#include + +#define GPT_CR_EN BIT(0) +#define GPT_CR_FRR BIT(9) +#define GPT_CR_EN_24M BIT(10) +#define GPT_CR_SWR BIT(15) + +#define GPT_PR_PRESCALER24M_MASK 0x0000F000 +#define GPT_PR_PRESCALER24M_SHIFT 12 +#define GPT_PR_PRESCALER24M_MAX (GPT_PR_PRESCALER24M_MASK >> GPT_PR_PRESCALER24M_SHIFT) +#define GPT_PR_PRESCALER_MASK 0x00000FFF +#define GPT_PR_PRESCALER_SHIFT 0 +#define GPT_PR_PRESCALER_MAX (GPT_PR_PRESCALER_MASK >> GPT_PR_PRESCALER_SHIFT) + +#define GPT_CLKSRC_IPG_CLK (1 << 6) +#define GPT_CLKSRC_IPG_CLK_24M (5 << 6) + +/* If CONFIG_SYS_HZ_CLOCK not specified et's default to 3Mhz */ +#ifndef CONFIG_SYS_HZ_CLOCK +#define CONFIG_SYS_HZ_CLOCK 3000000 +#endif + +struct imx_gpt_timer_regs { + u32 cr; + u32 pr; + u32 sr; + u32 ir; + u32 ocr1; + u32 ocr2; + u32 ocr3; + u32 icr1; + u32 icr2; + u32 cnt; +}; + +struct imx_gpt_timer_priv { + struct imx_gpt_timer_regs *base; +}; + +static u64 imx_gpt_timer_get_count(struct udevice *dev) +{ + struct imx_gpt_timer_priv *priv = dev_get_priv(dev); + struct imx_gpt_timer_regs *regs = priv->base; + + return timer_conv_64(readl(®s->cnt)); +} + +static int imx_gpt_setup(struct imx_gpt_timer_regs *regs, u32 rate) +{ + u32 prescaler = (rate / CONFIG_SYS_HZ_CLOCK) - 1; + + /* Reset the timer */ + setbits_le32(®s->cr, GPT_CR_SWR); + + /* Wait for timer to finish reset */ + while (readl(®s->cr) & GPT_CR_SWR) + ; + + if (rate == 24000000UL) { + /* Set timer frequency if using 24M clock source */ + if (prescaler > GPT_PR_PRESCALER24M_MAX) + return -EINVAL; + + /* Set 24M prescaler */ + writel((prescaler << GPT_PR_PRESCALER24M_SHIFT), ®s->pr); + /* Set Oscillator as clock source, enable 24M input and set gpt + * in free-running mode + */ + writel(GPT_CLKSRC_IPG_CLK_24M | GPT_CR_EN_24M | GPT_CR_FRR, ®s->cr); + } else { + if (prescaler > GPT_PR_PRESCALER_MAX) + return -EINVAL; + + /* Set prescaler */ + writel((prescaler << GPT_PR_PRESCALER_SHIFT), ®s->pr); + /* Set Peripheral as clock source and set gpt in free-running + * mode + */ + writel(GPT_CLKSRC_IPG_CLK | GPT_CR_FRR, ®s->cr); + } + + /* Start timer */ + setbits_le32(®s->cr, GPT_CR_EN); + + return 0; +} + +static int imx_gpt_timer_probe(struct udevice *dev) +{ + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct imx_gpt_timer_priv *priv = dev_get_priv(dev); + struct imx_gpt_timer_regs *regs; + struct clk clk; + fdt_addr_t addr; + u32 clk_rate; + int ret; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->base = (struct imx_gpt_timer_regs *)addr; + regs = priv->base; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) + return ret; + + ret = clk_enable(&clk); + if (ret) { + dev_err(dev, "Failed to enable clock\n"); + return ret; + } + + /* Get timer clock rate */ + clk_rate = clk_get_rate(&clk); + if (clk_rate <= 0) { + dev_err(dev, "Could not get clock rate...\n"); + return -EINVAL; + } + + ret = imx_gpt_setup(regs, clk_rate); + if (ret) { + dev_err(dev, "Could not setup timer\n"); + return ret; + } + + uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK; + + return 0; +} + +static const struct timer_ops imx_gpt_timer_ops = { + .get_count = imx_gpt_timer_get_count, +}; + +static const struct udevice_id imx_gpt_timer_ids[] = { + { .compatible = "fsl,imxrt-gpt" }, + {} +}; + +U_BOOT_DRIVER(imx_gpt_timer) = { + .name = "imx_gpt_timer", + .id = UCLASS_TIMER, + .of_match = imx_gpt_timer_ids, + .priv_auto = sizeof(struct imx_gpt_timer_priv), + .probe = imx_gpt_timer_probe, + .ops = &imx_gpt_timer_ops, +}; From bfdbe871a0e1bce36ec816b4ae2b2504fb2a895b Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:32 +0200 Subject: [PATCH 013/156] ARM: dts: imxrt1020: add node label to osc Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index 97f3cec9f3d..0a3a3b451a7 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -36,7 +36,7 @@ clock-frequency = <0>; }; - osc { + osc: osc { u-boot,dm-spl; compatible = "fsl,imx-osc", "fixed-clock"; #clock-cells = <0>; From df243c93d3094b658766ab73386e788be5ecfc08 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:33 +0200 Subject: [PATCH 014/156] ARM: dts: imxrt1020: add gpt1 node Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index 0a3a3b451a7..cab608c644c 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -129,5 +129,13 @@ interrupt-controller; #interrupt-cells = <2>; }; + + gpt1: gpt1@401ec000 { + compatible = "fsl,imxrt-gpt"; + reg = <0x401ec000 0x4000>; + interrupts = <100>; + clocks = <&osc>; + status = "disabled"; + }; }; }; From bc4944051ed832e36234de39ba641870b839c70e Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:34 +0200 Subject: [PATCH 015/156] ARM: dts: imxrt1020-evk: enable gpt1 timer Enable gpt1 timer. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts index ece13601bdd..a471ff38388 100644 --- a/arch/arm/dts/imxrt1020-evk.dts +++ b/arch/arm/dts/imxrt1020-evk.dts @@ -186,6 +186,10 @@ }; }; +&gpt1 { + status = "okay"; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc0>; From e5d10f4442598f83c77a983bc136c84a9199e8e5 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:35 +0200 Subject: [PATCH 016/156] ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-boot Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts index a471ff38388..b527206fcfe 100644 --- a/arch/arm/dts/imxrt1020-evk.dts +++ b/arch/arm/dts/imxrt1020-evk.dts @@ -16,6 +16,7 @@ chosen { bootargs = "root=/dev/ram"; stdout-path = "serial0:115200n8"; + tick-timer = &gpt1; }; memory { From faa4e95b5cda060e5c5449038d38b727fee7e5a7 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:36 +0200 Subject: [PATCH 017/156] ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPL Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk-u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi index d32c98de9c8..34d19e06c5f 100644 --- a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi @@ -10,6 +10,10 @@ }; }; +&gpt1 { + u-boot,dm-spl; +}; + &lpuart1 { /* console */ u-boot,dm-spl; }; From d956990c69dd1664c6c577d8d81e459606961991 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:37 +0200 Subject: [PATCH 018/156] ARM: dts: imxrt1020-evk: add device_type = "memory" to memory node Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts index b527206fcfe..2da79e5c20f 100644 --- a/arch/arm/dts/imxrt1020-evk.dts +++ b/arch/arm/dts/imxrt1020-evk.dts @@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x2000000>; }; }; From a2d89cce7c21925ac77ccfaa201d1d2a65fdbf5d Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:38 +0200 Subject: [PATCH 019/156] configs: imxrt1020-evk: enable imx gpt timer as tick-timer Let's enable imx-gpt-timer in imx1020-evk defconfig. Signed-off-by: Giulio Benetti --- configs/imxrt1020-evk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index ad408ebef88..f0b05b7165b 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -61,6 +61,7 @@ CONFIG_IMXRT_SDRAM=y CONFIG_FSL_LPUART=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y +CONFIG_IMX_GPT_TIMER=y CONFIG_SHA1=y CONFIG_SHA256=y CONFIG_HEXDUMP=y From 6cd7a9b8506af170bc5f44f06db03d4dfed0d962 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:39 +0200 Subject: [PATCH 020/156] ARM: dts: imxrt1050: add node label to osc Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index a9281001e55..b7cc3fbc2ad 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -28,7 +28,7 @@ clocks { u-boot,dm-spl; - osc { + osc: osc { u-boot,dm-spl; compatible = "fsl,imx-osc", "fixed-clock"; #clock-cells = <0>; From 5790db9283c905205546c33c94f272f6d4ac03bf Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:40 +0200 Subject: [PATCH 021/156] ARM: dts: imxrt1050: add gpt1 node Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index b7cc3fbc2ad..6f9da3fe8a4 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -154,5 +154,13 @@ clock-names = "per"; status = "disabled"; }; + + gpt1: gpt1@401ec000 { + compatible = "fsl,imxrt-gpt"; + reg = <0x401ec000 0x4000>; + interrupts = <100>; + clocks = <&osc>; + status = "disabled"; + }; }; }; From 7eacc427bbf3dcd767823fc4ab70ea5a428f1e48 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:41 +0200 Subject: [PATCH 022/156] ARM: dts: imxrt1050-evk: enable gpt1 timer Enable gpt1 timer. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index b5e781275e4..e5923303322 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -215,6 +215,10 @@ }; }; +&gpt1 { + status = "okay"; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc0>; From 7892f3eba1d93d6da1432781bcebb7ee65bf4742 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:42 +0200 Subject: [PATCH 023/156] ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-boot Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index e5923303322..6d21f2b7387 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -16,6 +16,7 @@ chosen { bootargs = "root=/dev/ram"; stdout-path = "serial0:115200n8"; + tick-timer = &gpt1; }; memory { From 0684ec8a9dbbd8cde518e45b651393f3669b0a03 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:43 +0200 Subject: [PATCH 024/156] ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPL Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk-u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi index fb4f7f6f9df..a4b50f0bb2a 100644 --- a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi @@ -10,6 +10,10 @@ }; }; +&gpt1 { + u-boot,dm-spl; +}; + &lpuart1 { /* console */ u-boot,dm-spl; }; From 6f6f03af0efe02d68f65b0b475184f654d9d2126 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:44 +0200 Subject: [PATCH 025/156] ARM: dts: imxrt1050-evk: add device_type = "memory" to memory node Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index 6d21f2b7387..2052d4eb4e1 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -20,6 +20,7 @@ }; memory { + device_type = "memory"; reg = <0x80000000 0x2000000>; }; }; From 72d65bdf35fa36af952ecb61adfb410576b82df9 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:45 +0200 Subject: [PATCH 026/156] configs: imxrt1050-evk: enable imx gpt timer as tick-timer Let's enable imx-gpt-timer in imx1050-evk defconfig. Signed-off-by: Giulio Benetti --- configs/imxrt1050-evk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index d03572e7db9..9c8bdb07dce 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -64,6 +64,7 @@ CONFIG_IMXRT_SDRAM=y CONFIG_FSL_LPUART=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y +CONFIG_IMX_GPT_TIMER=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_SYS_WHITE_ON_BLACK=y From ee62a053447ec7f204d086d8c072a601056f10d0 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:46 +0200 Subject: [PATCH 027/156] video: mxsfb: add enabling of "axi" clock other than "per" clock On some SoC mxsfb needs more than one clock gate(actual "per" clock). So let's introduce "axi" clock that can be provided but it's not mandatory. This is inspired from linux mxsfb driver. Also let's rename "per" clock to "pix" clock for compatibility with already existing .dts lcdif nodes implementation. Signed-off-by: Giulio Benetti --- drivers/video/mxsfb.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index e1fd36a62d6..147bd668feb 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -67,26 +67,37 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, uint32_t vdctrl0; #if CONFIG_IS_ENABLED(CLK) - struct clk per_clk; + struct clk clk; int ret; - ret = clk_get_by_name(dev, "per", &per_clk); + ret = clk_get_by_name(dev, "pix", &clk); if (ret) { - dev_err(dev, "Failed to get mxs clk: %d\n", ret); + dev_err(dev, "Failed to get mxs pix clk: %d\n", ret); return; } - ret = clk_set_rate(&per_clk, timings->pixelclock.typ); + ret = clk_set_rate(&clk, timings->pixelclock.typ); if (ret < 0) { - dev_err(dev, "Failed to set mxs clk: %d\n", ret); + dev_err(dev, "Failed to set mxs pix clk: %d\n", ret); return; } - ret = clk_enable(&per_clk); + ret = clk_enable(&clk); if (ret < 0) { - dev_err(dev, "Failed to enable mxs clk: %d\n", ret); + dev_err(dev, "Failed to enable mxs pix clk: %d\n", ret); return; } + + ret = clk_get_by_name(dev, "axi", &clk); + if (!ret) { + debug("%s: Failed to get mxs axi clk: %d\n", __func__, ret); + } else { + ret = clk_enable(&clk); + if (ret < 0) { + dev_err(dev, "Failed to enable mxs axi clk: %d\n", ret); + return; + } + } #else /* Kick in the LCDIF clock */ mxs_set_lcdclk(MXS_LCDIF_BASE, timings->pixelclock.typ / 1000); From 006f0dfb1d6dfa2bf7b1a08d2abcaf40eee6ae96 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:18:47 +0200 Subject: [PATCH 028/156] video: mxsfb: add enabling of "disp_axi" clock Some SoC needs "disp_axi" clock to be enabled, so let's try to retrieve it and enabling. If it fails it gives only a debug(), but this clock as well as "axi" clock is not mandatory. Signed-off-by: Giulio Benetti --- drivers/video/mxsfb.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 147bd668feb..523d8a8d983 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -98,6 +98,17 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, return; } } + + ret = clk_get_by_name(dev, "disp_axi", &clk); + if (!ret) { + debug("%s: Failed to get mxs disp_axi clk: %d\n", __func__, ret); + } else { + ret = clk_enable(&clk); + if (ret < 0) { + dev_err(dev, "Failed to enable mxs disp_axi clk: %d\n", ret); + return; + } + } #else /* Kick in the LCDIF clock */ mxs_set_lcdclk(MXS_LCDIF_BASE, timings->pixelclock.typ / 1000); From f544dfecd2801489ad7efe24bf3e3452b48f2c40 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:19:33 +0200 Subject: [PATCH 029/156] clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti --- drivers/clk/imx/clk-imxrt1050.c | 6 ++++-- include/dt-bindings/clock/imxrt1050-clock.h | 5 +++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c index 594093ee5fb..eb6847f8656 100644 --- a/drivers/clk/imx/clk-imxrt1050.c +++ b/drivers/clk/imx/clk-imxrt1050.c @@ -255,8 +255,10 @@ static int imxrt1050_clk_probe(struct udevice *dev) imx_clk_gate2("lpuart1", "lpuart_podf", base + 0x7c, 24)); clk_dm(IMXRT1050_CLK_SEMC, imx_clk_gate2("semc", "semc_podf", base + 0x74, 4)); - clk_dm(IMXRT1050_CLK_LCDIF, - imx_clk_gate2("lcdif", "lcdif_podf", base + 0x74, 10)); + clk_dm(IMXRT1050_CLK_LCDIF_APB, + imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28)); + clk_dm(IMXRT1050_CLK_LCDIF_PIX, + imx_clk_gate2("lcdif_pix", "lcdif", base + 0x74, 10)); struct clk *clk, *clk1; diff --git a/include/dt-bindings/clock/imxrt1050-clock.h b/include/dt-bindings/clock/imxrt1050-clock.h index c174f90c1ab..09b65e5df27 100644 --- a/include/dt-bindings/clock/imxrt1050-clock.h +++ b/include/dt-bindings/clock/imxrt1050-clock.h @@ -52,7 +52,7 @@ #define IMXRT1050_CLK_USDHC2 43 #define IMXRT1050_CLK_LPUART1 44 #define IMXRT1050_CLK_SEMC 45 -#define IMXRT1050_CLK_LCDIF 46 +#define IMXRT1050_CLK_LCDIF_APB 46 #define IMXRT1050_CLK_PLL1_ARM 47 #define IMXRT1050_CLK_PLL2_SYS 48 #define IMXRT1050_CLK_PLL3_USB_OTG 49 @@ -60,6 +60,7 @@ #define IMXRT1050_CLK_PLL5_VIDEO 51 #define IMXRT1050_CLK_PLL6_ENET 52 #define IMXRT1050_CLK_PLL7_USB_HOST 53 -#define IMXRT1050_CLK_END 54 +#define IMXRT1050_CLK_LCDIF_PIX 54 +#define IMXRT1050_CLK_END 55 #endif /* __DT_BINDINGS_CLOCK_IMXRT1050_H */ From f2d91e606b7b903dbe7577954fa8e454a2d6e38c Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:19:34 +0200 Subject: [PATCH 030/156] ARM: dts: imxrt1050: move lcdif assigned clock to dtsi Since we assume pll5 is the default lcdif clock source let's move assigned-clocks(-parents) properties to .dtsi file. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 3 --- arch/arm/dts/imxrt1050.dtsi | 2 ++ 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index 2052d4eb4e1..dc66fc9c37b 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -238,9 +238,6 @@ display = <&display0>; status = "okay"; - assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>; - assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>; - display0: display0 { bits-per-pixel = <16>; bus-width = <16>; diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index 6f9da3fe8a4..eb5e09e9715 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -152,6 +152,8 @@ interrupts = ; clocks = <&clks IMXRT1050_CLK_LCDIF>; clock-names = "per"; + assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>; + assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>; status = "disabled"; }; From a9a5c33d579c1f754092993dc4917ca7f774af32 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:19:35 +0200 Subject: [PATCH 031/156] ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driver Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to lcdif node. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index eb5e09e9715..ec1eb88e453 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -150,8 +150,9 @@ compatible = "fsl,imxrt-lcdif"; reg = <0x402b8000 0x4000>; interrupts = ; - clocks = <&clks IMXRT1050_CLK_LCDIF>; - clock-names = "per"; + clocks = <&clks IMXRT1050_CLK_LCDIF_PIX>, + <&clks IMXRT1050_CLK_LCDIF_APB>; + clock-names = "pix", "axi"; assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>; assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>; status = "disabled"; From 31f0e585271291252deb1c809c6e710cbf54dec9 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 13 May 2021 12:19:36 +0200 Subject: [PATCH 032/156] ARM: dts: imxrt1050-evk: remove u-boot,dm-spl We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index dc66fc9c37b..81db1a446d0 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -189,7 +189,6 @@ }; pinctrl_lcdif: lcdifgrp { - u-boot,dm-spl; fsl,pins = < MXRT1050_IOMUXC_GPIO_B0_00_LCD_CLK 0x1b0b1 MXRT1050_IOMUXC_GPIO_B0_01_LCD_ENABLE 0x1b0b1 From 1f3555d906442b3899660c9120a89cee12ab1d06 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Sun, 16 May 2021 23:57:00 +0200 Subject: [PATCH 033/156] ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to imxrt1050-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1050-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk-u-boot.dtsi | 38 ++++++++++++++++++++++++++ arch/arm/dts/imxrt1050.dtsi | 13 --------- 2 files changed, 38 insertions(+), 13 deletions(-) diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi index a4b50f0bb2a..3168c2df2cf 100644 --- a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi @@ -8,6 +8,42 @@ chosen { u-boot,dm-spl; }; + + clocks { + u-boot,dm-spl; + }; + + soc { + u-boot,dm-spl; + }; +}; + +&osc { + u-boot,dm-spl; +}; + +&clks { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; }; &gpt1 { @@ -19,6 +55,8 @@ }; &semc { + u-boot,dm-spl; + bank1: bank@0 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index ec1eb88e453..1f283049818 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -26,10 +26,7 @@ }; clocks { - u-boot,dm-spl; - osc: osc { - u-boot,dm-spl; compatible = "fsl,imx-osc", "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; @@ -37,10 +34,7 @@ }; soc { - u-boot,dm-spl; - semc: semc@402f0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-semc"; reg = <0x402f0000 0x4000>; clocks = <&clks IMXRT1050_CLK_SEMC>; @@ -65,7 +59,6 @@ }; clks: ccm@400fc000 { - u-boot,dm-spl; compatible = "fsl,imxrt1050-ccm"; reg = <0x400fc000 0x4000>; interrupts = , @@ -74,7 +67,6 @@ }; usdhc1: usdhc@402c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-usdhc"; reg = <0x402c0000 0x10000>; interrupts = ; @@ -87,7 +79,6 @@ }; gpio1: gpio@401b8000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401b8000 0x4000>; interrupts = , @@ -99,7 +90,6 @@ }; gpio2: gpio@401bc000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401bc000 0x4000>; interrupts = , @@ -111,7 +101,6 @@ }; gpio3: gpio@401c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401c0000 0x4000>; interrupts = , @@ -123,7 +112,6 @@ }; gpio4: gpio@401c4000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401c4000 0x4000>; interrupts = , @@ -135,7 +123,6 @@ }; gpio5: gpio@400c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x400c0000 0x4000>; interrupts = , From dc54f8290150ebf9d54ece7b6ece188dc616b6db Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Sun, 16 May 2021 23:57:01 +0200 Subject: [PATCH 034/156] ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to imxrt1020-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1020-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk-u-boot.dtsi | 34 ++++++++++++++++++++++++++ arch/arm/dts/imxrt1020.dtsi | 10 -------- 2 files changed, 34 insertions(+), 10 deletions(-) diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi index 34d19e06c5f..121665a2d22 100644 --- a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi @@ -8,6 +8,38 @@ chosen { u-boot,dm-spl; }; + + clocks { + u-boot,dm-spl; + }; + + soc { + u-boot,dm-spl; + }; +}; + +&osc { + u-boot,dm-spl; +}; + +&clks { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; }; &gpt1 { @@ -19,6 +51,8 @@ }; &semc { + u-boot,dm-spl; + bank1: bank@0 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index cab608c644c..884d57f6140 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -23,7 +23,6 @@ }; clocks { - u-boot,dm-spl; ckil { compatible = "fsl,imx-ckil", "fixed-clock"; #clock-cells = <0>; @@ -37,7 +36,6 @@ }; osc: osc { - u-boot,dm-spl; compatible = "fsl,imx-osc", "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; @@ -45,10 +43,7 @@ }; soc { - u-boot,dm-spl; - semc: semc@402f0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-semc"; reg = <0x402f0000 0x4000>; clocks = <&clks IMXRT1020_CLK_SEMC>; @@ -73,7 +68,6 @@ }; clks: ccm@400fc000 { - u-boot,dm-spl; compatible = "fsl,imxrt1020-ccm"; reg = <0x400fc000 0x4000>; interrupts = , @@ -82,7 +76,6 @@ }; usdhc1: usdhc@402c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-usdhc"; reg = <0x402c0000 0x10000>; interrupts = ; @@ -95,7 +88,6 @@ }; gpio1: gpio@401b8000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401b8000 0x4000>; interrupts = , @@ -107,7 +99,6 @@ }; gpio2: gpio@401bc000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401bc000 0x4000>; interrupts = , @@ -119,7 +110,6 @@ }; gpio3: gpio@401c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401c0000 0x4000>; interrupts = , From d7308dbd864c1d0447bfe62cc42a6ff470369d66 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Sun, 16 May 2021 23:57:02 +0200 Subject: [PATCH 035/156] ARM: dts: imxrt1020: add gpio5 node to this SoC i.MXRT1020 supports gpio5, so let's add a node for it. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index 884d57f6140..5ba314f9953 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -120,6 +120,17 @@ #interrupt-cells = <2>; }; + gpio5: gpio@400c0000 { + compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; + reg = <0x400c0000 0x4000>; + interrupts = , + ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + gpt1: gpt1@401ec000 { compatible = "fsl,imxrt-gpt"; reg = <0x401ec000 0x4000>; From 0d90dec18222871d6884aa7ed483169cd016e399 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 20 May 2021 16:10:13 +0200 Subject: [PATCH 036/156] ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev() We need those macros to instruct drivers on how to behave for SoC specific quirks, so let's add it as done for other i.MX SoCs. Signed-off-by: Giulio Benetti --- arch/arm/include/asm/arch-imx/cpu.h | 3 +++ arch/arm/include/asm/mach-imx/sys_proto.h | 4 ++++ arch/arm/mach-imx/imxrt/soc.c | 12 ++++++++++++ 3 files changed, 19 insertions(+) diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index bb13e07b66f..267a094e5a7 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -50,6 +50,8 @@ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ #define MXC_CPU_IMX8QM 0x91 /* dummy ID */ #define MXC_CPU_IMX8QXP 0x92 /* dummy ID */ +#define MXC_CPU_IMXRT1020 0xB4 /* dummy ID */ +#define MXC_CPU_IMXRT1050 0xB6 /* dummy ID */ #define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */ #define MXC_CPU_VF610 0xF6 /* dummy ID */ @@ -57,6 +59,7 @@ #define MXC_SOC_MX7 0x70 #define MXC_SOC_IMX8M 0x80 #define MXC_SOC_IMX8 0x90 /* dummy */ +#define MXC_SOC_IMXRT 0xB0 /* dummy */ #define MXC_SOC_MX7ULP 0xE0 /* dummy */ #define CHIP_REV_1_0 0x10 diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index c7668ffc4d8..b6121898498 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -31,6 +31,7 @@ struct bd_info; #define is_mx7() (is_soc_type(MXC_SOC_MX7)) #define is_imx8m() (is_soc_type(MXC_SOC_IMX8M)) #define is_imx8() (is_soc_type(MXC_SOC_IMX8)) +#define is_imxrt() (is_soc_type(MXC_SOC_IMXRT)) #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)) #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) @@ -78,6 +79,9 @@ struct bd_info; #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) +#define is_imxrt1020() (is_cpu_type(MXC_CPU_IMXRT1020)) +#define is_imxrt1050() (is_cpu_type(MXC_CPU_IMXRT1050)) + #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28) #define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30) diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c index c533f3554ae..ba015992ee5 100644 --- a/arch/arm/mach-imx/imxrt/soc.c +++ b/arch/arm/mach-imx/imxrt/soc.c @@ -8,6 +8,7 @@ #include #include #include +#include #include int arch_cpu_init(void) @@ -35,3 +36,14 @@ int arch_cpu_init(void) return 0; } + +u32 get_cpu_rev(void) +{ +#if defined(CONFIG_IMXRT1020) + return MXC_CPU_IMXRT1020 << 12; +#elif defined(CONFIG_IMXRT1050) + return MXC_CPU_IMXRT1050 << 12; +#else +#error This IMXRT SoC is not supported +#endif +} From 45a5f76cfcf59e4965075bf17663e2e0b1b3ab7f Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 20 May 2021 16:10:14 +0200 Subject: [PATCH 037/156] clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti --- drivers/clk/imx/clk-imxrt1050.c | 2 ++ include/dt-bindings/clock/imxrt1050-clock.h | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c index eb6847f8656..3e171610024 100644 --- a/drivers/clk/imx/clk-imxrt1050.c +++ b/drivers/clk/imx/clk-imxrt1050.c @@ -259,6 +259,8 @@ static int imxrt1050_clk_probe(struct udevice *dev) imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28)); clk_dm(IMXRT1050_CLK_LCDIF_PIX, imx_clk_gate2("lcdif_pix", "lcdif", base + 0x74, 10)); + clk_dm(IMXRT1050_CLK_USBOH3, + imx_clk_gate2("usboh3", "pll3_usb_otg", base + 0x80, 0)); struct clk *clk, *clk1; diff --git a/include/dt-bindings/clock/imxrt1050-clock.h b/include/dt-bindings/clock/imxrt1050-clock.h index 09b65e5df27..f74dbbcf937 100644 --- a/include/dt-bindings/clock/imxrt1050-clock.h +++ b/include/dt-bindings/clock/imxrt1050-clock.h @@ -61,6 +61,7 @@ #define IMXRT1050_CLK_PLL6_ENET 52 #define IMXRT1050_CLK_PLL7_USB_HOST 53 #define IMXRT1050_CLK_LCDIF_PIX 54 -#define IMXRT1050_CLK_END 55 +#define IMXRT1050_CLK_USBOH3 55 +#define IMXRT1050_CLK_END 56 #endif /* __DT_BINDINGS_CLOCK_IMXRT1050_H */ From e7e81e8959ebc3d5031eae3d5ff03990656f5c36 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 20 May 2021 16:10:15 +0200 Subject: [PATCH 038/156] usb: ehci-mx6: add support for i.MXRT Add support for usb1 and usb2 present on i.IMXRT. Signed-off-by: Giulio Benetti --- arch/arm/include/asm/arch-imxrt/imx-regs.h | 4 ++++ drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ehci-mx6.c | 13 +++++++------ 3 files changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/arch-imxrt/imx-regs.h b/arch/arm/include/asm/arch-imxrt/imx-regs.h index 44c95dcd114..d01e6ca2e02 100644 --- a/arch/arm/include/asm/arch-imxrt/imx-regs.h +++ b/arch/arm/include/asm/arch-imxrt/imx-regs.h @@ -23,4 +23,8 @@ #include #endif +#define USB_BASE_ADDR 0x402E0000 +#define USB_PHY0_BASE_ADDR 0x400D9000 +#define USB_PHY1_BASE_ADDR 0x400DA000 + #endif /* __ASM_ARCH_IMX_REGS_H__ */ diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index bf5d82f0350..f34cba2395c 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -149,7 +149,7 @@ config USB_EHCI_MX5 config USB_EHCI_MX6 bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller" - depends on ARCH_MX6 || ARCH_MX7ULP + depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT default y ---help--- Enables support for the on-chip EHCI controller on i.MX6 SoCs. diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 06be9deaaae..238c93183b0 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -177,7 +177,7 @@ static void __maybe_unused usb_power_config_mx7ulp(void *usbphy) { } #endif -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMXRT) static const unsigned phy_bases[] = { USB_PHY0_BASE_ADDR, #if defined(USB_PHY1_BASE_ADDR) @@ -340,7 +340,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { enum usb_init_type type; -#if defined(CONFIG_MX6) +#if defined(CONFIG_MX6) || defined(CONFIG_IMXRT) u32 controller_spacing = 0x200; struct anatop_regs __iomem *anatop = (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; @@ -382,7 +382,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, return ret; } -#if defined(CONFIG_MX6) +#if defined(CONFIG_MX6) || defined(CONFIG_IMXRT) usb_power_config_mx6(anatop, index); #elif defined (CONFIG_MX7) usb_power_config_mx7(usbnc); @@ -392,7 +392,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, usb_oc_config(usbnc, index); -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMXRT) if (index < ARRAY_SIZE(phy_bases)) { usb_internal_phy_clock_gate((void __iomem *)phy_bases[index], 1); usb_phy_enable(ehci, (void __iomem *)phy_bases[index]); @@ -504,7 +504,7 @@ static int ehci_usb_phy_mode(struct udevice *dev) * About fsl,usbphy, Refer to * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt. */ - if (is_mx6() || is_mx7ulp()) { + if (is_mx6() || is_mx7ulp() || is_imxrt()) { phy_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbphy"); @@ -671,7 +671,7 @@ static int ehci_usb_probe(struct udevice *dev) usb_oc_config(priv->misc_addr, priv->portnr); -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMXRT) usb_internal_phy_clock_gate(priv->phy_addr, 1); usb_phy_enable(ehci, priv->phy_addr); #endif @@ -757,6 +757,7 @@ int ehci_usb_remove(struct udevice *dev) static const struct udevice_id mx6_usb_ids[] = { { .compatible = "fsl,imx27-usb" }, { .compatible = "fsl,imx7d-usb" }, + { .compatible = "fsl,imxrt-usb" }, { } }; From 9b91484a892e48fa4ca7cb91137baa277e2f3908 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 20 May 2021 16:10:16 +0200 Subject: [PATCH 039/156] ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodes Usb is now supported so add all required nodes for it in imxrt1050. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index 1f283049818..6560a3827f0 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -23,6 +23,7 @@ gpio4 = &gpio5; mmc0 = &usdhc1; serial0 = &lpuart1; + usbphy0 = &usbphy1; }; clocks { @@ -152,5 +153,31 @@ clocks = <&osc>; status = "disabled"; }; + + usbphy1: usbphy@400d9000 { + compatible = "fsl,imxrt-usbphy"; + reg = <0x400d9000 0x1000>; + interrupts = ; + }; + + usbmisc: usbmisc@402e0800 { + #index-cells = <1>; + compatible = "fsl,imxrt-usbmisc"; + reg = <0x402e0800 0x200>; + clocks = <&clks IMXRT1050_CLK_USBOH3>; + }; + + usbotg1: usb@402e0000 { + compatible = "fsl,imxrt-usb", "fsl,imx27-usb"; + reg = <0x402e0000 0x200>; + interrupts = ; + clocks = <&clks IMXRT1050_CLK_USBOH3>; + fsl,usbphy = <&usbphy1>; + fsl,usbmisc = <&usbmisc 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + status = "disabled"; + }; }; }; From 42b967216ed7e575f640ccfed38abb2ec27de3cd Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 20 May 2021 16:10:17 +0200 Subject: [PATCH 040/156] ARM: dts: imxrt1050-evk: enable usbotg1 node as host Enable usbotg1 port node as host usb. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index 81db1a446d0..324cf7af96d 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -260,3 +260,8 @@ }; }; }; + +&usbotg1 { + dr_mode = "host"; + status = "okay"; +}; From cb87278cf63cbc968004e77a277378adf2db2058 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Thu, 20 May 2021 16:10:18 +0200 Subject: [PATCH 041/156] configs: imxrt1050-evk: enable host usb support and its command Now that usb host is supported let's enable it on this board. Signed-off-by: Giulio Benetti --- configs/imxrt1050-evk_defconfig | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 9c8bdb07dce..9f509f3b9ff 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -32,8 +32,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_CMD_USB=y # CONFIG_CMD_MII is not set -# CONFIG_DOS_PARTITION is not set +# CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_OF_CONTROL=y @@ -65,6 +66,10 @@ CONFIG_FSL_LPUART=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_IMX_GPT_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_USB_EHCI_HCD=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_SYS_WHITE_ON_BLACK=y From e2017ef6edcbab4d644579fb59429259d33b815a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 18 May 2021 00:40:30 +0200 Subject: [PATCH 042/156] ARM: imx8m: verdin-imx8mm: Increase bootm size to 64 MiB Uncompressed aarch64 kernel Image are rather large, increase the bootm size limit to 64 MiB to cater for that. Signed-off-by: Marek Vasut Cc: Marcel Ziswiler Cc: Max Krummenacher Cc: Oleksandr Suvorov Reviewed-by: Oleksandr Suvorov --- include/configs/verdin-imx8mm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index e2a817891c2..7be5e5ddf11 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -16,6 +16,8 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CONFIG_SYS_BOOTM_LEN SZ_64M + #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 From 3675ac081ad5129cbcb22b06fb6d8e3264a30d20 Mon Sep 17 00:00:00 2001 From: Oleh Kravchenko Date: Sat, 15 May 2021 00:18:31 +0300 Subject: [PATCH 043/156] Add out4.ru O4-iMX-NANO board Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko Cc: Stefano Babic --- MAINTAINERS | 10 + arch/arm/dts/Makefile | 3 + arch/arm/dts/o4-imx-nano.dts | 241 ++++++++++++++++++ arch/arm/dts/o4-imx6ull-nano.dtsi | 87 +++++++ arch/arm/mach-imx/mx6/Kconfig | 13 + .../out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg | 91 +++++++ board/out4/o4-imx6ull-nano/Kconfig | 57 +++++ .../o4-imx6ull-nano/MT41K256M16HA-125E.cfg | 91 +++++++ board/out4/o4-imx6ull-nano/Makefile | 4 + board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c | 86 +++++++ configs/o4-imx6ull-nano_defconfig | 103 ++++++++ include/configs/o4-imx6ull-nano.h | 33 +++ 12 files changed, 819 insertions(+) create mode 100644 arch/arm/dts/o4-imx-nano.dts create mode 100644 arch/arm/dts/o4-imx6ull-nano.dtsi create mode 100644 board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg create mode 100644 board/out4/o4-imx6ull-nano/Kconfig create mode 100644 board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg create mode 100644 board/out4/o4-imx6ull-nano/Makefile create mode 100644 board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c create mode 100644 configs/o4-imx6ull-nano_defconfig create mode 100644 include/configs/o4-imx6ull-nano.h diff --git a/MAINTAINERS b/MAINTAINERS index 86ff5e04a62..875eb5dfa4d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -919,6 +919,16 @@ S: Orphaned (Since 2017-01) T: git https://source.denx.de/u-boot/custodians/u-boot-onenand.git F: drivers/mtd/onenand/ +OUT4-IMX6ULL-NANO BOARD +M: Oleh Kravchenko +S: Maintained +T: git https://github.com/Oleh-Kravchenko/u-boot-out4.git +F: arch/arm/dts/o4-imx-nano.dts +F: arch/arm/dts/o4-imx6ull-nano.dtsi +F: board/out4 +F: configs/o4-imx6ull-nano_defconfig +F: include/configs/o4-imx6ull-nano.h + PATMAN M: Simon Glass S: Maintained diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 096068261da..b944778c1a4 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -819,6 +819,9 @@ dtb-$(CONFIG_ARCH_MX6) += \ imx6-apalis.dtb \ imx6-colibri.dtb +dtb-$(CONFIG_O4_IMX_NANO) += \ + o4-imx-nano.dtb + dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7d-sdb-qspi.dtb \ imx7-cm.dtb \ diff --git a/arch/arm/dts/o4-imx-nano.dts b/arch/arm/dts/o4-imx-nano.dts new file mode 100644 index 00000000000..d1785b7dc70 --- /dev/null +++ b/arch/arm/dts/o4-imx-nano.dts @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko + +/dts-v1/; + +#include + +#include "o4-imx6ull-nano.dtsi" + +/ { + model = "O4-iMX-NANO"; + compatible = "out4,o4-imx-nano", + "out4,o4-imx6ull-nano", + "fsl,imx6ull"; + + aliases { + mmc1 = &usdhc1; + }; + + chosen { + stdout-path = &uart1; + }; + + leds { + compatible = "gpio-leds"; + + led@0 { + color = ; + gpios = <&pcf8574a 0 GPIO_ACTIVE_LOW>; + reg = <0>; + }; + + led@1 { + color = ; + gpios = <&pcf8574a 1 GPIO_ACTIVE_LOW>; + reg = <1>; + }; + + led@2 { + gpios = <&pcf8574a 2 GPIO_ACTIVE_LOW>; + color = ; + reg = <2>; + }; + + led@3 { + color = ; + gpios = <&pcf8574a 3 GPIO_ACTIVE_LOW>; + reg = <3>; + }; + + led@4 { + color = ; + gpios = <&pcf8574a 4 GPIO_ACTIVE_LOW>; + reg = <4>; + }; + + led@5 { + color = ; + gpios = <&pcf8574a 5 GPIO_ACTIVE_LOW>; + reg = <5>; + }; + }; + + usbotg1_vbus: reg_usbotg1_vbus { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pcf8574a 6 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb0"; + }; + + usbotg2_vbus: reg_usbotg2_vbus { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pcf8574a 7 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb1"; + }; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 + >; + }; + + pinctrl_mdio: mdiogrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_CSI_HSYNC__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_CSI_VSYNC__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b8b0 + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b8b0 + >; + }; + + pinctrl_can1: can1grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020 + MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 + >; + }; +}; + +&uart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usdhc1 { + bus-width = <4>; + no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-names = "default"; + status = "okay"; + wakeup-source; +}; + +&fec1 { + phy-handle = <&phy0>; + phy-mode = "rmii"; + pinctrl-0 = <&pinctrl_fec1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&fec2 { + phy-handle = <&phy1>; + phy-mode = "rmii"; + phy-reset-duration = <250>; + phy-reset-post-delay = <100>; + phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_fec2 &pinctrl_mdio>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy0_irq>; + pinctrl-names = "default"; + reg = <0>; + }; + + phy1: ethernet-phy@1 { + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy1_irq>; + pinctrl-names = "default"; + reg = <1>; + }; + }; +}; + +&usbotg1 { + dr_mode = "host"; + status = "okay"; + vbus-supply = <&usbotg1_vbus>; +}; + +&usbotg2 { + dr_mode = "host"; + status = "okay"; + vbus-supply = <&usbotg2_vbus>; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + pinctrl-names = "default", "gpio"; + scl-gpios = <&gpio4 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pcf8574a: gpio@38 { + compatible = "nxp,pcf8574a"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x38>; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + status = "okay"; +}; + +&uart2 { + linux,rs485-enabled-at-boot-time; + pinctrl-0 = <&pinctrl_uart2>; + pinctrl-names = "default"; + status = "okay"; + uart-has-rtscts; +}; diff --git a/arch/arm/dts/o4-imx6ull-nano.dtsi b/arch/arm/dts/o4-imx6ull-nano.dtsi new file mode 100644 index 00000000000..3fefa80eae5 --- /dev/null +++ b/arch/arm/dts/o4-imx6ull-nano.dtsi @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko + +/dts-v1/; + +#include "imx6ull.dtsi" + +/ { + model = "O4-iMX6ULL-NANO"; + compatible = "out4,o4-imx6ull-nano", "fsl,imx6ull"; + + aliases { + mmc0 = &usdhc2; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; + +&iomuxc { + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + >; + }; + + pinctrl_fec2: fec2grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + >; + }; + + pinctrl_phy0_irq: phy0grp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x79 + >; + }; + + pinctrl_phy1_irq: phy1grp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79 + >; + }; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + no-1-8-v; + non-removable; + keep-power-in-suspend; + wakeup-source; + bus-width = <8>; + status = "okay"; +}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 9450e6a6834..0f274c41a1f 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -619,6 +619,18 @@ config TARGET_BRPPT2 Support B&R BRPPT2 platform based on Freescale's iMX6 SoC + +config TARGET_O4_IMX6ULL_NANO + bool "O4-iMX6ULL-NANO" + depends on MX6ULL + select BOARD_LATE_INIT + select DM + select DM_THERMAL + imply CMD_DM + help + Support for www.out4.ru O4-iMX6UL-NANO platform + based on Freescale's i.MX6UL/i.MX6ULL SoC. + endchoice config SYS_SOC @@ -668,5 +680,6 @@ source "board/udoo/neo/Kconfig" source "board/wandboard/Kconfig" source "board/warp/Kconfig" source "board/BuR/brppt2/Kconfig" +source "board/out4/o4-imx6ull-nano/Kconfig" endif diff --git a/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg b/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg new file mode 100644 index 00000000000..c0dcfe9a0c5 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Copyright (C) 2021 Oleh Kravchenko + +#define __ASSEMBLY__ +#include + +/* image version */ + +IMAGE_VERSION 2 +BOOT_FROM sd + +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +/* Samsung K4B4G1646D-BCMA */ +DATA 4 0x020e04b4 0x000c0000 +DATA 4 0x020e04ac 0x00000000 +DATA 4 0x020e027c 0x00000030 +DATA 4 0x020e0250 0x00000030 +DATA 4 0x020e024c 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e0288 0x000c0030 +DATA 4 0x020e0270 0x00000000 +DATA 4 0x020e0260 0x00000030 +DATA 4 0x020e0264 0x00000030 +DATA 4 0x020e04a0 0x00000030 +DATA 4 0x020e0494 0x00020000 +DATA 4 0x020e0280 0x00000030 +DATA 4 0x020e0284 0x00000030 +DATA 4 0x020e04b0 0x00020000 +DATA 4 0x020e0498 0x00000030 +DATA 4 0x020e04a4 0x00000030 +DATA 4 0x020e0244 0x00000030 +DATA 4 0x020e0248 0x00000030 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x00030009 +DATA 4 0x021b083c 0x01440148 +DATA 4 0x021b0848 0x40403640 +DATA 4 0x021b0850 0x4040322a +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b082c 0xf3333333 +DATA 4 0x021b0830 0xf3333333 +DATA 4 0x021b08c0 0x00944009 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x0002002d +DATA 4 0x021b0008 0x1b333030 +DATA 4 0x021b000c 0x676b52f2 +DATA 4 0x021b0010 0x926d0b63 +DATA 4 0x021b0014 0x01ff00db +DATA 4 0x021b0018 0x00211740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006b1023 +DATA 4 0x021b0040 0x0000004f +DATA 4 0x021b0000 0x84180000 +DATA 4 0x021b0890 0x00400000 +DATA 4 0x021b001c 0x02008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x15108030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00007800 +DATA 4 0x021b0818 0x00000227 +DATA 4 0x021b0004 0x0002552d +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 diff --git a/board/out4/o4-imx6ull-nano/Kconfig b/board/out4/o4-imx6ull-nano/Kconfig new file mode 100644 index 00000000000..c2497d521f8 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/Kconfig @@ -0,0 +1,57 @@ +if TARGET_O4_IMX6ULL_NANO + +config SYS_BOARD + default "o4-imx6ull-nano" + +config SYS_VENDOR + default "out4" + +config SYS_CONFIG_NAME + default "o4-imx6ull-nano" + +choice + prompt "Memory model" + default K4B4G1646D_BCMA + help + Memory type setup. + + Please choose correct memory model here. + +config K4B4G1646D_BCMA + bool "K4B4G1646D-BCMA 256Mx16 (512 MiB/chip)" + help + Samsung DDR3 SDRAM + K4B4G1646D-BCMA + +config MT41K256M16HA_125E + bool "MT41K256M16HA-125:E 256Mx16 (512 MiB/chip)" + help + Micron DDR3L SDRAM + MT41K256M16HA-125:E + +endchoice + +choice + prompt "Mainboard model" + default O4_IMX_NANO + help + Mainboard setup. + + Please choose correct main board model here. + +config O4_IMX_NANO + bool "O4-iMX-NANO" + help + A baseboard for EV-iMX280-NANO module: + https://out4.ru/products/board/18-o4-imx-nano.html + +endchoice + +config IMX_CONFIG + default "board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg" if K4B4G1646D_BCMA + default "board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg" if MT41K256M16HA_125E + +config DEFAULT_DEVICE_TREE + default "o4-imx-nano" if O4_IMX_NANO + +endif diff --git a/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg b/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg new file mode 100644 index 00000000000..6f823a7272a --- /dev/null +++ b/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Copyright (C) 2021 Oleh Kravchenko + +#define __ASSEMBLY__ +#include + +/* image version */ + +IMAGE_VERSION 2 +BOOT_FROM sd + +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +/* Micron MT41K256M16HA-125:E */ +DATA 4 0x020e04b4 0x000c0000 +DATA 4 0x020e04ac 0x00000000 +DATA 4 0x020e027c 0x00000030 +DATA 4 0x020e0250 0x00000030 +DATA 4 0x020e024c 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e0288 0x000c0030 +DATA 4 0x020e0270 0x00000000 +DATA 4 0x020e0260 0x00000030 +DATA 4 0x020e0264 0x00000030 +DATA 4 0x020e04a0 0x00000030 +DATA 4 0x020e0494 0x00020000 +DATA 4 0x020e0280 0x00000030 +DATA 4 0x020e0284 0x00000030 +DATA 4 0x020e04b0 0x00020000 +DATA 4 0x020e0498 0x00000030 +DATA 4 0x020e04a4 0x00000030 +DATA 4 0x020e0244 0x00000030 +DATA 4 0x020e0248 0x00000030 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x0005000b +DATA 4 0x021b083c 0x01400144 +DATA 4 0x021b0848 0x4040343a +DATA 4 0x021b0850 0x4040342a +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b082c 0xf3333333 +DATA 4 0x021b0830 0xf3333333 +DATA 4 0x021b08c0 0x00944009 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x0002002d +DATA 4 0x021b0008 0x1b333030 +DATA 4 0x021b000c 0x676b52f2 +DATA 4 0x021b0010 0x91eb0b63 +DATA 4 0x021b0014 0x01ff00db +DATA 4 0x021b0018 0x00211740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006b1023 +DATA 4 0x021b0040 0x0000004f +DATA 4 0x021b0000 0x84180000 +DATA 4 0x021b0890 0x00400000 +DATA 4 0x021b001c 0x02008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x15108030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00007800 +DATA 4 0x021b0818 0x00000227 +DATA 4 0x021b0004 0x0002552d +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 diff --git a/board/out4/o4-imx6ull-nano/Makefile b/board/out4/o4-imx6ull-nano/Makefile new file mode 100644 index 00000000000..a3f4646d9e0 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2021 Oleh Kravchenko + +obj-y := o4-imx6ull-nano.o diff --git a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c new file mode 100644 index 00000000000..fec1755c32e --- /dev/null +++ b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +int board_early_init_f(void) +{ + return 0; +} + +static int setup_fec_clock(void) +{ + if (IS_ENABLED(CONFIG_FEC_MXC) && !IS_ENABLED(CONFIG_CLK_IMX6Q)) { + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + /* + * Use 50M anatop loopback REF_CLK1 for ENET1, + * clear gpr1[13], set gpr1[17]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(0, ENET_50MHZ); + if (ret) + return ret; + + /* + * Use 50M anatop loopback REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(1, ENET_50MHZ); + if (ret) + return ret; + + enable_enet_clk(1); + } + + return 0; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return setup_fec_clock(); +} + +int board_late_init(void) +{ + if (IS_ENABLED(CONFIG_CMD_BMODE)) + add_board_boot_modes(NULL); + + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { + const char *model; + + model = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + if (model) + env_set("board_name", model); + } + + if (is_boot_from_usb()) { + env_set("bootcmd", "run bootcmd_mfg"); + env_set("bootdelay", "0"); + } + + return 0; +} diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig new file mode 100644 index 00000000000..906a3afe5d8 --- /dev/null +++ b/configs/o4-imx6ull-nano_defconfig @@ -0,0 +1,103 @@ +CONFIG_ARCH_MX6=y +CONFIG_ARM=y +CONFIG_DEFAULT_DEVICE_TREE="o4-imx-nano" +CONFIG_HUSH_PARSER=y +CONFIG_IMX_MODULE_FUSE=y +CONFIG_MX6ULL=y +CONFIG_O4_IMX_NANO=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_TARGET_O4_IMX6ULL_NANO=y + +# CONFIG_K4B4G1646D_BCMA is not set +CONFIG_MT41K256M16HA_125E=y + +# Device Tree +CONFIG_OF_CONTROL=y +CONFIG_OF_LIBFDT_OVERLAY=y + +# Environment +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y + +# Clock driver for imx6ull is not implemented +# CONFIG_CLK_IMX6Q=y + +# Thermal +CONFIG_DM_THERMAL=y +CONFIG_IMX_THERMAL=y + +# Serial +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y + +# eMMC support +CONFIG_CMD_MMC=y +CONFIG_DM_MMC=y +CONFIG_FSL_USDHC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SUPPORT_EMMC_RPMB=y + +# GPIO support +CONFIG_CMD_GPIO=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y + +# USB support +CONFIG_CI_UDC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_DM_USB=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y + +# Fastboot support +CONFIG_CMD_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_USB_FUNCTION_FASTBOOT=y + +# Ethernet support +CONFIG_CMD_DHCP=y +CONFIG_CMD_MDIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_FEC_MXC=y +CONFIG_FEC_MXC_MDIO_BASE=0x020b4000 +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y + +# I2C +CONFIG_CMD_I2C=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y + +# Watchdog support is broken +# CONFIG_CMD_WDT=y +# CONFIG_IMX_WATCHDOG=y +# CONFIG_SYSRESET_WATCHDOG=y +# CONFIG_WATCHDOG_RESET_DISABLE=y +# CONFIG_WDT=y + +# VBUS +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y + +# misc +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_PART=y diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h new file mode 100644 index 00000000000..b9746b9b1c5 --- /dev/null +++ b/include/configs/o4-imx6ull-nano.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright (C) 2021 Oleh Kravchenko */ + +#ifndef __O4_IMX6ULL_NANO_CONFIG_H +#define __O4_IMX6ULL_NANO_CONFIG_H + +#include "mx6_common.h" + +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#if IS_ENABLED(CONFIG_CMD_USB) +# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif /* CONFIG_CMD_USB */ + +#if IS_ENABLED(CONFIG_FEC_MXC) +# define CONFIG_FEC_XCV_TYPE RMII +#endif /* CONFIG_FEC_MXC */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mmcdev=0\0" \ + "mmcpart=2\0" \ + "mmcargs=setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcpart} console=ttymxc0,${baudrate} panic=30\0" \ + "mmcboot=run mmcargs && ext4load mmc ${mmcdev}:${mmcpart} $loadaddr /boot/zImage && bootz $loadaddr - $fdtcontroladdr\0" \ + "bootcmd=run mmcboot\0" \ + "bootcmd_mfg=fastboot usb 0\0" + +#endif /* __O4_IMX6ULL_NANO_CONFIG_H */ From 1180baec98147e05a8b3b36199ae22010a4d4fe7 Mon Sep 17 00:00:00 2001 From: Oleh Kravchenko Date: Sat, 15 May 2021 00:18:33 +0300 Subject: [PATCH 044/156] Add EV-iMX280-NANO-X-MB board A simple prototyping board with one microSD port, one Ethernet port, 2 USB ports, I2C, SPI, GPIO, and UART interfaces. Signed-off-by: Oleh Kravchenko Cc: Stefano Babic --- MAINTAINERS | 2 + arch/arm/dts/Makefile | 3 + arch/arm/dts/ev-imx280-nano-x-mb.dts | 109 +++++++++++++++++++ board/out4/o4-imx6ull-nano/Kconfig | 7 ++ board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c | 20 ++-- configs/ev-imx280-nano-x-mb_defconfig | 91 ++++++++++++++++ 6 files changed, 223 insertions(+), 9 deletions(-) create mode 100644 arch/arm/dts/ev-imx280-nano-x-mb.dts create mode 100644 configs/ev-imx280-nano-x-mb_defconfig diff --git a/MAINTAINERS b/MAINTAINERS index 875eb5dfa4d..2accd1fb837 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -923,9 +923,11 @@ OUT4-IMX6ULL-NANO BOARD M: Oleh Kravchenko S: Maintained T: git https://github.com/Oleh-Kravchenko/u-boot-out4.git +F: arch/arm/dts/ev-imx280-nano-x-mb.dts F: arch/arm/dts/o4-imx-nano.dts F: arch/arm/dts/o4-imx6ull-nano.dtsi F: board/out4 +F: configs/ev-imx280-nano-x-mb_defconfig F: configs/o4-imx6ull-nano_defconfig F: include/configs/o4-imx6ull-nano.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b944778c1a4..d29844e7650 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -822,6 +822,9 @@ dtb-$(CONFIG_ARCH_MX6) += \ dtb-$(CONFIG_O4_IMX_NANO) += \ o4-imx-nano.dtb +dtb-$(CONFIG_EV_IMX280_NANO_X_MB) += \ + ev-imx280-nano-x-mb.dtb + dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7d-sdb-qspi.dtb \ imx7-cm.dtb \ diff --git a/arch/arm/dts/ev-imx280-nano-x-mb.dts b/arch/arm/dts/ev-imx280-nano-x-mb.dts new file mode 100644 index 00000000000..7aec076af33 --- /dev/null +++ b/arch/arm/dts/ev-imx280-nano-x-mb.dts @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko + +/dts-v1/; + +#include "o4-imx6ull-nano.dtsi" + +/ { + model = "EV-iMX280-NANO-X-MB"; + compatible = "evodbg,ev-imx280-nano-x-mb", + "out4,o4-imx6ull-nano", + "fsl,imx6ull"; + + aliases { + mmc1 = &usdhc1; + }; + + chosen { + stdout-path = &uart1; + }; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 + >; + }; + + pinctrl_mdio: mdiogrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ + >; + }; + + pinctrl_usb_otg1_id: usbotg1idgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 + >; + }; +}; + +&uart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usdhc1 { + bus-width = <4>; + no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-names = "default"; + status = "okay"; + wakeup-source; +}; + +&fec1 { + phy-handle = <&phy0>; + phy-mode = "rmii"; + phy-reset-duration = <250>; + phy-reset-post-delay = <100>; + phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_fec1 &pinctrl_mdio>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy0_irq>; + pinctrl-names = "default"; + reg = <0>; + }; + }; +}; + +&usbotg1 { + dr_mode = "otg"; + pinctrl-0 = <&pinctrl_usb_otg1_id>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + status = "okay"; +}; diff --git a/board/out4/o4-imx6ull-nano/Kconfig b/board/out4/o4-imx6ull-nano/Kconfig index c2497d521f8..e2ab80b6d4d 100644 --- a/board/out4/o4-imx6ull-nano/Kconfig +++ b/board/out4/o4-imx6ull-nano/Kconfig @@ -45,6 +45,12 @@ config O4_IMX_NANO A baseboard for EV-iMX280-NANO module: https://out4.ru/products/board/18-o4-imx-nano.html +config EV_IMX280_NANO_X_MB + bool "EV-IMX280-NANO-X-MB" + help + A simple baseboard for EV-iMX280-NANO module: + http://evodbg.net/products/mx28-eval-kits/14-ev-imx280-nano-x-mb.html + endchoice config IMX_CONFIG @@ -53,5 +59,6 @@ config IMX_CONFIG config DEFAULT_DEVICE_TREE default "o4-imx-nano" if O4_IMX_NANO + default "ev-imx280-nano-x-mb" if EV_IMX280_NANO_X_MB endif diff --git a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c index fec1755c32e..edb200e9e55 100644 --- a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c +++ b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c @@ -39,16 +39,18 @@ static int setup_fec_clock(void) if (ret) return ret; - /* - * Use 50M anatop loopback REF_CLK2 for ENET2, - * clear gpr1[14], set gpr1[18]. - */ - clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, - IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + if (!IS_ENABLED(CONFIG_EV_IMX280_NANO_X_MB)) { + /* + * Use 50M anatop loopback REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); - ret = enable_fec_anatop_clock(1, ENET_50MHZ); - if (ret) - return ret; + ret = enable_fec_anatop_clock(1, ENET_50MHZ); + if (ret) + return ret; + } enable_enet_clk(1); } diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig new file mode 100644 index 00000000000..b06aedef2a9 --- /dev/null +++ b/configs/ev-imx280-nano-x-mb_defconfig @@ -0,0 +1,91 @@ +CONFIG_ARCH_MX6=y +CONFIG_ARM=y +CONFIG_DEFAULT_DEVICE_TREE="ev-imx280-nano-x-mb" +CONFIG_EV_IMX280_NANO_X_MB=y +CONFIG_HUSH_PARSER=y +CONFIG_IMX_MODULE_FUSE=y +CONFIG_MX6ULL=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_TARGET_O4_IMX6ULL_NANO=y + +CONFIG_K4B4G1646D_BCMA=y +# CONFIG_MT41K256M16HA_125E is not set + +# Device Tree +CONFIG_OF_CONTROL=y +CONFIG_OF_LIBFDT_OVERLAY=y + +# Environment +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y + +# Clock driver for imx6ull is not implemented +# CONFIG_CLK_IMX6Q=y + +# Thermal +CONFIG_DM_THERMAL=y +CONFIG_IMX_THERMAL=y + +# Serial +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y + +# eMMC support +CONFIG_CMD_MMC=y +CONFIG_DM_MMC=y +CONFIG_FSL_USDHC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SUPPORT_EMMC_RPMB=y + +# GPIO support +CONFIG_CMD_GPIO=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y + +# USB support +CONFIG_CI_UDC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_DM_USB=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y + +# Fastboot support +CONFIG_CMD_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_USB_FUNCTION_FASTBOOT=y + +# Ethernet support +CONFIG_CMD_DHCP=y +CONFIG_CMD_MDIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y + +# Watchdog support is broken +# CONFIG_CMD_WDT=y +# CONFIG_IMX_WATCHDOG=y +# CONFIG_SYSRESET_WATCHDOG=y +# CONFIG_WATCHDOG_RESET_DISABLE=y +# CONFIG_WDT=y + +# misc +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_PART=y From d9a7f1a9131372e852407e4a5c6e812ce37456e4 Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Mon, 3 May 2021 10:02:10 +0200 Subject: [PATCH 045/156] arm: imx: imx8mm: clock: make debug output more descriptive Clock initialization functionality has ambitious debug messages, which are printed out when failures are triggered during execution: - Separate frequency table lookup functions have the the same output that makes it impossible to understand which function failed and produced the output - PLL decoding routine has a generic debug statement printed, which does not state the actual value failed to be found Extend the output for both cases with prefixing table lookup functions output with function name, and report the failed value in PLL decoding routine. Signed-off-by: Andrey Zhizhikin Cc: Stefano Babic Cc: Fabio Estevam Cc: "NXP i.MX U-Boot Team" Cc: Peng Fan Cc: Simon Glass Cc: Ye Li Reviewed-by: Fabio Estevam --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 65d476e037d..6f45d74c6bc 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -72,7 +72,7 @@ static int fracpll_configure(enum pll_clocks pll, u32 freq) } if (i == ARRAY_SIZE(imx8mm_fracpll_tbl)) { - printf("No matched freq table %u\n", freq); + printf("%s: No matched freq table %u\n", __func__, freq); return -EINVAL; } @@ -148,7 +148,7 @@ void dram_enable_bypass(ulong clk_val) } if (i == ARRAY_SIZE(imx8mm_dram_bypass_tbl)) { - printf("No matched freq table %lu\n", clk_val); + printf("%s: No matched freq table %lu\n", __func__, clk_val); return; } @@ -646,7 +646,7 @@ static u32 decode_fracpll(enum clk_root_src frac_pll) pll_fdiv_ctl1 = readl(&ana_pll->video_pll1_fdiv_ctl1); break; default: - printf("Not supported\n"); + printf("Unsupported clk_root_src %d\n", frac_pll); return 0; } From cd18f1e6e6144bd72110b07144e77f9e84b2e7c8 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 3 May 2021 11:21:27 -0700 Subject: [PATCH 046/156] imx: ventana: enable dm support for PCI and FEC ethernet Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration. Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x. Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init. Signed-off-by: Tim Harvey --- arch/arm/dts/imx6qdl-gw51xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw52xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw53xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw54xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw560x.dtsi | 2 + arch/arm/dts/imx6qdl-gw5903.dtsi | 3 + arch/arm/dts/imx6qdl-gw5904.dtsi | 3 + arch/arm/dts/imx6qdl-gw5907.dtsi | 2 + arch/arm/dts/imx6qdl-gw5910.dtsi | 3 + arch/arm/dts/imx6qdl-gw5912.dtsi | 4 + arch/arm/dts/imx6qdl-gw5913.dtsi | 3 + board/gateworks/gw_ventana/common.h | 1 - board/gateworks/gw_ventana/gw_ventana.c | 99 ++++--------------------- configs/gwventana_emmc_defconfig | 5 ++ configs/gwventana_gw5904_defconfig | 5 ++ configs/gwventana_nand_defconfig | 5 ++ include/configs/gw_ventana.h | 10 --- 17 files changed, 61 insertions(+), 94 deletions(-) diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi index 2a21c6731ef..7e28463084a 100644 --- a/arch/arm/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi @@ -129,6 +129,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi index 6eedf8d40d8..f1d9ba1fac6 100644 --- a/arch/arm/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi @@ -195,6 +195,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw53xx.dtsi b/arch/arm/dts/imx6qdl-gw53xx.dtsi index 9deec7e352d..172a45ba178 100644 --- a/arch/arm/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw53xx.dtsi @@ -188,6 +188,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; @@ -597,6 +599,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; }; diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi index a30ba4848e0..e09fad6068c 100644 --- a/arch/arm/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi @@ -225,6 +225,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; @@ -675,6 +677,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; }; diff --git a/arch/arm/dts/imx6qdl-gw560x.dtsi b/arch/arm/dts/imx6qdl-gw560x.dtsi index 0786b0d5463..bfe65fd3c09 100644 --- a/arch/arm/dts/imx6qdl-gw560x.dtsi +++ b/arch/arm/dts/imx6qdl-gw560x.dtsi @@ -279,6 +279,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5903.dtsi b/arch/arm/dts/imx6qdl-gw5903.dtsi index 78f9ec90b7c..6ebf6aef2f7 100644 --- a/arch/arm/dts/imx6qdl-gw5903.dtsi +++ b/arch/arm/dts/imx6qdl-gw5903.dtsi @@ -223,6 +223,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi b/arch/arm/dts/imx6qdl-gw5904.dtsi index 5b7bd569328..9adbd728dce 100644 --- a/arch/arm/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/dts/imx6qdl-gw5904.dtsi @@ -200,6 +200,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; fixed-link { diff --git a/arch/arm/dts/imx6qdl-gw5907.dtsi b/arch/arm/dts/imx6qdl-gw5907.dtsi index c8b29246b78..58f73a141e4 100644 --- a/arch/arm/dts/imx6qdl-gw5907.dtsi +++ b/arch/arm/dts/imx6qdl-gw5907.dtsi @@ -131,6 +131,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5910.dtsi b/arch/arm/dts/imx6qdl-gw5910.dtsi index 248e077a56e..446c1043a76 100644 --- a/arch/arm/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/dts/imx6qdl-gw5910.dtsi @@ -146,6 +146,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5912.dtsi b/arch/arm/dts/imx6qdl-gw5912.dtsi index 7593872c07e..88234a6f134 100644 --- a/arch/arm/dts/imx6qdl-gw5912.dtsi +++ b/arch/arm/dts/imx6qdl-gw5912.dtsi @@ -141,6 +141,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; @@ -426,6 +429,7 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; }; diff --git a/arch/arm/dts/imx6qdl-gw5913.dtsi b/arch/arm/dts/imx6qdl-gw5913.dtsi index 9fae4cccd70..f4c2b2189f0 100644 --- a/arch/arm/dts/imx6qdl-gw5913.dtsi +++ b/arch/arm/dts/imx6qdl-gw5913.dtsi @@ -121,6 +121,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index d73850c5b90..813f7d9f562 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -11,7 +11,6 @@ #include "ventana_eeprom.h" /* GPIO's common to all baseboards */ -#define GP_PHY_RST IMX_GPIO_NR(1, 30) #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8) diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 5237f2dac43..1ed9c1a39f4 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include @@ -54,42 +53,6 @@ DECLARE_GLOBAL_DATA_PTR; struct ventana_board_info ventana_info; static int board_type; -/* ENET */ -static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - /* PHY nRST */ - IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG), -}; - -static void setup_iomux_enet(int gpio) -{ - SETUP_IOMUX_PADS(enet_pads); - - /* toggle PHY_RST# */ - gpio_request(gpio, "phy_rst#"); - gpio_direction_output(gpio, 0); - mdelay(10); - gpio_set_value(gpio, 1); - mdelay(100); -} - #ifdef CONFIG_USB_EHCI_MX6 /* toggle USB_HUB_RST# for boards that have it; it is not defined in dt */ int board_ehci_hcd_init(int port) @@ -195,40 +158,7 @@ int mv88e61xx_hw_reset(struct phy_device *phydev) } #endif // CONFIG_MV88E61XX_SWITCH -int board_eth_init(struct bd_info *bis) -{ -#ifdef CONFIG_FEC_MXC - struct ventana_board_info *info = &ventana_info; - - if (test_bit(EECONFIG_ETH0, info->config)) { - setup_iomux_enet(GP_PHY_RST); - cpu_eth_init(bis); - } -#endif - -#ifdef CONFIG_E1000 - e1000_initialize(bis); -#endif - -#ifdef CONFIG_CI_UDC - /* For otg ethernet*/ - usb_eth_initialize(bis); -#endif - - /* default to the first detected enet dev */ - if (!env_get("ethprime")) { - struct eth_device *dev = eth_get_dev_by_index(0); - if (dev) { - env_set("ethprime", dev->name); - printf("set ethprime to %s\n", env_get("ethprime")); - } - } - - return 0; -} - #if defined(CONFIG_VIDEO_IPUV3) - static void enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy(); @@ -427,7 +357,6 @@ int power_init_board(void) return 0; } -#if defined(CONFIG_CMD_PCI) int imx6_pcie_toggle_reset(void) { if (board_type < GW_UNKNOWN) { @@ -448,6 +377,7 @@ int imx6_pcie_toggle_reset(void) #define MAX_PCI_DEVS 32 struct pci_dev { pci_dev_t devfn; + struct udevice *dev; unsigned short vendor; unsigned short device; unsigned short class; @@ -458,18 +388,21 @@ struct pci_dev pci_devs[MAX_PCI_DEVS]; int pci_devno; int pci_bridgeno; -void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, - unsigned short vendor, unsigned short device, - unsigned short class) +void board_pci_fixup_dev(struct udevice *bus, struct udevice *udev) { - int i; - u32 dw; + struct pci_child_plat *pdata = dev_get_parent_plat(udev); struct pci_dev *pdev = &pci_devs[pci_devno++]; + unsigned short vendor = pdata->vendor; + unsigned short device = pdata->device; + unsigned int class = pdata->class; + pci_dev_t dev = dm_pci_get_bdf(udev); + int i; debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device); /* store array of devs for later use in device-tree fixup */ + pdev->dev = udev; pdev->devfn = dev; pdev->vendor = vendor; pdev->device = device; @@ -496,19 +429,19 @@ void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, if (vendor == PCI_VENDOR_ID_PLX && (device & 0xfff0) == 0x8600 && PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) { + ulong val; debug("configuring PLX 860X downstream PERST#\n"); - pci_hose_read_config_dword(hose, dev, 0x62c, &dw); - dw |= 0xaaa8; /* GPIO1-7 outputs */ - pci_hose_write_config_dword(hose, dev, 0x62c, dw); + pci_bus_read_config(bus, dev, 0x62c, &val, PCI_SIZE_32); + val |= 0xaaa8; /* GPIO1-7 outputs */ + pci_bus_write_config(bus, dev, 0x62c, val, PCI_SIZE_32); - pci_hose_read_config_dword(hose, dev, 0x644, &dw); - dw |= 0xfe; /* GPIO1-7 output high */ - pci_hose_write_config_dword(hose, dev, 0x644, dw); + pci_bus_read_config(bus, dev, 0x644, &val, PCI_SIZE_32); + val |= 0xfe; /* GPIO1-7 output high */ + pci_bus_write_config(bus, dev, 0x644, val, PCI_SIZE_32); mdelay(100); } } -#endif /* CONFIG_CMD_PCI */ #ifdef CONFIG_SERIAL_TAG /* diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 97b39b6e724..6e3aebbf1bd 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -85,9 +86,13 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index ce40a4d85b8..77e65f22368 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -89,9 +90,13 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0xf CONFIG_MV88E61XX_FIXED_PORTS=0x0 +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index a4d85956a04..db31d97f3d0 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -91,9 +92,13 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5754b6aef05..4f2f323b777 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -65,8 +65,6 @@ * PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif @@ -82,13 +80,6 @@ /* Various command support */ -/* Ethernet support */ -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_ARP_TIMEOUT 200UL - /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -129,7 +120,6 @@ #define CONFIG_SERVERIP 192.168.1.146 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - "pcidisable=1\0" \ "splashpos=m,m\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \ From b8916306d1061b254d066ccaa4c797896c96a2c1 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 27 May 2021 18:43:06 -0300 Subject: [PATCH 047/156] pico-imx6: README: Fix the boot mode settings URL The original URL that explains the boot mode setting is no longer valid. Update to the new one. Signed-off-by: Fabio Estevam --- board/technexion/pico-imx6/README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/technexion/pico-imx6/README b/board/technexion/pico-imx6/README index f1e84bfe829..f4970865022 100644 --- a/board/technexion/pico-imx6/README +++ b/board/technexion/pico-imx6/README @@ -20,7 +20,7 @@ If the eMMC has already a U-Boot flashed then the user can go to step 2 below in order to update U-Boot. Put pico board in USB download mode (Refer to the following link for details: -https://www.technexion.com/support/knowledgebase/boot-configuration-settings-for-pico-baseboards/). +https://developer.technexion.com/docs/pico-evaluation-kit-boot-mode-settings ) Connect a USB to serial adapter between the host PC and pico. From 6ac4d4480663ca43f64a0ae1e49af5455bcff7aa Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Mon, 3 May 2021 09:59:17 +0200 Subject: [PATCH 048/156] arm: imx: imx8mm: correct unrecognized fracpll frequency Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ() macro, which expands the value provided to the Hz range without taking into account the precise Hz setting. This causes the frequency of 266 MHz not ot be found in the imx8mm_fracpll_tbl, since it is entered there with a precise Hz value. This in turn causes the boot hang in SPL, as proper DDR fracpll frequency cannot be determined. Correct the value in imx8mm_fracpll_tbl to match the one expanded by MHZ(266) macro, rounding it down to MHz range only. Signed-off-by: Andrey Zhizhikin Cc: Stefano Babic Cc: Fabio Estevam Cc: "NXP i.MX U-Boot Team" Cc: Peng Fan Cc: Simon Glass Cc: Ye Li Fixes: 825ab6b406 ("driver: ddr: Refine the ddr init driver on imx8m") Reviewed-by: Fabio Estevam --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 6f45d74c6bc..f8e4ec0d905 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -54,7 +54,7 @@ static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(600000000U, 300, 3, 2, 0), PLL_1443X_RATE(594000000U, 99, 1, 2, 0), PLL_1443X_RATE(400000000U, 300, 9, 1, 0), - PLL_1443X_RATE(266666667U, 400, 9, 2, 0), + PLL_1443X_RATE(266000000U, 400, 9, 2, 0), PLL_1443X_RATE(167000000U, 334, 3, 4, 0), PLL_1443X_RATE(100000000U, 300, 9, 3, 0), }; From fe133eb192a8a55813a4dc5ec72ecf45ba74f65e Mon Sep 17 00:00:00 2001 From: Oliver Graute Date: Mon, 31 May 2021 15:50:40 +0200 Subject: [PATCH 049/156] imx: support for conga-QMX8 board Add i.MX8QM qmx8 congatec board support U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Congatec QMX8 Qseven series Board: conga-QMX8 Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9 Boot: SD2 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 switch to partitions #0, OK mmc2 is current device Net: Error: ethernet@5b040000 address not set. No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute Cc: Stefano Babic Cc: Fabio Estevam Cc: Peng Fan Cc: Simon Glass Cc: Ye Li Cc: uboot-imx --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx8qm-cgtqmx8.dts | 404 ++++++++++++++++++++++++ arch/arm/mach-imx/imx8/Kconfig | 7 + board/congatec/cgtqmx8/Kconfig | 14 + board/congatec/cgtqmx8/MAINTAINERS | 7 + board/congatec/cgtqmx8/Makefile | 11 + board/congatec/cgtqmx8/cgtqmx8.c | 460 ++++++++++++++++++++++++++++ board/congatec/cgtqmx8/imximage.cfg | 21 ++ board/congatec/cgtqmx8/spl.c | 77 +++++ board/congatec/common/Kconfig | 48 +++ board/congatec/common/Makefile | 23 ++ board/congatec/common/mmc.c | 49 +++ configs/cgtqmx8_defconfig | 86 ++++++ doc/board/congatec/cgtqmx8.rst | 70 +++++ doc/board/congatec/index.rst | 9 + doc/board/index.rst | 1 + include/configs/cgtqmx8.h | 181 +++++++++++ 17 files changed, 1469 insertions(+) create mode 100644 arch/arm/dts/imx8qm-cgtqmx8.dts create mode 100644 board/congatec/cgtqmx8/Kconfig create mode 100644 board/congatec/cgtqmx8/MAINTAINERS create mode 100644 board/congatec/cgtqmx8/Makefile create mode 100644 board/congatec/cgtqmx8/cgtqmx8.c create mode 100644 board/congatec/cgtqmx8/imximage.cfg create mode 100644 board/congatec/cgtqmx8/spl.c create mode 100644 board/congatec/common/Kconfig create mode 100644 board/congatec/common/Makefile create mode 100644 board/congatec/common/mmc.c create mode 100644 configs/cgtqmx8_defconfig create mode 100644 doc/board/congatec/cgtqmx8.rst create mode 100644 doc/board/congatec/index.rst create mode 100644 include/configs/cgtqmx8.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d29844e7650..8889d5b1cae 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -842,6 +842,7 @@ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-com.dtb \ dtb-$(CONFIG_ARCH_IMX8) += \ fsl-imx8qm-apalis.dtb \ fsl-imx8qm-mek.dtb \ + imx8qm-cgtqmx8.dtb \ imx8qm-rom7720-a1.dtb \ fsl-imx8qxp-ai_ml.dtb \ fsl-imx8qxp-colibri.dtb \ diff --git a/arch/arm/dts/imx8qm-cgtqmx8.dts b/arch/arm/dts/imx8qm-cgtqmx8.dts new file mode 100644 index 00000000000..555c357f6f7 --- /dev/null +++ b/arch/arm/dts/imx8qm-cgtqmx8.dts @@ -0,0 +1,404 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP + * Copyright 2017 congatec AG + * Copyright (C) 2019 Oliver Graute + */ + +/dts-v1/; + +/* First 128KB is for PSCI ATF. */ +/memreserve/ 0x80000000 0x00020000; + +#include "fsl-imx8qm.dtsi" + +/ { + model = "Congatec QMX8 Qseven series"; + compatible = "fsl,imx8qm-qmx8", "fsl,imx8qm"; + + chosen { + bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x5a060000,115200"; + stdout-path = &lpuart0; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_usdhc2_vmmc: usdhc2_vmmc { + compatible = "regulator-fixed"; + regulator-name = "sw-3p3-sd1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <3000>; + }; + + reg_usdhc3_vmmc: usdhc3_vmmc { + compatible = "regulator-fixed"; + regulator-name = "sw-3p3-sd2"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <3000>; + }; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii"; + phy-handle = <ðphy0>; + fsl,magic-packet; + fsl,rgmii_txc_dly; + fsl,rgmii_rxc_dly; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@6 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <6>; + at803x,eee-disabled; + at803x,vddio-1p8v; + }; + }; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c0>; + clock-frequency = <100000>; + status = "okay"; + + rtc_ext: m41t62@68 { + compatible = "st,m41t62"; + reg = <0x68>; + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c1>; + status = "okay"; + + wm8904: wm8904@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + + clocks = <&clk IMX8QM_AUD_MCLKOUT0>; + clock-names = "mclk"; + wlf,shared-lrclk; + /* power-domains = <&pd_mclk_out0>; */ + + assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>, + <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>, + <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>, + <&clk IMX8QM_AUD_MCLKOUT0>; + + assigned-clock-rates = <786432000>, <49152000>, <24576000>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx8qm-qmx8 { + + pinctrl_hog: hoggrp{ + fsl,pins = < + SC_P_M40_GPIO0_01_LSIO_GPIO0_IO09 0x00000021 + SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04 0x00000021 + SC_P_M40_GPIO0_00_LSIO_GPIO0_IO08 0x00000021 + SC_P_ESAI1_SCKT_LSIO_GPIO2_IO07 0x00000021 + SC_P_SPDIF0_TX_LSIO_GPIO2_IO15 0x00000021 + SC_P_FLEXCAN1_RX_LSIO_GPIO3_IO31 0x00000021 + SC_P_ESAI1_TX0_LSIO_GPIO2_IO08 0x00000021 + SC_P_FLEXCAN1_TX_LSIO_GPIO4_IO00 0x00000021 + SC_P_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021 + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020 + SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 + SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 + SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 + SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 + SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 + SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 + SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 + SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 + SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 + SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 + SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 + SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 + SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 + >; + }; + + pinctrl_lpi2c0: lpi2c0grp { + fsl,pins = < + SC_P_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0xc600004c + SC_P_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0xc600004c + >; + }; + + pinctrl_lpi2c1: lpi2c1grp { + fsl,pins = < + SC_P_GPT0_CLK_DMA_I2C1_SCL 0xc600004c + SC_P_GPT0_CAPTURE_DMA_I2C1_SDA 0xc600004c + >; + }; + + pinctrl_lpuart0: lpuart0grp { + fsl,pins = < + SC_P_UART0_RX_DMA_UART0_RX 0x06000020 + SC_P_UART0_TX_DMA_UART0_TX 0x06000020 + >; + }; + + pinctrl_lpuart1: lpuart1grp { + fsl,pins = < + SC_P_UART1_RX_DMA_UART1_RX 0x06000020 + SC_P_UART1_TX_DMA_UART1_TX 0x06000020 + SC_P_UART1_CTS_B_DMA_UART1_CTS_B 0x06000020 + SC_P_UART1_RTS_B_DMA_UART1_RTS_B 0x06000020 + >; + }; + + pinctrl_lpuart3: lpuart3grp { + fsl,pins = < + SC_P_M41_GPIO0_00_DMA_UART3_RX 0x06000020 + SC_P_M41_GPIO0_01_DMA_UART3_TX 0x06000020 + >; + }; + + pinctrl_mlb: mlbgrp { + fsl,pins = < + SC_P_MLB_SIG_CONN_MLB_SIG 0x21 + SC_P_MLB_CLK_CONN_MLB_CLK 0x21 + SC_P_MLB_DATA_CONN_MLB_DATA 0x21 + >; + }; + + pinctrl_isl29023: isl29023grp { + fsl,pins = < + SC_P_ADC_IN2_LSIO_GPIO3_IO20 0x00000021 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 + SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 + SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040 + SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020 + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020 + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020 + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020 + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020 + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020 + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040 + SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040 + SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020 + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020 + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020 + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020 + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020 + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020 + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040 + SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < + SC_P_USDHC1_DATA6_LSIO_GPIO5_IO21 0x00000021 + SC_P_USDHC1_DATA7_LSIO_GPIO5_IO22 0x00000021 + SC_P_USDHC1_RESET_B_LSIO_GPIO4_IO07 0x00000021 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 + SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040 + SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020 + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020 + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040 + SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020 + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020 + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 + >; + }; + + pinctrl_usdhc3_gpio: usdhc3grpgpio { + fsl,pins = < + SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09 0x00000021 + SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12 0x00000021 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000040 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000020 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000020 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000020 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000020 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000020 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000020 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000040 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000020 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000020 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000020 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000020 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000020 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000020 + >; + }; + }; +}; + +&lpuart0 { /* console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart0>; + status = "okay"; +}; + +&lpuart1 { /* Q7 connector */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart1>; + status = "okay"; +}; + +&pd_dma_lpuart0 { + debug_console; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + bus-width = <4>; + cd-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_usdhc2_vmmc>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc3_gpio>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_usdhc3_gpio>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_usdhc3_gpio>; + bus-width = <4>; + cd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_usdhc3_vmmc>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; + status = "okay"; +}; diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 4e76612d05e..71221d8d06c 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -86,6 +86,12 @@ config TARGET_IMX8QM_MEK select BOARD_LATE_INIT select IMX8QM +config TARGET_CONGA_QMX8 + bool "Support congatec conga-QMX8 board" + select BOARD_LATE_INIT + select SUPPORT_SPL + select IMX8QM + config TARGET_IMX8QM_ROM7720_A1 bool "Support i.MX8QM ROM-7720-A1" select BOARD_LATE_INIT @@ -101,6 +107,7 @@ endchoice source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" +source "board/congatec/cgtqmx8/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" source "board/toradex/apalis-imx8/Kconfig" source "board/toradex/colibri-imx8x/Kconfig" diff --git a/board/congatec/cgtqmx8/Kconfig b/board/congatec/cgtqmx8/Kconfig new file mode 100644 index 00000000000..72730392615 --- /dev/null +++ b/board/congatec/cgtqmx8/Kconfig @@ -0,0 +1,14 @@ +if TARGET_CONGA_QMX8 + +config SYS_BOARD + default "cgtqmx8" + +config SYS_VENDOR + default "congatec" + +config SYS_CONFIG_NAME + default "cgtqmx8" + +source "board/congatec/common/Kconfig" + +endif diff --git a/board/congatec/cgtqmx8/MAINTAINERS b/board/congatec/cgtqmx8/MAINTAINERS new file mode 100644 index 00000000000..53bc0f93b76 --- /dev/null +++ b/board/congatec/cgtqmx8/MAINTAINERS @@ -0,0 +1,7 @@ +i.MX8QM CGTQMX8 BOARD +M: Oliver Graute +S: Maintained +F: board/congatec/cgtqmx8/ +F: arch/arm/dts/imx8qm-cgtqmx8.dts +F: include/configs/cgtqmx8.h +F: configs/cgtqmx8_defconfig diff --git a/board/congatec/cgtqmx8/Makefile b/board/congatec/cgtqmx8/Makefile new file mode 100644 index 00000000000..4b59dbb6bc7 --- /dev/null +++ b/board/congatec/cgtqmx8/Makefile @@ -0,0 +1,11 @@ +# +# Copyright 2017 NXP +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += cgtqmx8.o + +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +endif diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c new file mode 100644 index 00000000000..fb0cf091389 --- /dev/null +++ b/board/congatec/cgtqmx8/cgtqmx8.c @@ -0,0 +1,460 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 congatec AG + * Copyright (C) 2019 Oliver Graute + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define ESDHC_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define ESDHC_CLK_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define ENET_INPUT_PAD_CTRL ((SC_PAD_CONFIG_OD_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_18V_10MA << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define ENET_NORMAL_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_18V_10MA << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define FSPI_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define I2C_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +static iomux_cfg_t uart0_pads[] = { + SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +void board_late_mmc_env_init(void); +void init_clk_usdhc(u32 index); +int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg); + +static void setup_iomux_uart(void) +{ + imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads)); +} + +int board_early_init_f(void) +{ + /* sc_ipc_t ipcHndl = 0; */ + sc_err_t scierr = 0; + + /* When start u-boot in XEN VM, directly return */ + /* if (IS_ENABLED(CONFIG_XEN)) */ + /* return 0; */ + + /* ipcHndl = gd->arch.ipc_channel_handle; */ + + /* Power up UART0, this is very early while power domain is not working */ + scierr = sc_pm_set_resource_power_mode(-1, SC_R_UART_0, SC_PM_PW_MODE_ON); + if (scierr != SC_ERR_NONE) + return 0; + + /* Set UART0 clock root to 80 MHz */ + sc_pm_clock_rate_t rate = 80000000; + + scierr = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, &rate); + if (scierr != SC_ERR_NONE) + return 0; + + /* Enable UART0 clock root */ + scierr = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false); + if (scierr != SC_ERR_NONE) + return 0; + + setup_iomux_uart(); + + return 0; +} + +#if IS_ENABLED(CONFIG_FSL_ESDHC_IMX) + +#define USDHC1_CD_GPIO IMX_GPIO_NR(5, 22) +#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 12) + +static struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { + {USDHC1_BASE_ADDR, 0, 8}, + {USDHC2_BASE_ADDR, 0, 4}, + {USDHC3_BASE_ADDR, 0, 4}, +}; + +static iomux_cfg_t emmc0[] = { + SC_P_EMMC0_CLK | MUX_PAD_CTRL(ESDHC_CLK_PAD_CTRL), + SC_P_EMMC0_CMD | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA0 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA1 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA2 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA3 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA4 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA5 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA6 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA7 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_RESET_B | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_STROBE | MUX_PAD_CTRL(ESDHC_PAD_CTRL), +}; + +static iomux_cfg_t usdhc1_sd[] = { + SC_P_USDHC1_CLK | MUX_PAD_CTRL(ESDHC_CLK_PAD_CTRL), + SC_P_USDHC1_CMD | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA0 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA1 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA2 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA3 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA6 | MUX_MODE_ALT(2) | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA7 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_RESET_B | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_VSELECT | MUX_PAD_CTRL(ESDHC_PAD_CTRL), +}; + +static iomux_cfg_t usdhc2_sd[] = { + SC_P_USDHC2_CLK | MUX_PAD_CTRL(ESDHC_CLK_PAD_CTRL), + SC_P_USDHC2_CMD | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA0 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA1 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA2 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA3 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_RESET_B | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_VSELECT | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_WP | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_CD_B | MUX_MODE_ALT(3) | MUX_PAD_CTRL(ESDHC_PAD_CTRL), +}; + +int board_mmc_init(struct bd_info *bis) +{ + int i, ret; + struct power_domain pd; + + /* + * According to the board_mmc_init() the following map is done: + * (U-Boot device node) (Physical Port) + * mmc0 (onboard eMMC) USDHC1 + * mmc1 (external SD card) USDHC2 + * mmc2 (onboard µSD) USDHC3 + */ + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + /* onboard eMMC */ + if (!imx8_power_domain_lookup_name("conn_sdhc0", &pd)) + power_domain_on(&pd); + + imx8_iomux_setup_multiple_pads(emmc0, ARRAY_SIZE(emmc0)); + init_clk_usdhc(0); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; + case 1: + /* external SD card */ + if (!imx8_power_domain_lookup_name("conn_sdhc1", &pd)) + power_domain_on(&pd); + + imx8_iomux_setup_multiple_pads(usdhc1_sd, ARRAY_SIZE(usdhc1_sd)); + init_clk_usdhc(1); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + gpio_request(USDHC1_CD_GPIO, "sd1_cd"); + gpio_direction_input(USDHC1_CD_GPIO); + break; + case 2: + /* onboard µSD */ + if (!imx8_power_domain_lookup_name("conn_sdhc2", &pd)) + power_domain_on(&pd); + + imx8_iomux_setup_multiple_pads(usdhc2_sd, ARRAY_SIZE(usdhc2_sd)); + init_clk_usdhc(2); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + gpio_request(USDHC2_CD_GPIO, "sd2_cd"); + gpio_direction_input(USDHC2_CD_GPIO); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) than supported by the board\n", i + 1); + return 0; + } + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) { + printf("Warning: failed to initialize mmc dev %d\n", i); + return ret; + } + } + + return 0; +} + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = 1; + break; + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; + } + + return ret; +} + +#endif /* CONFIG_FSL_ESDHC_IMX */ + +#if (IS_ENABLED(CONFIG_FEC_MXC)) + +#include + +static iomux_cfg_t pad_enet0[] = { + SC_P_ENET0_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD0 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD1 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD2 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD3 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXC | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD0 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD1 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD2 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD3 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_MDC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_MDIO | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), +}; + +static void setup_iomux_fec(void) +{ + imx8_iomux_setup_multiple_pads(pad_enet0, ARRAY_SIZE(pad_enet0)); +} + +static void enet_device_phy_reset(void) +{ + gpio_set_value(FEC0_RESET, 0); + udelay(50); + gpio_set_value(FEC0_RESET, 1); + + /* The board has a long delay for this reset to become stable */ + mdelay(200); +} + +int board_eth_init(struct bd_info *bis) +{ + setup_iomux_fec(); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +static int setup_fec(void) +{ + /* Reset ENET PHY */ + enet_device_phy_reset(); + + return 0; +} +#endif + +#ifdef CONFIG_MXC_GPIO + +#define LVDS_ENABLE IMX_GPIO_NR(1, 6) +#define BKL_ENABLE IMX_GPIO_NR(1, 7) + +static iomux_cfg_t board_gpios[] = { + SC_P_LVDS0_I2C0_SCL | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), + SC_P_LVDS0_I2C0_SDA | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), + SC_P_ESAI1_FST | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), +}; + +static void board_gpio_init(void) +{ + imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios)); + + /* enable LVDS */ + gpio_request(LVDS_ENABLE, "lvds_enable"); + gpio_direction_output(LVDS_ENABLE, 1); + + /* enable backlight */ + gpio_request(BKL_ENABLE, "bkl_enable"); + gpio_direction_output(BKL_ENABLE, 1); + + /* ethernet reset */ + gpio_request(FEC0_RESET, "enet0_reset"); + gpio_direction_output(FEC0_RESET, 1); +} +#endif + +int checkboard(void) +{ + puts("Board: conga-QMX8\n"); + + build_info(); + print_bootinfo(); + + return 0; +} + +int board_init(void) +{ + if (IS_ENABLED(CONFIG_XEN)) + return 0; + +#ifdef CONFIG_MXC_GPIO + board_gpio_init(); +#endif + +#if (IS_ENABLED(CONFIG_FEC_MXC)) + setup_fec(); +#endif + + return 0; +} + +void detail_board_ddr_info(void) +{ + puts("\nDDR "); +} + +/* + * Board specific reset that is system reset. + */ +void reset_cpu(ulong addr) +{ + /* TODO */ +} + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, struct bd_info *bd) +{ + return 0; +} +#endif + +int board_mmc_get_env_dev(int devno) +{ + /* Use EMMC */ + if (IS_ENABLED(CONFIG_XEN)) + return 0; + + return devno; +} + +int mmc_map_to_kernel_blk(int dev_no) +{ + /* Use EMMC */ + if (IS_ENABLED(CONFIG_XEN)) + return 0; + + return dev_no; +} + +extern u32 _end_ofs; +int board_late_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + env_set("board_name", "QMX8"); + env_set("board_rev", "iMX8QM"); +#endif + + env_set("sec_boot", "no"); +#ifdef CONFIG_AHAB_BOOT + env_set("sec_boot", "yes"); +#endif + +#ifdef CONFIG_ENV_IS_IN_MMC + board_late_mmc_env_init(); +#endif + +#ifdef IMX_LOAD_HDMI_FIMRWARE + char *end_of_uboot; + char command[256]; + + end_of_uboot = (char *)(ulong)(CONFIG_SYS_TEXT_BASE + _end_ofs + + fdt_totalsize(gd->fdt_blob)); + end_of_uboot += 9; + + /* load hdmitxfw.bin and hdmirxfw.bin*/ + memcpy(IMX_HDMI_FIRMWARE_LOAD_ADDR, end_of_uboot, + IMX_HDMITX_FIRMWARE_SIZE + IMX_HDMIRX_FIRMWARE_SIZE); + + sprintf(command, "hdp load 0x%x", IMX_HDMI_FIRMWARE_LOAD_ADDR); + run_command(command, 0); + + sprintf(command, "hdprx load 0x%x", + IMX_HDMI_FIRMWARE_LOAD_ADDR + IMX_HDMITX_FIRMWARE_SIZE); + run_command(command, 0); +#endif + + return 0; +} + +#ifdef CONFIG_FSL_FASTBOOT +#ifdef CONFIG_ANDROID_RECOVERY +int is_recovery_key_pressing(void) +{ + return 0; /*TODO*/ +} +#endif /*CONFIG_ANDROID_RECOVERY*/ +#endif /*CONFIG_FSL_FASTBOOT*/ + +/* Only Enable USB3 resources currently */ +int board_usb_init(int index, enum usb_init_type init) +{ + return 0; +} diff --git a/board/congatec/cgtqmx8/imximage.cfg b/board/congatec/cgtqmx8/imximage.cfg new file mode 100644 index 00000000000..e324c7ca37c --- /dev/null +++ b/board/congatec/cgtqmx8/imximage.cfg @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#define __ASSEMBLY__ + +/* Boot from SD, sector size 0x400 */ +BOOT_FROM SD 0x400 +/* SoC type IMX8QM */ +SOC_TYPE IMX8QM +/* Append seco container image */ +APPEND mx8qm-ahab-container.img +/* Create the 2nd container */ +CONTAINER +/* Add scfw image with exec attribute */ +IMAGE SCU mx8qm-val-scfw-tcm.bin +/* Add ATF image with exec attribute */ +IMAGE A35 bl31.bin 0x80000000 +/* Add U-Boot image with load attribute */ +DATA A35 u-boot-dtb.bin 0x80020000 diff --git a/board/congatec/cgtqmx8/spl.c b/board/congatec/cgtqmx8/spl.c new file mode 100644 index 00000000000..2a5d4c1bcd5 --- /dev/null +++ b/board/congatec/cgtqmx8/spl.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void spl_board_init(void) +{ + struct udevice *dev; + int offset; + + uclass_find_first_device(UCLASS_MISC, &dev); + + for (; dev; uclass_find_next_device(&dev)) { + if (device_probe(dev)) + continue; + } + + offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "nxp,imx8-pd"); + while (offset != -FDT_ERR_NOTFOUND) { + lists_bind_fdt(gd->dm_root, offset_to_ofnode(offset), + NULL, true); + offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset, + "nxp,imx8-pd"); + } + + uclass_find_first_device(UCLASS_POWER_DOMAIN, &dev); + + for (; dev; uclass_find_next_device(&dev)) { + if (device_probe(dev)) + continue; + } + + arch_cpu_init(); + + board_early_init_f(); + + timer_init(); + + preloader_console_init(); + + puts("Normal Boot\n"); +} + +#if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif + +void board_init_f(ulong dummy) +{ + /* Clear global data */ + memset((void *)gd, 0, sizeof(gd_t)); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + board_init_r(NULL, 0); +} diff --git a/board/congatec/common/Kconfig b/board/congatec/common/Kconfig new file mode 100644 index 00000000000..5c205bd8304 --- /dev/null +++ b/board/congatec/common/Kconfig @@ -0,0 +1,48 @@ +if !ARCH_IMX8M && !ARCH_IMX8 + +config CHAIN_OF_TRUST + depends on !FIT_SIGNATURE && SECURE_BOOT + imply CMD_BLOB + imply CMD_HASH if ARM + select FSL_CAAM + select SPL_BOARD_INIT if (ARM && SPL) + select SHA_HW_ACCEL + select SHA_PROG_HW_ACCEL + select ENV_IS_NOWHERE + select CMD_EXT4 if ARM + select CMD_EXT4_WRITE if ARM + bool + default y + +config CMD_ESBC_VALIDATE + bool "Enable the 'esbc_validate' and 'esbc_halt' commands" + default y if CHAIN_OF_TRUST + help + This option enables two commands used for secure booting: + + esbc_validate - validate signature using RSA verification + esbc_halt - put the core in spin loop (Secure Boot Only) + +endif + +config VOL_MONITOR_LTC3882_READ + depends on VID + bool "Enable the LTC3882 voltage monitor read" + default n + help + This option enables LTC3882 voltage monitor read + functionality. It is used by common VID driver. + +config VOL_MONITOR_LTC3882_SET + depends on VID + bool "Enable the LTC3882 voltage monitor set" + default n + help + This option enables LTC3882 voltage monitor set + functionality. It is used by common VID driver. + +config USB_TCPC + bool "USB Typec port controller simple driver" + default n + help + Enable USB type-c port controller (TCPC) driver diff --git a/board/congatec/common/Makefile b/board/congatec/common/Makefile new file mode 100644 index 00000000000..d4ddfbf9716 --- /dev/null +++ b/board/congatec/common/Makefile @@ -0,0 +1,23 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +MINIMAL= + +ifdef CONFIG_SPL_BUILD +ifdef CONFIG_SPL_INIT_MINIMAL +MINIMAL=y +endif +endif + +ifdef MINIMAL +# necessary to create built-in.o +obj- := __dummy__.o +else + +obj-y += mmc.o + +endif diff --git a/board/congatec/common/mmc.c b/board/congatec/common/mmc.c new file mode 100644 index 00000000000..bb7a3d4a9aa --- /dev/null +++ b/board/congatec/common/mmc.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2018 NXP + * + */ +#include +#include +#include +#include +#include +#include +#include + +static int check_mmc_autodetect(void) +{ + char *autodetect_str = env_get("mmcautodetect"); + + if ((autodetect_str) && (strcmp(autodetect_str, "yes") == 0)) + return 1; + + return 0; +} + +/* This should be defined for each board */ +__weak int mmc_map_to_kernel_blk(int dev_no) +{ + return dev_no; +} + +void board_late_mmc_env_init(void) +{ + char cmd[32]; + char mmcblk[32]; + u32 dev_no = mmc_get_env_dev(); + + if (!check_mmc_autodetect()) + return; + + env_set_ulong("mmcdev", dev_no); + + /* Set mmcblk env */ + sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", + mmc_map_to_kernel_blk(dev_no)); + env_set("mmcroot", mmcblk); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig new file mode 100644 index 00000000000..238e421601f --- /dev/null +++ b/configs/cgtqmx8_defconfig @@ -0,0 +1,86 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8=y +CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_CONGA_QMX8=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx8/imximage.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_IMX_BOOTAUX=y +CONFIG_LOG=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_HUSH_PARSER=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_CPU=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FUSE=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx8qm-cgtqmx8" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 +CONFIG_SPL_DM=y +CONFIG_SPL_CLK=y +CONFIG_CLK_IMX8=y +CONFIG_CPU=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPL_TINY_MEMSET=y +# CONFIG_EFI_LOADER is not set +CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 +CONFIG_SYS_MMC_ENV_PART=0 +CONFIG_SYS_MMC_ENV_DEV=1 diff --git a/doc/board/congatec/cgtqmx8.rst b/doc/board/congatec/cgtqmx8.rst new file mode 100644 index 00000000000..bccdef2f16e --- /dev/null +++ b/doc/board/congatec/cgtqmx8.rst @@ -0,0 +1,70 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the Congatec conga-QMX8 board +======================================== + +Quick Start +----------- + +- Build the ARM Trusted firmware binary +- Get scfw_tcm.bin and ahab-container.img +- Get imx-mkimage +- Build U-Boot +- Build imx-mkimage +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://source.codeaurora.org/external/imx/imx-atf + $ cd imx-atf/ + $ git checkout origin/imx_4.14.78_1.0.0_ga -b imx_4.14.78_1.0.0_ga + $ make PLAT=imx8qm bl31 + +Get scfw_tcm.bin and ahab-container.img +--------------------------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.1.bin + $ chmod +x imx-sc-firmware-1.1.bin + $ ./imx-sc-firmware-1.1.bin + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin + $ chmod +x firmware-imx-8.0.bin + $ ./firmware-imx-8.0.bin + +Or use this to avoid running random scripts from the internet, +but note that you must agree to the license the script displays: + +.. code-block:: bash + + $ dd if=imx-sc-firmware-1.1.bin of=imx-sc-firmware-1.1.tar.bz2 bs=37185 skip=1 + $ tar -xf imx-sc-firmware-1.1.tar.bz2 + $ cp imx-sc-firmware-1.1/mx8qx-val-scfw-tcm.bin $(builddir) + + $ dd if=firmware-imx-8.0.bin of=firmware-imx-8.0.tar.bz2 bs=37180 skip=1 + $ tar -xf firmware-imx-8.0.tar.bz2 + $ cp firmware-imx-8.0/firmware/seco/mx8qm-ahab-container.img $(builddir) + +Build U-Boot +------------ + +.. code-block:: bash + + $ export ATF_LOAD_ADDR=0x80000000 + $ export BL33_LOAD_ADDR=0x80020000 + $ make cgtqmx8_defconfig + $ make u-boot.bin + $ make flash.bin + +Flash the binary into the SD card +--------------------------------- + +Burn the flash.bin binary to SD card offset 32KB: + +.. code-block:: bash + + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync diff --git a/doc/board/congatec/index.rst b/doc/board/congatec/index.rst new file mode 100644 index 00000000000..cc57b36b2e5 --- /dev/null +++ b/doc/board/congatec/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Congatec +======== + +.. toctree:: + :maxdepth: 2 + + cgtqmx8.rst diff --git a/doc/board/index.rst b/doc/board/index.rst index a70d2de19de..747511f7ddd 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -11,6 +11,7 @@ Board-specific doc AndesTech/index amlogic/index atmel/index + congatec/index coreboot/index emulation/index freescale/index diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h new file mode 100644 index 00000000000..15c50279ad9 --- /dev/null +++ b/include/configs/cgtqmx8.h @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2017-2018 NXP + * Copyright 2018 congatec AG + * + */ + +#ifndef __CGTQMX8_H +#define __CGTQMX8_H + +#include +#include + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_TEXT_BASE 0x0 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 +#define CONFIG_MALLOC_F_ADDR 0x00120000 + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_OF_EMBED +#endif + +#define CONFIG_REMAKE_ELF + +#define CONFIG_BOARD_EARLY_INIT_F + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_BOARD_SETUP + +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define USDHC1_BASE_ADDR 0x5B010000 +#define USDHC2_BASE_ADDR 0x5B020000 +#define USDHC3_BASE_ADDR 0x5B030000 +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +/* Boot M4 */ +#define M4_BOOT_ENV \ + "m4_0_image=m4_0.bin\0" \ + "m4_1_image=m4_1.bin\0" \ + "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ + "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ + "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ + "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ + +#ifdef CONFIG_NAND_BOOT +#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) " +#else +#define MFG_NAND_PARTITION "" +#endif +#define FEC0_RESET IMX_GPIO_NR(2, 5) +#define FEC0_PDOMAIN "conn_enet0" + +#define CONFIG_MFG_ENV_SETTINGS \ + "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ + "rdinit=/linuxrc " \ + "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ + "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ + "g_mass_storage.iSerialNumber=\"\" "\ + MFG_NAND_PARTITION \ + "clk_ignore_unused "\ + "\0" \ + "initrd_addr=0x83800000\0" \ + "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + M4_BOOT_ENV \ + "script=boot.scr\0" \ + "image=Image\0" \ + "panel=NULL\0" \ + "console=ttyLP0\0" \ + "fdt_addr=0x83000000\0" \ + "boot_fdt=try\0" \ + "fdt_file=imx8qm-cgt-qmx8.dtb\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "echo wait for boot; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "booti; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else booti ${loadaddr} - ${fdt_addr}; fi" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x80280000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ +#define CONFIG_SYS_FSL_USDHC_NUM 3 + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_2 0x880000000 +#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ +#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ + +/* Serial */ +#define CONFIG_BAUDRATE 115200 + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 8000000 /* 8MHz */ + +/* Networking */ +#define CONFIG_FEC_MXC_PHYADDR -1 +#define CONFIG_FEC_XCV_TYPE RGMII +#define FEC_QUIRK_ENET_MAC + +#endif /* __CGTQMX8_H */ From a3a0bc85c0501c2374966104b8daca6c69101625 Mon Sep 17 00:00:00 2001 From: Navin Sankar Velliangiri Date: Tue, 18 May 2021 09:03:20 +0530 Subject: [PATCH 050/156] imx: Add SeeedStudio NPI-IMX6ULL Support CPU: Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 49C Reset cause: POR Model: Seeed NPi iMX6ULL Dev Board with NAND Board: Seeed NPi i.MX6ULL Dev Board DRAM: 512 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial@2020000 Out: serial@2020000 Err: serial@2020000 Net: FEC0 Working: - Eth0 - MMC/SD - NAND - UART 1 - USB host Signed-off-by: Navin Sankar Velliangiri Note: Changes in v2: * removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file. * Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation. --- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 1 + .../imx6ull-seeed-npi-imx6ull-dev-board.dts | 19 ++ .../dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi | 24 ++ arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi | 271 ++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 11 + board/seeed/npi_imx6ull/Kconfig | 12 + board/seeed/npi_imx6ull/MAINTAINERS | 9 + board/seeed/npi_imx6ull/Makefile | 4 + board/seeed/npi_imx6ull/README | 61 ++++ board/seeed/npi_imx6ull/npi_imx6ull.c | 114 ++++++++ board/seeed/npi_imx6ull/spl.c | 205 +++++++++++++ configs/seeed_npi_imx6ull_defconfig | 80 ++++++ include/configs/npi_imx6ull.h | 96 +++++++ 14 files changed, 908 insertions(+) create mode 100644 arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts create mode 100644 arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi create mode 100644 arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi create mode 100644 board/seeed/npi_imx6ull/Kconfig create mode 100644 board/seeed/npi_imx6ull/MAINTAINERS create mode 100644 board/seeed/npi_imx6ull/Makefile create mode 100644 board/seeed/npi_imx6ull/README create mode 100644 board/seeed/npi_imx6ull/npi_imx6ull.c create mode 100644 board/seeed/npi_imx6ull/spl.c create mode 100644 configs/seeed_npi_imx6ull_defconfig create mode 100644 include/configs/npi_imx6ull.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 31d687ea011..3c46f3ff39e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2008,6 +2008,7 @@ source "board/hisilicon/poplar/Kconfig" source "board/isee/igep003x/Kconfig" source "board/kontron/sl28/Kconfig" source "board/myir/mys_6ulx/Kconfig" +source "board/seeed/npi_imx6ull/Kconfig" source "board/spear/spear300/Kconfig" source "board/spear/spear310/Kconfig" source "board/spear/spear320/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8889d5b1cae..6884c4e98fc 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -810,6 +810,7 @@ dtb-$(CONFIG_MX6ULL) += \ imx6ull-14x14-evk.dtb \ imx6ull-colibri.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ + imx6ull-seeed-npi-imx6ull-dev-board.dtb \ imx6ull-phytec-segin-ff-rdk-emmc.dtb \ imx6ull-dart-6ul.dtb \ imx6ull-somlabs-visionsom.dtb \ diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts new file mode 100644 index 00000000000..ce03ddfd21a --- /dev/null +++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri + */ + +/dts-v1/; +#include "imx6ull.dtsi" +#include "imx6ull-seeed-npi-imx6ull.dtsi" +#include "imx6ull-seeed-npi-imx6ull-u-boot.dtsi" + +/ { + model = "Seeed NPi iMX6ULL Dev Board with NAND"; + compatible = "seeed,imx6ull-seeed-npi-imx6ull", "fsl,imx6ull"; +}; + +&gpmi { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi new file mode 100644 index 00000000000..054e1aa94bb --- /dev/null +++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri + */ + +&pinctrl_uart1 { + u-boot,dm-pre-reloc; +}; + +&gpmi { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&usdhc1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&usdhc2 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi b/arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi new file mode 100644 index 00000000000..b019474dba0 --- /dev/null +++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri + */ + +#include +#include +#include + +/ { + model = "Seeed NPi-iMX6ULL Dev Board"; + compatible = "fsl,imx6ull"; + + chosen { + stdout-path = &uart1; + }; + + leds { + compatible = "gpio-leds"; + + user-led { + label = "User"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpios>; + gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "disabled"; +}; + +&uart1 { + pinctrl-name = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + no-1-8-v; + keep-power-in-suspend; + wakeup-source; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + bus-width = <8>; + non-removable; + keep-power-in-suspend; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + }; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + }; + }; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg1_id>; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpios>; + + pinctrl_uart1: uart1grp { + fsl,pin = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_usb_otg1_id: usbotg1idgrp { + fsl,pin = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6UL_PAD_NAND_DQS__RAWNAND_DQS 0x0b0b1 + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x0b0b1 + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x0b0b1 + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0x0b0b1 + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x0b000 + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x0b0b1 + MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B 0x0b0b1 + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x0b0b1 + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x0b0b1 + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x0b0b1 + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x0b0b1 + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x0b0b1 + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x0b0b1 + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x0b0b1 + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x0b0b1 + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x0b0b1 + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x0b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + >; + }; + + pinctrl_gpios: gpiosgrp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 + >; + }; +}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 0f274c41a1f..23cab3932bd 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -453,6 +453,17 @@ config TARGET_NITROGEN6X imply USB_ETHER_SMSC95XX imply USB_HOST_ETHER +config TARGET_NPI_IMX6ULL + bool "Seeed NPI-IMX6ULL" + depends on MX6ULL + select DM + select DM_ETH + select DM_MMC + select DM_GPIO + select DM_SERIAL + select DM_THERMAL + select SUPPORT_SPL + config TARGET_OPOS6ULDEV bool "Armadeus OPOS6ULDev board" depends on MX6UL diff --git a/board/seeed/npi_imx6ull/Kconfig b/board/seeed/npi_imx6ull/Kconfig new file mode 100644 index 00000000000..5e298299a32 --- /dev/null +++ b/board/seeed/npi_imx6ull/Kconfig @@ -0,0 +1,12 @@ +if TARGET_NPI_IMX6ULL + +config SYS_BOARD + default "npi_imx6ull" + +config SYS_VENDOR + default "seeed" + +config SYS_CONFIG_NAME + default "npi_imx6ull" + +endif diff --git a/board/seeed/npi_imx6ull/MAINTAINERS b/board/seeed/npi_imx6ull/MAINTAINERS new file mode 100644 index 00000000000..c6a915c79b3 --- /dev/null +++ b/board/seeed/npi_imx6ull/MAINTAINERS @@ -0,0 +1,9 @@ +NPI_IMX6ULL BOARD +M: Navin Sankar Velliangiri +S: Maintained +F: arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts +F: arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi +F: arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi +F: board/seeed/npi-imx6ull/ +F: configs/seeed_npi_imx6ull_defconfig +F: include/configs/npi_imx6ull.h diff --git a/board/seeed/npi_imx6ull/Makefile b/board/seeed/npi_imx6ull/Makefile new file mode 100644 index 00000000000..93ea413517d --- /dev/null +++ b/board/seeed/npi_imx6ull/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y := npi_imx6ull.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/seeed/npi_imx6ull/README b/board/seeed/npi_imx6ull/README new file mode 100644 index 00000000000..01d218a9bcb --- /dev/null +++ b/board/seeed/npi_imx6ull/README @@ -0,0 +1,61 @@ +How to use U-BOOT on SeeedStudio NPI-IMX6ULL Single Board Computer +------------------------------------------------------------------ + +- Configure and build U-Boot for NPI-IMX6ULL: + + $ export ARCH=arm + $ export CROSS_COMPILE=arm-none-linux-gnueabihf- + $ make seeed_npi_imx6ull_defconfig + $ make + +This will generate SPL and u-boot-dtb.img images. + +Boot from MMC/SD: +- The SPL and u-boot-dtb.img images need to be flashed into the micro SD card: + + $ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + $ sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Boot mode settings: + + Boot switch position: SW1 -> 0 + SW2 -> 1 + SW3 -> 0 + SW4 -> 0 + SW5 -> 1 + SW6 -> 0 + SW7 -> 0 + SW8 -> 1 + +Boot from NAND: +- Boot the board using SD/MMC or Serial download and load the SPL into memory +either from SD/MMC or TFTP. + +Default MTD layout is 512k(spl),1m(uboot),1m(uboot-dup),-(ubi) + +Flash SPL to NAND from SD/MMC, + + $ ext4load mmc 0:2 $loadaddr SPL + $ nand erase.part spl + $ nandbcb init $loadaddr 0x0 $filesize + +Flash u-boot image to NAND from SD/MMC, + + $ ext4load mmc 0:2 $loadaddr u-boot-dtb.img + $ nand erase.part uboot + $ nand write $loadaddr uboot $filesize + +- Boot mode settings: + + Boot switch position: SW1 -> 0 + SW2 -> 1 + SW3 -> 1 + SW4 -> 0 + SW5 -> 0 + SW6 -> 1 + SW7 -> 0 + SW8 -> 0 + +- Connect the Serial cable to UART0 and the PC for the console. + +- Reset the board using reset button and U-Boot should boot from NAND. diff --git a/board/seeed/npi_imx6ull/npi_imx6ull.c b/board/seeed/npi_imx6ull/npi_imx6ull.c new file mode 100644 index 00000000000..eb9ee555c85 --- /dev/null +++ b/board/seeed/npi_imx6ull/npi_imx6ull.c @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | \ + PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +#ifdef CONFIG_FEC_MXC + +static int setup_fec(int fec_id) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + if (fec_id == 0) { + /* + * Use 50MHz anatop loopback REF_CLK1 for ENET1, + * clear gpr1[13], set gpr1[17]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + } else { + /* + * Use 50MHz anatop loopbak REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + } + + ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ); + if (ret) + return ret; + + enable_enet_clk(1); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_FEC_MXC + setup_fec(CONFIG_FEC_ENET_DEV); +#endif + + return 0; +} + +int checkboard(void) +{ + printf("Board: Seeed NPi i.MX6ULL Dev Board\n"); + + return 0; +} diff --git a/board/seeed/npi_imx6ull/spl.c b/board/seeed/npi_imx6ull/spl.c new file mode 100644 index 00000000000..4b56f52d985 --- /dev/null +++ b/board/seeed/npi_imx6ull/spl.c @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Configuration for Micron MT41K256M16TW-107 32M x 16 x 8 -> 512MiB */ + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds = 0x00000030, + .grp_ddrmode_ctl = 0x00020000, + .grp_b0ds = 0x00000030, + .grp_ctlds = 0x00000030, + .grp_b1ds = 0x00000030, + .grp_ddrpke = 0x00000000, + .grp_ddrmode = 0x00020000, + .grp_ddr_type = 0x000c0000, +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 = 0x00000030, + .dram_dqm1 = 0x00000030, + .dram_ras = 0x00000030, + .dram_cas = 0x00000030, + .dram_odt0 = 0x00000030, + .dram_odt1 = 0x00000030, + .dram_sdba2 = 0x00000000, + .dram_sdclk_0 = 0x00000030, + .dram_sdqs0 = 0x00000030, + .dram_sdqs1 = 0x00000030, + .dram_reset = 0x00000030, +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 = 0x00000000, + .p0_mpdgctrl0 = 0x41480148, + .p0_mprddlctl = 0x40403E42, + .p0_mpwrdlctl = 0x40405852, +}; + +struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize = 0, /* Bus size = 16bit */ + .cs_density = 32, + .ncs = 1, + .cs1_mirror = 0, + .rtt_wr = 1, + .rtt_nom = 1, + .walat = 1, /* Write additional latency */ + .ralat = 5, /* Read additional latency */ + .mif3_mode = 3, /* Command prediction working mode */ + .bi_on = 1, /* Bank interleaving enabled */ + .pd_fast_exit = 1, + .sde_to_rst = 0x10, + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ + .ddr_type = DDR_TYPE_DDR3, + .refsel = 1, /* Refresh cycles at 32KHz */ + .refr = 7, /* 8 refresh commands per refresh cycle */ +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed = 1600, + .density = 4, + .width = 16, + .banks = 8, + .rowaddr = 15, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0xFFFFFFFF, &ccm->CCGR0); + writel(0xFFFFFFFF, &ccm->CCGR1); + writel(0xFFFFFFFF, &ccm->CCGR2); + writel(0xFFFFFFFF, &ccm->CCGR3); + writel(0xFFFFFFFF, &ccm->CCGR4); + writel(0xFFFFFFFF, &ccm->CCGR5); + writel(0xFFFFFFFF, &ccm->CCGR6); +} + +static void spl_dram_init(void) +{ + mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); + mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); +} + +#ifdef CONFIG_FSL_ESDHC_IMX + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ + PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_UART1_RTS_B__USDHC1_CD_B | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +#ifndef CONFIG_NAND_MXS +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; +#endif + +static struct fsl_esdhc_cfg usdhc_cfg[] = { + { + .esdhc_base = USDHC1_BASE_ADDR, + .max_bus_width = 4, + }, +#ifndef CONFIG_NAND_MXS + { + .esdhc_base = USDHC2_BASE_ADDR, + .max_bus_width = 8, + }, +#endif +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +int board_mmc_init(struct bd_info *bis) +{ + int i, ret; + + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + SETUP_IOMUX_PADS(usdhc1_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; +#ifndef CONFIG_NAND_MXS + case 1: + SETUP_IOMUX_PADS(usdhc2_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; +#endif + default: + printf("Warning - USDHC%d controller not supporting\n", + i + 1); + return 0; + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) { + printf("Warning: failed to initialize mmc dev %d\n", i); + return ret; + } + } + + return 0; +} + +#endif /* CONFIG_FSL_ESDHC_IMX */ + +void board_init_f(ulong dummy) +{ + ccgr_init(); + + /* Setup AIPS and disable watchdog */ + arch_cpu_init(); + + /* Setup iomux and fec */ + board_early_init_f(); + + /* Setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* DDR initialization */ + spl_dram_init(); +} diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig new file mode 100644 index 00000000000..6503cabbd02 --- /dev/null +++ b/configs/seeed_npi_imx6ull_defconfig @@ -0,0 +1,80 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=8 +CONFIG_ENV_SIZE=0x4000 +CONFIG_MX6ULL=y +CONFIG_TARGET_NPI_IMX6ULL=y +CONFIG_SPL_TEXT_BASE=0x908000 +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-seeed-npi-imx6ull-dev-board" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTDELAY=3 +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_DMA=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +# CONFIG_CMD_I2C is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" +CONFIG_MTDPARTS_DEFAULT="gpmi-nand:512k(spl),1m(uboot),1m(uboot-dup),-(ubi)" +CONFIG_SYS_NAND_USE_FLASH_BBT=y +CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_DM_I2C_GPIO is not set +# CONFIG_SYS_I2C_MXC is not set +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_MXS=y +CONFIG_NAND_MXS_DT=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 +CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x180000 +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_PMIC=y +CONFIG_NET_RANDOM_ETHADDR=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_MMC=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_OFFSET=0x3c00000 +CONFIG_MXC_UART=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET=y +CONFIG_SMBIOS_MANUFACTURER="Seeed" diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h new file mode 100644 index 00000000000..3be9b8ff55f --- /dev/null +++ b/include/configs/npi_imx6ull.h @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri + */ + +#ifndef _NPI_IMX6ULL_H +#define _NPI_IMX6ULL_H + +#include +#include "mx6_common.h" + +/* SPL options */ +#include "imx6_spl.h" + +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +/* Size of malloc() poll */ +#define CONFIG_SYS_MALLOC_LEN SZ_2M + +/* Console configs */ +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR + +#define CONFIG_NETMASK 255.255.255.0 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* environment settings */ +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_NAND) +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + +/* NAND */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 + +/* USB Configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 + +#ifdef CONFIG_CMD_NET +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "eth0" +#endif + +#define CONFIG_IMX_THERMAL + +#define CONFIG_FEC_ENET_DEV 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc0,115200n8\0" \ + "image=zImage\0" \ + "fdtfile=imx6ull-seeed-npi-dev-board.dtb\0" \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "fdt_addr_r=0x82000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "pxefile_addr_r=0x87100000\0" \ + "ramdisk_addr_r=0x82100000\0" \ + "scriptaddr=0x87000000\0" \ + "root=/dev/mmcblk0p2 rootwait\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(UBIFS, ubifs, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include + +#endif /* _NPI_IMX6ULL_H */ From d4f15ecd4724e633bc7f238b26f98efd5096e632 Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Sun, 2 May 2021 16:32:37 +0200 Subject: [PATCH 051/156] imx8mn: configs: add support for distro boot commands Supported boot device types in iMX8MN: MMC, DHCP. Add DISTRO_DEFAULTS config option and include the distro boot command header file to enable full support of distro boot on i.MX8M Nano EVK (both DDR and LPDDR derivatives). Drop previous environment, which was targeting customized boot commands and boot order. Signed-off-by: Andrey Zhizhikin Cc: Peng Fan Reviewed-by: Fabio Estevam --- configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + include/configs/imx8mn_evk.h | 68 +++++++------------------------ 3 files changed, 16 insertions(+), 54 deletions(-) diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index a3e51bad82e..8eca79fd19c 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_DEFAULT_DEVICE_TREE="imx8mn-ddr4-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 86601ebad33..e477028f71b 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 596e255ca6d..985bec803ad 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -31,69 +31,29 @@ #endif +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(DHCP, dhcp, na) + +#include +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ "image=Image\0" \ + BOOTENV \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "console=ttymxc1,115200\0" \ - "fdt_addr=0x43000000\0" \ + "fdt_addr_r=0x43000000\0" \ "boot_fit=no\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ - "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if run loadfdt; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${loadaddr} ${image}; " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi;" /* Link Definitions */ #define CONFIG_LOADADDR 0x40480000 From 40496ac3b71b9589a9149d423b81133eebce07b1 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 28 May 2021 10:26:57 -0300 Subject: [PATCH 052/156] mx7d: Add Storopack's SMEGW01 board Add support for Storopack's SMEGW01 board, which is an IoT gateway based on the i.MX7D SoC. Based on the original U-Boot work done by Phytec. Signed-off-by: Fabio Estevam --- arch/arm/dts/Makefile | 4 +- arch/arm/dts/imx7d-smegw01.dts | 190 +++++++++++++++++++++++++++ arch/arm/mach-imx/mx7/Kconfig | 9 ++ board/storopack/smegw01/Kconfig | 12 ++ board/storopack/smegw01/MAINTAINERS | 7 + board/storopack/smegw01/Makefile | 4 + board/storopack/smegw01/imximage.cfg | 100 ++++++++++++++ board/storopack/smegw01/smegw01.c | 95 ++++++++++++++ configs/smegw01_defconfig | 63 +++++++++ include/configs/smegw01.h | 63 +++++++++ 10 files changed, 545 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/imx7d-smegw01.dts create mode 100644 board/storopack/smegw01/Kconfig create mode 100644 board/storopack/smegw01/MAINTAINERS create mode 100644 board/storopack/smegw01/Makefile create mode 100644 board/storopack/smegw01/imximage.cfg create mode 100644 board/storopack/smegw01/smegw01.c create mode 100644 configs/smegw01_defconfig create mode 100644 include/configs/smegw01.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 6884c4e98fc..27bc6a79617 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -834,8 +834,8 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7s-warp.dtb \ imx7d-meerkat96.dtb \ imx7d-pico-pi.dtb \ - imx7d-pico-hobbit.dtb - + imx7d-pico-hobbit.dtb \ + imx7d-smegw01.dtb dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-com.dtb \ imx7ulp-evk.dtb diff --git a/arch/arm/dts/imx7d-smegw01.dts b/arch/arm/dts/imx7d-smegw01.dts new file mode 100644 index 00000000000..aefc654ad87 --- /dev/null +++ b/arch/arm/dts/imx7d-smegw01.dts @@ -0,0 +1,190 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// +// Copyright (C) 2020 PHYTEC Messtechnik GmbH +// Author: Jens Lang +// Copyright (C) 2021 Fabio Estevam + +/dts-v1/; +#include "imx7d.dtsi" + +/ { + model = "Storopack SMEGW01 board"; + compatible = "storopack,imx7d-smegw01", "fsl,imx7d"; + + aliases { + mmc0 = &usdhc1; + mmc1 = &usdhc3; + }; + + chosen { + stdout-path = &uart1; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <100000000>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; + status = "okay"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + no-1-8-v; + enable-sdio-wakeup; + keep-power-in-suspend; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; + assigned-clock-rates = <400000000>; + max-frequency = <200000000>; + bus-width = <8>; + fsl,tuning-step = <1>; + non-removable; + cap-sd-highspeed; + cap-mmc-highspeed; + cap-mmc-hw-reset; + mmc-hs200-1_8v; + mmc-ddr-1_8v; + sd-uhs-ddr50; + sd-uhs-sdr104; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x5 + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x5 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x5 + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x5 + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x5 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x5 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x5 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x5 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x5 + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x5 + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x5 + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x5 + MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x7 + MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x7 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x74 + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x7c + >; + }; + + pinctrl_usdhc1: usdhc1 { + fsl,pins = < + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + >; + }; + + pinctrl_usdhc3: usdhc3 { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5d + MX7D_PAD_SD3_CLK__SD3_CLK 0x1d + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5d + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5d + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5d + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5d + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5d + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5d + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5d + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5d + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1d + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3_100mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5e + MX7D_PAD_SD3_CLK__SD3_CLK 0x1e + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5e + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5e + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5e + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5e + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5e + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5e + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5e + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5e + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1e + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3_200mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5f + MX7D_PAD_SD3_CLK__SD3_CLK 0x0f + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5f + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5f + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5f + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5f + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5f + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5f + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5f + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5f + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1f + >; + }; +}; + +&iomuxc_lpsr { + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 + >; + }; +}; diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 5c6fe426efb..adedc011648 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -70,6 +70,14 @@ config TARGET_PICO_IMX7D select SUPPORT_SPL imply CMD_DM +config TARGET_SMEGW01 + bool "smegw01" + select BOARD_LATE_INIT + select DM + select DM_THERMAL + select MX7D + imply CMD_DM + config TARGET_WARP7 bool "warp7" select BOARD_LATE_INIT @@ -94,6 +102,7 @@ source "board/compulab/cl-som-imx7/Kconfig" source "board/ronetix/imx7-cm/Kconfig" source "board/freescale/mx7dsabresd/Kconfig" source "board/novtech/meerkat96/Kconfig" +source "board/storopack/smegw01/Kconfig" source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" diff --git a/board/storopack/smegw01/Kconfig b/board/storopack/smegw01/Kconfig new file mode 100644 index 00000000000..4503b65419a --- /dev/null +++ b/board/storopack/smegw01/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SMEGW01 + +config SYS_BOARD + default "smegw01" + +config SYS_VENDOR + default "storopack" + +config SYS_CONFIG_NAME + default "smegw01" + +endif diff --git a/board/storopack/smegw01/MAINTAINERS b/board/storopack/smegw01/MAINTAINERS new file mode 100644 index 00000000000..6acb8b93418 --- /dev/null +++ b/board/storopack/smegw01/MAINTAINERS @@ -0,0 +1,7 @@ +SMEGW01 BOARD +M: Fabio Estevam +S: Maintained +F: board/storopack/ +F: arch/arm/dts/imx7d-smegw01.dts +F: configs/smegw01_defconfig +F: include/configs/smegw01.h diff --git a/board/storopack/smegw01/Makefile b/board/storopack/smegw01/Makefile new file mode 100644 index 00000000000..f02e7bb8b00 --- /dev/null +++ b/board/storopack/smegw01/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# (C) Copyright 2016 NXP Semiconductors + +obj-y := smegw01.o diff --git a/board/storopack/smegw01/imximage.cfg b/board/storopack/smegw01/imximage.cfg new file mode 100644 index 00000000000..c7fa06996cc --- /dev/null +++ b/board/storopack/smegw01/imximage.cfg @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2017 PHYTEC America, LLC + * + * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include + +IMAGE_VERSION 2 +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* DDR initialization came from Phytec */ +DATA 4 0x30340004 0x4F400005 +DATA 4 0x30360388 0x40000000 +DATA 4 0x30360384 0x40000000 +DATA 4 0x30391000 0x00000002 +DATA 4 0x307a0000 0x01040001 +DATA 4 0x307a01a0 0x80400003 +DATA 4 0x307a01a4 0x00100020 +DATA 4 0x307a01a8 0x80100004 +DATA 4 0x307a0064 0x0040002b +DATA 4 0x307a0490 0x00000001 +DATA 4 0x307a00d0 0x00020083 +DATA 4 0x307a00d4 0x00690000 +DATA 4 0x307a00dc 0x09300004 +DATA 4 0x307a00e0 0x04080000 +DATA 4 0x307a00e4 0x00100004 +DATA 4 0x307a00f4 0x0000033f +DATA 4 0x307a0100 0x090b1109 +DATA 4 0x307a0104 0x0007020d +DATA 4 0x307a0108 0x03040407 +DATA 4 0x307a010c 0x00002006 +DATA 4 0x307a0110 0x04020205 +DATA 4 0x307a0114 0x03030202 +DATA 4 0x307a0120 0x00000802 +DATA 4 0x307a0180 0x00800020 +DATA 4 0x307a0184 0x02000100 +DATA 4 0x307a0190 0x02098204 +DATA 4 0x307a0194 0x00030303 +DATA 4 0x307a0200 0x00001f15 +DATA 4 0x307a0204 0x00080808 +DATA 4 0x307a0210 0x00000f0f +DATA 4 0x307a0214 0x07070707 +DATA 4 0x307a0218 0x0f0f0707 +DATA 4 0x307a0240 0x06000604 +DATA 4 0x307a0244 0x00000001 +DATA 4 0x30391000 0x00000000 +DATA 4 0x30790000 0x17420f40 +DATA 4 0x30790004 0x10210100 +DATA 4 0x30790010 0x00060807 +DATA 4 0x307900b0 0x1010007e +DATA 4 0x3079009c 0x00000d6e +DATA 4 0x30790020 0x0a0a0a0a +DATA 4 0x30790030 0x06060606 +DATA 4 0x30790050 0x01000010 +DATA 4 0x30790050 0x00000010 +DATA 4 0x307900c0 0x0e407304 +DATA 4 0x307900c0 0x0e447304 +DATA 4 0x307900c0 0x0e447306 +CHECK_BITS_SET 4 0x307900c4 0x1 +DATA 4 0x307900c0 0x0e447304 +DATA 4 0x307900c0 0x0e407304 +DATA 4 0x30384130 0x00000000 +DATA 4 0x30340020 0x00000178 +DATA 4 0x30384130 0x00000002 +DATA 4 0x30790018 0x0000000f +CHECK_BITS_SET 4 0x307a0004 0x1 diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c new file mode 100644 index 00000000000..e6bff80e556 --- /dev/null +++ b/board/storopack/smegw01/smegw01.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Fabio Estevam + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \ + PAD_CTL_HYS) + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_SIZE; + + return 0; +} + +static iomux_v3_cfg_t const wdog_pads[] = { + MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart1_pads[] = { + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +}; + +static int setup_fec(void) +{ + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + int ret; + + /* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/ + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], + (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK | + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0); + + ret = set_clk_enet(ENET_125MHZ); + if (ret) + return ret; + + return 0; +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + setup_fec(); + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int board_late_init(void) +{ + struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + + imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); + + set_wdog_reset(wdog); + + /* + * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), + * since we use PMIC_PWRON to reset the board. + */ + clrsetbits_le16(&wdog->wcr, 0, 0x10); + + return 0; +} diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig new file mode 100644 index 00000000000..aa10577a9f3 --- /dev/null +++ b/configs/smegw01_defconfig @@ -0,0 +1,63 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xC0000 +CONFIG_DM_GPIO=y +CONFIG_TARGET_SMEGW01=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +# CONFIG_ARMV7_VIRT is not set +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-smegw01" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/storopack/smegw01/imximage.cfg" +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_BOUNCE_BUFFER=y +CONFIG_DFU_MMC=y +CONFIG_DM_I2C=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h new file mode 100644 index 00000000000..50f00136ac4 --- /dev/null +++ b/include/configs/smegw01.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 NXP Semiconductors + * Copyright (C) 2021 Fabio Estevam + * + * Configuration settings for the smegw01 board. + */ + +#ifndef __SMEGW01_CONFIG_H +#define __SMEGW01_CONFIG_H + +#include "mx7_common.h" +#include + +#define PHYS_SDRAM_SIZE SZ_512M + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) + +/* MMC Config*/ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "image=zImage\0" \ + "console=ttymxc0\0" \ + "fdtfile=imx7d-smegw01.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "bootm_size=0x10000000\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "fi;\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if run loadimage; then " \ + "run mmcboot; " \ + "fi; " \ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#endif From 0008d8086649d3bb3afd0c4697f5b73ccf6f293d Mon Sep 17 00:00:00 2001 From: Joao Marcos Costa Date: Mon, 17 May 2021 18:20:38 -0300 Subject: [PATCH 053/156] fs/squashfs: fix reading of fragmented files The fragmented files were not correctly read because of two issues: - The squashfs_file_info struct has a field named 'comp', which tells if the file's fragment is compressed or not. This field was always set to 'true' in sqfs_get_regfile_info and sqfs_get_lregfile_info. It should actually take sqfs_frag_lookup's return value. This patch addresses these two assignments. - In sqfs_read, the fragments (compressed or not) were copied to the output buffer through a for loop which was reading data at the wrong offset. Replace these loops by equivalent calls to memcpy, with the right parameters. I tested this patch by comparing the MD5 checksum of a few fragmented files with the respective md5sum output in sandbox, considering both compressed and uncompressed fragments. Signed-off-by: Joao Marcos Costa Tested-by: Richard Genoud Reviewed-by: Miquel Raynal --- fs/squashfs/sqfs.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 997be2dcf42..92ab8ac6310 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -1253,7 +1253,7 @@ static int sqfs_get_regfile_info(struct squashfs_reg_inode *reg, fentry); if (ret < 0) return -EINVAL; - finfo->comp = true; + finfo->comp = ret; if (fentry->size < 1 || fentry->start == 0x7FFFFFFF) return -EINVAL; } else { @@ -1291,7 +1291,7 @@ static int sqfs_get_lregfile_info(struct squashfs_lreg_inode *lreg, fentry); if (ret < 0) return -EINVAL; - finfo->comp = true; + finfo->comp = ret; if (fentry->size < 1 || fentry->start == 0x7FFFFFFF) return -EINVAL; } else { @@ -1547,20 +1547,16 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, goto out; } - for (j = *actread; j < finfo.size; j++) { - memcpy(buf + j, &fragment_block[finfo.offset + j], 1); - (*actread)++; - } + memcpy(buf + *actread, &fragment_block[finfo.offset], finfo.size - *actread); + *actread = finfo.size; free(fragment_block); } else if (finfo.frag && !finfo.comp) { fragment_block = (void *)fragment + table_offset; - for (j = *actread; j < finfo.size; j++) { - memcpy(buf + j, &fragment_block[finfo.offset + j], 1); - (*actread)++; - } + memcpy(buf + *actread, &fragment_block[finfo.offset], finfo.size - *actread); + *actread = finfo.size; } out: From e04bf43681c205d73a50eb0cfa13d20667d7666e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Mon, 7 Jun 2021 16:34:46 +0200 Subject: [PATCH 054/156] arm: mvebu: dts: turris_mox: add button and LED nodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add nodes for indicator LED and reset button so that board code can implement board factory reset mechanism. Signed-off-by: Marek Behún Reviewed-by: Pali Rohár Reviewed-by: Stefan Roese --- arch/arm/dts/armada-3720-turris-mox.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/dts/armada-3720-turris-mox.dts b/arch/arm/dts/armada-3720-turris-mox.dts index 8e0ebf508d4..741b0eeeee3 100644 --- a/arch/arm/dts/armada-3720-turris-mox.dts +++ b/arch/arm/dts/armada-3720-turris-mox.dts @@ -11,6 +11,8 @@ /dts-v1/; #include +#include +#include #include "armada-372x.dtsi" / { @@ -34,6 +36,28 @@ reg = <0x00000000 0x00000000 0x00000000 0x20000000>; }; + leds { + compatible = "gpio-leds"; + + led { + gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_ACTIVITY; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + compatible = "gpio-keys"; + label = "reset"; + linux,code = ; + gpios = <&gpiosb 20 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + reg_usb3_vbus: usb3_vbus@0 { compatible = "regulator-fixed"; regulator-name = "usb3-vbus"; From ec3784d62646c8f765310d564a3fc898d9945088 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Mon, 7 Jun 2021 16:34:47 +0200 Subject: [PATCH 055/156] arm: mvebu: turris_mox: add support for board rescue mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add necessary config options and board code to support board factory reset / rescue mode on Turris MOX. In order to also support invoking rescue mode from U-Boot console, without having to press the factory reset button, put the rescue command into `bootcmd_rescue` default environment variable. When factory reset button is pressed, invoke rescue mode via distroboot by setting `boot_targets` to `rescue`. Rescue boot from console can be invoked by running run bootcmd_rescue Signed-off-by: Marek Behún Reviewed-by: Pali Rohár Reviewed-by: Stefan Roese --- board/CZ.NIC/turris_mox/turris_mox.c | 71 ++++++++++++++++++++++++++++ configs/turris_mox_defconfig | 6 +++ include/configs/turris_mox.h | 9 ++++ 3 files changed, 86 insertions(+) diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 15cbf92550e..a78f33661e7 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -10,11 +10,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -44,6 +46,8 @@ #define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0" #define PCIE_PATH "/soc/pcie@d0070000" #define SFP_PATH "/sfp" +#define LED_PATH "/leds/led" +#define BUTTON_PATH "/gpio-keys/reset" DECLARE_GLOBAL_DATA_PTR; @@ -373,6 +377,71 @@ int misc_init_r(void) return 0; } +static bool read_reset_button(void) +{ + struct udevice *button, *led; + int i; + + if (device_get_global_by_ofnode(ofnode_path(BUTTON_PATH), &button)) { + printf("Cannot find reset button!\n"); + return false; + } + + if (device_get_global_by_ofnode(ofnode_path(LED_PATH), &led)) { + printf("Cannot find status LED!\n"); + return false; + } + + led_set_state(led, LEDST_ON); + + for (i = 0; i < 21; ++i) { + if (button_get_state(button) != BUTTON_ON) + return false; + if (i < 20) + mdelay(50); + } + + led_set_state(led, LEDST_OFF); + + return true; +} + +static void handle_reset_button(void) +{ + if (read_reset_button()) { + const char * const vars[3] = { + "bootcmd", + "bootcmd_rescue", + "distro_bootcmd", + }; + + /* + * Set the above envs to their default values, in case the user + * managed to break them. + */ + env_set_default_vars(3, (char * const *)vars, 0); + + /* Ensure bootcmd_rescue is used by distroboot */ + env_set("boot_targets", "rescue"); + + printf("RESET button was pressed, overwriting boot_targets!\n"); + } else { + /* + * In case the user somehow managed to save environment with + * boot_targets=rescue, reset boot_targets to default value. + * This could happen in subsequent commands if bootcmd_rescue + * failed. + */ + if (!strcmp(env_get("boot_targets"), "rescue")) { + const char * const vars[1] = { + "boot_targets", + }; + + env_set_default_vars(1, (char * const *)vars, 0); + } + } +} + static void mox_print_info(void) { int ret, board_version, ram_size; @@ -543,6 +612,8 @@ int last_stage_init(void) printf("\n"); + handle_reset_button(); + return 0; } diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index 75524babbcc..d6d37a3d7d8 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -23,10 +23,14 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y +CONFIG_CMD_BUTTON=y CONFIG_CMD_CLK=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y +CONFIG_CMD_LED=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y @@ -46,6 +50,8 @@ CONFIG_CLK=y CONFIG_CLK_MVEBU=y # CONFIG_MVEBU_GPIO is not set CONFIG_DM_I2C=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 51445ec60ae..b148b1621af 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -75,12 +75,21 @@ #include +#define TURRIS_MOX_BOOTCMD_RESCUE \ + "setenv bootargs \"console=ttyMV0,115200 " \ + "earlycon=ar3700_uart,0xd0012000\" && " \ + "sf probe && " \ + "sf read 0x5000000 0x190000 && " \ + "lzmadec 0x5000000 0x5800000 && " \ + "bootm 0x5800000" + #define CONFIG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x4d00000\0" \ "pxefile_addr_r=0x4e00000\0" \ "fdt_addr_r=0x4f00000\0" \ "kernel_addr_r=0x5000000\0" \ "ramdisk_addr_r=0x8000000\0" \ + "bootcmd_rescue=" TURRIS_MOX_BOOTCMD_RESCUE "\0" \ BOOTENV #endif /* _CONFIG_TURRIS_MOX_H */ From 45853413e2396e6a603d35e21d75712029a4cb19 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Mon, 7 Jun 2021 16:34:48 +0200 Subject: [PATCH 056/156] arm: mvebu: turris_mox: start blinking PHY LEDs when entering rescue MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Configure blinking on ethernet PHY LEDs on the MOX A board when entering rescue mode via reset button. Signed-off-by: Marek Behún Reviewed-by: Pali Rohár Reviewed-by: Stefan Roese --- board/CZ.NIC/turris_mox/turris_mox.c | 35 ++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index a78f33661e7..44c272c7cb8 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -377,6 +377,38 @@ int misc_init_r(void) return 0; } +static void mox_phy_modify(struct phy_device *phydev, int page, int reg, + u16 mask, u16 set) +{ + int val; + + val = phydev->drv->readext(phydev, MDIO_DEVAD_NONE, page, reg); + val &= ~mask; + val |= set; + phydev->drv->writeext(phydev, MDIO_DEVAD_NONE, page, reg, val); +} + +static void mox_phy_leds_start_blinking(void) +{ + struct phy_device *phydev; + struct mii_dev *bus; + + bus = miiphy_get_dev_by_name("neta@30000"); + if (!bus) { + printf("Cannot get MDIO bus device!\n"); + return; + } + + phydev = phy_find_by_mask(bus, BIT(1), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + printf("Cannot get ethernet PHY!\n"); + return; + } + + mox_phy_modify(phydev, 3, 0x12, 0x700, 0x400); + mox_phy_modify(phydev, 3, 0x10, 0xff, 0xbb); +} + static bool read_reset_button(void) { struct udevice *button, *led; @@ -424,6 +456,9 @@ static void handle_reset_button(void) /* Ensure bootcmd_rescue is used by distroboot */ env_set("boot_targets", "rescue"); + /* start blinking PHY LEDs */ + mox_phy_leds_start_blinking(); + printf("RESET button was pressed, overwriting boot_targets!\n"); } else { /* From 8805647ed0f8c50bc47de4da04e85a62deea20ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Mon, 7 Jun 2021 16:34:49 +0200 Subject: [PATCH 057/156] arm: mvebu: configs: turris_mox: add fdtfile default env variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add default fdtfile environment variable with value marvell/armada-3720-turris-mox.dtb. This can be useful for some boot scenarios. Signed-off-by: Marek Behún Reviewed-by: Pali Rohár Reviewed-by: Stefan Roese --- include/configs/turris_mox.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index b148b1621af..9c021a1ef94 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -89,6 +89,7 @@ "fdt_addr_r=0x4f00000\0" \ "kernel_addr_r=0x5000000\0" \ "ramdisk_addr_r=0x8000000\0" \ + "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "bootcmd_rescue=" TURRIS_MOX_BOOTCMD_RESCUE "\0" \ BOOTENV From f2213334004e885aed15d2036f0047d3ce18ef49 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Mon, 7 Jun 2021 16:34:50 +0200 Subject: [PATCH 058/156] arm: mvebu: dts: turris_mox: add nodes for SPI NOR partitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add nodes for SPI NOR partitions to the device tree of Turris MOX, as are in Linux' device tree. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese --- arch/arm/dts/armada-3720-turris-mox.dts | 31 +++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/dts/armada-3720-turris-mox.dts b/arch/arm/dts/armada-3720-turris-mox.dts index 741b0eeeee3..f47ced05c53 100644 --- a/arch/arm/dts/armada-3720-turris-mox.dts +++ b/arch/arm/dts/armada-3720-turris-mox.dts @@ -164,6 +164,37 @@ reg = <0>; spi-max-frequency = <20000000>; m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "secure-firmware"; + reg = <0x0 0x20000>; + }; + + partition@20000 { + label = "a53-firmware"; + reg = <0x20000 0x160000>; + }; + + partition@180000 { + label = "u-boot-env"; + reg = <0x180000 0x10000>; + }; + + partition@190000 { + label = "Rescue system"; + reg = <0x190000 0x660000>; + }; + + partition@7f0000 { + label = "dtb"; + reg = <0x7f0000 0x10000>; + }; + }; }; moxtet@1 { From d51bdaea1972ff0b905f7d33fdbb98056780bf75 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Mon, 7 Jun 2021 16:34:51 +0200 Subject: [PATCH 059/156] arm: mvebu: turris_mox: enable options for Turris network boot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable configuration options to support Turris network boot. This includes FIT support and some crypto commands. Signed-off-by: Marek Behún Reviewed-by: Pali Rohár Reviewed-by: Stefan Roese --- configs/turris_mox_defconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index d6d37a3d7d8..f93be912c95 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -25,14 +25,17 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_BUTTON=y CONFIG_BUTTON_GPIO=y +CONFIG_CMD_AES=y CONFIG_CMD_BUTTON=y CONFIG_CMD_CLK=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y +CONFIG_CMD_HASH=y CONFIG_CMD_I2C=y CONFIG_CMD_LED=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y +CONFIG_CMD_SHA1SUM=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y @@ -46,6 +49,11 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_FIT=y +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y +# CONFIG_FIT_SIGNATURE is not set +CONFIG_FIT_VERBOSE=y +# CONFIG_FIT_BEST_MATCH is not set CONFIG_CLK=y CONFIG_CLK_MVEBU=y # CONFIG_MVEBU_GPIO is not set From c64e2bd55883ede3dc29421f1f297d741ae5b137 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 8 Jun 2021 12:00:35 +0200 Subject: [PATCH 060/156] arm64: mvebu: correct Armada 8K addresses 0x04000000- 0x06000000 is reserved memory. We cannot load to anything here. Signed-off-by: Heinrich Schuchardt Reviewed-by: Stefan Roese --- include/configs/mvebu_armada-8k.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 38f50468c54..493e3de9b9f 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -91,11 +91,11 @@ #include #define CONFIG_EXTRA_ENV_SETTINGS \ - "scriptaddr=0x4d00000\0" \ - "pxefile_addr_r=0x4e00000\0" \ - "fdt_addr_r=0x4f00000\0" \ - "kernel_addr_r=0x5000000\0" \ - "ramdisk_addr_r=0x8000000\0" \ + "scriptaddr=0x6d00000\0" \ + "pxefile_addr_r=0x6e00000\0" \ + "fdt_addr_r=0x6f00000\0" \ + "kernel_addr_r=0x7000000\0" \ + "ramdisk_addr_r=0xa000000\0" \ "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ BOOTENV From 3414712ba8a82d6566e00645da8d37ea085a9f7c Mon Sep 17 00:00:00 2001 From: Adrian Fiergolski Date: Tue, 8 Jun 2021 12:37:23 +0200 Subject: [PATCH 061/156] arm64: zynqmp: Writing correct value to ANALOG_BUS The default register configuration after powerup for PSSYSMON_ANALOG_BUS register is incorrect. Hence, fix this in SPL by writing correct fixed value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c") in Xilinx:embeddedsw[1]. [1] https://github.com/Xilinx/embeddedsw Signed-off-by: Adrian Fiergolski Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/include/mach/hardware.h | 5 +++++ board/xilinx/zynqmp/zynqmp.c | 11 +++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index 3d3c48e2473..a798aa0eb99 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -19,6 +19,11 @@ #define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT 0 #define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT 8 +#define ZYNQMP_AMS_PS_SYSMON_BASEADDR 0XFFA50800 +#define ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS ((ZYNQMP_AMS_PS_SYSMON_BASEADDR) \ + + 0x00000114) +#define ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL 0x00003210 + #define PS_MODE0 BIT(0) #define PS_MODE1 BIT(1) #define PS_MODE2 BIT(2) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index d05f0b2e120..ee4d0c85e6b 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -287,6 +287,17 @@ int board_early_init_f(void) if (ret) return ret; + /* + * PS_SYSMON_ANALOG_BUS register determines mapping between SysMon + * supply sense channel to SysMon supply registers inside the IP. + * This register must be programmed to complete SysMon IP + * configuration. The default register configuration after + * power-up is incorrect. Hence, fix this by writing the + * correct value - 0x3210. + */ + writel(ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL, + ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS); + /* Delay is required for clocks to be propagated */ udelay(1000000); #endif From 2ffa65379885c621a9e53280cde0bc65baa0caa3 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Tue, 25 May 2021 06:36:27 -0600 Subject: [PATCH 062/156] spi: zynqmp_gqspi: Fix write issue Enable manual start in zynqmp_qspi_fill_gen_fifo(). Also enable GQSPI_IXR_GFNFULL_MASK and check for it instead of GQSPI_IXR_GFEMTY_MASK. Add dummy write to genfifo register in chipselect. Signed-off-by: Ashok Reddy Soma --- drivers/spi/zynqmp_gqspi.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index 17780066ae4..fc81b07343f 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -39,6 +39,7 @@ #define GQSPI_IXR_TXFULL_MASK 0x00000008 /* QSPI TX FIFO is full */ #define GQSPI_IXR_RXNEMTY_MASK 0x00000010 /* QSPI RX FIFO Not Empty */ #define GQSPI_IXR_GFEMTY_MASK 0x00000080 /* QSPI Generic FIFO Empty */ +#define GQSPI_IXR_GFNFULL_MASK 0x00000200 /* QSPI GENFIFO not full */ #define GQSPI_IXR_ALL_MASK (GQSPI_IXR_TXNFULL_MASK | \ GQSPI_IXR_RXNEMTY_MASK) @@ -238,9 +239,21 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, u32 gqspi_fifo_reg) { struct zynqmp_qspi_regs *regs = priv->regs; + u32 config_reg, ier; int ret = 0; - ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFEMTY_MASK, 1, + config_reg = readl(®s->confr); + /* Manual start if needed */ + config_reg |= GQSPI_STRT_GEN_FIFO; + writel(config_reg, ®s->confr); + + /* Enable interrupts */ + ier = readl(®s->ier); + ier |= GQSPI_IXR_GFNFULL_MASK; + writel(ier, ®s->ier); + + /* Wait until the fifo is not full to write the new command */ + ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFNFULL_MASK, 1, GQSPI_TIMEOUT, 1); if (ret) printf("%s Timeout\n", __func__); @@ -263,6 +276,9 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) debug("GFIFO_CMD_CS: 0x%x\n", gqspi_fifo_reg); + /* Dummy generic FIFO entry */ + zynqmp_qspi_fill_gen_fifo(priv, 0); + zynqmp_qspi_fill_gen_fifo(priv, gqspi_fifo_reg); } From 6bb577dbb30f3fcf47679328a1b77edc3d0c0b79 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 10 Jun 2021 14:33:55 +0200 Subject: [PATCH 063/156] arm64: zynqmp: Disable EFI_CAPSULE_ON_DISK_EARLY Sata/scsi and usb based devices are not started at this stage that's why disks are not found and early update can't happen. It is because of deficiency in the UEFI implementation which is not able to deal with block devices which are added or removed after initialization. EFI capsule on disk early feature needs to be fixed first to be able to enable this feature properly. Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_virt_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index e939b04ef6a..6adbe987cb7 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -187,6 +187,5 @@ CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_CAPSULE_ON_DISK_EARLY=y CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y From 029bb91e806ed36dd48f0f967429bd5107464979 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Mon, 14 Jun 2021 16:45:58 +0200 Subject: [PATCH 064/156] arm: mvebu: turris_{omnia, mox}: ensure running bootcmd_rescue always works MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit One of the points of putting the rescue boot command into default environment is that user can invoke it without physical access to the board (without having to press the factory reset button), by running run bootcmd_rescue in U-Boot's console. Therefore we have to ensure that bootcmd_rescue is always set to default value, regardless of whether the factory reset button was pressed. Otherwise the variable will be empty for example after upgrade from previous U-Boot. Fixes: ec3784d62646 ("arm: mvebu: turris_mox: add support for board rescue mode") Fixes: 176c3e7760a2 ("arm: mvebu: turris_omnia: support invoking rescue boot from console") Signed-off-by: Pali Rohár Signed-off-by: Marek Behún Reviewed-by: Stefan Roese --- board/CZ.NIC/turris_mox/turris_mox.c | 14 +++++++++++--- board/CZ.NIC/turris_omnia/turris_omnia.c | 13 ++++++++++--- 2 files changed, 21 insertions(+), 6 deletions(-) diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 44c272c7cb8..428cd23a19d 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -440,10 +440,18 @@ static bool read_reset_button(void) static void handle_reset_button(void) { + const char * const vars[1] = { "bootcmd_rescue", }; + + /* + * Ensure that bootcmd_rescue has always stock value, so that running + * run bootcmd_rescue + * always works correctly. + */ + env_set_default_vars(1, (char * const *)vars, 0); + if (read_reset_button()) { - const char * const vars[3] = { + const char * const vars[2] = { "bootcmd", - "bootcmd_rescue", "distro_bootcmd", }; @@ -451,7 +459,7 @@ static void handle_reset_button(void) * Set the above envs to their default values, in case the user * managed to break them. */ - env_set_default_vars(3, (char * const *)vars, 0); + env_set_default_vars(2, (char * const *)vars, 0); /* Ensure bootcmd_rescue is used by distroboot */ env_set("boot_targets", "rescue"); diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index ade923f5994..8b2f94f959a 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -339,9 +339,17 @@ static int set_regdomain(void) static void handle_reset_button(void) { + const char * const vars[1] = { "bootcmd_rescue", }; int ret; u8 reset_status; + /* + * Ensure that bootcmd_rescue has always stock value, so that running + * run bootcmd_rescue + * always works correctly. + */ + env_set_default_vars(1, (char * const *)vars, 0); + ret = omnia_mcu_read(CMD_GET_RESET, &reset_status, 1); if (ret) { printf("omnia_mcu_read failed: %i, reset status unknown!\n", @@ -352,9 +360,8 @@ static void handle_reset_button(void) env_set_ulong("omnia_reset", reset_status); if (reset_status) { - const char * const vars[3] = { + const char * const vars[2] = { "bootcmd", - "bootcmd_rescue", "distro_bootcmd", }; @@ -362,7 +369,7 @@ static void handle_reset_button(void) * Set the above envs to their default values, in case the user * managed to break them. */ - env_set_default_vars(3, (char * const *)vars, 0); + env_set_default_vars(2, (char * const *)vars, 0); /* Ensure bootcmd_rescue is used by distroboot */ env_set("boot_targets", "rescue"); From fb4e64ef9daefba6c98e6a9620e28ffee741c075 Mon Sep 17 00:00:00 2001 From: Manish Tomar Date: Tue, 13 Apr 2021 12:38:34 +0530 Subject: [PATCH 065/156] configs: ls1046afrwy: Add secure boot config Add required CONFIG_NXP_ESBC for ls1046afrwy to enable ESBC Chain of Trust. Signed-off-by: Manish Tomar Reviewed-by: Priyanka Jain --- configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index f953106a3d8..33308aa0e36 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -60,3 +60,4 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y CONFIG_RSA=y +CONFIG_NXP_ESBC=y From 2bf4658b8c5e5f4f43dc1888fe39ea61e6eeba64 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Tue, 13 Apr 2021 17:54:17 +0200 Subject: [PATCH 066/156] board: sl28: fix RGMII clock and voltage It was noticed that the clock isn't continuously enabled when there is no link. This is because the 125MHz clock is derived from the internal PLL which seems to go into some kind of power-down mode every once in a while. The LS1028A expects a contiuous clock. Thus enable the PLL all the time. Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO regulator. Signed-off-by: Michael Walle Reviewed-by: Priyanka Jain --- arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts | 3 ++- arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts index fe708bdbfa0..33d85ed83a6 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts @@ -41,8 +41,9 @@ qca,clk-out-frequency = <125000000>; qca,clk-out-strength = ; + qca,keep-pll-enabled; - vddio-supply = <&vddh>; + vddio-supply = <&vddio>; vddio: vddio-regulator { regulator-name = "VDDIO"; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts index 33b16303adb..b95e082b70b 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts @@ -32,8 +32,9 @@ qca,clk-out-frequency = <125000000>; qca,clk-out-strength = ; + qca,keep-pll-enabled; - vddio-supply = <&vddh>; + vddio-supply = <&vddio>; vddio: vddio-regulator { regulator-name = "VDDIO"; From 864c3dbc0affea081264ff31c229232fbd45945a Mon Sep 17 00:00:00 2001 From: Mian Yousaf Kaukab Date: Wed, 14 Apr 2021 12:33:58 +0200 Subject: [PATCH 067/156] ls1012a: net: pfe: remove pfe stop from bootcmd When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi Signed-off-by: Mian Yousaf Kaukab Reviewed-by: Ramon Fried [Fixed checkpatch space error] Signed-off-by: Priyanka Jain --- board/freescale/ls1012afrdm/ls1012afrdm.c | 8 ++++++++ board/freescale/ls1012aqds/ls1012aqds.c | 8 ++++++++ board/freescale/ls1012ardb/ls1012ardb.c | 8 ++++++++ drivers/net/pfe_eth/pfe_cmd.c | 2 +- include/configs/ls1012a2g5rdb.h | 6 +++--- include/configs/ls1012a_common.h | 4 ++-- include/configs/ls1012afrdm.h | 6 +++--- include/configs/ls1012afrwy.h | 6 +++--- include/configs/ls1012aqds.h | 6 +++--- include/configs/ls1012ardb.h | 6 +++--- include/net/pfe_eth/pfe/pfe_hw.h | 6 ++++++ 11 files changed, 48 insertions(+), 18 deletions(-) diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c index 2cd651b943f..6473ee05728 100644 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c @@ -23,6 +23,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -185,6 +186,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_FSL_PFE +void board_quiesce_devices(void) +{ + pfe_command_stop(0, NULL); +} +#endif + int ft_board_setup(void *blob, struct bd_info *bd) { arch_fixup_fdt(blob); diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c index cfe3f3360cd..33a0910a198 100644 --- a/board/freescale/ls1012aqds/ls1012aqds.c +++ b/board/freescale/ls1012aqds/ls1012aqds.c @@ -32,6 +32,7 @@ #include "../common/qixis.h" #include "ls1012aqds_qixis.h" #include "ls1012aqds_pfe.h" +#include DECLARE_GLOBAL_DATA_PTR; @@ -163,6 +164,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_FSL_PFE +void board_quiesce_devices(void) +{ + pfe_command_stop(0, NULL); +} +#endif + int esdhc_status_fixup(void *blob, const char *compat) { char esdhc0_path[] = "/soc/esdhc@1560000"; diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index 41bcf6f935e..62e8af48cf1 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -28,6 +28,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -186,6 +187,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_FSL_PFE +void board_quiesce_devices(void) +{ + pfe_command_stop(0, NULL); +} +#endif + #ifdef CONFIG_TARGET_LS1012ARDB int esdhc_status_fixup(void *blob, const char *compat) { diff --git a/drivers/net/pfe_eth/pfe_cmd.c b/drivers/net/pfe_eth/pfe_cmd.c index 1e69525cb71..364750f65c7 100644 --- a/drivers/net/pfe_eth/pfe_cmd.c +++ b/drivers/net/pfe_eth/pfe_cmd.c @@ -418,7 +418,7 @@ static void send_dummy_pkt_to_hif(void) writel(buf, TMU_PHY_INQ_PKTINFO); } -static void pfe_command_stop(int argc, char *const argv[]) +void pfe_command_stop(int argc, char *const argv[]) { int pfe_pe_id, hif_stop_loop = 10; u32 rx_status; diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 9962b9872af..9fbeecf1e73 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -72,7 +72,7 @@ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "bootm $load_addr#$board\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ @@ -82,11 +82,11 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " \ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;" #else #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " \ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;" #endif #endif diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index a908b0acb09..6f55acc7db1 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -102,11 +102,11 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT -#define QSPI_NOR_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ +#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ "$kernel_start $kernel_size && "\ "bootm $kernel_load" #else -#define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ +#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ "$kernel_start $kernel_size && "\ "bootm $kernel_load" #endif diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 02dd59892bc..2711f651d71 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -50,16 +50,16 @@ "installer=load usb 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "bootm $load_addr#$board\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size && bootm $load_addr#$board\0" #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd" +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" #else -#define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd" +#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" #endif #endif /* __LS1012ARDB_H__ */ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index ba152834d5a..beb7440c271 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -89,7 +89,7 @@ "env exists secureboot " \ "&& esbc_validate ${scripthdraddr};" \ "source ${scriptaddr}\0" \ - "sd_bootcmd=pfe stop; echo Trying load from sd card..;" \ + "sd_bootcmd=echo Trying load from sd card..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ "env exists secureboot && mmc read $kernelheader_addr_r "\ @@ -100,10 +100,10 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\ "env exists secureboot && esbc_halt;" #else -#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\ "env exists secureboot && esbc_halt;" #endif diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 36be8f42c97..bdcb8d6af6b 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -140,7 +140,7 @@ "env exists secureboot " \ "&& esbc_validate ${scripthdraddr};" \ "source ${scriptaddr}\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe 0:0 && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ @@ -150,10 +150,10 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #else -#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #endif diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 582945b2ab1..efa0284a50a 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -91,7 +91,7 @@ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "bootm $load_addr#$board\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ @@ -101,10 +101,10 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #else -#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #endif diff --git a/include/net/pfe_eth/pfe/pfe_hw.h b/include/net/pfe_eth/pfe/pfe_hw.h index c69fc69130c..71e4115afa0 100644 --- a/include/net/pfe_eth/pfe/pfe_hw.h +++ b/include/net/pfe_eth/pfe/pfe_hw.h @@ -160,4 +160,10 @@ void hif_rx_enable(void); void hif_rx_disable(void); void hif_rx_desc_disable(void); +#ifdef PFE_RESET_WA +void pfe_command_stop(int argc, char *const argv[]); +#else +static void pfe_command_stop(int argc, char *const argv[]) {} +#endif + #endif /* _PFE_H_ */ From 2ff6b799a804add940b30e70a19f751a4aeff36b Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 4 Jun 2021 13:51:09 +0800 Subject: [PATCH 068/156] riscv: ae350: dts: Add SPDX license header The SPDX license header is currently missing. Add one. Signed-off-by: Bin Meng Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- arch/riscv/dts/ae350_32.dts | 2 ++ arch/riscv/dts/ae350_64.dts | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index a0ab5e9be22..ef110c54aec 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + /dts-v1/; #include "binman.dtsi" diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts index f654f4809a2..6abf42e904d 100644 --- a/arch/riscv/dts/ae350_64.dts +++ b/arch/riscv/dts/ae350_64.dts @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + /dts-v1/; #include "binman.dtsi" From 5c267e00332473aeffd34d92d2f75558890de5d3 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 4 Jun 2021 13:51:10 +0800 Subject: [PATCH 069/156] riscv: ae350: dts: Remove the unnecessary space in bootargs There are two spaces before "debug' in bootargs. Drop one. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/dts/ae350_32.dts | 2 +- arch/riscv/dts/ae350_64.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index ef110c54aec..b90351e87bc 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -16,7 +16,7 @@ }; chosen { - bootargs = "console=ttyS0,38400n8 debug loglevel=7"; + bootargs = "console=ttyS0,38400n8 debug loglevel=7"; stdout-path = "uart0:38400n8"; }; diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts index 6abf42e904d..27ac21c716f 100644 --- a/arch/riscv/dts/ae350_64.dts +++ b/arch/riscv/dts/ae350_64.dts @@ -16,7 +16,7 @@ }; chosen { - bootargs = "console=ttyS0,38400n8 debug loglevel=7"; + bootargs = "console=ttyS0,38400n8 debug loglevel=7"; stdout-path = "uart0:38400n8"; }; From f050dd2b26abb4b107c3cdf7a5f5c420a9e1d4b6 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 4 Jun 2021 13:51:11 +0800 Subject: [PATCH 070/156] riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes PLIC nodes don't have child nodes, so #address-cells is not needed. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/dts/ae350_32.dts | 2 -- arch/riscv/dts/ae350_64.dts | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index b90351e87bc..0917b831083 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -135,7 +135,6 @@ plic0: interrupt-controller@e4000000 { compatible = "riscv,plic0"; - #address-cells = <1>; #interrupt-cells = <1>; interrupt-controller; reg = <0xe4000000 0x2000000>; @@ -148,7 +147,6 @@ plic1: interrupt-controller@e6400000 { compatible = "riscv,plic1"; - #address-cells = <1>; #interrupt-cells = <1>; interrupt-controller; reg = <0xe6400000 0x400000>; diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts index 27ac21c716f..564e94a1db8 100644 --- a/arch/riscv/dts/ae350_64.dts +++ b/arch/riscv/dts/ae350_64.dts @@ -135,7 +135,6 @@ plic0: interrupt-controller@e4000000 { compatible = "riscv,plic0"; - #address-cells = <2>; #interrupt-cells = <2>; interrupt-controller; reg = <0x0 0xe4000000 0x0 0x2000000>; @@ -148,7 +147,6 @@ plic1: interrupt-controller@e6400000 { compatible = "riscv,plic1"; - #address-cells = <2>; #interrupt-cells = <2>; interrupt-controller; reg = <0x0 0xe6400000 0x0 0x400000>; From 048aff6d2621df2654dce6f833a2cf843358486a Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 4 Jun 2021 13:51:12 +0800 Subject: [PATCH 071/156] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit All the device nodes that refer to plic0 as their interrupt parent have 2 cells encoded in their interrupts property, but plic0 only provides 1 cell in #interrupt-cells which is incorrect. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/dts/ae350_32.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index 0917b831083..70576846f24 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -135,7 +135,7 @@ plic0: interrupt-controller@e4000000 { compatible = "riscv,plic0"; - #interrupt-cells = <1>; + #interrupt-cells = <2>; interrupt-controller; reg = <0xe4000000 0x2000000>; riscv,ndev=<71>; From 77eae0ebe6858805416cdc091975156a19185427 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 4 Jun 2021 13:51:13 +0800 Subject: [PATCH 072/156] riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config At present the AE350 SPL defconfig is using OF_PRIOR_STAGE. The intention was to use gdb to load device tree before running U-Boot SPL/proper from RAM. When we switch to OF_SEPARATE we will have to use our own DT but without "u-boot,dm-spl" in several essential nodes, SPL does not boot. Let's add all the required "u-boot,dm-spl" for SPL config. Signed-off-by: Bin Meng Reviewed-by: Rick Chen --- arch/riscv/dts/ae350-u-boot.dtsi | 52 ++++++++++++++++++++++++++++++++ arch/riscv/dts/ae350_32.dts | 1 + arch/riscv/dts/ae350_64.dts | 1 + 3 files changed, 54 insertions(+) create mode 100644 arch/riscv/dts/ae350-u-boot.dtsi diff --git a/arch/riscv/dts/ae350-u-boot.dtsi b/arch/riscv/dts/ae350-u-boot.dtsi new file mode 100644 index 00000000000..0d4201cfae9 --- /dev/null +++ b/arch/riscv/dts/ae350-u-boot.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/ { + cpus { + u-boot,dm-spl; + CPU0: cpu@0 { + u-boot,dm-spl; + CPU0_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU1: cpu@1 { + u-boot,dm-spl; + CPU1_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU2: cpu@2 { + u-boot,dm-spl; + CPU2_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU3: cpu@3 { + u-boot,dm-spl; + CPU3_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + }; + + memory@0 { + u-boot,dm-spl; + }; + + soc { + u-boot,dm-spl; + + plic1: interrupt-controller@e6400000 { + u-boot,dm-spl; + }; + + plmt0@e6000000 { + u-boot,dm-spl; + }; + }; + + serial0: serial@f0300000 { + u-boot,dm-spl; + }; + +}; diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index 70576846f24..083f676333d 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -3,6 +3,7 @@ /dts-v1/; #include "binman.dtsi" +#include "ae350-u-boot.dtsi" / { #address-cells = <1>; diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts index 564e94a1db8..74cff9122d4 100644 --- a/arch/riscv/dts/ae350_64.dts +++ b/arch/riscv/dts/ae350_64.dts @@ -3,6 +3,7 @@ /dts-v1/; #include "binman.dtsi" +#include "ae350-u-boot.dtsi" / { #address-cells = <2>; From 279de759bd2ceb1dad6ff30c7d27c8ff9c5706a3 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sat, 5 Jun 2021 07:00:30 +0800 Subject: [PATCH 073/156] riscv: ae350: doc: Remove CONFIG_SKIP_LOWLEVEL_INIT The doc says CONFIG_SKIP_LOWLEVEL_INIT is in ax25-ae350.h, while actually it is not. Remove it. Signed-off-by: Bin Meng Reviewed-by: Rick Chen --- doc/board/AndesTech/ax25-ae350.rst | 19 ++++--------------- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ax25-ae350.rst index 923649240ec..b46f427f4b7 100644 --- a/doc/board/AndesTech/ax25-ae350.rst +++ b/doc/board/AndesTech/ax25-ae350.rst @@ -58,15 +58,6 @@ Platform Level Interrupt Controller (PLIC) - Configurable number of targets: 1-16 - Preempted interrupt priority stack -Configurations --------------- - -CONFIG_SKIP_LOWLEVEL_INIT: - -If you want to boot this system from SPI ROM and bypass e-bios (the -other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT -in "include/configs/ax25-ae350.h". - Build and boot steps -------------------- @@ -89,12 +80,10 @@ Verification: Steps ----- -1. Define CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is loaded via gdb from ram. -2. Undefine CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is booted from spi rom. -3. Ping a server by mac driver -4. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver. -5. Burn this u-boot image to spi rom by spi driver -6. Re-boot u-boot from spi flash with power off and power on. +1. Ping a server by mac driver +2. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver +3. Burn this u-boot image to spi rom by spi driver +4. Re-boot u-boot from spi flash with power off and power on Messages of U-Boot boot on AE350 board -------------------------------------- From 62ce0a02f9e5bda51a05c5f735e5a75f6c4bbb54 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 15 Jun 2021 13:45:57 +0800 Subject: [PATCH 074/156] riscv: andes_plic: Fix riscv_get_ipi() mask Current logic in riscv_get_ipi() for Andes PLICSW does not look correct. The mask to test IPI pending bits for a hart should be left shifted by (8 * gd->arch.boot_hart), just the same as what is done in riscv_send_ipi(). Fixes: 8b3e97badf97 ("riscv: add functions for reading the IPI status") Signed-off-by: Bin Meng Reviewed-by: Rick Chen Tested-by: Rick Chen --- arch/riscv/lib/andes_plic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c index 221a5fe324e..5e113ee8c94 100644 --- a/arch/riscv/lib/andes_plic.c +++ b/arch/riscv/lib/andes_plic.c @@ -105,9 +105,11 @@ int riscv_clear_ipi(int hart) int riscv_get_ipi(int hart, int *pending) { + unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart)); + *pending = readl((void __iomem *)PENDING_REG(gd->arch.plic, gd->arch.boot_hart)); - *pending = !!(*pending & SEND_IPI_TO_HART(hart)); + *pending = !!(*pending & ipi); return 0; } From c0eeb730f8038565a168a73f74b3ed56d8eac16c Mon Sep 17 00:00:00 2001 From: Priyanka Singh Date: Mon, 19 Apr 2021 11:15:04 +0530 Subject: [PATCH 075/156] board: freescale: vid.c: Add check for return value of adjust_vdd() Add check for return value of adjust_vdd() Signed-off-by: Biwen Li Signed-off-by: Priyanka Singh Reviewed-by: Priyanka Jain --- board/freescale/common/vid.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index 6e8296293b8..13ef101e7fb 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-21 NXP * Copyright 2020 Stephen Carlson */ @@ -793,13 +793,16 @@ static int do_vdd_override(struct cmd_tbl *cmdtp, char *const argv[]) { ulong override; + int ret = 0; if (argc < 2) return CMD_RET_USAGE; - if (!strict_strtoul(argv[1], 10, &override)) - adjust_vdd(override); /* the value is checked by callee */ - else + if (!strict_strtoul(argv[1], 10, &override)) { + ret = adjust_vdd(override); + if (ret < 0) + return CMD_RET_FAILURE; + } else return CMD_RET_USAGE; return 0; } From 84c2e044a9372945c5ef6b83ab49f9cb2ba74c0d Mon Sep 17 00:00:00 2001 From: Jiafei Pan Date: Wed, 21 Apr 2021 12:12:49 +0800 Subject: [PATCH 076/156] armv8: layerscape: add PSCI support for cpu release For cpu release command, check whether PSCI is supported firstly, if supported, use PSCI to kick off secondary cores, otherwise still use spin table. Signed-off-by: Jiafei Pan [Fixed checkpatch alignment CHECKs] Signed-off-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/cpu.h | 1 + arch/arm/cpu/armv8/fsl-layerscape/mp.c | 51 +++++++++++++++++-------- 3 files changed, 37 insertions(+), 17 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 270a72e550c..d0103fc8811 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1063,7 +1063,7 @@ int cpu_eth_init(struct bd_info *bis) return error; } -static inline int check_psci(void) +int check_psci(void) { unsigned int psci_ver; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.h b/arch/arm/cpu/armv8/fsl-layerscape/cpu.h index dca5fd0f7dc..45da95831e6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.h +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.h @@ -6,3 +6,4 @@ int fsl_qoriq_core_to_cluster(unsigned int core); u32 initiator_type(u32 cluster, int init_id); u32 cpu_mask(void); +int check_psci(void); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c index 5ac545f9df8..730d7663d0f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c @@ -10,10 +10,12 @@ #include #include #include +#include #include #include #include #include +#include #include "cpu.h" #include #include @@ -301,24 +303,41 @@ int cpu_release(u32 nr, int argc, char *const argv[]) u64 *table = get_spin_tbl_addr(); int pos; - pos = core_to_pos(nr); - if (pos <= 0) - return -1; - - table += pos * WORDS_PER_SPIN_TABLE_ENTRY; boot_addr = simple_strtoull(argv[0], NULL, 16); - table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX] = boot_addr; - flush_dcache_range((unsigned long)table, - (unsigned long)table + SPIN_TABLE_ELEM_SIZE); - asm volatile("dsb st"); - /* - * The secondary CPUs polling the spin-table above for a non-zero - * value. To save power "wfe" is called. Thus call "sev" here to - * wake the CPUs and let them check the spin-table again (see - * slave_cpu loop in lowlevel.S) - */ - asm volatile("sev"); + if (check_psci()) { + /* SPIN Table is used */ + pos = core_to_pos(nr); + if (pos <= 0) + return -1; + + table += pos * WORDS_PER_SPIN_TABLE_ENTRY; + table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX] = boot_addr; + flush_dcache_range((unsigned long)table, + (unsigned long)table + SPIN_TABLE_ELEM_SIZE); + asm volatile("dsb st"); + + /* + * The secondary CPUs polling the spin-table above for a non-zero + * value. To save power "wfe" is called. Thus call "sev" here to + * wake the CPUs and let them check the spin-table again (see + * slave_cpu loop in lowlevel.S) + */ + asm volatile("sev"); + } else { + /* Use PSCI to kick the core */ + struct pt_regs regs; + + printf("begin to kick cpu core #%d to address %llx\n", + nr, boot_addr); + regs.regs[0] = PSCI_0_2_FN64_CPU_ON; + regs.regs[1] = nr; + regs.regs[2] = boot_addr; + regs.regs[3] = 0; + smc_call(®s); + if (regs.regs[0]) + return -1; + } return 0; } From addec3511f7c389353884026435488d3d552e6a9 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Tue, 27 Apr 2021 16:42:11 +0800 Subject: [PATCH 077/156] armv8: layerscape: enable eMMC HS400 workarounds for LX2160A/LX2162A Enable eMMC HS400 workarounds for LX2160A/LX2162A. Signed-off-by: Yangbo Lu Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9d1ba4c771a..395e5ccaadd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -224,6 +224,8 @@ config ARCH_LX2162A select SYS_FSL_EC1 select SYS_FSL_EC2 select SYS_FSL_ERRATUM_A050106 + select SYS_FSL_ERRATUM_A011334 + select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND select SYS_FSL_HAS_RGMII select SYS_FSL_HAS_SEC select SYS_FSL_HAS_CCN508 @@ -254,6 +256,8 @@ config ARCH_LX2160A select SYS_FSL_EC1 select SYS_FSL_EC2 select SYS_FSL_ERRATUM_A050106 + select SYS_FSL_ERRATUM_A011334 + select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND select SYS_FSL_HAS_RGMII select SYS_FSL_HAS_SEC select SYS_FSL_HAS_CCN508 From ff64e9a9f0f48107a46536c251951885df63d63f Mon Sep 17 00:00:00 2001 From: Chaitanya Sakinam Date: Fri, 7 May 2021 12:22:05 +0800 Subject: [PATCH 078/156] armv8: ls1012a: Pass PPFE firmware to Linux through FDT Read Linux PPFE firmware from flash partition and pass it to Linux through FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs. (FDT may increase at max by 64KB) Signed-off-by: Chaitanya Sakinam Signed-off-by: Anji J Signed-off-by: Biwen Li Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 150 +++++++++++++++++++++++- drivers/net/pfe_eth/pfe_firmware.c | 60 +++++++++- 2 files changed, 207 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 7f29aa4725a..f1624ff30ae 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ #include @@ -478,6 +478,151 @@ static bool crypto_is_disabled(unsigned int svr) return false; } +#ifdef CONFIG_FSL_PFE +void pfe_set_firmware_in_fdt(void *blob, int pfenode, void *pfw, char *pename, + unsigned int len) +{ + int rc, fwnode; + unsigned int phandle; + char subnode_str[32], prop_str[32], phandle_str[32], s[64]; + + sprintf(subnode_str, "pfe-%s-firmware", pename); + sprintf(prop_str, "fsl,pfe-%s-firmware", pename); + sprintf(phandle_str, "fsl,%s-firmware", pename); + + /*Add PE FW to fdt.*/ + /* Increase the size of the fdt to make room for the node. */ + rc = fdt_increase_size(blob, len); + if (rc < 0) { + printf("Unable to make room for %s firmware: %s\n", pename, + fdt_strerror(rc)); + return; + } + + /* Create the firmware node. */ + fwnode = fdt_add_subnode(blob, pfenode, subnode_str); + if (fwnode < 0) { + fdt_get_path(blob, pfenode, s, sizeof(s)); + printf("Could not add firmware node to %s: %s\n", s, + fdt_strerror(fwnode)); + return; + } + + rc = fdt_setprop_string(blob, fwnode, "compatible", prop_str); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add compatible property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + rc = fdt_setprop_u32(blob, fwnode, "length", len); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add compatible property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + /*create phandle and set the property*/ + phandle = fdt_create_phandle(blob, fwnode); + if (!phandle) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add phandle property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + rc = fdt_setprop(blob, fwnode, phandle_str, pfw, len); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add firmware property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } +} + +void fdt_fixup_pfe_firmware(void *blob) +{ + int pfenode; + unsigned int len_class = 0, len_tmu = 0, len_util = 0; + const char *p; + void *pclassfw, *ptmufw, *putilfw; + + /* The first PFE we find, will contain the actual firmware. */ + pfenode = fdt_node_offset_by_compatible(blob, -1, "fsl,pfe"); + if (pfenode < 0) + /* Exit silently if there are no PFE devices */ + return; + + /* If we already have a firmware node, then also exit silently. */ + if (fdt_node_offset_by_compatible(blob, -1, + "fsl,pfe-class-firmware") > 0) + return; + + /* If the environment variable is not set, then exit silently */ + p = env_get("class_elf_firmware"); + if (!p) + return; + + pclassfw = (void *)simple_strtoul(p, NULL, 16); + if (!pclassfw) + return; + + p = env_get("class_elf_size"); + if (!p) + return; + len_class = simple_strtoul(p, NULL, 16); + + /* If the environment variable is not set, then exit silently */ + p = env_get("tmu_elf_firmware"); + if (!p) + return; + + ptmufw = (void *)simple_strtoul(p, NULL, 16); + if (!ptmufw) + return; + + p = env_get("tmu_elf_size"); + if (!p) + return; + len_tmu = simple_strtoul(p, NULL, 16); + + if (len_class == 0 || len_tmu == 0) { + printf("PFE FW corrupted. CLASS FW size %d, TMU FW size %d\n", + len_class, len_tmu); + return; + } + + /*Add CLASS FW to fdt.*/ + pfe_set_firmware_in_fdt(blob, pfenode, pclassfw, "class", len_class); + + /*Add TMU FW to fdt.*/ + pfe_set_firmware_in_fdt(blob, pfenode, ptmufw, "tmu", len_tmu); + + /* Util PE firmware is handled separately as it is not a usual case*/ + p = env_get("util_elf_firmware"); + if (!p) + return; + + putilfw = (void *)simple_strtoul(p, NULL, 16); + if (!putilfw) + return; + + p = env_get("util_elf_size"); + if (!p) + return; + len_util = simple_strtoul(p, NULL, 16); + + if (len_util) { + printf("PFE Util PE firmware is not added to FDT.\n"); + return; + } + + pfe_set_firmware_in_fdt(blob, pfenode, putilfw, "util", len_util); +} +#endif + void ft_cpu_setup(void *blob, struct bd_info *bd) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); @@ -534,6 +679,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_firmware(blob); #endif +#ifdef CONFIG_FSL_PFE + fdt_fixup_pfe_firmware(blob); +#endif #ifndef CONFIG_ARCH_LS1012A fsl_fdt_disable_usb(blob); #endif diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index eee70a2e73a..ac86e33c550 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015-2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP + * Copyright 2017,2021 NXP */ /* @@ -262,7 +262,8 @@ int pfe_firmware_init(void) uintptr_t pfe_img_addr = 0; #endif int ret = 0; - int fw_count; + int fw_count, max_fw_count; + const char *p; ret = pfe_spi_flash_init(); if (ret) @@ -293,6 +294,61 @@ int pfe_firmware_init(void) } #endif + p = env_get("load_util"); + if (!p) { + max_fw_count = 2; + } else { + max_fw_count = simple_strtoul(p, NULL, 10); + if (max_fw_count) + max_fw_count = 3; + else + max_fw_count = 2; + } + + for (fw_count = 0; fw_count < max_fw_count; fw_count++) { + switch (fw_count) { + case 0: + pfe_firmware_name = "class_slowpath"; + break; + case 1: + pfe_firmware_name = "tmu_slowpath"; + break; + case 2: + pfe_firmware_name = "util_slowpath"; + break; + } + + if (pfe_get_fw(&raw_image_addr, &raw_image_size, + pfe_firmware_name)) { + printf("%s firmware couldn't be found in FIT image\n", + pfe_firmware_name); + break; + } + pfe_firmware = malloc(raw_image_size); + if (!pfe_firmware) + return -ENOMEM; + memcpy((void *)pfe_firmware, (void *)raw_image_addr, + raw_image_size); + + switch (fw_count) { + case 0: + env_set_addr("class_elf_firmware", pfe_firmware); + env_set_addr("class_elf_size", (void *)raw_image_size); + break; + case 1: + env_set_addr("tmu_elf_firmware", pfe_firmware); + env_set_addr("tmu_elf_size", (void *)raw_image_size); + break; + case 2: + env_set_addr("util_elf_firmware", pfe_firmware); + env_set_addr("util_elf_size", (void *)raw_image_size); + break; + } + } + + raw_image_addr = NULL; + pfe_firmware = NULL; + raw_image_size = 0; for (fw_count = 0; fw_count < 2; fw_count++) { if (fw_count == 0) pfe_firmware_name = "class"; From 8e221b4a1c3144bbc0fcbb5a6c40ba63d618f02f Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Thu, 13 May 2021 14:54:32 +0800 Subject: [PATCH 079/156] pci: layerscape-ep: Add check of the PCIe controller enablement Stop to initialize the PCIe controller if it's disabled by RCW. Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver") Signed-off-by: Hou Zhiqiang Reviewed-by: Priyanka Jain --- drivers/pci/pcie_layerscape_ep.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c index c7231635e41..f2813aeef67 100644 --- a/drivers/pci/pcie_layerscape_ep.c +++ b/drivers/pci/pcie_layerscape_ep.c @@ -269,6 +269,10 @@ static int ls_pcie_ep_probe(struct udevice *dev) pcie->idx = ((unsigned long)pcie->dbi - PCIE_SYS_BASE_ADDR) / PCIE_CCSR_SIZE; + /* This controller is disabled by RCW */ + if (!is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx))) + return 0; + pcie->big_endian = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "big-endian"); From 38d1a187501e245e9b8479c1999015dbd352f2de Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Fri, 14 May 2021 10:33:57 +0800 Subject: [PATCH 080/156] arm: dts: lx2162aqds: support eMMC HS400 mode on esdhc1 Add properties related to eMMC HS400 mode for esdhc1. Signed-off-by: Yangbo Lu Reviewed-by: Priyanka Jain --- arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi | 8 +++++++- arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi | 8 +++++++- arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi | 8 +++++++- arch/arm/dts/fsl-lx2162a-qds.dts | 8 +++++++- 4 files changed, 28 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi b/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi index 60f5a4ee435..d1e4a8567fc 100644 --- a/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi +++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi @@ -5,7 +5,7 @@ * Some assumptions are made: * * mezzanine card M8 is connected to IO SLOT1 (25g-aui for DPMAC 3,4,5,6) * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -56,3 +56,9 @@ reg = <0x3>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi b/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi index 8e11b0680a9..e9a743b3a24 100644 --- a/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi +++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi @@ -6,7 +6,7 @@ * * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4) * * mezzanine card M13/M8 is connected to IO SLOT6 (25g-aui for DPMAC 5,6) * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -59,3 +59,9 @@ reg = <0x1>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi index faf4285eaba..d9ad1c6a4b3 100644 --- a/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi +++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi @@ -6,7 +6,7 @@ * * Mezzanine card M8 is connected to IO SLOT1 * (xlaui4 for DPMAC 1) * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -24,3 +24,9 @@ reg = <0x0>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; diff --git a/arch/arm/dts/fsl-lx2162a-qds.dts b/arch/arm/dts/fsl-lx2162a-qds.dts index 341610ccf4a..0ca30df8620 100644 --- a/arch/arm/dts/fsl-lx2162a-qds.dts +++ b/arch/arm/dts/fsl-lx2162a-qds.dts @@ -2,7 +2,7 @@ /* * NXP LX2162AQDS device tree source * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -135,3 +135,9 @@ reg = <2>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; From effcb1ebe44a82df6670b7cdb4d9605e3a2a3207 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Wed, 19 May 2021 16:40:12 +0530 Subject: [PATCH 081/156] configs: ls1088a: Enable CONFIG_SYS_RELOC_ENV_ADDR Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- configs/ls1088aqds_tfa_defconfig | 1 + configs/ls1088ardb_tfa_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 5229a351e1a..ea308cafef2 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -48,6 +48,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 007a80c2c66..e557858b8b3 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -45,6 +45,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y From 8bb20852eb4f503da921b1e1c67f1193c0ad5317 Mon Sep 17 00:00:00 2001 From: Biwen Li Date: Fri, 21 May 2021 15:15:06 +0800 Subject: [PATCH 082/156] configs: ls2088aqds: fix synchronous exception IFC NOR flash base address of ls2088a is 0x580000000, and offset of env crc is 0x500000, so fix the macro CONFIG_ENV_ADDR to fix synchronous exception(access illegal address) Fixes: 59071804c1 ("configs: ls2080a: Correct ENV_ADDR value") Signed-off-by: Biwen Li Reviewed-by: Priyanka Jain --- configs/ls2088aqds_tfa_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 5620e8a786b..5d14b55e6b2 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -42,7 +42,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_ENV_ADDR=0x20500000 +CONFIG_ENV_ADDR=0x580500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y From 6bc2419cc25dd89f889c1ede88c68c046c64d943 Mon Sep 17 00:00:00 2001 From: Matt Merhar Date: Sun, 30 May 2021 00:16:17 +0000 Subject: [PATCH 083/156] board: freescale: p2041rdb: use correct EEPROM address length These boards, according to the schematic and per the board I own, use an M24256-BWDW6TP I2C EEPROM which requires two address bytes. This fixes the 'mac' command which is used to program, among other things, the MAC addresses for the ethernet interfaces on the board. Signed-off-by: Matt Merhar Reviewed-by: Priyanka Jain --- include/configs/P2041RDB.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 3895c2d0c73..715154a0ddf 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -92,7 +92,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* * DDR Setup From ae7020b435883f48f944d6682914a511044703ae Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Thu, 3 Jun 2021 10:51:17 +0800 Subject: [PATCH 084/156] mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT For eSDHC, power supply is through peripheral circuit. Some eSDHC versions have value 0 of the bit but that does not reflect the truth. 3.3V is common for SD/MMC, and is supported for all boards with eSDHC in current u-boot. So, make 3.3V is supported in default in code. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled if future board does not support 3.3V. This is also a fix-up for one previous patch, which converted to use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 that is not a Kconfig option. Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()") Signed-off-by: Yangbo Lu Reviewed-by: Jaehoon Chung Reviewed-by: Priyanka Jain --- drivers/mmc/Kconfig | 7 +++++++ drivers/mmc/fsl_esdhc.c | 17 ++++++++++++++--- 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 89014569670..0909f502a16 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -798,6 +798,13 @@ config FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND This option assumes no hotplug, and u-boot has to make all the way to to linux to use 1.8v UHS-I speed mode if has card. +config FSL_ESDHC_VS33_NOT_SUPPORT + bool "3.3V power supply not supported" + depends on FSL_ESDHC + help + For eSDHC, power supply is through peripheral circuit. 3.3V support is + common. Select this if 3.3V power supply not supported. + config FSL_ESDHC_IMX bool "Freescale/NXP i.MX eSDHC controller support" help diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 7501fdb71e1..1d98fa65c48 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP * Andy Fleming * * Based vaguely on the pxa mmc code: @@ -795,10 +795,21 @@ static void fsl_esdhc_get_cfg_common(struct fsl_esdhc_priv *priv, u32 caps; caps = esdhc_read32(®s->hostcapblt); + + /* + * For eSDHC, power supply is through peripheral circuit. Some eSDHC + * versions have value 0 of the bit but that does not reflect the + * truth. 3.3V is common for SD/MMC, and is supported for all boards + * with eSDHC in current u-boot. So, make 3.3V is supported in + * default in code. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled + * if future board does not support 3.3V. + */ + caps |= HOSTCAPBLT_VS33; + if (IS_ENABLED(CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT)) + caps &= ~HOSTCAPBLT_VS33; + if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_ESDHC135)) caps &= ~(HOSTCAPBLT_SRS | HOSTCAPBLT_VS18 | HOSTCAPBLT_VS30); - if (IS_ENABLED(CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33)) - caps |= HOSTCAPBLT_VS33; if (caps & HOSTCAPBLT_VS18) cfg->voltages |= MMC_VDD_165_195; if (caps & HOSTCAPBLT_VS30) From b1d59867e5c2bc0cf7308348fcf35529833f57cd Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Thu, 3 Jun 2021 10:51:18 +0800 Subject: [PATCH 085/156] mmc: fsl_esdhc_imx: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 There is no i.MX board using such option. Drop it. Signed-off-by: Yangbo Lu Reviewed-by: Priyanka Jain --- drivers/mmc/fsl_esdhc_imx.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index a4675838e58..566ce046ae1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc - * Copyright 2019 NXP Semiconductors + * Copyright 2019, 2021 NXP * Andy Fleming * Yangbo Lu * @@ -1234,11 +1234,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); #endif -/* T4240 host controller capabilities register should have VS33 bit */ -#ifdef CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 - caps = caps | ESDHC_HOSTCAPBLT_VS33; -#endif - if (caps & ESDHC_HOSTCAPBLT_VS18) voltage_caps |= MMC_VDD_165_195; if (caps & ESDHC_HOSTCAPBLT_VS30) From 34f39ce882d2ad214bc16341823ffba4476fde2a Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Thu, 3 Jun 2021 10:51:19 +0800 Subject: [PATCH 086/156] armv8: layerscape: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT is used instead. Signed-off-by: Yangbo Lu Acked-by: Michael Walle [for kontron-sl28] Reviewed-by: Priyanka Jain --- include/configs/T208xQDS.h | 3 +-- include/configs/T208xRDB.h | 3 +-- include/configs/T4240RDB.h | 3 +-- include/configs/kontron_sl28.h | 5 ----- include/configs/ls1012a2g5rdb.h | 7 +------ include/configs/ls1012afrwy.h | 7 +------ include/configs/ls1012aqds.h | 6 +----- include/configs/ls1012ardb.h | 8 +------- include/configs/ls1028a_common.h | 7 +------ include/configs/ls1043a_common.h | 9 +-------- include/configs/ls1046a_common.h | 9 +-------- include/configs/ls1088aqds.h | 3 +-- include/configs/ls1088ardb.h | 7 +------ include/configs/ls2080aqds.h | 7 +------ include/configs/ls2080ardb.h | 7 +------ include/configs/lx2160a_common.h | 7 +------ scripts/config_whitelist.txt | 1 - 17 files changed, 15 insertions(+), 84 deletions(-) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index b1acb564c32..7bc792b8d19 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2011-2013 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ /* @@ -618,7 +618,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index e467ef453d2..b5197b3ed95 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ /* @@ -574,7 +574,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index a04d9137b32..139beae08db 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ /* @@ -585,7 +585,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 5f11205802e..bfb4e67c8f4 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -56,11 +56,6 @@ #define CONFIG_DDR_CLK_FREQ 100000000 #define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* ethernet */ #define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 9fbeecf1e73..44f9da73063 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017 NXP + * Copyright 2017, 2021 NXP */ #ifndef __LS1012A2G5RDB_H__ @@ -13,11 +13,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index beb7440c271..f8b386125cc 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018 NXP + * Copyright 2018, 2021 NXP */ #ifndef __LS1012AFRWY_H__ @@ -33,11 +33,6 @@ func(DHCP, dhcp, na) #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index bdcb8d6af6b..3e5fdadc40d 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2021 NXP */ #ifndef __LS1012AQDS_H__ @@ -93,11 +94,6 @@ DSPI_CTAR_DT(0)) #define CONFIG_SPI_FLASH_EON /* cs3 */ -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index efa0284a50a..c8a2f120dca 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * Copyright 2016 Freescale Semiconductor, Inc. */ @@ -38,12 +38,6 @@ #define __PHY_ETH2_MASK 0xFB #define __PHY_ETH1_MASK 0xFD -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - - #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 31fcdae986b..5900b8f0e30 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #ifndef __L1028A_COMMON_H @@ -93,11 +93,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define OCRAM_NONSECURE_SIZE 0x00010000 #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 29a3790c457..65d63e2fc99 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2015 Freescale Semiconductor - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #ifndef __LS1043A_COMMON_H @@ -171,13 +171,6 @@ #endif #endif -/* MMC */ -#ifndef SPL_NO_MMC -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif -#endif - /* DSPI */ #ifndef SPL_NO_DSPI #ifdef CONFIG_FSL_DSPI diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 0c3978a922c..11e1a184c5e 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #ifndef __LS1046A_COMMON_H @@ -165,13 +165,6 @@ CONFIG_SYS_SCSI_MAX_LUN) #endif -/* MMC */ -#ifndef SPL_NO_MMC -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif -#endif - /* FMan ucode */ #ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 4d04833c50a..d032a3d1116 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2020 NXP + * Copyright 2017, 2020-2021 NXP */ #ifndef __LS1088A_QDS_H @@ -361,7 +361,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_MEMAC /* MMC */ -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \ QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER) diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 6f36dd417a9..5ade0eb439c 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2020 NXP + * Copyright 2017, 2020-2021 NXP */ #ifndef __LS1088A_RDB_H @@ -507,11 +507,6 @@ #endif #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #ifndef SPL_NO_ENV #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index b3fce1b7f79..41c1a86743a 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2019-2020 NXP + * Copyright 2017, 2019-2021 NXP * Copyright 2015 Freescale Semiconductor */ @@ -318,11 +318,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCI_SCAN_SHOW #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #ifdef CONFIG_NXP_ESBC diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 8626a1d5e6f..f2dc495fbb9 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2019-2020 NXP + * Copyright 2017, 2019-2021 NXP * Copyright 2015 Freescale Semiconductor */ @@ -300,11 +300,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCI_SCAN_SHOW #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 9f2b8999cdb..15ea0e4ce1f 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018-2020 NXP + * Copyright 2018-2021 NXP */ #ifndef __LX2_COMMON_H @@ -129,11 +129,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* SATA */ #ifdef CONFIG_SCSI diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 8f92b82719a..3dbcc042a8a 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2307,7 +2307,6 @@ CONFIG_SYS_FSL_MAX_NUM_OF_SEC CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR CONFIG_SYS_FSL_MC_BASE CONFIG_SYS_FSL_MC_SIZE -CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 CONFIG_SYS_FSL_NI_BASE CONFIG_SYS_FSL_NI_SIZE CONFIG_SYS_FSL_NO_SERDES From 058c08dc606435c5df129be7443dba348bcbf6a3 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Fri, 4 Jun 2021 09:17:56 +0000 Subject: [PATCH 087/156] configs: seli8: set envsize to 0x4000 During the mainlining of the board this was by mistake set to sector size. Our user space env scripts are expecting envsize of 0x4000, and setting this differently will break our cross-platform compatibility. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- configs/pg_wcom_seli8_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index a61b82685c0..a00334bf49d 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -7,7 +7,7 @@ CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff -CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y From 0753603e25dff5189ff4ba397b0625cc2d9a16c3 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Fri, 4 Jun 2021 09:25:00 +0000 Subject: [PATCH 088/156] keymile: common: fix hexadecimal env variable format MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit df86d32 breaks linux kernel and product application boot. Linux kernel and our product application scripts are expecting 0x prefix for hexadecimal values, while env_set_hex writes them without a prefix. This patch partially revert env_set_hex usage for affected env variables. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- board/keymile/common/common.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 2ce7462c56f..016806a2a6c 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -46,12 +46,14 @@ int set_km_env(void) unsigned int pram; unsigned int varaddr; unsigned int kernelmem; - char *p; unsigned long rootfssize = 0; + char envval[16]; + char *p; pnvramaddr = CONFIG_SYS_SDRAM_BASE + gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM - CONFIG_KM_PNVRAM; - env_set_hex("pnvramaddr", pnvramaddr); + sprintf(envval, "0x%x", pnvramaddr); + env_set("pnvramaddr", envval); /* try to read rootfssize (ram image) from environment */ p = env_get("rootfssize"); @@ -64,9 +66,12 @@ int set_km_env(void) varaddr = CONFIG_SYS_SDRAM_BASE + gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM; env_set_hex("varaddr", varaddr); + sprintf(envval, "0x%x", varaddr); + env_set("varaddr", envval); kernelmem = gd->ram_size - 0x400 * pram; - env_set_hex("kernelmem", kernelmem); + sprintf(envval, "0x%x", kernelmem); + env_set("kernelmem", envval); return 0; } From 50dae8eb3a442cf9f98e78e24e52aa2f0acc3f56 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Fri, 4 Jun 2021 13:40:58 +0000 Subject: [PATCH 089/156] net: tsec: add option to set device max-speed via dts Current tsec adapter sets adapter gigabit capabilities by default, and in reality this must not always be the case. It is possible that tsec adapter is used for 100Mbps connection, and in this case setting 1000Mbps capabilities can lead to some side effects such longer autoneg process. In our ls102x designs this problem leads to long autoneg times (> 4 sec) in case board rgmii link is 100Mbps capable only. Limiting the rgmii link capabilities provides faster and smoother link establishment. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Vladimir Oltean Reviewed-by: Bin Meng Reviewed-by: Priyanka Jain --- drivers/net/tsec.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index c68e4b7fb5e..ee820aae15e 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -828,6 +828,7 @@ int tsec_probe(struct udevice *dev) const char *phy_mode; ofnode parent, child; fdt_addr_t reg; + u32 max_speed; int ret; data = (struct tsec_data *)dev_get_driver_data(dev); @@ -893,8 +894,12 @@ int tsec_probe(struct udevice *dev) } priv->interface = pdata->phy_interface; + /* Check for speed limit, default is 1000Mbps */ + max_speed = dev_read_u32_default(dev, "max-speed", 1000); + /* Initialize flags */ - priv->flags = TSEC_GIGABIT; + if (max_speed == 1000) + priv->flags = TSEC_GIGABIT; if (priv->interface == PHY_INTERFACE_MODE_SGMII) priv->flags |= TSEC_SGMII; From fb6c96f14ea711a8d3c013142def8bc52f562576 Mon Sep 17 00:00:00 2001 From: Lasse Klok Mikkelsen Date: Tue, 8 Jun 2021 08:39:12 +0200 Subject: [PATCH 090/156] arm: dts: ls1021a.dtsi: Fix invalid reg on gpio nodes Address and size cells on SOC are set to 1. But gpio nodes are specified with 2 cells. This fixes the gpio nodes to correct cells. Signed-off-by: Lasse Klok Mikkelsen Reviewed-by: Rasmus Villemoes Reviewed-by: Priyanka Jain --- arch/arm/dts/ls1021a.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index 7b99ce02b35..7ba2dd22693 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -100,7 +100,7 @@ gpio0: gpio@2300000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2300000 0x0 0x10000>; + reg = <0x2300000 0x10000>; interrupts = ; gpio-controller; #gpio-cells = <2>; @@ -110,7 +110,7 @@ gpio1: gpio@2310000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2310000 0x0 0x10000>; + reg = <0x2310000 0x10000>; interrupts = ; gpio-controller; #gpio-cells = <2>; @@ -120,7 +120,7 @@ gpio2: gpio@2320000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2320000 0x0 0x10000>; + reg = <0x2320000 0x10000>; interrupts = ; gpio-controller; #gpio-cells = <2>; @@ -130,7 +130,7 @@ gpio3: gpio@2330000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2330000 0x0 0x10000>; + reg = <0x2330000 0x10000>; interrupts = ; gpio-controller; #gpio-cells = <2>; From 0eb946ec28251272f297fcec566b9392bdad2ec6 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Tue, 8 Jun 2021 13:36:58 +0530 Subject: [PATCH 091/156] board: freescale: t4rdb: Add MAINTAINER Add "Priyanka Jain " as MAINTAINER for t4rdb board. Signed-off-by: Priyanka Jain --- board/freescale/t4rdb/MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/t4rdb/MAINTAINERS b/board/freescale/t4rdb/MAINTAINERS index 4ba5c3a546a..7380408aaec 100644 --- a/board/freescale/t4rdb/MAINTAINERS +++ b/board/freescale/t4rdb/MAINTAINERS @@ -1,6 +1,6 @@ T4RDB BOARD -#M: Chunhe Lan -S: Orphan (since 2018-05) +M: Priyanka Jain +S: Maintained F: board/freescale/t4rdb/ F: include/configs/T4240RDB.h F: configs/T4160RDB_defconfig From 6d1657b998f761ecdac50a259f61f554a6337a58 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Tue, 8 Jun 2021 13:36:59 +0530 Subject: [PATCH 092/156] board: freescale: p1_p2_rdb_pc: Add MAINTAINER Add "Priyanka Jain " as MAINTAINER for p1_p2_rdb_pc board. Signed-off-by: Priyanka Jain --- board/freescale/p1_p2_rdb_pc/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/p1_p2_rdb_pc/MAINTAINERS b/board/freescale/p1_p2_rdb_pc/MAINTAINERS index b737b09b093..0004d717d1d 100644 --- a/board/freescale/p1_p2_rdb_pc/MAINTAINERS +++ b/board/freescale/p1_p2_rdb_pc/MAINTAINERS @@ -1,5 +1,5 @@ P1_P2_RDB_PC BOARD -#M: - +M: Priyanka Jain S: Maintained F: board/freescale/p1_p2_rdb_pc/ F: include/configs/p1_p2_rdb_pc.h From eccf98f8d85d4c4928b8e5656124b2527ba259d1 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Tue, 8 Jun 2021 13:37:00 +0530 Subject: [PATCH 093/156] board: freescale: p2041rdb: Add MAINTAINER Add "Priyanka Jain " as MAINTAINER for p2041rdb board. Signed-off-by: Priyanka Jain --- board/freescale/p2041rdb/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/p2041rdb/MAINTAINERS b/board/freescale/p2041rdb/MAINTAINERS index d93cb0bebb6..2121243e148 100644 --- a/board/freescale/p2041rdb/MAINTAINERS +++ b/board/freescale/p2041rdb/MAINTAINERS @@ -1,5 +1,5 @@ P2041RDB BOARD -#M: - +M: Priyanka Jain S: Maintained F: board/freescale/p2041rdb/ F: include/configs/P2041RDB.h From 0b036d4c1b685aa73b58167e942dc6bff43e3a10 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Tue, 8 Jun 2021 13:37:01 +0530 Subject: [PATCH 094/156] board: freescale: t102xrdb: Add MAINTAINER Add "Priyanka Jain " as MAINTAINER for t102xrdb board. Signed-off-by: Priyanka Jain --- board/freescale/t102xrdb/MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/t102xrdb/MAINTAINERS b/board/freescale/t102xrdb/MAINTAINERS index ebb17b81313..471ea07d3ca 100644 --- a/board/freescale/t102xrdb/MAINTAINERS +++ b/board/freescale/t102xrdb/MAINTAINERS @@ -1,6 +1,6 @@ T102XRDB BOARD -#M: Shengzhou Liu -S: Orphan (since 2018-05) +M: Priyanka Jain +S: Maintained F: board/freescale/t102xrdb/ F: include/configs/T102xRDB.h F: configs/T1024RDB_defconfig From a7fd6fa1c277ed667d61de4e366fe034def4800a Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:16:28 +0000 Subject: [PATCH 095/156] board/km: add support for expu1 design based on nxp The EXPU1 design is a new 40G capable ethernet service unit card for Hitachi-Powergrids wired-com product lines. The base SoC is same as for already added SELI8 card, consequently the already added u-boot support for SELI8 is reused. Signed-off-by: Rainer Boschung Signed-off-by: Aleksandar Gerasimovski [Fixed new line error at EOF] Signed-off-by: Priyanka Jain --- arch/arm/Kconfig | 18 +++ arch/arm/dts/Makefile | 1 + arch/arm/dts/ls1021a-pg-wcom-expu1.dts | 130 ++++++++++++++++++ board/keymile/Kconfig | 7 + board/keymile/pg-wcom-ls102xa/Kconfig | 20 +++ board/keymile/pg-wcom-ls102xa/MAINTAINERS | 3 + .../keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 29 ++-- configs/pg_wcom_expu1_defconfig | 70 ++++++++++ include/configs/pg-wcom-expu1.h | 53 +++++++ 9 files changed, 323 insertions(+), 8 deletions(-) create mode 100644 arch/arm/dts/ls1021a-pg-wcom-expu1.dts create mode 100644 configs/pg_wcom_expu1_defconfig create mode 100644 include/configs/pg-wcom-expu1.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 31d687ea011..c3e8bd7f391 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1491,6 +1491,24 @@ config TARGET_PG_WCOM_SELI8 SELI8 is a QorIQ LS1021a based service unit card used in XMC20 and FOX615 product families. +config TARGET_PG_WCOM_EXPU1 + bool "Support Hitachi-Powergrids EXPU1 service unit card" + select ARCH_LS1021A + select ARCH_SUPPORT_PSCI + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + select CPU_V7A + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT + select SYS_FSL_DDR + select FSL_DDR_INTERACTIVE + select VENDOR_KM + imply SCSI + help + Support for Hitachi-Powergrids EXPU1 service unit card. + EXPU1 is a QorIQ LS1021a based service unit card used + in XMC20 and FOX615 product families. + config TARGET_LS1021ATSN bool "Support ls1021atsn" select ARCH_LS1021A diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 096068261da..0d143941669 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -411,6 +411,7 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \ ls1021a-iot-duart.dtb ls1021a-tsn.dtb dtb-$(CONFIG_TARGET_PG_WCOM_SELI8) += ls1021a-pg-wcom-seli8.dtb +dtb-$(CONFIG_TARGET_PG_WCOM_EXPU1) += ls1021a-pg-wcom-expu1.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-qds-42-x.dtb \ diff --git a/arch/arm/dts/ls1021a-pg-wcom-expu1.dts b/arch/arm/dts/ls1021a-pg-wcom-expu1.dts new file mode 100644 index 00000000000..33456b7c380 --- /dev/null +++ b/arch/arm/dts/ls1021a-pg-wcom-expu1.dts @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Hitachi ABB Power Grids EXPU1 board device tree source + * + * Copyright 2020 Hitachi ABB Power Grids + * + * Copyright 2013-2015 Freescale Semiconductor, Inc. + */ + +/dts-v1/; +#include "ls1021a.dtsi" + +/ { + model = "EXPU1 Service Unit for XMC and FOX"; + + aliases { + enet2-rgmii-debug-phy = &debug_phy; + }; + + chosen { + stdout-path = &uart0; + }; +}; + +&enet0 { + status = "okay"; + tbi-handle = <&tbi0>; + phy-connection-type = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&enet1 { + status = "okay"; + tbi-handle = <&tbi1>; + phy-connection-type = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&enet2 { + phy-handle = <&debug_phy>; + phy-connection-type = "rgmii-id"; + max-speed = <100>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&dspi1 { + bus-num = <0>; + status = "okay"; + zl30343@0 { + compatible = "gen,spidev", "zarlink,zl30343"; + reg = <0>; + spi-max-frequency = <8000000>; + }; +}; + +&ifc { + #address-cells = <2>; + #size-cells = <1>; + /* NOR Flash on board */ + ranges = <0x0 0x0 0x60000000 0x04000000>; + status = "okay"; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x4000000>; + bank-width = <2>; + device-width = <1>; + + partition@0 { + label = "rcw"; + reg = <0x0 0x20000>; + read-only; + }; + partition@20000 { + label = "qe"; + reg = <0x20000 0x20000>; + }; + /* ZL30343 init data to be added here */ + partition@40000 { + label = "envred"; + reg = <0x40000 0x20000>; + }; + partition@60000 { + label = "env"; + reg = <0x60000 0x20000>; + }; + partition@100000 { + label = "u-boot"; + reg = <0x100000 0x100000>; + }; + partition@200000 { + label = "ubi0"; + reg = <0x200000 0x3E00000>; + }; + }; +}; + +&mdio0 { + debug_phy: ethernet-phy@11 { + reg = <0x11>; + }; + + tbi0: tbi-phy@0xb { + reg = <0xb>; + device_type = "tbi-phy"; + }; +}; + +&mdio1 { + tbi1: tbi-phy@0xd { + reg = <0xd>; + device_type = "tbi-phy"; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index 86a667067de..3a6c63b774f 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -64,6 +64,13 @@ config SYS_PAX_BASE help IFC Base Address for PAXx FPGA. +config SYS_CLIPS_BASE + hex "CLIPS IFC Base Address" + default 0x78000000 + depends on ARCH_LS1021A + help + IFC Base Address for CLIPS FPGA. + config KM_CONSOLE_TTY string "KM Console" default "ttyS0" diff --git a/board/keymile/pg-wcom-ls102xa/Kconfig b/board/keymile/pg-wcom-ls102xa/Kconfig index 15c009dbe8a..f0b5ceabb69 100644 --- a/board/keymile/pg-wcom-ls102xa/Kconfig +++ b/board/keymile/pg-wcom-ls102xa/Kconfig @@ -17,3 +17,23 @@ config BOARD_SPECIFIC_OPTIONS imply FS_CRAMFS endif + +if TARGET_PG_WCOM_EXPU1 + +config SYS_BOARD + default "pg-wcom-ls102xa" + +config SYS_VENDOR + default "keymile" + +config SYS_SOC + default "ls102xa" + +config SYS_CONFIG_NAME + default "pg-wcom-expu1" + +config BOARD_SPECIFIC_OPTIONS + def_bool y + imply FS_CRAMFS + +endif diff --git a/board/keymile/pg-wcom-ls102xa/MAINTAINERS b/board/keymile/pg-wcom-ls102xa/MAINTAINERS index e1bc90a7e65..26b202316ce 100644 --- a/board/keymile/pg-wcom-ls102xa/MAINTAINERS +++ b/board/keymile/pg-wcom-ls102xa/MAINTAINERS @@ -6,5 +6,8 @@ S: Maintained F: board/keymile/pg-wcom-ls102xa/ F: include/configs/km/pg-wcom-ls102xa.h F: include/configs/pg-wcom-seli8.h +F: include/configs/pg-wcom-expu1.h F: configs/pg_wcom_seli8_defconfig +F: configs/pg_wcom_expu1_defconfig F: arch/arm/dts/ls1021a-pg-wcom-seli8.dts +F: arch/arm/dts/ls1021a-pg-wcom-expu1.dts diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index 6b0e9631b3f..69b5d211ba2 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -70,16 +70,29 @@ int board_early_init_f(void) /* QRIO Configuration */ qrio_uprstreq(UPREQ_CORE_RST); - if (IS_ENABLED(CONFIG_TARGET_PG_WCOM_SELI8)) { - qrio_prstcfg(KM_LIU_RST, PRSTCFG_POWUP_UNIT_RST); - qrio_wdmask(KM_LIU_RST, true); +#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_SELI8) + qrio_prstcfg(KM_LIU_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(KM_LIU_RST, true); - qrio_prstcfg(KM_PAXK_RST, PRSTCFG_POWUP_UNIT_RST); - qrio_wdmask(KM_PAXK_RST, true); + qrio_prstcfg(KM_PAXK_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(KM_PAXK_RST, true); +#endif - qrio_prstcfg(KM_DBG_ETH_RST, PRSTCFG_POWUP_UNIT_CORE_RST); - qrio_prst(KM_DBG_ETH_RST, false, false); - } +#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_EXPU1) + qrio_prstcfg(WCOM_TMG_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(WCOM_TMG_RST, true); + + qrio_prstcfg(WCOM_PHY_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_prst(WCOM_PHY_RST, false, false); + + qrio_prstcfg(WCOM_QSFP_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(WCOM_QSFP_RST, true); + + qrio_prstcfg(WCOM_CLIPS_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_prst(WCOM_CLIPS_RST, false, false); +#endif + qrio_prstcfg(KM_DBG_ETH_RST, PRSTCFG_POWUP_UNIT_CORE_RST); + qrio_prst(KM_DBG_ETH_RST, false, false); i2c_deblock_gpio_cfg(); diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig new file mode 100644 index 00000000000..65ab4fbc0ad --- /dev/null +++ b/configs/pg_wcom_expu1_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_TARGET_PG_WCOM_EXPU1=y +CONFIG_SYS_TEXT_BASE=0x60100000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_KM_DEF_NETDEV="eth2" +CONFIG_KM_COMMON_ETH_INIT=y +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" +CONFIG_SILENT_CONSOLE=y +CONFIG_MISC_INIT_R=y +CONFIG_LAST_STAGE_INIT=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_NAND=y +CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_CRAMFS=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" +CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:128k(rcw),128k(qe),128k(envred),128k(env),512k(res),1m(u-boot),-(ubi0);68000000.flash:-(ubi1)" +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FLASH=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_ADDR=0x60060000 +CONFIG_ENV_ADDR_REDUND=0x60040000 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_FSL_DDR3=y +# CONFIG_MMC is not set +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_PHY_GIGE=y +CONFIG_MII=y +CONFIG_TSEC_ENET=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y diff --git a/include/configs/pg-wcom-expu1.h b/include/configs/pg-wcom-expu1.h new file mode 100644 index 00000000000..e08d9414129 --- /dev/null +++ b/include/configs/pg-wcom-expu1.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Hitachi ABB Power Grids + */ + +#ifndef __CONFIG_PG_WCOM_EXPU1_H +#define __CONFIG_PG_WCOM_EXPU1_H + +#define WCOM_EXPU1 +#define CONFIG_HOSTNAME "EXPU1" + +#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" +#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" + +/* CLIPS FPGA Definitions */ +#define CONFIG_SYS_CSPR3_EXT (0x00) +#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CLIPS_BASE) | \ + CSPR_PORT_SIZE_8 | \ + CSPR_MSEL_GPCM | \ + CSPR_V) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) +#define CONFIG_SYS_CSOR3 (CSOR_GPCM_ADM_SHIFT(0x4) | \ + CSOR_GPCM_TRHZ_40) +#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x6) | \ + FTIM0_GPCM_TEADC(0x7) | \ + FTIM0_GPCM_TEAHC(0x2)) +#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ + FTIM1_GPCM_TRAD(0x12)) +#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x3) | \ + FTIM2_GPCM_TCH(0x1) | \ + FTIM2_GPCM_TWP(0x12)) +#define CONFIG_SYS_CS3_FTIM3 0x04000000 + +/* PRST */ +#define WCOM_CLIPS_RST 0 +#define WCOM_QSFP_RST 1 +#define WCOM_PHY_RST 2 +#define WCOM_TMG_RST 3 +#define KM_DBG_ETH_RST 15 + +/* QRIO GPIOs used for deblocking */ +#define KM_I2C_DEBLOCK_PORT QRIO_GPIO_A +#define KM_I2C_DEBLOCK_SCL 20 +#define KM_I2C_DEBLOCK_SDA 21 + +/* ZL30343 on SPI */ +#define WCOM_ZL30343_CFG_ADDR 0xe8070000 +#define WCOM_ZL30343_SPI_BUS 0 +#define WCOM_ZL30343_CS 0 + +#include "km/pg-wcom-ls102xa.h" + +#endif /* __CONFIG_PG_WCOM_EXPU1_H */ From 3aea3ddf21a29145176189b55eca7a833b8f7a4d Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:17:34 +0000 Subject: [PATCH 096/156] km/ls102xa: add support for u-boot POST memory test MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From production view this is standard test executed during production on all linux based foxmc cards. On CENT2 HW defined memory region is zero means that some DDR accesses are done by memory_post_dataline and memory_post_addrline but pattern tests are skipped that's why mem_regions is fast there. On ls102x for the complete DDR region of 1GiB memory_regions_post_test takes approx. 4min and this is too much for production, so this patch defines only 1MiB region as compromise. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- .../keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 34 +++++++++++++++++++ include/configs/km/pg-wcom-ls102xa.h | 4 +++ 2 files changed, 38 insertions(+) diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index 69b5d211ba2..97915f94c40 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -141,6 +141,40 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } +#if defined(CONFIG_POST) +int post_hotkeys_pressed(void) +{ + /* DIC26_SELFTEST: GPRTA0, GPA0 */ + qrio_gpio_direction_input(QRIO_GPIO_A, 0); + return qrio_get_gpio(QRIO_GPIO_A, 0); +} + +ulong post_word_load(void) +{ + /* POST word is located at the beginning of reserved physical RAM */ + void *addr = (void *)(CONFIG_SYS_SDRAM_BASE + + gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8); + return in_le32(addr); +} + +void post_word_store(ulong value) +{ + /* POST word is located at the beginning of reserved physical RAM */ + void *addr = (void *)(CONFIG_SYS_SDRAM_BASE + + gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8); + out_le32(addr, value); +} + +int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset) +{ + /* Define only 1MiB range for mem_regions at the middle of the RAM */ + /* For 1GiB range mem_regions takes approx. 4min */ + *vstart = CONFIG_SYS_SDRAM_BASE + (gd->ram_size >> 1); + *size = 1 << 20; + return 0; +} +#endif + u8 flash_read8(void *addr) { return __raw_readb(addr + 1); diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 3d7519c9354..35bfa450b1b 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -43,6 +43,10 @@ #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 +/* POST memory regions test */ +#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) +#define CONFIG_POST_EXTERNAL_WORD_FUNCS + /* * IFC Definitions */ From a09806498c2dcaf02a8f2fd41ab3bb595fc13ca4 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:19:08 +0000 Subject: [PATCH 097/156] km: ls102xa: add missing define for PRAM regions In our designs we reserve PRAM area at the end of the RAM, and in order this area to be visible and taken into account by the u-boot memory mgmt CONFIG_PRAM has to be defined. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- include/configs/km/pg-wcom-ls102xa.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 35bfa450b1b..1e06a5b712f 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -21,6 +21,10 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + \ + CONFIG_KM_PHRAM + \ + CONFIG_KM_RESERVED_PRAM) >> 10) + #define CONFIG_SYS_CLK_FREQ 66666666 /* * Take into account default implementation where DDR_FDBK_MULTI is consider as From fbb0e15a42e816e4b81b96d5c4d1303584afe1c0 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:20:13 +0000 Subject: [PATCH 098/156] km/scripts: fix saveenv command syntax This is most probably a typo, and in older u-uboot versions is same as 'saveenv', in the newer uboot versions there is a separate 'save' command that is different from 'saveenv'. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- board/keymile/scripts/ramfs-common.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/keymile/scripts/ramfs-common.txt b/board/keymile/scripts/ramfs-common.txt index e590a2bee6a..0a4a9c80b7e 100644 --- a/board/keymile/scripts/ramfs-common.txt +++ b/board/keymile/scripts/ramfs-common.txt @@ -3,7 +3,7 @@ boot_bank=-1 altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} subbootcmds=save_and_reset_once tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default addpanic addramfs boot -save_and_reset_once=setenv save_and_reset_once true && save && reset +save_and_reset_once=setenv save_and_reset_once true && saveenv && reset nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} configure=run set_uimage; run set_tftppath; km_setboardid && run try_import_rootfssize && saveenv && reset setrootfsaddr=setexpr value ${pnvramaddr} - ${rootfssize} && setenv rootfsaddr 0x${value} From fd49502d0fe30ff5f7d63b572eb8871d013ebec6 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:21:15 +0000 Subject: [PATCH 099/156] km: ls102x: set ethrotate envvar to no MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The default behavior in the latest u-boot revisions is to rotate the active net device to the next available if the requested link is not established. For our ls102x based devices this would mean that if active debug net device is not available, u-boot will rotate and set the next net device that is one of the estar adapters. To return from this situation manual action to set correct ethact adapter will be needed and this can be annoying when working in debug mode. Setting ethrotate=no will disable net adapter rotation and will make sure that the primary adapter is always used. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- include/configs/km/pg-wcom-ls102xa.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 1e06a5b712f..644da3bca56 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -292,6 +292,7 @@ CONFIG_KM_NEW_ENV \ CONFIG_KM_DEF_ENV \ "EEprom_ivm=pca9547:70:9\0" \ + "ethrotate=no\0" \ "" #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ From ccbd2ced73d1ad310c34e75dca3ce30f1d515c85 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:23:34 +0000 Subject: [PATCH 100/156] km: ls102x: update device disable configuration acc hw design desc In order to improve power consumption ls102x allows to disable peripherals that are not in use. This patch follows SELI8 HW design description and disables peripherals that are not in use in our designs, the same configuration is applicable and for EXPU1. This patch uses available hwconfig option for updating ls102x device disable configuration. Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- include/configs/km/pg-wcom-ls102xa.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 644da3bca56..e337b92ef43 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -288,9 +288,15 @@ "protect on " __stringify(ENV_DEL_ADDR) \ " +" __stringify(CONFIG_ENV_TOTAL_SIZE) "\0" +#define CONFIG_HW_ENV_SETTINGS \ + "hwconfig=devdis:esdhc,usb3,usb2,sata,sec,dcu,duart2,qspi," \ + "can1,can2_4,ftm2_8,i2c2_3,sai1_4,lpuart2_6," \ + "asrc,spdif,lpuart1,ftm1\0" + #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_KM_NEW_ENV \ CONFIG_KM_DEF_ENV \ + CONFIG_HW_ENV_SETTINGS \ "EEprom_ivm=pca9547:70:9\0" \ "ethrotate=no\0" \ "" From 02802eb89e85696d9cd2276c2842255d5ad7edf6 Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:24:32 +0000 Subject: [PATCH 101/156] pg-wcom-ls102x: initialize front led and app buf This patch adds the front led initialization and the application buffer enable to the eraly board inititlaization. Signed-off-by: Rainer Boschung Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index 97915f94c40..db49e8ff225 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -96,6 +96,12 @@ int board_early_init_f(void) i2c_deblock_gpio_cfg(); + /* enable the Unit LED (red) & Boot LED (on) */ + qrio_set_leds(); + + /* enable Application Buffer */ + qrio_enable_app_buffer(); + arch_soc_init(); return 0; From 11eeeef7b02ad276c7593ef0f280dff477e8ba7b Mon Sep 17 00:00:00 2001 From: Aleksandar Gerasimovski Date: Tue, 8 Jun 2021 14:25:21 +0000 Subject: [PATCH 102/156] pg-wcom-ls102xa: fix sys counter frequency A system clock of 66MHz was chosen for the pg-wcom-ls102xa. Compared to the Evalboard, this corresponds to a reduction of 1/3. The system counter clock should have been reduced accordingly, but that was not the case, so we had a system time that was 1/3 behind the real time. This patch corrects the system counter clock to 8.333MHz = 66.667MHz / 8. Signed-off-by: Rainer Boschung Signed-off-by: Aleksandar Gerasimovski Reviewed-by: Priyanka Jain --- include/configs/km/pg-wcom-ls102xa.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index e337b92ef43..eb480a34a67 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -214,7 +214,7 @@ #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define COUNTER_FREQUENCY 12500000 +#define COUNTER_FREQUENCY 8333333 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 From a484f7c4869723451c1ca98e8b2e9dbee0e8ff16 Mon Sep 17 00:00:00 2001 From: Camelia Groza Date: Fri, 11 Jun 2021 15:28:05 +0300 Subject: [PATCH 103/156] board: freescale: t208xrdb: remove the legacy non-DM_ETH code Both DM_ETH and DM_PCI are enabled for the T2080RDB board. Remove the board_eth_init() callback and the non-DM_ETH code paths since they are not needed anymore. Signed-off-by: Camelia Groza Reviewed-by: Tom Rini Reviewed-by: Priyanka Jain --- board/freescale/t208xrdb/eth_t208xrdb.c | 79 ------------------------- board/freescale/t208xrdb/t208xrdb.c | 4 -- 2 files changed, 83 deletions(-) diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c index b0ff4b1f375..4b44b1617d6 100644 --- a/board/freescale/t208xrdb/eth_t208xrdb.c +++ b/board/freescale/t208xrdb/eth_t208xrdb.c @@ -26,85 +26,6 @@ #include #include -int board_eth_init(struct bd_info *bis) -{ -#if defined(CONFIG_FMAN_ENET) - int i, interface; - struct memac_mdio_info dtsec_mdio_info; - struct memac_mdio_info tgec_mdio_info; - struct mii_dev *dev; - ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - u32 srds_s1; - - srds_s1 = in_be32(&gur->rcwsr[4]) & - FSL_CORENET2_RCWSR4_SRDS1_PRTCL; - srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; - - dtsec_mdio_info.regs = - (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR; - - dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME; - - /* Register the 1G MDIO bus */ - fm_memac_mdio_init(bis, &dtsec_mdio_info); - - tgec_mdio_info.regs = - (struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR; - tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME; - - /* Register the 10G MDIO bus */ - fm_memac_mdio_init(bis, &tgec_mdio_info); - - /* Set the two on-board RGMII PHY address */ - fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR); - fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR); - - switch (srds_s1) { - case 0x66: - case 0x6b: - fm_info_set_phy_address(FM1_10GEC1, CORTINA_PHY_ADDR1); - fm_info_set_phy_address(FM1_10GEC2, CORTINA_PHY_ADDR2); - fm_info_set_phy_address(FM1_10GEC3, FM1_10GEC3_PHY_ADDR); - fm_info_set_phy_address(FM1_10GEC4, FM1_10GEC4_PHY_ADDR); - break; - default: - printf("SerDes1 protocol 0x%x is not supported on T208xRDB\n", - srds_s1); - break; - } - - for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) { - interface = fm_info_get_enet_if(i); - switch (interface) { - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_TXID: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_ID: - dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); - fm_info_set_mdio(i, dev); - break; - default: - break; - } - } - - for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) { - switch (fm_info_get_enet_if(i)) { - case PHY_INTERFACE_MODE_XGMII: - dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); - fm_info_set_mdio(i, dev); - break; - default: - break; - } - } - - cpu_eth_init(bis); -#endif /* CONFIG_FMAN_ENET */ - - return pci_eth_init(bis); -} - /* Disable the MAC5 and MAC6 "fsl,fman-memac" nodes and the two * "fsl,dpa-ethernet" nodes that reference them. */ diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 7ccb205c647..35f5dff4664 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -136,11 +136,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fsl_fdt_fixup_dr_usb(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN -#ifndef CONFIG_DM_ETH - fdt_fixup_fman_ethernet(blob); -#else fdt_fixup_board_fman_ethernet(blob); -#endif fdt_fixup_board_enet(blob); #endif From c91b1305547ee72c0b0e5995c3b47d2b56ad698f Mon Sep 17 00:00:00 2001 From: Camelia Groza Date: Fri, 11 Jun 2021 15:28:06 +0300 Subject: [PATCH 104/156] board: freescale: t208xrdb: detect the board revision version Detect and print the board revision version based on the CPLD registers. Signed-off-by: Camelia Groza Reviewed-by: Priyanka Jain --- board/freescale/t208xrdb/t208xrdb.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 35f5dff4664..f7fa65d1a16 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -27,14 +27,29 @@ DECLARE_GLOBAL_DATA_PTR; +u8 get_hw_revision(void) +{ + u8 ver = CPLD_READ(hw_ver); + + switch (ver) { + default: + case 0x1: + return 'C'; + case 0x0: + return 'D'; + case 0x2: + return 'E'; + } +} + int checkboard(void) { struct cpu_type *cpu = gd->arch.cpu; static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"}; printf("Board: %sRDB, ", cpu->name); - printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ", - CPLD_READ(hw_ver), CPLD_READ(sw_ver)); + printf("Board rev: %c CPLD ver: 0x%02x, boot from ", + get_hw_revision(), CPLD_READ(sw_ver)); #ifdef CONFIG_SDCARD puts("SD/MMC\n"); From 4e21a555c1dc2eacee9e3ad07f3b112c20b0f7a2 Mon Sep 17 00:00:00 2001 From: Camelia Groza Date: Wed, 16 Jun 2021 17:47:31 +0530 Subject: [PATCH 105/156] board: freescale: t208xrdb: add Linux fdt fix-ups for rev D The T2080RDB boards revisions D and up have updated 10G Aquantia PHYs connected to MAC1 and MAC2. The second Aquantia PHY is located at a different address on the MDIO bus compared to rev C (0x8 instead of 0x1). Fix-up the Linux device tree to update the PHY address for the second Aquantia PHY on boards revisions D and up. Also rename the PHY node to reflect the changes. Signed-off-by: Camelia Groza [Rebased] Signed-off-by: Priyanka Jain --- board/freescale/t208xrdb/eth_t208xrdb.c | 35 +++++++++++++++++++++++++ board/freescale/t208xrdb/t208xrdb.c | 1 + board/freescale/t208xrdb/t208xrdb.h | 1 + include/configs/T208xRDB.h | 6 ++++- 4 files changed, 42 insertions(+), 1 deletion(-) diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c index 4b44b1617d6..e4592eac153 100644 --- a/board/freescale/t208xrdb/eth_t208xrdb.c +++ b/board/freescale/t208xrdb/eth_t208xrdb.c @@ -26,6 +26,8 @@ #include #include +extern u8 get_hw_revision(void); + /* Disable the MAC5 and MAC6 "fsl,fman-memac" nodes and the two * "fsl,dpa-ethernet" nodes that reference them. */ @@ -60,6 +62,39 @@ void fdt_fixup_board_fman_ethernet(void *fdt) } } +/* Update the address of the second Aquantia PHY on boards revision D and up. + * Also rename the PHY node to align with the address change. + */ +void fdt_fixup_board_phy(void *fdt) +{ + const char phy_path[] = + "/soc@ffe000000/fman@400000/mdio@fd000/ethernet-phy@1"; + int ret, offset, new_addr = AQR113C_PHY_ADDR2; + char new_name[] = "ethernet-phy@00"; + + if (get_hw_revision() == 'C') + return; + + offset = fdt_path_offset(fdt, phy_path); + if (offset < 0) { + printf("ethernet-phy@1 node not found in the dts\n"); + return; + } + + ret = fdt_setprop(fdt, offset, "reg", &new_addr, sizeof(new_addr)); + if (ret < 0) { + printf("Unable to set 'reg' for node ethernet-phy@1: %s\n", + fdt_strerror(ret)); + return; + } + + sprintf(new_name, "ethernet-phy@%x", new_addr); + ret = fdt_set_name(fdt, offset, new_name); + if (ret < 0) + printf("Unable to rename node ethernet-phy@1: %s\n", + fdt_strerror(ret)); +} + void fdt_fixup_board_enet(void *fdt) { return; diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index f7fa65d1a16..1f0cdee0b86 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -153,6 +153,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_board_fman_ethernet(blob); fdt_fixup_board_enet(blob); + fdt_fixup_board_phy(blob); #endif return 0; diff --git a/board/freescale/t208xrdb/t208xrdb.h b/board/freescale/t208xrdb/t208xrdb.h index cd0a9f44da7..edbc860c9d0 100644 --- a/board/freescale/t208xrdb/t208xrdb.h +++ b/board/freescale/t208xrdb/t208xrdb.h @@ -10,5 +10,6 @@ void fdt_fixup_board_enet(void *blob); void pci_of_setup(void *blob, struct bd_info *bd); void fdt_fixup_board_fman_ethernet(void *blob); +void fdt_fixup_board_phy(void *blob); #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index b5197b3ed95..9449e30bfca 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -537,8 +537,12 @@ unsigned long get_board_ddr_clk(void); #define RGMII_PHY2_ADDR 0x02 #define CORTINA_PHY_ADDR1 0x0c /* Cortina CS4315 */ #define CORTINA_PHY_ADDR2 0x0d -#define FM1_10GEC3_PHY_ADDR 0x00 /* Aquantia AQ1202 10G Base-T */ +/* Aquantia AQ1202 10G Base-T used by board revisions up to C */ +#define FM1_10GEC3_PHY_ADDR 0x00 #define FM1_10GEC4_PHY_ADDR 0x01 +/* Aquantia AQR113C 10G Base-T used by board revisions D and up */ +#define AQR113C_PHY_ADDR1 0x00 +#define AQR113C_PHY_ADDR2 0x08 #endif #ifdef CONFIG_FMAN_ENET From 13ea307f799ba76164354325a0c76c11b7b9c494 Mon Sep 17 00:00:00 2001 From: Camelia Groza Date: Fri, 11 Jun 2021 15:28:08 +0300 Subject: [PATCH 106/156] board: freescale: t208xrdb: add a config option for rev D dts fixups Under DM, we rely on u-boot's device tree to provide the correct PHY addresses. The board_fix_fdt callback is intended to be used for device tree fixups before relocation. Unfortunately, this isn't an option when booting from flash since the device tree isn't writable before relocation. This patch introduces the CONFIG_T2080RDB_REV_D option to signal that a board revision D or up is the target. The config option is used to set the correct Aquantia PHY address in the board's u-boot device tree. Defconfig files with the option enable explicitly are added for convenience. Signed-off-by: Camelia Groza Reviewed-by: Priyanka Jain --- arch/powerpc/dts/t2080rdb.dts | 7 ++ board/freescale/t208xrdb/Kconfig | 4 + configs/T2080RDB_revD_NAND_defconfig | 93 ++++++++++++++++++++++++ configs/T2080RDB_revD_SDCARD_defconfig | 90 +++++++++++++++++++++++ configs/T2080RDB_revD_SPIFLASH_defconfig | 92 +++++++++++++++++++++++ configs/T2080RDB_revD_defconfig | 77 ++++++++++++++++++++ 6 files changed, 363 insertions(+) create mode 100644 configs/T2080RDB_revD_NAND_defconfig create mode 100644 configs/T2080RDB_revD_SDCARD_defconfig create mode 100644 configs/T2080RDB_revD_SPIFLASH_defconfig create mode 100644 configs/T2080RDB_revD_defconfig diff --git a/arch/powerpc/dts/t2080rdb.dts b/arch/powerpc/dts/t2080rdb.dts index 25f8c978c6d..4de814ea8d9 100644 --- a/arch/powerpc/dts/t2080rdb.dts +++ b/arch/powerpc/dts/t2080rdb.dts @@ -77,10 +77,17 @@ reg = <0x0>; }; +#ifdef CONFIG_T2080RDB_REV_D + xg_aq1202_phy4: ethernet-phy@8 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x8>; + }; +#else xg_aq1202_phy4: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; reg = <0x1>; }; +#endif }; }; }; diff --git a/board/freescale/t208xrdb/Kconfig b/board/freescale/t208xrdb/Kconfig index 6f0b012baba..8249c5df967 100644 --- a/board/freescale/t208xrdb/Kconfig +++ b/board/freescale/t208xrdb/Kconfig @@ -9,6 +9,10 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "T208xRDB" +config T2080RDB_REV_D + bool "Support for T2080RDB revisions D and up" + default n + source "board/freescale/common/Kconfig" endif diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig new file mode 100644 index 00000000000..3b533a31ad0 --- /dev/null +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -0,0 +1,93 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_T2080RDB_REV_D=y +CONFIG_SYS_CUSTOM_LDSCRIPT=y +CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL" +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_MTD_RAW_NAND=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_SYS_CORTINA_FW_IN_NAND=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_NAND=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig new file mode 100644 index 00000000000..7b9013e5ecf --- /dev/null +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -0,0 +1,90 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_T2080RDB_REV_D=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD" +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_SYS_CORTINA_FW_IN_MMC=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_MMC=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig new file mode 100644 index 00000000000..af85fa6cdf7 --- /dev/null +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -0,0 +1,92 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_T2080RDB_REV_D=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH" +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig new file mode 100644 index 00000000000..79397ab30a8 --- /dev/null +++ b/configs/T2080RDB_revD_defconfig @@ -0,0 +1,77 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0xEFF40000 +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_T2080RDB_REV_D=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_FLASH=y +CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_NOR=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 From 390c73b41757f7a69987ed75dc0b44d630d67700 Mon Sep 17 00:00:00 2001 From: Ran Wang Date: Wed, 16 Jun 2021 17:53:19 +0530 Subject: [PATCH 107/156] armv8: Update erratum number to align with doc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change the USB erratum number A-050106 to A-050204 as A-050106 is a duplicate and never be published. Fixes 0cfa00cdb94 (“armv8: Add workaround for USB erratum A-050106”) Signed-off-by: Ran Wang [Rebased] Signed-off-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 ++++---- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 395e5ccaadd..9c58f69dbd0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -223,7 +223,7 @@ config ARCH_LX2162A select SYS_FSL_DDR_VER_50 select SYS_FSL_EC1 select SYS_FSL_EC2 - select SYS_FSL_ERRATUM_A050106 + select SYS_FSL_ERRATUM_A050204 select SYS_FSL_ERRATUM_A011334 select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND select SYS_FSL_HAS_RGMII @@ -255,7 +255,7 @@ config ARCH_LX2160A select SYS_FSL_DDR_VER_50 select SYS_FSL_EC1 select SYS_FSL_EC2 - select SYS_FSL_ERRATUM_A050106 + select SYS_FSL_ERRATUM_A050204 select SYS_FSL_ERRATUM_A011334 select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND select SYS_FSL_HAS_RGMII @@ -375,8 +375,8 @@ config SYS_FSL_ERRATUM_A009008 config SYS_FSL_ERRATUM_A009798 bool "Workaround for USB PHY erratum A009798" -config SYS_FSL_ERRATUM_A050106 - bool "Workaround for USB PHY erratum A050106" +config SYS_FSL_ERRATUM_A050204 + bool "Workaround for USB PHY erratum A050204" help USB3.0 Receiver needs to enable fixed equalization for each of PHY instances in an SOC. This is similar diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 7553b5bce2e..c3cd6c7ac7f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #include @@ -218,7 +218,7 @@ static void erratum_a009007(void) } #if defined(CONFIG_FSL_LSCH3) -static void erratum_a050106(void) +static void erratum_a050204(void) { #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A) void __iomem *dcsr = (void __iomem *)DCSR_BASE; @@ -378,7 +378,7 @@ void fsl_lsch3_early_init_f(void) erratum_a009798(); erratum_a008997(); erratum_a009007(); - erratum_a050106(); + erratum_a050204(); #ifdef CONFIG_CHAIN_OF_TRUST /* In case of Secure Boot, the IBR configures the SMMU * to allow only Secure transactions. From b7efcaff8bb5196b9271bcfaeb0a5f100b3867c2 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Thu, 17 Jun 2021 12:52:46 +0530 Subject: [PATCH 108/156] board: freescale: t1028xrdb: Add MAINTAINER for revD Add Priyanka Jain as MAINTAINER for T2080RDB_revD_defconfig, T2080RDB_revD_NAND_defconfig, T2080RDB_revD_SDCARD_defconfig and T2080RDB_revD_SPIFLASH_defconfig Signed-off-by: Priyanka Jain --- board/freescale/t208xrdb/MAINTAINERS | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/freescale/t208xrdb/MAINTAINERS b/board/freescale/t208xrdb/MAINTAINERS index f894f77b735..6e9b25fa049 100644 --- a/board/freescale/t208xrdb/MAINTAINERS +++ b/board/freescale/t208xrdb/MAINTAINERS @@ -8,6 +8,10 @@ F: configs/T2080RDB_NAND_defconfig F: configs/T2080RDB_SDCARD_defconfig F: configs/T2080RDB_SPIFLASH_defconfig F: configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +F: configs/T2080RDB_revD_defconfig +F: configs/T2080RDB_revD_NAND_defconfig +F: configs/T2080RDB_revD_SDCARD_defconfig +F: configs/T2080RDB_revD_SPIFLASH_defconfig T2080RDB_SECURE_BOOT BOARD M: Ruchika Gupta From 3e1848778c068bddd442855792d478eb2f038665 Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Sat, 12 Jun 2021 21:15:41 +0300 Subject: [PATCH 109/156] Fix a memory leak issue in the RX port initialization. Signed-off-by: Hou Zhiqiang Reviewed-by: Ramon Fried --- drivers/net/fm/eth.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 0e89e663f71..7c23ccc1f0e 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -288,8 +288,10 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth) /* alloc Rx buffer from main memory */ rx_buf_pool = malloc(MAX_RXBUF_LEN * RX_BD_RING_SIZE); - if (!rx_buf_pool) + if (!rx_buf_pool) { + free(rx_bd_ring_base); return -ENOMEM; + } memset(rx_buf_pool, 0, MAX_RXBUF_LEN * RX_BD_RING_SIZE); debug("%s: rx_buf_pool = %p\n", __func__, rx_buf_pool); From 70018635969987c1224b27f62c851ac70264f272 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Fri, 16 Apr 2021 13:25:09 -0700 Subject: [PATCH 110/156] net: e1000: do not attempt to set hwaddr for i210 without FLASH commit f1bcad22dd19 ("net: e1000: add support for writing to EEPROM") adds support for storing hwaddr in EEPROM however i210 devices do not support this and thus results in errors such as: Warning: e1000#0 failed to set MAC address' Check if a flash device is present and if not return -ENOSYS indicating this is not supported. Signed-off-by: Tim Harvey Reviewed-by: Ramon Fried --- drivers/net/e1000.c | 4 ++++ drivers/net/e1000.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 694114eca79..60613b7df07 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -5673,6 +5673,10 @@ static int e1000_write_hwaddr(struct eth_device *dev) DEBUGOUT("%s: mac=%pM\n", __func__, mac); + if ((hw->eeprom.type == e1000_eeprom_invm) && + !(E1000_READ_REG(hw, EECD) & E1000_EECD_FLASH_DETECTED_I210)) + return -ENOSYS; + memset(current_mac, 0, 6); /* Read from EEPROM, not from registers, to make sure diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index 072851ba31c..082154a997e 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -1245,6 +1245,7 @@ struct e1000_hw { #define E1000_EECD_FLUPD 0x00080000 /* Update FLASH */ #define E1000_EECD_FLUPD_I210 0x00800000 /* Update FLASH */ #define E1000_EECD_FLUDONE_I210 0x04000000 /* Update FLASH done*/ +#define E1000_EECD_FLASH_DETECTED_I210 0x00080000 /* FLASH detected */ #define E1000_FLUDONE_ATTEMPTS 20000 #define E1000_EECD_AUPDEN 0x00100000 /* Enable Autonomous FLASH update */ #define E1000_EECD_SHADV 0x00200000 /* Shadow RAM Data Valid */ From 07292f8e51dfc9a8f4065e08144955eebff88944 Mon Sep 17 00:00:00 2001 From: Daniil Stas Date: Sun, 23 May 2021 22:24:48 +0000 Subject: [PATCH 111/156] net: dwc_eth_qos: Fix needless phy auto-negotiation restarts Disabling clk_ck clock leads to link up status loss in phy, which leads to auto-negotiation restart before each network command execution. This issue is especially big for PXE boot protocol because of auto-negotiation restarts before each configuration filename trial. To avoid this issue don't disable clk_ck clock after it was enabled. Signed-off-by: Daniil Stas Cc: Ramon Fried Cc: Joe Hershberger Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Ramon Fried --- drivers/net/dwc_eth_qos.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index e8242ca4e1b..2f088c758f0 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -321,6 +321,7 @@ struct eqos_priv { void *rx_pkt; bool started; bool reg_access_ok; + bool clk_ck_enabled; }; /* @@ -591,12 +592,13 @@ static int eqos_start_clks_stm32(struct udevice *dev) goto err_disable_clk_rx; } - if (clk_valid(&eqos->clk_ck)) { + if (clk_valid(&eqos->clk_ck) && !eqos->clk_ck_enabled) { ret = clk_enable(&eqos->clk_ck); if (ret < 0) { pr_err("clk_enable(clk_ck) failed: %d", ret); goto err_disable_clk_tx; } + eqos->clk_ck_enabled = true; } #endif @@ -648,8 +650,6 @@ static void eqos_stop_clks_stm32(struct udevice *dev) clk_disable(&eqos->clk_tx); clk_disable(&eqos->clk_rx); clk_disable(&eqos->clk_master_bus); - if (clk_valid(&eqos->clk_ck)) - clk_disable(&eqos->clk_ck); #endif debug("%s: OK\n", __func__); From f024e0b208dd81db03522930b70c875370a86aae Mon Sep 17 00:00:00 2001 From: Daniil Stas Date: Sun, 30 May 2021 13:34:09 +0000 Subject: [PATCH 112/156] net: dwc_eth_qos: Revert some changes of commit 3a97da12ee7b Revert some changes of commit 3a97da12ee7b ("net: dwc_eth_qos: add dwc eqos for imx support") that were probably added by mistake. One of these changes can lead to received data corruption (enabling FUP and FEP bits). Another causes invalid register rxq_ctrl0 settings for some platforms. And another makes some writes at unknown memory location. Fixes: 3a97da12ee7b ("net: dwc_eth_qos: add dwc eqos for imx support") Signed-off-by: Daniil Stas Cc: Ye Li Cc: Fugang Duan Cc: Peng Fan Cc: Ramon Fried Cc: Joe Hershberger Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Ramon Fried --- drivers/net/dwc_eth_qos.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 2f088c758f0..b012bed517d 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -172,8 +172,6 @@ struct eqos_mtl_regs { #define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK 0x3f #define EQOS_MTL_RXQ0_OPERATION_MODE_EHFC BIT(7) #define EQOS_MTL_RXQ0_OPERATION_MODE_RSF BIT(5) -#define EQOS_MTL_RXQ0_OPERATION_MODE_FEP BIT(4) -#define EQOS_MTL_RXQ0_OPERATION_MODE_FUP BIT(3) #define EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT 16 #define EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK 0x7fff @@ -1222,7 +1220,6 @@ static int eqos_start(struct udevice *dev) } /* Configure MTL */ - writel(0x60, &eqos->mtl_regs->txq0_quantum_weight - 0x100); /* Enable Store and Forward mode for TX */ /* Program Tx operating mode */ @@ -1236,9 +1233,7 @@ static int eqos_start(struct udevice *dev) /* Enable Store and Forward mode for RX, since no jumbo frame */ setbits_le32(&eqos->mtl_regs->rxq0_operation_mode, - EQOS_MTL_RXQ0_OPERATION_MODE_RSF | - EQOS_MTL_RXQ0_OPERATION_MODE_FEP | - EQOS_MTL_RXQ0_OPERATION_MODE_FUP); + EQOS_MTL_RXQ0_OPERATION_MODE_RSF); /* Transmit/Receive queue fifo size; use all RAM for 1 queue */ val = readl(&eqos->mac_regs->hw_feature1); @@ -1314,12 +1309,6 @@ static int eqos_start(struct udevice *dev) eqos->config->config_mac << EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT); - clrsetbits_le32(&eqos->mac_regs->rxq_ctrl0, - EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK << - EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT, - 0x2 << - EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT); - /* Multicast and Broadcast Queue Enable */ setbits_le32(&eqos->mac_regs->unused_0a4, 0x00100000); From eab447b2b5d3d357f07a28150b13862b1c26b2e2 Mon Sep 17 00:00:00 2001 From: Jassi Brar Date: Fri, 4 Jun 2021 18:44:38 +0900 Subject: [PATCH 113/156] net: synquacer: Add netsec driver Add SynQuacer's NETSEC GbE controller driver. Since this driver will load the firmware from SPI NOR flash, this depends on CONFIG_SYNQUACER_SPI=y. Signed-off-by: Jassi Brar Reviewed-by: Ramon Fried --- drivers/net/Kconfig | 8 + drivers/net/Makefile | 1 + drivers/net/sni_netsec.c | 1134 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 1143 insertions(+) create mode 100644 drivers/net/sni_netsec.c diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 382639044bf..9fc28b149d0 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -673,6 +673,14 @@ config SNI_AVE This driver implements support for the Socionext AVE Ethernet controller, as found on the Socionext UniPhier family. +config SNI_NETSEC + bool "Socionext NETSEC Ethernet support" + depends on DM_ETH && SYNQUACER_SPI + select PHYLIB + help + This driver implements support for the Socionext SynQuacer NETSEC + ethernet controller, as found on the Socionext SynQuacer family. + source "drivers/net/mscc_eswitch/Kconfig" config ETHER_ON_FEC1 diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a44a7d3f56a..d56baa65b2f 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o obj-$(CONFIG_FSL_PFE) += pfe_eth/ obj-y += qe/ obj-$(CONFIG_SNI_AVE) += sni_ave.o +obj-$(CONFIG_SNI_NETSEC) += sni_netsec.o obj-y += ti/ obj-$(CONFIG_MEDIATEK_ETH) += mtk_eth.o obj-y += mscc_eswitch/ diff --git a/drivers/net/sni_netsec.c b/drivers/net/sni_netsec.c new file mode 100644 index 00000000000..a9ebf6af9c5 --- /dev/null +++ b/drivers/net/sni_netsec.c @@ -0,0 +1,1134 @@ +// SPDX-License-Identifier: GPL-2.0+ +/** + * netsec.c - Socionext Synquacer Netsec driver + * Copyright 2021 Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define NETSEC_REG_SOFT_RST 0x104 +#define NETSEC_REG_COM_INIT 0x120 + +#define NETSEC_REG_TOP_STATUS 0x200 +#define NETSEC_IRQ_RX BIT(1) +#define NETSEC_IRQ_TX BIT(0) + +#define NETSEC_REG_TOP_INTEN 0x204 +#define NETSEC_REG_INTEN_SET 0x234 +#define NETSEC_REG_INTEN_CLR 0x238 + +#define NETSEC_REG_NRM_TX_STATUS 0x400 +#define NETSEC_REG_NRM_TX_INTEN 0x404 +#define NETSEC_REG_NRM_TX_INTEN_SET 0x428 +#define NETSEC_REG_NRM_TX_INTEN_CLR 0x42c +#define NRM_TX_ST_NTOWNR BIT(17) +#define NRM_TX_ST_TR_ERR BIT(16) +#define NRM_TX_ST_TXDONE BIT(15) +#define NRM_TX_ST_TMREXP BIT(14) + +#define NETSEC_REG_NRM_RX_STATUS 0x440 +#define NETSEC_REG_NRM_RX_INTEN 0x444 +#define NETSEC_REG_NRM_RX_INTEN_SET 0x468 +#define NETSEC_REG_NRM_RX_INTEN_CLR 0x46c +#define NRM_RX_ST_RC_ERR BIT(16) +#define NRM_RX_ST_PKTCNT BIT(15) +#define NRM_RX_ST_TMREXP BIT(14) + +#define NETSEC_REG_PKT_CMD_BUF 0xd0 + +#define NETSEC_REG_CLK_EN 0x100 + +#define NETSEC_REG_PKT_CTRL 0x140 + +#define NETSEC_REG_DMA_TMR_CTRL 0x20c +#define NETSEC_REG_F_TAIKI_MC_VER 0x22c +#define NETSEC_REG_F_TAIKI_VER 0x230 +#define NETSEC_REG_DMA_HM_CTRL 0x214 +#define NETSEC_REG_DMA_MH_CTRL 0x220 +#define NETSEC_REG_ADDR_DIS_CORE 0x218 +#define NETSEC_REG_DMAC_HM_CMD_BUF 0x210 +#define NETSEC_REG_DMAC_MH_CMD_BUF 0x21c + +#define NETSEC_REG_NRM_TX_PKTCNT 0x410 + +#define NETSEC_REG_NRM_TX_DONE_PKTCNT 0x414 +#define NETSEC_REG_NRM_TX_DONE_TXINT_PKTCNT 0x418 + +#define NETSEC_REG_NRM_TX_TMR 0x41c + +#define NETSEC_REG_NRM_RX_PKTCNT 0x454 +#define NETSEC_REG_NRM_RX_RXINT_PKTCNT 0x458 +#define NETSEC_REG_NRM_TX_TXINT_TMR 0x420 +#define NETSEC_REG_NRM_RX_RXINT_TMR 0x460 + +#define NETSEC_REG_NRM_RX_TMR 0x45c + +#define NETSEC_REG_NRM_TX_DESC_START_UP 0x434 +#define NETSEC_REG_NRM_TX_DESC_START_LW 0x408 +#define NETSEC_REG_NRM_RX_DESC_START_UP 0x474 +#define NETSEC_REG_NRM_RX_DESC_START_LW 0x448 + +#define NETSEC_REG_NRM_TX_CONFIG 0x430 +#define NETSEC_REG_NRM_RX_CONFIG 0x470 + +#define MAC_REG_STATUS 0x1024 +#define MAC_REG_DATA 0x11c0 +#define MAC_REG_CMD 0x11c4 +#define MAC_REG_FLOW_TH 0x11cc +#define MAC_REG_INTF_SEL 0x11d4 +#define MAC_REG_DESC_INIT 0x11fc +#define MAC_REG_DESC_SOFT_RST 0x1204 +#define NETSEC_REG_MODE_TRANS_COMP_STATUS 0x500 + +#define GMAC_REG_MCR 0x0000 +#define GMAC_REG_MFFR 0x0004 +#define GMAC_REG_GAR 0x0010 +#define GMAC_REG_GDR 0x0014 +#define GMAC_REG_FCR 0x0018 +#define GMAC_REG_BMR 0x1000 +#define GMAC_REG_RDLAR 0x100c +#define GMAC_REG_TDLAR 0x1010 +#define GMAC_REG_OMR 0x1018 + +#define MHZ(n) ((n) * 1000 * 1000) + +#define NETSEC_TX_SHIFT_OWN_FIELD 31 +#define NETSEC_TX_SHIFT_LD_FIELD 30 +#define NETSEC_TX_SHIFT_DRID_FIELD 24 +#define NETSEC_TX_SHIFT_PT_FIELD 21 +#define NETSEC_TX_SHIFT_TDRID_FIELD 16 +#define NETSEC_TX_SHIFT_CC_FIELD 15 +#define NETSEC_TX_SHIFT_FS_FIELD 9 +#define NETSEC_TX_LAST 8 +#define NETSEC_TX_SHIFT_CO 7 +#define NETSEC_TX_SHIFT_SO 6 +#define NETSEC_TX_SHIFT_TRS_FIELD 4 + +#define NETSEC_RX_PKT_OWN_FIELD 31 +#define NETSEC_RX_PKT_LD_FIELD 30 +#define NETSEC_RX_PKT_SDRID_FIELD 24 +#define NETSEC_RX_PKT_FR_FIELD 23 +#define NETSEC_RX_PKT_ER_FIELD 21 +#define NETSEC_RX_PKT_ERR_FIELD 16 +#define NETSEC_RX_PKT_TDRID_FIELD 12 +#define NETSEC_RX_PKT_FS_FIELD 9 +#define NETSEC_RX_PKT_LS_FIELD 8 +#define NETSEC_RX_PKT_CO_FIELD 6 + +#define NETSEC_RX_PKT_ERR_MASK 3 + +#define NETSEC_MAX_TX_PKT_LEN 1518 +#define NETSEC_MAX_TX_JUMBO_PKT_LEN 9018 + +#define NETSEC_RING_GMAC 15 +#define NETSEC_RING_MAX 2 + +#define NETSEC_TCP_SEG_LEN_MAX 1460 +#define NETSEC_TCP_JUMBO_SEG_LEN_MAX 8960 + +#define NETSEC_RX_CKSUM_NOTAVAIL 0 +#define NETSEC_RX_CKSUM_OK 1 +#define NETSEC_RX_CKSUM_NG 2 + +#define NETSEC_TOP_IRQ_REG_ME_START BIT(20) +#define NETSEC_IRQ_TRANSITION_COMPLETE BIT(4) + +#define NETSEC_MODE_TRANS_COMP_IRQ_N2T BIT(20) +#define NETSEC_MODE_TRANS_COMP_IRQ_T2N BIT(19) + +#define NETSEC_INT_PKTCNT_MAX 2047 + +#define NETSEC_FLOW_START_TH_MAX 95 +#define NETSEC_FLOW_STOP_TH_MAX 95 +#define NETSEC_FLOW_PAUSE_TIME_MIN 5 + +#define NETSEC_CLK_EN_REG_DOM_ALL 0x3f + +#define NETSEC_PKT_CTRL_REG_MODE_NRM BIT(28) +#define NETSEC_PKT_CTRL_REG_EN_JUMBO BIT(27) +#define NETSEC_PKT_CTRL_REG_LOG_CHKSUM_ER BIT(3) +#define NETSEC_PKT_CTRL_REG_LOG_HD_INCOMPLETE BIT(2) +#define NETSEC_PKT_CTRL_REG_LOG_HD_ER BIT(1) +#define NETSEC_PKT_CTRL_REG_DRP_NO_MATCH BIT(0) + +#define NETSEC_CLK_EN_REG_DOM_G BIT(5) +#define NETSEC_CLK_EN_REG_DOM_C BIT(1) +#define NETSEC_CLK_EN_REG_DOM_D BIT(0) + +#define NETSEC_COM_INIT_REG_DB BIT(2) +#define NETSEC_COM_INIT_REG_CLS BIT(1) +#define NETSEC_COM_INIT_REG_ALL (NETSEC_COM_INIT_REG_CLS | \ + NETSEC_COM_INIT_REG_DB) + +#define NETSEC_SOFT_RST_REG_RESET 0 +#define NETSEC_SOFT_RST_REG_RUN BIT(31) + +#define NETSEC_DMA_CTRL_REG_STOP 1 +#define MH_CTRL__MODE_TRANS BIT(20) + +#define NETSEC_GMAC_CMD_ST_READ 0 +#define NETSEC_GMAC_CMD_ST_WRITE BIT(28) +#define NETSEC_GMAC_CMD_ST_BUSY BIT(31) + +#define NETSEC_GMAC_BMR_REG_COMMON 0x00412080 +#define NETSEC_GMAC_BMR_REG_RESET 0x00020181 +#define NETSEC_GMAC_BMR_REG_SWR 0x00000001 + +#define NETSEC_GMAC_OMR_REG_ST BIT(13) +#define NETSEC_GMAC_OMR_REG_SR BIT(1) + +#define NETSEC_GMAC_MCR_REG_IBN BIT(30) +#define NETSEC_GMAC_MCR_REG_CST BIT(25) +#define NETSEC_GMAC_MCR_REG_JE BIT(20) +#define NETSEC_MCR_PS BIT(15) +#define NETSEC_GMAC_MCR_REG_FES BIT(14) +#define NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON 0x0000280c +#define NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON 0x0001a00c + +#define NETSEC_FCR_RFE BIT(2) +#define NETSEC_FCR_TFE BIT(1) + +#define NETSEC_GMAC_GAR_REG_GW BIT(1) +#define NETSEC_GMAC_GAR_REG_GB BIT(0) + +#define NETSEC_GMAC_GAR_REG_SHIFT_PA 11 +#define NETSEC_GMAC_GAR_REG_SHIFT_GR 6 +#define GMAC_REG_SHIFT_CR_GAR 2 + +#define NETSEC_GMAC_GAR_REG_CR_25_35_MHZ 2 +#define NETSEC_GMAC_GAR_REG_CR_35_60_MHZ 3 +#define NETSEC_GMAC_GAR_REG_CR_60_100_MHZ 0 +#define NETSEC_GMAC_GAR_REG_CR_100_150_MHZ 1 +#define NETSEC_GMAC_GAR_REG_CR_150_250_MHZ 4 +#define NETSEC_GMAC_GAR_REG_CR_250_300_MHZ 5 + +#define NETSEC_GMAC_RDLAR_REG_COMMON 0x18000 +#define NETSEC_GMAC_TDLAR_REG_COMMON 0x1c000 + +#define NETSEC_REG_NETSEC_VER_F_TAIKI 0x50000 + +#define NETSEC_REG_DESC_RING_CONFIG_CFG_UP BIT(31) +#define NETSEC_REG_DESC_RING_CONFIG_CH_RST BIT(30) +#define NETSEC_REG_DESC_TMR_MODE 4 +#define NETSEC_REG_DESC_ENDIAN 0 + +#define NETSEC_MAC_DESC_SOFT_RST_SOFT_RST 1 +#define NETSEC_MAC_DESC_INIT_REG_INIT 1 + +#define NETSEC_EEPROM_MAC_ADDRESS 0x00 +#define NETSEC_EEPROM_HM_ME_ADDRESS_H 0x08 +#define NETSEC_EEPROM_HM_ME_ADDRESS_L 0x0C +#define NETSEC_EEPROM_HM_ME_SIZE 0x10 +#define NETSEC_EEPROM_MH_ME_ADDRESS_H 0x14 +#define NETSEC_EEPROM_MH_ME_ADDRESS_L 0x18 +#define NETSEC_EEPROM_MH_ME_SIZE 0x1C +#define NETSEC_EEPROM_PKT_ME_ADDRESS 0x20 +#define NETSEC_EEPROM_PKT_ME_SIZE 0x24 + +#define DESC_SZ sizeof(struct netsec_de) + +#define NETSEC_F_NETSEC_VER_MAJOR_NUM(x) ((x) & 0xffff0000) + +#define EERPROM_MAP_OFFSET 0x8000000 +#define NOR_BLOCK 1024 + +struct netsec_de { /* Netsec Descriptor layout */ + u32 attr; + u32 data_buf_addr_up; + u32 data_buf_addr_lw; + u32 buf_len_info; +}; + +struct netsec_priv { + struct netsec_de rxde[PKTBUFSRX]; + struct netsec_de txde[1]; + u16 rxat; + + phys_addr_t eeprom_base; + phys_addr_t ioaddr; + + struct mii_dev *bus; + struct phy_device *phydev; + u32 phy_addr, freq; + int phy_mode; + int max_speed; +}; + +struct netsec_tx_pkt_ctrl { + u16 tcp_seg_len; + bool tcp_seg_offload_flag; + bool cksum_offload_flag; +}; + +struct netsec_rx_pkt_info { + int rx_cksum_result; + int err_code; + bool err_flag; +}; + +static void netsec_write_reg(struct netsec_priv *priv, u32 reg_addr, u32 val) +{ + writel(val, priv->ioaddr + reg_addr); +} + +static u32 netsec_read_reg(struct netsec_priv *priv, u32 reg_addr) +{ + return readl(priv->ioaddr + reg_addr); +} + +/************* MDIO BUS OPS FOLLOW *************/ + +#define TIMEOUT_SPINS_MAC 1000 +#define TIMEOUT_SECONDARY_MS_MAC 100 + +static u32 netsec_clk_type(u32 freq) +{ + if (freq < MHZ(35)) + return NETSEC_GMAC_GAR_REG_CR_25_35_MHZ; + if (freq < MHZ(60)) + return NETSEC_GMAC_GAR_REG_CR_35_60_MHZ; + if (freq < MHZ(100)) + return NETSEC_GMAC_GAR_REG_CR_60_100_MHZ; + if (freq < MHZ(150)) + return NETSEC_GMAC_GAR_REG_CR_100_150_MHZ; + if (freq < MHZ(250)) + return NETSEC_GMAC_GAR_REG_CR_150_250_MHZ; + + return NETSEC_GMAC_GAR_REG_CR_250_300_MHZ; +} + +static int netsec_wait_while_busy(struct netsec_priv *priv, u32 addr, u32 mask) +{ + u32 timeout = TIMEOUT_SPINS_MAC; + + while (--timeout && netsec_read_reg(priv, addr) & mask) + cpu_relax(); + if (timeout) + return 0; + + timeout = TIMEOUT_SECONDARY_MS_MAC; + while (--timeout && netsec_read_reg(priv, addr) & mask) + udelay(2000); + + if (timeout) + return 0; + + pr_err("%s: timeout\n", __func__); + + return -ETIMEDOUT; +} + +static int netsec_set_mac_reg(struct netsec_priv *priv, u32 addr, u32 value) +{ + netsec_write_reg(priv, MAC_REG_DATA, value); + netsec_write_reg(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_WRITE); + return netsec_wait_while_busy(priv, + MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); +} + +static int netsec_get_mac_reg(struct netsec_priv *priv, u32 addr, u32 *read) +{ + int ret; + + netsec_write_reg(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_READ); + ret = netsec_wait_while_busy(priv, + MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); + if (ret) + return ret; + + *read = netsec_read_reg(priv, MAC_REG_DATA); + + return 0; +} + +static int netsec_mac_wait_while_busy(struct netsec_priv *priv, + u32 addr, u32 mask) +{ + u32 timeout = TIMEOUT_SPINS_MAC; + u32 data; + int ret; + + do { + ret = netsec_get_mac_reg(priv, addr, &data); + if (ret) + break; + udelay(1); + } while (--timeout && (data & mask)); + + if (timeout) + return 0; + + timeout = TIMEOUT_SECONDARY_MS_MAC; + do { + udelay(2000); + + ret = netsec_get_mac_reg(priv, addr, &data); + if (ret) + break; + cpu_relax(); + } while (--timeout && (data & mask)); + + if (timeout && !ret) + return 0; + + return -ETIMEDOUT; +} + +static void netsec_cache_invalidate(uintptr_t vaddr, int len) +{ + invalidate_dcache_range(rounddown(vaddr, ARCH_DMA_MINALIGN), + roundup(vaddr + len, ARCH_DMA_MINALIGN)); +} + +static void netsec_cache_flush(uintptr_t vaddr, int len) +{ + flush_dcache_range(rounddown(vaddr, ARCH_DMA_MINALIGN), + roundup(vaddr + len, ARCH_DMA_MINALIGN)); +} + +static void netsec_set_rx_de(struct netsec_priv *priv, u16 idx, void *addr) +{ + struct netsec_de *de = &priv->rxde[idx]; + u32 attr = (1 << NETSEC_RX_PKT_OWN_FIELD) | + (1 << NETSEC_RX_PKT_FS_FIELD) | + (1 << NETSEC_RX_PKT_LS_FIELD); + + if (idx == PKTBUFSRX - 1) + attr |= (1 << NETSEC_RX_PKT_LD_FIELD); + + de->data_buf_addr_up = upper_32_bits((dma_addr_t)addr); + de->data_buf_addr_lw = lower_32_bits((dma_addr_t)addr); + de->buf_len_info = PKTSIZE; + de->attr = attr; + dmb(); + netsec_cache_flush((uintptr_t)de, sizeof(*de)); +} + +static void netsec_set_tx_de(struct netsec_priv *priv, void *addr, int len) +{ + struct netsec_de *de = &priv->txde[0]; + u32 attr; + + attr = (1 << NETSEC_TX_SHIFT_OWN_FIELD) | + (1 << NETSEC_TX_SHIFT_PT_FIELD) | + (NETSEC_RING_GMAC << NETSEC_TX_SHIFT_TDRID_FIELD) | + (1 << NETSEC_TX_SHIFT_FS_FIELD) | + (1 << NETSEC_TX_LAST) | + (1 << NETSEC_TX_SHIFT_TRS_FIELD) | + (1 << NETSEC_TX_SHIFT_LD_FIELD); + + de->data_buf_addr_up = upper_32_bits((dma_addr_t)addr); + de->data_buf_addr_lw = lower_32_bits((dma_addr_t)addr); + de->buf_len_info = len; + de->attr = attr; + dmb(); + netsec_cache_flush((uintptr_t)de, sizeof(*de)); +} + +static int netsec_get_phy_reg(struct netsec_priv *priv, + int phy_addr, int reg_addr) +{ + u32 data; + int ret; + + if (phy_addr != 7) + return -EINVAL; + + if (netsec_set_mac_reg(priv, GMAC_REG_GAR, NETSEC_GMAC_GAR_REG_GB | + phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | + reg_addr << NETSEC_GMAC_GAR_REG_SHIFT_GR | + (netsec_clk_type(priv->freq) << + GMAC_REG_SHIFT_CR_GAR))) + return -ETIMEDOUT; + + ret = netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, + NETSEC_GMAC_GAR_REG_GB); + if (ret) + return ret; + + ret = netsec_get_mac_reg(priv, GMAC_REG_GDR, &data); + if (ret) + return ret; + + return data; +} + +static int netsec_set_phy_reg(struct netsec_priv *priv, + int phy_addr, int reg_addr, u16 val) +{ + int ret; + + if (phy_addr != 7) + return -EINVAL; + if (netsec_set_mac_reg(priv, GMAC_REG_GDR, val)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_GAR, + phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | + reg_addr << NETSEC_GMAC_GAR_REG_SHIFT_GR | + NETSEC_GMAC_GAR_REG_GW | NETSEC_GMAC_GAR_REG_GB | + (netsec_clk_type(priv->freq) << + GMAC_REG_SHIFT_CR_GAR))) + return -ETIMEDOUT; + + ret = netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, + NETSEC_GMAC_GAR_REG_GB); + + /* Developerbox implements RTL8211E PHY and there is + * a compatibility problem with F_GMAC4. + * RTL8211E expects MDC clock must be kept toggling for several + * clock cycle with MDIO high before entering the IDLE state. + * To meet this requirement, netsec driver needs to issue dummy + * read(e.g. read PHYID1(offset 0x2) register) right after write. + */ + netsec_get_phy_reg(priv, phy_addr, MII_PHYSID1); + + return ret; +} + +static int netsec_mac_update_to_phy_state(struct netsec_priv *priv) +{ + struct phy_device *phydev = priv->phydev; + u32 value = 0; + + value = phydev->duplex ? NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON : + NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON; + + if (phydev->speed != SPEED_1000) + value |= NETSEC_MCR_PS; + + if (phydev->interface != PHY_INTERFACE_MODE_GMII && + phydev->speed == SPEED_100) + value |= NETSEC_GMAC_MCR_REG_FES; + + value |= NETSEC_GMAC_MCR_REG_CST | NETSEC_GMAC_MCR_REG_JE; + + if (phy_interface_is_rgmii(phydev)) + value |= NETSEC_GMAC_MCR_REG_IBN; + + if (netsec_set_mac_reg(priv, GMAC_REG_MCR, value)) + return -ETIMEDOUT; + + return 0; +} + +static int netsec_start_gmac(struct netsec_priv *priv) +{ + u32 value = 0; + int ret; + + if (priv->max_speed != SPEED_1000) + value = (NETSEC_GMAC_MCR_REG_CST | + NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON); + + if (netsec_set_mac_reg(priv, GMAC_REG_MCR, value)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_BMR, + NETSEC_GMAC_BMR_REG_RESET)) + return -ETIMEDOUT; + + /* Wait soft reset */ + mdelay(5); + + ret = netsec_get_mac_reg(priv, GMAC_REG_BMR, &value); + if (ret) + return ret; + + if (value & NETSEC_GMAC_BMR_REG_SWR) + return -EAGAIN; + + netsec_write_reg(priv, MAC_REG_DESC_SOFT_RST, 1); + if (netsec_wait_while_busy(priv, MAC_REG_DESC_SOFT_RST, 1)) + return -ETIMEDOUT; + + netsec_write_reg(priv, MAC_REG_DESC_INIT, 1); + if (netsec_wait_while_busy(priv, MAC_REG_DESC_INIT, 1)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_BMR, + NETSEC_GMAC_BMR_REG_COMMON)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_RDLAR, + NETSEC_GMAC_RDLAR_REG_COMMON)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_TDLAR, + NETSEC_GMAC_TDLAR_REG_COMMON)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_MFFR, 0x80000001)) + return -ETIMEDOUT; + + ret = netsec_mac_update_to_phy_state(priv); + if (ret) + return ret; + + ret = netsec_get_mac_reg(priv, GMAC_REG_OMR, &value); + if (ret) + return ret; + + value |= NETSEC_GMAC_OMR_REG_SR; + value |= NETSEC_GMAC_OMR_REG_ST; + + netsec_write_reg(priv, NETSEC_REG_NRM_RX_INTEN_CLR, ~0); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_INTEN_CLR, ~0); + + if (netsec_set_mac_reg(priv, GMAC_REG_OMR, value)) + return -ETIMEDOUT; + + return 0; +} + +static int netsec_stop_gmac(struct netsec_priv *priv) +{ + u32 value; + int ret; + + ret = netsec_get_mac_reg(priv, GMAC_REG_OMR, &value); + if (ret) + return ret; + value &= ~NETSEC_GMAC_OMR_REG_SR; + value &= ~NETSEC_GMAC_OMR_REG_ST; + + /* disable all interrupts */ + netsec_write_reg(priv, NETSEC_REG_NRM_RX_INTEN_CLR, ~0); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_INTEN_CLR, ~0); + + return netsec_set_mac_reg(priv, GMAC_REG_OMR, value); +} + +static void netsec_spi_read(char *buf, loff_t len, loff_t offset) +{ + struct udevice *new; + struct spi_flash *flash; + + spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE, &new); + flash = dev_get_uclass_priv(new); + + spi_flash_read(flash, offset, len, buf); +} + +static int netsec_read_rom_hwaddr(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_plat(dev); + char macp[NOR_BLOCK]; + + netsec_spi_read(macp, sizeof(macp), priv->eeprom_base); + + pdata->enetaddr[0] = readb(macp + 3); + pdata->enetaddr[1] = readb(macp + 2); + pdata->enetaddr[2] = readb(macp + 1); + pdata->enetaddr[3] = readb(macp + 0); + pdata->enetaddr[4] = readb(macp + 7); + pdata->enetaddr[5] = readb(macp + 6); + return 0; +} + +static int netsec_send(struct udevice *dev, void *packet, int length) +{ + struct netsec_priv *priv = dev_get_priv(dev); + u32 val, tout; + + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_STATUS); + netsec_cache_flush((uintptr_t)packet, length); + netsec_set_tx_de(priv, packet, length); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_PKTCNT, 1); /* submit another tx */ + + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_PKTCNT); + + tout = 10000; + do { + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_DONE_PKTCNT); + udelay(2); + } while (--tout && !val); + + if (!tout) { + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_PKTCNT); + pr_err("%s: ETIMEDOUT: %dpackets\n", __func__, val); + return -ETIMEDOUT; + } + + return 0; +} + +static int netsec_free_packet(struct udevice *dev, uchar *packet, int length) +{ + struct netsec_priv *priv = dev_get_priv(dev); + + netsec_set_rx_de(priv, priv->rxat, net_rx_packets[priv->rxat]); + + priv->rxat++; + if (priv->rxat == PKTBUFSRX) + priv->rxat = 0; + + return 0; +} + +static int netsec_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct netsec_priv *priv = dev_get_priv(dev); + int idx = priv->rxat; + uchar *ptr = net_rx_packets[idx]; + struct netsec_de *de = &priv->rxde[idx]; + int length = 0; + + netsec_cache_invalidate((uintptr_t)de, sizeof(*de)); + + if (de->attr & (1U << NETSEC_RX_PKT_OWN_FIELD)) + return -EAGAIN; + + length = de->buf_len_info >> 16; + + /* invalidate after DMA is done */ + netsec_cache_invalidate((uintptr_t)ptr, length); + *packetp = ptr; + + return length; +} + +static int _netsec_get_phy_reg(struct mii_dev *bus, + int phy_addr, int devad, int reg_addr) +{ + return netsec_get_phy_reg(bus->priv, phy_addr, reg_addr); +} + +static int _netsec_set_phy_reg(struct mii_dev *bus, + int phy_addr, int devad, int reg_addr, u16 val) +{ + return netsec_set_phy_reg(bus->priv, phy_addr, reg_addr, val); +} + +static int netsec_mdiobus_init(struct netsec_priv *priv, const char *name) +{ + struct mii_dev *bus = mdio_alloc(); + + if (!bus) + return -ENOMEM; + + bus->read = _netsec_get_phy_reg; + bus->write = _netsec_set_phy_reg; + snprintf(bus->name, sizeof(bus->name), "%s", name); + bus->priv = priv; + + return mdio_register(bus); +} + +static int netsec_phy_init(struct netsec_priv *priv, void *dev) +{ + struct phy_device *phydev; + int ret; + + phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode); + + phydev->supported &= PHY_GBIT_FEATURES; + if (priv->max_speed) { + ret = phy_set_supported(phydev, priv->max_speed); + if (ret) + return ret; + } + phydev->advertising = phydev->supported; + + priv->phydev = phydev; + phy_config(phydev); + + return 0; +} + +static int netsec_netdev_load_ucode_region(struct netsec_priv *priv, u32 reg, + u32 addr_h, u32 addr_l, u32 size) +{ + u64 base = ((u64)addr_h << 32 | addr_l) - EERPROM_MAP_OFFSET; + + while (size > 0) { + char buf[NOR_BLOCK]; + u32 *ucode = (u32 *)buf; + u64 off; + int i; + + off = base % NOR_BLOCK; + base -= off; + netsec_spi_read(buf, sizeof(buf), base); + + for (i = off / 4; i < sizeof(buf) / 4 && size > 0; i++, size--) + netsec_write_reg(priv, reg, ucode[i]); + base += NOR_BLOCK; + } + + return 0; +} + +static int netsec_netdev_load_microcode(struct netsec_priv *priv) +{ + u32 addr_h, addr_l, size; + char buf[NOR_BLOCK]; + u32 *ucinfo = (u32 *)buf; + int err; + + netsec_spi_read(buf, sizeof(buf), priv->eeprom_base); + + addr_h = ucinfo[NETSEC_EEPROM_HM_ME_ADDRESS_H >> 2]; + addr_l = ucinfo[NETSEC_EEPROM_HM_ME_ADDRESS_L >> 2]; + size = ucinfo[NETSEC_EEPROM_HM_ME_SIZE >> 2]; + + err = netsec_netdev_load_ucode_region(priv, NETSEC_REG_DMAC_HM_CMD_BUF, + addr_h, addr_l, size); + if (err) + return err; + + addr_h = ucinfo[NETSEC_EEPROM_MH_ME_ADDRESS_H >> 2]; + addr_l = ucinfo[NETSEC_EEPROM_MH_ME_ADDRESS_L >> 2]; + size = ucinfo[NETSEC_EEPROM_MH_ME_SIZE >> 2]; + + err = netsec_netdev_load_ucode_region(priv, NETSEC_REG_DMAC_MH_CMD_BUF, + addr_h, addr_l, size); + if (err) + return err; + + addr_h = 0; + addr_l = ucinfo[NETSEC_EEPROM_PKT_ME_ADDRESS >> 2]; + size = ucinfo[NETSEC_EEPROM_PKT_ME_SIZE >> 2]; + + err = netsec_netdev_load_ucode_region(priv, NETSEC_REG_PKT_CMD_BUF, + addr_h, addr_l, size); + if (err) + return err; + + return 0; +} + +void netsec_pre_init_microengine(struct netsec_priv *priv) +{ + u32 data; + + /* Remove dormant settings */ + data = netsec_get_phy_reg(priv, priv->phy_addr, MII_BMCR); + data &= ~BMCR_PDOWN; + data |= BMCR_ISOLATE; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); + + /* Put phy in loopback mode to guarantee RXCLK input */ + data |= BMCR_LOOPBACK; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); +} + +void netsec_post_init_microengine(struct netsec_priv *priv) +{ + u32 data; + + /* Get phy back to normal operation */ + data = netsec_get_phy_reg(priv, priv->phy_addr, MII_BMCR); + data &= ~BMCR_LOOPBACK; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); + + /* Apply software reset */ + data |= BMCR_RESET; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); +} + +static int netsec_reset_hardware(struct netsec_priv *priv, bool load_ucode) +{ + u32 value; + int err; + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 0x24); + + /* stop DMA engines */ + if (!netsec_read_reg(priv, NETSEC_REG_ADDR_DIS_CORE)) { + netsec_write_reg(priv, NETSEC_REG_DMA_HM_CTRL, + NETSEC_DMA_CTRL_REG_STOP); + netsec_write_reg(priv, NETSEC_REG_DMA_MH_CTRL, + NETSEC_DMA_CTRL_REG_STOP); + + value = 100; + while (netsec_read_reg(priv, NETSEC_REG_DMA_HM_CTRL) & + NETSEC_DMA_CTRL_REG_STOP) { + udelay(1000); + if (--value == 0) { + pr_err("%s:%d timeout!\n", __func__, __LINE__); + break; + } + } + + value = 100; + while (netsec_read_reg(priv, NETSEC_REG_DMA_MH_CTRL) & + NETSEC_DMA_CTRL_REG_STOP) { + udelay(1000); + if (--value == 0) { + pr_err("%s:%d timeout!\n", __func__, __LINE__); + break; + } + } + } + + netsec_set_mac_reg(priv, GMAC_REG_BMR, NETSEC_GMAC_BMR_REG_RESET); + + netsec_write_reg(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RESET); + netsec_write_reg(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RUN); + netsec_write_reg(priv, NETSEC_REG_COM_INIT, NETSEC_COM_INIT_REG_ALL); + + value = 100; + while (netsec_read_reg(priv, NETSEC_REG_COM_INIT) != 0) { + udelay(1000); + if (--value == 0) { + pr_err("%s:%d COM_INIT timeout!\n", __func__, __LINE__); + break; + } + } + + /* MAC desc init */ + netsec_write_reg(priv, MAC_REG_DESC_INIT, 1); + netsec_wait_while_busy(priv, MAC_REG_DESC_INIT, 1); + /* set MAC_INTF_SEL */ + netsec_write_reg(priv, MAC_REG_INTF_SEL, 1); + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 1 << 5); + + /* set desc_start addr */ + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->rxde)); + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->rxde)); + + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->txde)); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->txde)); + + /* set normal tx dring ring config */ + netsec_write_reg(priv, NETSEC_REG_NRM_TX_CONFIG, + 1 << NETSEC_REG_DESC_ENDIAN); + netsec_write_reg(priv, NETSEC_REG_NRM_RX_CONFIG, + 1 << NETSEC_REG_DESC_ENDIAN); + + if (load_ucode) { + err = netsec_netdev_load_microcode(priv); + if (err) { + pr_err("%s: failed to load microcode (%d)\n", + __func__, err); + return err; + } + } + + /* set desc_start addr */ + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->rxde)); + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->rxde)); + + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->txde)); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->txde)); + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 1 << 5); + + /* start DMA engines */ + netsec_write_reg(priv, NETSEC_REG_DMA_TMR_CTRL, priv->freq / 1000000 - 1); + + netsec_pre_init_microengine(priv); + + netsec_write_reg(priv, NETSEC_REG_ADDR_DIS_CORE, 0); + + mdelay(100); + + if (!(netsec_read_reg(priv, NETSEC_REG_TOP_STATUS) & + NETSEC_TOP_IRQ_REG_ME_START)) { + pr_err("microengine start failed\n"); + return -ENXIO; + } + + netsec_post_init_microengine(priv); + + /* clear microcode load end status */ + netsec_write_reg(priv, NETSEC_REG_TOP_STATUS, + NETSEC_TOP_IRQ_REG_ME_START); + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 1 << 5); + + value = netsec_read_reg(priv, NETSEC_REG_PKT_CTRL); + value |= NETSEC_PKT_CTRL_REG_MODE_NRM; + /* change to normal mode */ + netsec_write_reg(priv, NETSEC_REG_DMA_MH_CTRL, MH_CTRL__MODE_TRANS); + netsec_write_reg(priv, NETSEC_REG_PKT_CTRL, value); + + value = 100; + while ((netsec_read_reg(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS) & + NETSEC_MODE_TRANS_COMP_IRQ_T2N) == 0) { + udelay(1000); + if (--value == 0) { + value = netsec_read_reg(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS); + pr_err("%s:%d timeout! val=%x\n", __func__, __LINE__, value); + break; + } + } + + /* clear any pending EMPTY/ERR irq status */ + netsec_write_reg(priv, NETSEC_REG_NRM_TX_STATUS, ~0); + + /* Disable TX & RX intr */ + netsec_write_reg(priv, NETSEC_REG_INTEN_CLR, ~0); + + return 0; +} + +static void netsec_stop(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + + netsec_write_reg(priv, NETSEC_REG_ADDR_DIS_CORE, 7); + netsec_stop_gmac(priv); + phy_shutdown(priv->phydev); + netsec_reset_hardware(priv, false); +} + +static int netsec_start(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + int i; + + phy_startup(priv->phydev); + netsec_start_gmac(priv); + + priv->rxat = 0; + for (i = 0; i < PKTBUFSRX; i++) + netsec_set_rx_de(priv, i, net_rx_packets[i]); + + return 0; +} + +static int netsec_of_to_plat(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + struct netsec_priv *priv = dev_get_priv(dev); + struct ofnode_phandle_args phandle_args; + const char *phy_mode; + + pdata->iobase = dev_read_addr_index(dev, 0); + priv->eeprom_base = dev_read_addr_index(dev, 1) - EERPROM_MAP_OFFSET; + + pdata->phy_interface = -1; + phy_mode = dev_read_prop(dev, "phy-mode", NULL); + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { + pr_err("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + + if (!dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args)) + priv->phy_addr = ofnode_read_u32_default(phandle_args.node, "reg", 7); + else + priv->phy_addr = 7; + + pdata->max_speed = dev_read_u32_default(dev, "max-speed", SPEED_1000); + + priv->ioaddr = pdata->iobase; + priv->phy_mode = pdata->phy_interface; + priv->max_speed = pdata->max_speed; + priv->freq = 250000000UL; + + return 0; +} + +#define SMMU_SCR0_SHCFG_INNER (0x2 << 22) +#define SMMU_SCR0_MTCFG (0x1 << 20) +#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB (0xf << 16) + +static int netsec_probe(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + int ret; + + writel(SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB, + (phys_addr_t)0x52E00000); + + netsec_reset_hardware(priv, true); + + ret = netsec_mdiobus_init(priv, dev->name); + if (ret) { + pr_err("Failed to initialize mdiobus: %d\n", ret); + return ret; + } + + priv->bus = miiphy_get_dev_by_name(dev->name); + + ret = netsec_phy_init(priv, dev); + if (ret) { + pr_err("Failed to initialize phy: %d\n", ret); + goto out_mdiobus_release; + } + + return 0; +out_mdiobus_release: + mdio_unregister(priv->bus); + mdio_free(priv->bus); + return ret; +} + +static int netsec_remove(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + + free(priv->phydev); + mdio_unregister(priv->bus); + mdio_free(priv->bus); + + return 0; +} + +static const struct eth_ops netsec_ops = { + .start = netsec_start, + .stop = netsec_stop, + .send = netsec_send, + .recv = netsec_recv, + .free_pkt = netsec_free_packet, + .read_rom_hwaddr = netsec_read_rom_hwaddr, +}; + +static const struct udevice_id netsec_ids[] = { + { + .compatible = "socionext,synquacer-netsec", + }, + {} +}; + +U_BOOT_DRIVER(ave) = { + .name = "synquacer_netsec", + .id = UCLASS_ETH, + .of_match = netsec_ids, + .probe = netsec_probe, + .remove = netsec_remove, + .of_to_plat = netsec_of_to_plat, + .ops = &netsec_ops, + .priv_auto = sizeof(struct netsec_priv), + .plat_auto = sizeof(struct eth_pdata), +}; From 02036d90ec10510c8218aad463a332a50c3528c4 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 3 Jun 2021 07:52:41 +0000 Subject: [PATCH 114/156] net: sun8i-emac: fix MDIO frequency Commit 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") leads to network failure on the OrangePi PC. => dhcp sun8i_emac_eth_start: Timeout According to the commit message the change of the MDIO frequency is only required for external PHYs. Fixes: 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") Signed-off-by: Heinrich Schuchardt --- drivers/net/sun8i_emac.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 5a1b38bf80f..d7553fe1634 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) * The EMAC clock is either 200 or 300 MHz, so we need a divider * of 128 to get the MDIO frequency below the required 2.5 MHz. */ - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT; + if (!priv->use_internal_phy) + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << + MDIO_CMD_MII_CLK_CSR_SHIFT; mii_cmd |= MDIO_CMD_MII_BUSY; @@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg, * The EMAC clock is either 200 or 300 MHz, so we need a divider * of 128 to get the MDIO frequency below the required 2.5 MHz. */ - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT; + if (!priv->use_internal_phy) + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << + MDIO_CMD_MII_CLK_CSR_SHIFT; mii_cmd |= MDIO_CMD_MII_WRITE; mii_cmd |= MDIO_CMD_MII_BUSY; From 6e424b4acac0dba486a97ecd80a78aa0fea43683 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Wed, 24 Feb 2021 17:30:44 +0100 Subject: [PATCH 115/156] net: use a more deterministic approach to get the active ethernet device If the environment variable "ethact" is not set, the first device in the uclass is returned. This depends on the probing order of the ethernet devices. Moreover it is not not configurable at all. Try to return the ethernet device with sequence id 0 first which then can be configured by the aliases in a device tree. Fall back to the old mechanism in case of an error. Signed-off-by: Michael Walle Reviewed-by: Ramon Fried --- net/eth-uclass.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 34ca731d1e3..0b4260dc5be 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -69,8 +69,11 @@ void eth_set_current_to_next(void) /* * Typically this will simply return the active device. * In the case where the most recent active device was unset, this will attempt - * to return the first device. If that device doesn't exist or fails to probe, - * this function will return NULL. + * to return the device with sequence id 0 (which can be configured by the + * device tree). If this fails, fall back to just getting the first device. + * The latter is non-deterministic and depends on the order of the probing. + * If that device doesn't exist or fails to probe, this function will return + * NULL. */ struct udevice *eth_get_dev(void) { @@ -80,9 +83,13 @@ struct udevice *eth_get_dev(void) if (!uc_priv) return NULL; - if (!uc_priv->current) - eth_errno = uclass_first_device(UCLASS_ETH, - &uc_priv->current); + if (!uc_priv->current) { + eth_errno = uclass_get_device_by_seq(UCLASS_ETH, 0, + &uc_priv->current); + if (eth_errno) + eth_errno = uclass_first_device(UCLASS_ETH, + &uc_priv->current); + } return uc_priv->current; } From 82a3c9ef20d43d97416589854b4bbcb4c2450c24 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Thu, 25 Feb 2021 16:51:11 +0100 Subject: [PATCH 116/156] net: use the same alias stem for ethernet as linux Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is from the linux tree: $ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l 0 $ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l 633 In u-boot device trees both prefixes are used. Until recently the only user of the ethernet alias was the sandbox test device tree. This changed with commit fc054d563bfb ("net: Introduce DSA class for Ethernet switches"). There, the MAC addresses are inherited based on the devices sequence IDs which is in turn given by the device tree. Before there are more users in u-boot and both worlds will differ even more, rename the alias prefix to "ethernet" to match the linux ones. Also adapt the test cases and rename any old aliases in the u-boot device trees. Cc: David Wu Signed-off-by: Michael Walle Reviewed-by: Fabio Estevam Reviewed-by: Simon Glass --- arch/arm/dts/fsl-ls1028a-rdb.dts | 12 ++++++------ arch/sandbox/dts/test.dts | 10 +++++----- net/eth-uclass.c | 4 ++-- test/dm/ofnode.c | 2 +- test/dm/test-fdt.c | 2 +- 5 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts index 3432fca3526..82a8c0a0cde 100644 --- a/arch/arm/dts/fsl-ls1028a-rdb.dts +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -15,12 +15,12 @@ compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; aliases { spi0 = &fspi; - eth0 = &enetc0; - eth1 = &enetc2; - eth2 = &mscc_felix_port0; - eth3 = &mscc_felix_port1; - eth4 = &mscc_felix_port2; - eth5 = &mscc_felix_port3; + ethernet0 = &enetc0; + ethernet1 = &enetc2; + ethernet2 = &mscc_felix_port0; + ethernet3 = &mscc_felix_port1; + ethernet4 = &mscc_felix_port2; + ethernet5 = &mscc_felix_port3; }; }; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 5ca3bc502a4..8e7eaf2d150 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -14,11 +14,11 @@ aliases { console = &uart0; - eth0 = "/eth@10002000"; - eth2 = &swp_0; - eth3 = ð_3; - eth4 = &dsa_eth0; - eth5 = ð_5; + ethernet0 = "/eth@10002000"; + ethernet2 = &swp_0; + ethernet3 = ð_3; + ethernet4 = &dsa_eth0; + ethernet5 = ð_5; gpio1 = &gpio_a; gpio2 = &gpio_b; gpio3 = &gpio_c; diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 0b4260dc5be..5146bd6666c 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -605,8 +605,8 @@ static int eth_pre_remove(struct udevice *dev) return 0; } -UCLASS_DRIVER(eth) = { - .name = "eth", +UCLASS_DRIVER(ethernet) = { + .name = "ethernet", .id = UCLASS_ETH, .post_bind = eth_post_bind, .pre_unbind = eth_pre_unbind, diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index e0b525eeb18..de895773b55 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -213,7 +213,7 @@ static int dm_test_ofnode_read_aliases(struct unit_test_state *uts) ofnode node; int size; - node = ofnode_get_aliases_node("eth3"); + node = ofnode_get_aliases_node("ethernet3"); ut_assert(ofnode_valid(node)); ut_asserteq_str("sbe5", ofnode_get_name(node)); diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index d273e218530..8866d4d959d 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -183,7 +183,7 @@ static int dm_test_alias_highest_id(struct unit_test_state *uts) { int ret; - ret = dev_read_alias_highest_id("eth"); + ret = dev_read_alias_highest_id("ethernet"); ut_asserteq(5, ret); ret = dev_read_alias_highest_id("gpio"); From 75efe7dc996ddb9835590b1a8970f19b5c4b1ade Mon Sep 17 00:00:00 2001 From: Dimitri John Ledkov Date: Wed, 21 Apr 2021 12:42:01 +0100 Subject: [PATCH 117/156] cmd: pxe_utils: sysboot: fix crash if either board or soc are not set. If the environment does not have "soc" or "board" set, and fdtdir option is specified in extlinux.conf, the bootloader will crash whilst dereferencing a null pointer. Add a guard against null soc or board. Fixes a crash of qemu-riscv64_smode configuration, which does not have CONFIG_SYS_SOC defined. Signed-off-by: Dimitri John Ledkov Reviewed-by: Ramon Fried --- cmd/pxe_utils.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/cmd/pxe_utils.c b/cmd/pxe_utils.c index 71c5af4c25d..9a30629e26e 100644 --- a/cmd/pxe_utils.c +++ b/cmd/pxe_utils.c @@ -587,6 +587,14 @@ static int label_boot(struct cmd_tbl *cmdtp, struct pxe_label *label) f2 = "-"; f3 = env_get("board"); f4 = ".dtb"; + if (!f1) { + f1 = ""; + f2 = ""; + } + if (!f3) { + f2 = ""; + f3 = ""; + } } len = strlen(label->fdtdir); From 54c321f9deeba309989f0828e4d0427cbfbefcd3 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Thu, 17 Jun 2021 16:08:54 -0700 Subject: [PATCH 118/156] net: octeontx: smi: use dt live tree API clean up octeontx_smi_probe by using the live-tree API. Signed-off-by: Tim Harvey Reviewed-by: Stefan Roese Reviewed-by: Ramon Fried --- drivers/net/octeontx/smi.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/net/octeontx/smi.c b/drivers/net/octeontx/smi.c index 27f4423c6ac..d70fa820c7b 100644 --- a/drivers/net/octeontx/smi.c +++ b/drivers/net/octeontx/smi.c @@ -314,10 +314,12 @@ read_error: int octeontx_smi_probe(struct udevice *dev) { - int ret, subnode, cnt = 0, node = dev_ofnode(dev).of_offset; - struct mii_dev *bus; - struct octeontx_smi_priv *priv; pci_dev_t bdf = dm_pci_get_bdf(dev); + struct octeontx_smi_priv *priv; + struct mii_dev *bus; + int ret, cnt = 0; + ofnode subnode; + u64 baseaddr; debug("SMI PCI device: %x\n", bdf); if (!dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM)) { @@ -325,14 +327,12 @@ int octeontx_smi_probe(struct udevice *dev) return -1; } - node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, - "cavium,thunder-8890-mdio-nexus"); - fdt_for_each_subnode(subnode, gd->fdt_blob, node) { - ret = fdt_node_check_compatible(gd->fdt_blob, subnode, - "cavium,thunder-8890-mdio"); - if (ret) + dev_for_each_subnode(subnode, dev) { + if (!ofnode_device_is_compatible(subnode, + "cavium,thunder-8890-mdio")) + continue; + if (ofnode_read_u64(subnode, "reg", &baseaddr)) continue; - bus = mdio_alloc(); priv = malloc(sizeof(*priv)); if (!bus || !priv) { @@ -347,9 +347,7 @@ int octeontx_smi_probe(struct udevice *dev) bus->priv = priv; priv->mode = CLAUSE22; - priv->baseaddr = (void __iomem *)fdtdec_get_addr(gd->fdt_blob, - subnode, - "reg"); + priv->baseaddr = (void __iomem *)baseaddr; debug("mdio base addr %p\n", priv->baseaddr); /* use given name or generate its own unique name */ From 31b3829f746770973c7425b0bdfc5e3efceb2a49 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 17 Jun 2021 12:57:29 -0300 Subject: [PATCH 119/156] o4-imx-nano: Fix dtc warnings Remove the LED unit addresses and reg properties to fix the following dtc build warnings: arch/arm/dts/o4-imx-nano.dtb: Warning (reg_format): /leds/led@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) ... arch/arm/dts/o4-imx-nano.dtb: Warning (avoid_default_addr_size): /leds/led@0: Relying on default #address-cells value Reported-by: Tom Rini Signed-off-by: Fabio Estevam Reviewed-by: Oleh Kravchenko --- arch/arm/dts/o4-imx-nano.dts | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/arch/arm/dts/o4-imx-nano.dts b/arch/arm/dts/o4-imx-nano.dts index d1785b7dc70..54d32f9dd47 100644 --- a/arch/arm/dts/o4-imx-nano.dts +++ b/arch/arm/dts/o4-imx-nano.dts @@ -24,40 +24,34 @@ leds { compatible = "gpio-leds"; - led@0 { + led0 { color = ; gpios = <&pcf8574a 0 GPIO_ACTIVE_LOW>; - reg = <0>; }; - led@1 { + led1{ color = ; gpios = <&pcf8574a 1 GPIO_ACTIVE_LOW>; - reg = <1>; }; - led@2 { + led2 { gpios = <&pcf8574a 2 GPIO_ACTIVE_LOW>; color = ; - reg = <2>; }; - led@3 { + led3 { color = ; gpios = <&pcf8574a 3 GPIO_ACTIVE_LOW>; - reg = <3>; }; - led@4 { + led4{ color = ; gpios = <&pcf8574a 4 GPIO_ACTIVE_LOW>; - reg = <4>; }; - led@5 { + led5 { color = ; gpios = <&pcf8574a 5 GPIO_ACTIVE_LOW>; - reg = <5>; }; }; From 06f4e426f895bb8554f70928d13a092b05a1fedd Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Sat, 1 May 2021 22:23:05 +0200 Subject: [PATCH 120/156] imx8mp: configs: enable distro default features imx8mp ekv has been switched to use distro boot commands, but had no correct options enabled to support sysboot. According to the README.distro, sysboot is consindered to be a recommended way of using distro boot commands, it required default distro features to be enabled instead of only those that are relevant to the boot script. Replace the boot script specific options in the config to a default distro option. Signed-off-by: Andrey Zhizhikin Cc: Peng Fan Fixes: 9b162b1d1f ("imx8mp: configs: add support for distro boot commands") Reviewed-by: Fabio Estevam --- configs/imx8mp_evk_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 11d62837bc6..79b4a7b2470 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -45,7 +46,6 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_PART=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -55,7 +55,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y From 52ce6a61c1fc74b62be7f57ba83c1b43181b1f91 Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Sat, 1 May 2021 22:23:04 +0200 Subject: [PATCH 121/156] imx8mm: configs: enable distro default features imx8mm ekv has been switched to use distro boot commands, but had no correct options enabled to support sysboot. According to the README.distro, sysboot is consindered to be a recommended way of using distro boot commands, it required default distro features to be enabled instead of only those that are relevant to the boot script. Replace the boot script specific options in the config to a default distro option. Signed-off-by: Andrey Zhizhikin Cc: Peng Fan Fixes: 2df8930bf9 ("imx8mm: configs: add support for distro boot commands") Reviewed-by: Fabio Estevam --- configs/imx8mm_evk_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 200bf554e0a..1ac48167b56 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -40,7 +41,6 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_PART=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -50,7 +50,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y From 3a3672cc3769a43750dd9fea90ed7a7900cb227f Mon Sep 17 00:00:00 2001 From: Weijie Gao Date: Tue, 20 Apr 2021 16:37:10 +0800 Subject: [PATCH 122/156] mmc: mtk-sd: increase the minimum bus frequency With a 48MHz input clock, the lowest bus frequency can be as low as 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause the mmc framework take seconds to finish the initialization. Limiting the minimum bus frequency to a slightly higher value can solve the issue without any side effects. Reviewed-by: Jaehoon Chung Signed-off-by: Weijie Gao --- drivers/mmc/mtk-sd.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 48a764be82a..8599f095bcd 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -232,6 +232,8 @@ #define SCLK_CYCLES_SHIFT 20 +#define MIN_BUS_CLK 200000 + #define CMD_INTS_MASK \ (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO) @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev) else cfg->f_min = host->src_clk_freq / (4 * 4095); + if (cfg->f_min < MIN_BUS_CLK) + cfg->f_min = MIN_BUS_CLK; + if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq) cfg->f_max = host->src_clk_freq; From 8cb9d3ed3a6402f984356988c581546866acf0da Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Mon, 26 Apr 2021 11:35:05 +0800 Subject: [PATCH 123/156] mmc: dw_mmc: Fixes data read when receiving DTO interrupt in FIFO mode The data read is not working when using FIFO mode. From DesignWare databook, when a Data_Transfer_Over (DTO) interrupt is received, the software should read the remaining data from FIFO. Add DTO interrupt checking on data read path and clear interrupts before start reading from FIFO. So, it doesn't clear the next pending interrupts unintentionally after read from FIFO. Signed-off-by: Ley Foon Tan Reviewed-by: Jaehoon Chung --- drivers/mmc/dw_mmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 7c8a312fa71..a949dad5740 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -166,7 +166,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) if (host->fifo_mode && size) { len = 0; if (data->flags == MMC_DATA_READ && - (mask & DWMCI_INTMSK_RXDR)) { + (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) { + dwmci_writel(host, DWMCI_RINTSTS, + DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO); while (size) { ret = dwmci_fifo_ready(host, DWMCI_FIFO_EMPTY, @@ -182,8 +184,6 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) dwmci_readl(host, DWMCI_DATA); size = size > len ? (size - len) : 0; } - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_RXDR); } else if (data->flags == MMC_DATA_WRITE && (mask & DWMCI_INTMSK_TXDR)) { while (size) { From 1925e65706b84ec83b99e6335d9a36d8644c9085 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Mon, 26 Apr 2021 13:17:46 +0800 Subject: [PATCH 124/156] mmc: dwmmc: socfpga: Get "fifo-mode" property from DT Add FIFO mode support for SoCFPGA dwmmc, read "fifo-mode" property from DT. Signed-off-by: Ley Foon Tan Reviewed-by: Jaehoon Chung --- drivers/mmc/socfpga_dw_mmc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index d6d2d572141..be3d8bfb3d7 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -144,6 +144,8 @@ static int socfpga_dwmmc_of_to_plat(struct udevice *dev) "smplsel", 0); host->priv = priv; + host->fifo_mode = dev_read_bool(dev, "fifo-mode"); + return 0; } From 5c2beda545dde4d27c0e893e97c74740ff27ff2f Mon Sep 17 00:00:00 2001 From: Reuben Dowle Date: Fri, 14 May 2021 10:15:43 +1200 Subject: [PATCH 125/156] mmc: Update environment variable with active partition This patch allows uboot scripts make choices about where to boot from based on the active mmc boot partition. This allows having two copies of kernel, filesystems etc, and choosing which to boot from based off of the active bootloader partition. Signed-off-by: Reuben Dowle Reviewed-by: Jaehoon Chung --- cmd/mmc.c | 14 +++++++++----- doc/usage/mmc.rst | 4 +++- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/cmd/mmc.c b/cmd/mmc.c index a10f1372043..b942576b58a 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -808,7 +808,7 @@ static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag, return CMD_RET_SUCCESS; } -static int mmc_partconf_print(struct mmc *mmc) +static int mmc_partconf_print(struct mmc *mmc, const char *varname) { u8 ack, access, part; @@ -821,6 +821,9 @@ static int mmc_partconf_print(struct mmc *mmc) ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config); part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); + if(varname) + env_set_hex(varname, part); + printf("EXT_CSD[179], PARTITION_CONFIG:\n" "BOOT_ACK: 0x%x\n" "BOOT_PARTITION_ENABLE: 0x%x\n" @@ -836,7 +839,7 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, struct mmc *mmc; u8 ack, part_num, access; - if (argc != 2 && argc != 5) + if (argc != 2 && argc != 3 && argc != 5) return CMD_RET_USAGE; dev = simple_strtoul(argv[1], NULL, 10); @@ -850,8 +853,8 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, return CMD_RET_FAILURE; } - if (argc == 2) - return mmc_partconf_print(mmc); + if (argc == 2 || argc == 3) + return mmc_partconf_print(mmc, argc == 3 ? argv[2] : NULL); ack = simple_strtoul(argv[2], NULL, 10); part_num = simple_strtoul(argv[3], NULL, 10); @@ -1061,8 +1064,9 @@ U_BOOT_CMD( " - Set the BOOT_BUS_WIDTH field of the specified device\n" "mmc bootpart-resize \n" " - Change sizes of boot and RPMB partitions of specified device\n" - "mmc partconf [boot_ack boot_partition partition_access]\n" + "mmc partconf [[varname] | [ ]]\n" " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n" + " If showing the bits, optionally store the boot_partition field into varname\n" "mmc rst-function \n" " - Change the RST_n_FUNCTION field of the specified device\n" " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n" diff --git a/doc/usage/mmc.rst b/doc/usage/mmc.rst index 458c7642c07..f20efe3d706 100644 --- a/doc/usage/mmc.rst +++ b/doc/usage/mmc.rst @@ -19,7 +19,7 @@ Synopsis mmc wp mmc bootbus mmc bootpart-resize - mmc partconf [boot_ack boot_partition partition_access] + mmc partconf [[varname] | [ ]] mmc rst-function Description @@ -92,6 +92,8 @@ The 'mmc bootbus' command sets the BOOT_BUS_WIDTH field. (*Refer to eMMC specifi The 'mmc partconf' command shows or changes PARTITION_CONFIG field. + varname + When showing the PARTITION_CONFIG, an optional environment variable to store the current boot_partition value into. boot_ack boot acknowledge value boot_partition From 2da2335a18a1b7123da08c325fdcd7960c0f0642 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Mon, 31 May 2021 08:31:49 +0900 Subject: [PATCH 126/156] mmc: fsl_esdhc_imx: use mmc_send_cmd instead of dm_mmc_send_cmd Use mmc_send_cmd instead of dm_mmc_send_cmd. It doesn't need to distinguish this function. Signed-off-by: Jaehoon Chung --- drivers/mmc/fsl_esdhc_imx.c | 2 +- drivers/mmc/mmc_private.h | 1 - include/mmc.h | 1 + 3 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 566ce046ae1..40c797c9907 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -865,7 +865,7 @@ static void esdhc_stop_tuning(struct mmc *mmc) cmd.cmdarg = 0; cmd.resp_type = MMC_RSP_R1b; - dm_mmc_send_cmd(mmc->dev, &cmd, NULL); + mmc_send_cmd(mmc, &cmd, NULL); } static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h index a0900e8cadd..a6cd250d293 100644 --- a/drivers/mmc/mmc_private.h +++ b/drivers/mmc/mmc_private.h @@ -12,7 +12,6 @@ #include -int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); int mmc_send_status(struct mmc *mmc, unsigned int *status); int mmc_poll_for_busy(struct mmc *mmc, int timeout); diff --git a/include/mmc.h b/include/mmc.h index 8600881705f..7f8ba2b017e 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -795,6 +795,7 @@ int mmc_initialize(struct bd_info *bis); int mmc_init_device(int num); int mmc_init(struct mmc *mmc); int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error); +int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \ CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ From d77d61ea1b21d93a5035719f82699bcbe8227364 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Mon, 31 May 2021 08:31:50 +0900 Subject: [PATCH 127/156] mmc: mmc-uclass: change to static about dm function Change to static about dm function. They can be used with wrapper functions. Signed-off-by: Jaehoon Chung --- drivers/mmc/mmc-uclass.c | 24 ++++++++++++------------ include/mmc.h | 12 ------------ 2 files changed, 12 insertions(+), 24 deletions(-) diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index d36aae367e7..579d7a1406b 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -15,7 +15,7 @@ #include #include "mmc_private.h" -int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt) +static int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt) { struct dm_mmc_ops *ops = mmc_get_ops(dev); struct mmc *mmc = mmc_get_mmc_dev(dev); @@ -31,7 +31,7 @@ int mmc_get_b_max(struct mmc *mmc, void *dst, lbaint_t blkcnt) return dm_mmc_get_b_max(mmc->dev, dst, blkcnt); } -int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, +static int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) { struct mmc *mmc = mmc_get_mmc_dev(dev); @@ -53,7 +53,7 @@ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) return dm_mmc_send_cmd(mmc->dev, cmd, data); } -int dm_mmc_set_ios(struct udevice *dev) +static int dm_mmc_set_ios(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -67,7 +67,7 @@ int mmc_set_ios(struct mmc *mmc) return dm_mmc_set_ios(mmc->dev); } -int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us) +static int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -81,7 +81,7 @@ int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us) return dm_mmc_wait_dat0(mmc->dev, state, timeout_us); } -int dm_mmc_get_wp(struct udevice *dev) +static int dm_mmc_get_wp(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -95,7 +95,7 @@ int mmc_getwp(struct mmc *mmc) return dm_mmc_get_wp(mmc->dev); } -int dm_mmc_get_cd(struct udevice *dev) +static int dm_mmc_get_cd(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -110,7 +110,7 @@ int mmc_getcd(struct mmc *mmc) } #ifdef MMC_SUPPORTS_TUNING -int dm_mmc_execute_tuning(struct udevice *dev, uint opcode) +static int dm_mmc_execute_tuning(struct udevice *dev, uint opcode) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -126,7 +126,7 @@ int mmc_execute_tuning(struct mmc *mmc, uint opcode) #endif #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) -int dm_mmc_set_enhanced_strobe(struct udevice *dev) +static int dm_mmc_set_enhanced_strobe(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -142,7 +142,7 @@ int mmc_set_enhanced_strobe(struct mmc *mmc) } #endif -int dm_mmc_hs400_prepare_ddr(struct udevice *dev) +static int dm_mmc_hs400_prepare_ddr(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -157,7 +157,7 @@ int mmc_hs400_prepare_ddr(struct mmc *mmc) return dm_mmc_hs400_prepare_ddr(mmc->dev); } -int dm_mmc_host_power_cycle(struct udevice *dev) +static int dm_mmc_host_power_cycle(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -171,7 +171,7 @@ int mmc_host_power_cycle(struct mmc *mmc) return dm_mmc_host_power_cycle(mmc->dev); } -int dm_mmc_deferred_probe(struct udevice *dev) +static int dm_mmc_deferred_probe(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -186,7 +186,7 @@ int mmc_deferred_probe(struct mmc *mmc) return dm_mmc_deferred_probe(mmc->dev); } -int dm_mmc_reinit(struct udevice *dev) +static int dm_mmc_reinit(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); diff --git a/include/mmc.h b/include/mmc.h index 7f8ba2b017e..6f943e78b74 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -539,18 +539,6 @@ struct dm_mmc_ops { #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) -int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data); -int dm_mmc_set_ios(struct udevice *dev); -int dm_mmc_get_cd(struct udevice *dev); -int dm_mmc_get_wp(struct udevice *dev); -int dm_mmc_execute_tuning(struct udevice *dev, uint opcode); -int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us); -int dm_mmc_host_power_cycle(struct udevice *dev); -int dm_mmc_deferred_probe(struct udevice *dev); -int dm_mmc_reinit(struct udevice *dev); -int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt); - /* Transition functions for compatibility */ int mmc_set_ios(struct mmc *mmc); int mmc_getcd(struct mmc *mmc); From f132aab403271ff00c0cfdd3af6504e87c7d0aaf Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 7 Jun 2021 17:40:09 -0300 Subject: [PATCH 128/156] Revert "mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output" This reverts commit 63756575b42b8b4fb3f59cbbf0cedf03331bc2d2. Since this commit a imx6qdl-pico board boots extremely slowly in both SPL as well as U-Boot proper. Fix this regression by reverting the offending commit for now. Signed-off-by: Fabio Estevam Reviewed-by: Jaehoon Chung Tested-by: Pierre-Jean Texier --- drivers/mmc/fsl_esdhc_imx.c | 29 ++++++++--------------------- include/fsl_esdhc_imx.h | 2 -- 2 files changed, 8 insertions(+), 23 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 40c797c9907..465d935daf6 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -653,10 +653,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) clk = (pre_div << 8) | (div << 4); #ifdef CONFIG_FSL_USDHC - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (ret) - pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n"); + esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); #else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); #endif @@ -668,7 +665,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n"); #ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); #else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); #endif @@ -723,14 +720,8 @@ static void esdhc_set_strobe_dll(struct mmc *mmc) struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); struct fsl_esdhc *regs = priv->esdhc_regs; u32 val; - u32 tmp; - int ret; if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) { - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (ret) - pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n"); esdhc_write32(®s->strobe_dllctrl, ESDHC_STROBE_DLL_CTRL_RESET); /* @@ -748,7 +739,6 @@ static void esdhc_set_strobe_dll(struct mmc *mmc) pr_warn("HS400 strobe DLL status REF not lock!\n"); if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK)) pr_warn("HS400 strobe DLL status SLV not lock!\n"); - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); } } @@ -980,18 +970,14 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) #ifdef MMC_SUPPORTS_TUNING if (mmc->clk_disable) { #ifdef CONFIG_FSL_USDHC - u32 tmp; - - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (ret) - pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n"); + esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); #else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); #endif } else { #ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | + VENDORSPEC_CKEN); #else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); #endif @@ -1067,7 +1053,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); #else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN | VENDORSPEC_IPGEN); #endif /* Set the initial clock speed */ @@ -1205,7 +1191,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, esdhc_write32(®s->autoc12err, 0); esdhc_write32(®s->clktunectrlstatus, 0); #else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | + VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN); #endif if (priv->vs18_enable) diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index b0920344641..45ed635a77b 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -39,7 +39,6 @@ #define VENDORSPEC_HCKEN 0x00001000 #define VENDORSPEC_IPGEN 0x00000800 #define VENDORSPEC_INIT 0x20007809 -#define VENDORSPEC_FRC_SDCLK_ON 0x00000100 #define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) @@ -97,7 +96,6 @@ #define PRSSTAT_CINS (0x00010000) #define PRSSTAT_BREN (0x00000800) #define PRSSTAT_BWEN (0x00000400) -#define PRSSTAT_SDOFF (0x00000080) #define PRSSTAT_SDSTB (0X00000008) #define PRSSTAT_DLA (0x00000004) #define PRSSTAT_CICHB (0x00000002) From 1ce892cb1ce970d8ee6ffcecc22351c84e67fca4 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 07:33:21 +0800 Subject: [PATCH 129/156] azure: Use msys2 20210604 installer for Windows build MSYS2 Windows build started to fail since yesterday (Jun 21): checking keyring... checking package integrity... error: gcc-libs: signature from "David Macek " is unknown trust :: File /var/cache/pacman/pkg/gcc-libs-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)). error: gcc: signature from "David Macek " is unknown trust :: File /var/cache/pacman/pkg/gcc-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)). error: failed to commit transaction (invalid or corrupted package) Errors occurred, no packages were upgraded. Switching to the latest installer (version 20210604) seems to fix it. Signed-off-by: Bin Meng Reviewed-by: Tom Rini Tested-by: Tom Rini --- .azure-pipelines.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 35ab7f30b27..221e6008062 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -16,7 +16,7 @@ jobs: vmImage: $(windows_vm) steps: - powershell: | - (New-Object Net.WebClient).DownloadFile("https://github.com/msys2/msys2-installer/releases/download/2020-07-20/msys2-base-x86_64-20200720.sfx.exe", "sfx.exe") + (New-Object Net.WebClient).DownloadFile("https://github.com/msys2/msys2-installer/releases/download/2021-06-04/msys2-base-x86_64-20210604.sfx.exe", "sfx.exe") displayName: 'Install MSYS2' - script: | sfx.exe -y -o%CD:~0,2%\ From c7d1b1890880ee64786b92a1b95ba9ecb4694997 Mon Sep 17 00:00:00 2001 From: Christian Melki Date: Mon, 7 Jun 2021 11:21:15 +0200 Subject: [PATCH 130/156] disk/part_dos.c: Fix a variable typo in write_mbr_partitions() This function is passed *dev not *dev_desc, so pass the right name to part_init(). Fixes: f14c5ee5ab8b ("disk: part_dos: update partition table entries after write") Signed-off-by: Christian Melki --- disk/part_dos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/disk/part_dos.c b/disk/part_dos.c index 60addc6e00d..9e29aa6583a 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -424,7 +424,7 @@ int write_mbr_partitions(struct blk_desc *dev, } /* Update the partition table entries*/ - part_init(dev_desc); + part_init(dev); return 0; } From 5a87df8380c3e20f44ee5f3f1fae15496456a361 Mon Sep 17 00:00:00 2001 From: Da Xue Date: Mon, 21 Jun 2021 22:39:19 -0400 Subject: [PATCH 131/156] autoboot: fix typos of CONFIG_AUTOBOOT_USE_MENUKEY Replace typo CONFIG_USE_AUTOBOOT_MENUKEY with CONFIG_AUTOBOOT_USE_MENUKEY as when they were introduced initially there was some mismatch in which name was used where. Fixes: 8fc31e23aa83 ("autoboot: Rename CONFIG_MENUKEY to CONFIG_AUTOBOOT_MENUKEY") Signed-off-by: Da Xue --- common/autoboot.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/common/autoboot.c b/common/autoboot.c index 0bb08e7a4cf..c0b71af4d16 100644 --- a/common/autoboot.c +++ b/common/autoboot.c @@ -44,8 +44,8 @@ static int menukey; #define AUTOBOOT_STOP_STR_SHA256 "" #endif -#ifdef CONFIG_USE_AUTOBOOT_MENUKEY -#define AUTOBOOT_MENUKEY CONFIG_USE_AUTOBOOT_MENUKEY +#ifdef CONFIG_AUTOBOOT_USE_MENUKEY +#define AUTOBOOT_MENUKEY CONFIG_AUTOBOOT_USE_MENUKEY #else #define AUTOBOOT_MENUKEY 0 #endif @@ -282,7 +282,7 @@ static int abortboot_single_key(int bootdelay) abort = 1; /* don't auto boot */ bootdelay = 0; /* no more delay */ key = getchar();/* consume input */ - if (IS_ENABLED(CONFIG_USE_AUTOBOOT_MENUKEY)) + if (IS_ENABLED(CONFIG_AUTOBOOT_USE_MENUKEY)) menukey = key; break; } @@ -388,7 +388,7 @@ void autoboot_command(const char *s) disable_ctrlc(prev); /* restore Ctrl-C checking */ } - if (IS_ENABLED(CONFIG_USE_AUTOBOOT_MENUKEY) && + if (IS_ENABLED(CONFIG_AUTOBOOT_USE_MENUKEY) && menukey == AUTOBOOT_MENUKEY) { s = env_get("menucmd"); if (s) From 2600dd897ed247993670465a4c5acb23a57eab3e Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Sun, 20 Jun 2021 22:29:13 +0200 Subject: [PATCH 132/156] Makefile: Adjust indention of GENENV quiet output The column width for a command name is 8. Signed-off-by: Jan Kiszka --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index a73481d18c1..71cf6f72b04 100644 --- a/Makefile +++ b/Makefile @@ -2279,7 +2279,7 @@ endif $(build)=$(build-dir) $(@:.ko=.o) $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost -quiet_cmd_genenv = GENENV $@ +quiet_cmd_genenv = GENENV $@ cmd_genenv = $(OBJCOPY) --dump-section .rodata.default_environment=$@ env/common.o; \ sed --in-place -e 's/\x00/\x0A/g' $@ From 6fbe06a6ce734b08ba723cc8acde0fded744b686 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 18 Jun 2021 15:09:30 +0800 Subject: [PATCH 133/156] x86: Discard .note.gnu.property sections When switching to kernel.org x86_64 gcc 11.1.0 toolchain, u-boot.rom built from qemu-x86_defconfig no longer boots anymore. Investigation shows that U-Boot fails at a very early stage during the boot process, in fdtdec_prepare_fdt() where fdt_check_header() complains that there is not a valid device tree found at gd->fdt_blob which points to _end. Now _end points to an allocated section .note.gnu.property which of course is wrong. This issue is however not seen when using the default Ubuntu 20.04 gnu toolchain (gcc 9.3.0 with binutils 2.34). Further investigation shows that it is caused by a behavior change of binutils v2.36 which is part of the kernel.org gcc 11.1.0 toolchain, via the following commit: 939b95c77bf2 ("Linux/x86: Configure gas with --enable-x86-used-note by default") In fact, there was already a regression bug report [1] for binutils two months ago, but the binutils folks did not think it is a bug :( To resolve this, there are several options: * pass -Wa,-mx86-used-note=no to gas * pass -R .note.gnu.property to objcopy * discard the section in the linker script Linux kernel uses the discard way [2], so let's do the same for U-Boot. [1] https://sourceware.org/bugzilla/show_bug.cgi?id=27753 [2] commit 4caffe6a28d3 ("x86/vdso: Discard .note.gnu.property sections in vDSO") Signed-off-by: Bin Meng Reviewed-by: Tom Rini --- arch/x86/cpu/u-boot-64.lds | 1 + arch/x86/cpu/u-boot-spl.lds | 1 + arch/x86/cpu/u-boot.lds | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/x86/cpu/u-boot-64.lds b/arch/x86/cpu/u-boot-64.lds index 98c7f8e9c53..ee0812aefbc 100644 --- a/arch/x86/cpu/u-boot-64.lds +++ b/arch/x86/cpu/u-boot-64.lds @@ -107,4 +107,5 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + /DISCARD/ : { *(.note.gnu.property) } } diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds index 4a655bf9b59..346f60bdac0 100644 --- a/arch/x86/cpu/u-boot-spl.lds +++ b/arch/x86/cpu/u-boot-spl.lds @@ -82,6 +82,7 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + /DISCARD/ : { *(.note.gnu.property) } #if defined(CONFIG_SPL_X86_16BIT_INIT) || defined(CONFIG_TPL_X86_16BIT_INIT) /* diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds index a283c290eef..22fde01e749 100644 --- a/arch/x86/cpu/u-boot.lds +++ b/arch/x86/cpu/u-boot.lds @@ -105,6 +105,7 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + /DISCARD/ : { *(.note.gnu.property) } #ifdef CONFIG_X86_16BIT_INIT /* From b12f62374e83675bc65174c2b4b7e3c6c368aa78 Mon Sep 17 00:00:00 2001 From: David Lamparter Date: Thu, 6 May 2021 20:24:30 +0200 Subject: [PATCH 134/156] nvme: fix for big endian systems writel() and co. already include the endian swap; doing the swap twice is, er, unhelpful. Tested on a P4080DS, which boots perfectly fine off NVMe with this. Signed-off-by: David Lamparter Reviewed-by: Bin Meng --- drivers/nvme/nvme.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index c61dab20c5f..d554ec54cbe 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -157,7 +157,7 @@ static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index) invalidate_dcache_range(start, stop); - return le16_to_cpu(readw(&(nvmeq->cqes[index].status))); + return readw(&(nvmeq->cqes[index].status)); } /** @@ -221,7 +221,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq, } if (result) - *result = le32_to_cpu(readl(&(nvmeq->cqes[head].result))); + *result = readl(&(nvmeq->cqes[head].result)); if (++head == nvmeq->q_depth) { head = 0; @@ -304,7 +304,7 @@ static int nvme_enable_ctrl(struct nvme_dev *dev) { dev->ctrl_config &= ~NVME_CC_SHN_MASK; dev->ctrl_config |= NVME_CC_ENABLE; - writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); + writel(dev->ctrl_config, &dev->bar->cc); return nvme_wait_ready(dev, true); } @@ -313,7 +313,7 @@ static int nvme_disable_ctrl(struct nvme_dev *dev) { dev->ctrl_config &= ~NVME_CC_SHN_MASK; dev->ctrl_config &= ~NVME_CC_ENABLE; - writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); + writel(dev->ctrl_config, &dev->bar->cc); return nvme_wait_ready(dev, false); } From 859b33c948945f7904f60a2c12a3792d356d51ad Mon Sep 17 00:00:00 2001 From: Wesley Sheng Date: Tue, 22 Jun 2021 11:34:21 +0800 Subject: [PATCH 135/156] nvme: Correct the prps per page calculation method Each prp is 8 bytes, calculate the number of prps per page should just divide page size by 8 there is no need to minus 1 Signed-off-by: Wesley Sheng Reviewed-by: Bin Meng --- drivers/nvme/nvme.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index d554ec54cbe..dc6c39ba10b 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -81,7 +81,7 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, u64 *prp_pool; int length = total_len; int i, nprps; - u32 prps_per_page = (page_size >> 3) - 1; + u32 prps_per_page = page_size >> 3; u32 num_pages; length -= (page_size - offset); From c3e52c71bb0e7e5e34fadafbfcc34bce9899c100 Mon Sep 17 00:00:00 2001 From: Wesley Sheng Date: Tue, 22 Jun 2021 11:34:43 +0800 Subject: [PATCH 136/156] nvme: Remove the redundant aqa value setting AQA (Admin Queue Attributes) register is a dword size with lower word of ASQS, and higher word of ACQS. The code set the variable aqa twice, but it is redundant. Signed-off-by: Wesley Sheng Reviewed-by: Bin Meng --- drivers/nvme/nvme.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index dc6c39ba10b..424fe6d945a 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -387,7 +387,6 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) aqa = nvmeq->q_depth - 1; aqa |= aqa << 16; - aqa |= aqa << 16; dev->page_size = 1 << page_shift; From 84344258f23fb9ac5abe7383c909f8606ac767b6 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 21:16:17 +0800 Subject: [PATCH 137/156] nvme: Move block dev creation from uclass post_probe() to driver probe() At present the block device creation happens in the NVMe uclass driver post_probe() phase. In preparation to support multiple namespaces, we should issue namespace identify before creating block devices but that touches the underlying hardware hence it is not appropriate to do such in the uclass driver post_probe(). Let's move it to driver probe() phase instead. Signed-off-by: Bin Meng --- drivers/nvme/nvme-uclass.c | 30 ------------------------------ drivers/nvme/nvme.c | 18 ++++++++++++++++++ 2 files changed, 18 insertions(+), 30 deletions(-) diff --git a/drivers/nvme/nvme-uclass.c b/drivers/nvme/nvme-uclass.c index 277e31e1f39..610166d76ea 100644 --- a/drivers/nvme/nvme-uclass.c +++ b/drivers/nvme/nvme-uclass.c @@ -5,39 +5,9 @@ */ #include -#include -#include #include -#include -#include "nvme.h" - -static int nvme_uclass_post_probe(struct udevice *udev) -{ - char name[20]; - struct udevice *ns_udev; - int i, ret; - struct nvme_dev *ndev = dev_get_priv(udev); - - /* Create a blk device for each namespace */ - for (i = 0; i < ndev->nn; i++) { - /* - * Encode the namespace id to the device name so that - * we can extract it when doing the probe. - */ - sprintf(name, "blk#%d", i); - - /* The real blksz and size will be set by nvme_blk_probe() */ - ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME, - -1, 512, 0, &ns_udev); - if (ret) - return ret; - } - - return 0; -} UCLASS_DRIVER(nvme) = { .name = "nvme", .id = UCLASS_NVME, - .post_probe = nvme_uclass_post_probe, }; diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index 424fe6d945a..afb1a7ea978 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -878,6 +878,24 @@ static int nvme_probe(struct udevice *udev) nvme_get_info_from_identify(ndev); + /* Create a blk device for each namespace */ + for (int i = 0; i < ndev->nn; i++) { + struct udevice *ns_udev; + char name[20]; + + /* + * Encode the namespace id to the device name so that + * we can extract it when doing the probe. + */ + sprintf(name, "blk#%d", i); + + /* The real blksz and size will be set by nvme_blk_probe() */ + ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME, + -1, 512, 0, &ns_udev); + if (ret) + goto free_queue; + } + return 0; free_queue: From 478f7fc6a04ae81af550b56b31f18af24cf3f262 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 21:16:18 +0800 Subject: [PATCH 138/156] nvme: Skip block device creation for inactive namespaces At present for each namespace there is a block device created for it. There is no issue if the number of supported namespaces reported from the NVMe device is only 1. Since QEMU commit 7f0f1acedf15 ("hw/block/nvme: support multiple namespaces"), the number of supported namespaces reported has been changed from 1 to 256, but not all of them are active namespaces. The actual active one depends on the QEMU command line parameters. A common case is that namespace 1 being active and all other 255 being inactive. If a namespace is inactive, the namespace identify command returns a zero filled data structure. We can use field NSZE (namespace size) to decide whether a block device should be created for it. Reported-by: Heinrich Schuchardt Signed-off-by: Bin Meng --- drivers/nvme/nvme.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index afb1a7ea978..acf337a58aa 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -834,6 +834,7 @@ static int nvme_probe(struct udevice *udev) { int ret; struct nvme_dev *ndev = dev_get_priv(udev); + struct nvme_id_ns *id; ndev->instance = trailing_strtol(udev->name); @@ -879,10 +880,27 @@ static int nvme_probe(struct udevice *udev) nvme_get_info_from_identify(ndev); /* Create a blk device for each namespace */ + + id = memalign(ndev->page_size, sizeof(struct nvme_id_ns)); + if (!id) { + ret = -ENOMEM; + goto free_queue; + } + for (int i = 0; i < ndev->nn; i++) { struct udevice *ns_udev; char name[20]; + memset(id, 0, sizeof(*id)); + if (nvme_identify(ndev, i + 1, 0, (dma_addr_t)(long)id)) { + ret = -EIO; + goto free_id; + } + + /* skip inactive namespace */ + if (!id->nsze) + continue; + /* * Encode the namespace id to the device name so that * we can extract it when doing the probe. @@ -893,11 +911,14 @@ static int nvme_probe(struct udevice *udev) ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME, -1, 512, 0, &ns_udev); if (ret) - goto free_queue; + goto free_id; } + free(id); return 0; +free_id: + free(id); free_queue: free((void *)ndev->queues); free_nvme: From 8c60d40d69fd834f67322bbcea06ef0adf9076e1 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 21:16:19 +0800 Subject: [PATCH 139/156] nvme: Eliminate the offset of one during block dev creation At present there is an offset of one added during the creation of block device. This can be very confusing as we wanted to encode the namespace id in the block device name but namespae id cannot be zero. This changes to use the namespace id directly in the block device name, eliminating the offset of one effectively. Suggested-by: Heinrich Schuchardt Signed-off-by: Bin Meng --- drivers/nvme/nvme.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index acf337a58aa..c5af4c08aef 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -708,7 +708,7 @@ static int nvme_blk_probe(struct udevice *udev) memset(ns, 0, sizeof(*ns)); ns->dev = ndev; /* extract the namespace id from the block device name */ - ns->ns_id = trailing_strtol(udev->name) + 1; + ns->ns_id = trailing_strtol(udev->name); if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) { free(id); return -EIO; @@ -887,12 +887,12 @@ static int nvme_probe(struct udevice *udev) goto free_queue; } - for (int i = 0; i < ndev->nn; i++) { + for (int i = 1; i <= ndev->nn; i++) { struct udevice *ns_udev; char name[20]; memset(id, 0, sizeof(*id)); - if (nvme_identify(ndev, i + 1, 0, (dma_addr_t)(long)id)) { + if (nvme_identify(ndev, i, 0, (dma_addr_t)(long)id)) { ret = -EIO; goto free_id; } From 757cc4b1b2725e445a94840aa6076f0f0d4f03b9 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 21:16:20 +0800 Subject: [PATCH 140/156] nvme: Drop useless members of 'struct nvme_ns' mode_select_num_blocks and mode_select_block_len in 'struct nvme_ns' are not useful. Drop them. Signed-off-by: Bin Meng --- drivers/nvme/nvme.c | 4 +--- drivers/nvme/nvme.h | 2 -- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index c5af4c08aef..d4b2860d67f 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -718,11 +718,9 @@ static int nvme_blk_probe(struct udevice *udev) flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK; ns->flbas = flbas; ns->lba_shift = id->lbaf[flbas].ds; - ns->mode_select_num_blocks = le64_to_cpu(id->nsze); - ns->mode_select_block_len = 1 << ns->lba_shift; list_add(&ns->list, &ndev->namespaces); - desc->lba = ns->mode_select_num_blocks; + desc->lba = le64_to_cpu(id->nsze); desc->log2blksz = ns->lba_shift; desc->blksz = 1 << ns->lba_shift; desc->bdev = udev; diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h index aa4b3bac679..c6aae4da5df 100644 --- a/drivers/nvme/nvme.h +++ b/drivers/nvme/nvme.h @@ -633,8 +633,6 @@ struct nvme_ns { int devnum; int lba_shift; u8 flbas; - u64 mode_select_num_blocks; - u32 mode_select_block_len; }; #endif /* __DRIVER_NVME_H__ */ From 78d5f2011e2acf8e2f259d2886f1ceb4d789e0be Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 21:16:21 +0800 Subject: [PATCH 141/156] nvme: Don't clear nvme blk device's priv space A udevice's priv space is cleared in alloc_priv() in the DM core. Don't do it again in its probe() routine. Signed-off-by: Bin Meng --- drivers/nvme/nvme.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index d4b2860d67f..f6465ea7f48 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -705,7 +705,6 @@ static int nvme_blk_probe(struct udevice *udev) if (!id) return -ENOMEM; - memset(ns, 0, sizeof(*ns)); ns->dev = ndev; /* extract the namespace id from the block device name */ ns->ns_id = trailing_strtol(udev->name); From bf2a28356e1cd48597f50ad351d3e6806c468a56 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 21:16:22 +0800 Subject: [PATCH 142/156] doc: develop: Convert README.nvme to reST This converts the existing README.nvme to reST, and puts it under the develop/driver-model/ directory. Signed-off-by: Bin Meng --- doc/develop/driver-model/index.rst | 1 + .../driver-model/nvme.rst} | 25 ++++++++++++++----- 2 files changed, 20 insertions(+), 6 deletions(-) rename doc/{README.nvme => develop/driver-model/nvme.rst} (88%) diff --git a/doc/develop/driver-model/index.rst b/doc/develop/driver-model/index.rst index 10a76256b0d..7366ef818c5 100644 --- a/doc/develop/driver-model/index.rst +++ b/doc/develop/driver-model/index.rst @@ -19,6 +19,7 @@ subsystems i2c-howto livetree migration + nvme of-plat pci-info pmic-framework diff --git a/doc/README.nvme b/doc/develop/driver-model/nvme.rst similarity index 88% rename from doc/README.nvme rename to doc/develop/driver-model/nvme.rst index e8f9be149e5..736c0a063dc 100644 --- a/doc/README.nvme +++ b/doc/develop/driver-model/nvme.rst @@ -1,10 +1,12 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2017 NXP Semiconductors -# Copyright (C) 2017 Bin Meng +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2017 NXP Semiconductors +.. Copyright (C) 2017 Bin Meng + +NVMe Support +============ What is NVMe -============ +------------ NVM Express (NVMe) is a register level interface that allows host software to communicate with a non-volatile memory subsystem. This interface is optimized @@ -48,6 +50,8 @@ identified. To list all of the NVMe hard disks, try: +.. code-block:: none + => nvme info Device 0: Vendor: 0x8086 Rev: 8DV10131 Prod: CVFT535600LS400BGN Type: Hard Disk @@ -55,10 +59,14 @@ To list all of the NVMe hard disks, try: and print out detailed information for controller and namespaces via: +.. code-block:: none + => nvme detail Raw block read/write to can be done via the 'nvme read/write' commands: +.. code-block:: none + => nvme read a0000000 0 11000 => tftp 80000000 /tftpboot/kernel.itb @@ -66,6 +74,8 @@ Raw block read/write to can be done via the 'nvme read/write' commands: Of course, file system command can be used on the NVMe hard disk as well: +.. code-block:: none + => fatls nvme 0:1 32376967 kernel.itb 22929408 100m @@ -81,4 +91,7 @@ QEMU supports NVMe emulation and we can test NVMe driver with QEMU x86 running U-Boot. Please see README.x86 for how to build u-boot.rom image for QEMU x86. Example command line to call QEMU x86 below with emulated NVMe device: -$ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom + +.. code-block:: bash + + $ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom From f68d5a66cd53a238d64d79cdd330b4dce17c7197 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 22 Jun 2021 21:16:23 +0800 Subject: [PATCH 143/156] MAINTAINERS: Add an entry for NVMe This was missed when NVMe support was initially brought to U-Boot back in 2017. Add an entry for it and list myself as the maintainer. Signed-off-by: Bin Meng Reviewed-by: Tom Rini --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2accd1fb837..81190f8f8fa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -913,6 +913,14 @@ S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-nios.git F: arch/nios2/ +NVMe +M: Bin Meng +S: Maintained +F: drivers/nvme/ +F: cmd/nvme.c +F: include/nvme.h +F: doc/develop/driver-model/nvme.rst + ONENAND #M: Lukasz Majewski S: Orphaned (Since 2017-01) From 5ad9220bf7b54d958627dd8a0475a44c5a238f0a Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 29 May 2021 13:18:00 +0200 Subject: [PATCH 144/156] malloc: add SPDX license identifiers The original code is in the public domain. Licenses/README states that the general license for U-Boot is GPL 2.0+. So we can mark the malloc code as GPL 2.0+ too. Signed-off-by: Heinrich Schuchardt --- common/dlmalloc.c | 10 ++++++++++ include/malloc.h | 9 +++++---- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/common/dlmalloc.c b/common/dlmalloc.c index cf0270a9c11..11729e8c85b 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -1,3 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * This code is based on a version (aka dlmalloc) of malloc/free/realloc written + * by Doug Lea and released to the public domain, as explained at + * http://creativecommons.org/publicdomain/zero/1.0/- + * + * The original code is available at http://gee.cs.oswego.edu/pub/misc/ + * as file malloc-2.6.6.c. + */ + #include #include #include diff --git a/include/malloc.h b/include/malloc.h index 024b18be00e..1fbaf3755c7 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -1,12 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* - A version of malloc/free/realloc written by Doug Lea and released to the - public domain. Send questions/comments/complaints/performance data - to dl@cs.oswego.edu + This code is based on a version of malloc/free/realloc written by Doug Lea and + released to the public domain. Send questions/comments/complaints/performance + data to dl@cs.oswego.edu * VERSION 2.6.6 Sun Mar 5 19:10:03 2000 Doug Lea (dl at gee) Note: There may be an updated version of this malloc obtainable at - ftp://g.oswego.edu/pub/misc/malloc.c + http://g.oswego.edu/pub/misc/malloc.c Check before installing! * Why use this malloc? From 8b95deafc511b56a73b8565f411a49d98755c957 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 3 Jun 2021 09:38:59 -0400 Subject: [PATCH 145/156] powerpc: Don't use relative include for config.h in global_data.h As there is an arch/powerpc/include/asm/config.h file using "" to get config.h here can lead to using that rather than include/config.h. This in turn can lead to a mismatch in the size of gd. Cc: Matt Merhar Signed-off-by: Tom Rini Tested-by: Matt Merhar --- arch/powerpc/include/asm/global_data.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 192a02d347e..90bf5a2aea5 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -8,7 +8,7 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H -#include "config.h" +#include #include "asm/types.h" /* Architecture-specific global data */ From 8f0f26eb59006846348b59e1e9eca98b24cea333 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 3 Jun 2021 09:39:00 -0400 Subject: [PATCH 146/156] Revert "powerpc: fix regression in arch_initr_trap()" With the changes in commit 588efcdd72fc ("powerpc: Don't use relative include for config.h in global_data.h") fixing the root of the problem, we no longer need this re-inclusion. This reverts commit f6c0d365d3e8ee8e4fd3ebe2ed957c2bca9d3328. Cc: Matt Merhar Signed-off-by: Tom Rini --- arch/powerpc/lib/traps.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/powerpc/lib/traps.c b/arch/powerpc/lib/traps.c index ab8ca269a50..c7bce82a44b 100644 --- a/arch/powerpc/lib/traps.c +++ b/arch/powerpc/lib/traps.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include From 640e2cd6d4335bd1ec39d284cc913c3b90d608f0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 3 Jun 2021 09:39:01 -0400 Subject: [PATCH 147/156] socfpga64: Do not define CONFIG_SYS_MEM_RESERVE_SECURE to 0 Based on the comment in socfpga_soc64_common.h, the intention is for CONFIG_SYS_MEM_RESERVE_SECURE to be unused. However, in the code we do: ... and that will evaluate to true. This leads to unwanted code being compiled. Further, as CONFIG_SYS_MEM_RESERVE_SECURE has not been migrated to Kconfig, this leads to a mismatch in the size of gd depending on if we have or have not also had also included yet. Remove the define as it's not needed. Cc: Siew Chin Lim Cc: Chee Hong Ang Cc: Dalon Westergreen Signed-off-by: Tom Rini --- include/configs/socfpga_soc64_common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 5afdb104543..38fd775b5b6 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -21,7 +21,6 @@ /* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */ #define CPU_RELEASE_ADDR 0xFFD12210 #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_MEM_RESERVE_SECURE 0 /* using OCRAM, not DDR */ /* * U-Boot console configurations From 076c7bfb1f0f1b7c516391aeac6e46fac78fd7de Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 3 Jun 2021 09:39:02 -0400 Subject: [PATCH 148/156] global_data: Ensure we have when symbols are not in Kconfig yet All symbols that are defined in Kconfig will always be defined (or not) prior to preprocessing due to the -include directive while building. However, symbols which are not yet migrated will only be defined (or not) once the board config.h is included, via . While the end goal must be to migrate all symbols, today we have cases where the size of gd will get mismatched within the build, based on include order. Mitigate this by making sure that any that uses symbols not in Kconfig does start with . Remove this when not needed. Cc: Alexey Brodkin Cc: Eugeniy Paltsev Cc: Huan Wang Cc: Angelo Dureghello Cc: Rick Chen Signed-off-by: Tom Rini --- arch/arc/include/asm/global_data.h | 2 -- arch/arm/include/asm/global_data.h | 2 ++ arch/m68k/include/asm/global_data.h | 2 ++ arch/nds32/include/asm/global_data.h | 2 ++ 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arc/include/asm/global_data.h b/arch/arc/include/asm/global_data.h index 8f9c83d3c28..e35a26f1eb1 100644 --- a/arch/arc/include/asm/global_data.h +++ b/arch/arc/include/asm/global_data.h @@ -6,8 +6,6 @@ #ifndef __ASM_ARC_GLOBAL_DATA_H #define __ASM_ARC_GLOBAL_DATA_H -#include - #ifndef __ASSEMBLY__ /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 2aff1c467c1..79432f3bbd2 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -9,6 +9,8 @@ #ifndef __ASSEMBLY__ +#include + #include #include diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index 188055e9d31..273e843c4ae 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -7,6 +7,8 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H +#include + /* Architecture-specific global data */ struct arch_global_data { #ifdef CONFIG_SYS_I2C_FSL diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h index be04a18857a..297481beaae 100644 --- a/arch/nds32/include/asm/global_data.h +++ b/arch/nds32/include/asm/global_data.h @@ -17,6 +17,8 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H +#include + /* Architecture-specific global data */ struct arch_global_data { }; From af8e2d474662d2eaa518794da6ffdfc95d47859d Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Tue, 15 Jun 2021 07:16:36 +0900 Subject: [PATCH 149/156] MAINTAINER, git-mailrc: Update the mmc maintainer Update to me as co-maintainer with Peng. Additionally, update the mmc alias in git-mailrc. Signed-off-by: Jaehoon Chung Reviewed-by: Bin Meng Acked-by: Peng Fan --- MAINTAINERS | 1 + doc/git-mailrc | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 2accd1fb837..5ec1e366a17 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -882,6 +882,7 @@ F: arch/mips/dts/mrvl,cn73xx.dtsi MMC M: Peng Fan +M: Jaehoon Chung S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-mmc.git F: drivers/mmc/ diff --git a/doc/git-mailrc b/doc/git-mailrc index 34f936f4d83..dc7b39b32fa 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -119,7 +119,7 @@ alias kerneldoc uboot, marex alias fdt uboot, sjg alias i2c uboot, hs alias kconfig uboot, masahiro -alias mmc uboot, freenix +alias mmc uboot, freenix, jaehoon alias nand uboot alias net uboot, jhersh alias phy uboot, jhersh From b2710faf82998d7be9e4eef554063a5e27e88ec9 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 10 Jun 2021 18:08:42 +0300 Subject: [PATCH 150/156] test: Include /sbin to the PATH when creating file system On some distributions the mkfs is under /sbin and /sbin is not set for mere users. Include /sbin to the PATH when creating file system, so that users won't get a scary traceback from Python. Signed-off-by: Andy Shevchenko --- test/py/tests/test_fs/conftest.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/test/py/tests/test_fs/conftest.py b/test/py/tests/test_fs/conftest.py index 410a675b971..7325486cdb1 100644 --- a/test/py/tests/test_fs/conftest.py +++ b/test/py/tests/test_fs/conftest.py @@ -159,6 +159,10 @@ def mk_fs(config, fs_type, size, id): count = (size + 1048576 - 1) / 1048576 + # Some distributions do not add /sbin to the default PATH, where mkfs lives + if '/sbin' not in os.environ["PATH"].split(os.pathsep): + os.environ["PATH"] += os.pathsep + '/sbin' + try: check_call('rm -f %s' % fs_img, shell=True) check_call('dd if=/dev/zero of=%s bs=1M count=%d' From 12ef8016736a50feb744b14ac42c7d849dab2f97 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Thu, 24 Jun 2021 12:52:11 -0500 Subject: [PATCH 151/156] ARM: rmobile: beacon: Set CONFIG_RZ_G2 on Beacon boards The board detection is incorrectly stating it's an rcar3 variant instead of an RZ/G2 variant on all the r8a774*1_beacon boards. Set the flag to correctly display as RZ/G2[M/N/H] Signed-off-by: Adam Ford --- arch/arm/mach-rmobile/Kconfig.64 | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 3f7ec053795..c621f8a5441 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -69,16 +69,19 @@ choice config TARGET_BEACON_RZG2H bool "Beacon EmbeddedWorks RZ/G2H Dev Kit" select R8A774E1 + select RZ_G2 select PINCTRL_PFC_R8A774E1 config TARGET_BEACON_RZG2M bool "Beacon EmbeddedWorks RZ/G2M Dev Kit" select R8A774A1 + select RZ_G2 select PINCTRL_PFC_R8A774A1 config TARGET_BEACON_RZG2N bool "Beacon EmbeddedWorks RZ/G2N Dev Kit" select R8A774B1 + select RZ_G2 select PINCTRL_PFC_R8A774B1 config TARGET_CONDOR From ec326b932512cfe07dd97cc45480c87b903e08e3 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 20 Jun 2021 12:00:51 -0300 Subject: [PATCH 152/156] usb: ehci-mx6: Move fdtdec_get_alias_seq() inside the CONFIG_MX6 On a imx7s-warp board the fdtdec_get_alias_seq() function always fails. As priv->portnr is only used on i.MX6, move fdtdec_get_alias_seq() inside the CONFIG_MX6 block. Signed-off-by: Fabio Estevam --- drivers/usb/host/ehci-mx6.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 238c93183b0..48b5c8b0c53 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -569,7 +569,6 @@ static int mx6_parse_dt_addrs(struct udevice *dev) const void *blob = gd->fdt_blob; int offset = dev_of_offset(dev); void *__iomem addr; - int ret, devnump; phy_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbphy"); if (phy_off < 0) { @@ -578,11 +577,6 @@ static int mx6_parse_dt_addrs(struct udevice *dev) return -EINVAL; } - ret = fdtdec_get_alias_seq(blob, dev->uclass->uc_drv->name, - phy_off, &devnump); - if (ret < 0) - return ret; - misc_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbmisc"); if (misc_off < 0) return -EINVAL; @@ -592,7 +586,6 @@ static int mx6_parse_dt_addrs(struct udevice *dev) return -EINVAL; priv->phy_addr = addr; - priv->portnr = devnump; addr = (void __iomem *)fdtdec_get_addr(blob, misc_off, "reg"); if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) @@ -601,7 +594,13 @@ static int mx6_parse_dt_addrs(struct udevice *dev) priv->misc_addr = addr; #if defined(CONFIG_MX6) - int anatop_off; + int anatop_off, ret, devnump; + + ret = fdtdec_get_alias_seq(blob, dev->uclass->uc_drv->name, + phy_off, &devnump); + if (ret < 0) + return ret; + priv->portnr = devnump; /* Resolve ANATOP offset through USB PHY node */ anatop_off = fdtdec_lookup_phandle(blob, phy_off, "fsl,anatop"); From 4822114f4fb4328114da8ab199672656591a150d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 20 Jun 2021 12:00:52 -0300 Subject: [PATCH 153/156] usb: ehci-mx6: Do not fail when 'reg' is not found Unlike imx6, on imx7 the USB PHY is described as: usbphynop1: usbphynop1 { compatible = "usb-nop-xceiv"; clocks = <&clks IMX7D_USB_PHY1_CLK>; clock-names = "main_clk"; #phy-cells = <0>; }; which does not have the 'reg' property. Do not return an error when the 'reg' property is not found for the USB PHY. This fixes USB gadget regression on a imx7s-warp board. Successfully tested the "ums 0 mmc 0" command on two boards: imx7s-warp and imx6dl-pico-pi. Signed-off-by: Fabio Estevam --- drivers/usb/host/ehci-mx6.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 48b5c8b0c53..c3e4170513e 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -583,7 +583,7 @@ static int mx6_parse_dt_addrs(struct udevice *dev) addr = (void __iomem *)fdtdec_get_addr(blob, phy_off, "reg"); if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) - return -EINVAL; + addr = NULL; priv->phy_addr = addr; From 2bba78076b03e47967180776a8da74a018186480 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 28 Jun 2021 10:17:29 -0400 Subject: [PATCH 154/156] configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini --- configs/A10-OLinuXino-Lime_defconfig | 2 +- configs/A10s-OLinuXino-M_defconfig | 2 +- configs/A13-OLinuXinoM_defconfig | 2 +- configs/A13-OLinuXino_defconfig | 2 +- configs/A20-OLinuXino-Lime2-eMMC_defconfig | 2 +- configs/A20-OLinuXino-Lime2_defconfig | 2 +- configs/A20-OLinuXino-Lime_defconfig | 2 +- configs/A20-OLinuXino_MICRO-eMMC_defconfig | 2 +- configs/A20-OLinuXino_MICRO_defconfig | 2 +- configs/A20-Olimex-SOM-EVB_defconfig | 2 +- configs/A20-Olimex-SOM204-EVB-eMMC_defconfig | 2 +- configs/A20-Olimex-SOM204-EVB_defconfig | 2 +- configs/A33-OLinuXino_defconfig | 2 +- configs/Ainol_AW1_defconfig | 2 +- configs/Ampe_A76_defconfig | 2 +- configs/Auxtek-T003_defconfig | 2 +- configs/Auxtek-T004_defconfig | 2 +- configs/Bananapi_M2_Ultra_defconfig | 2 +- configs/Bananapi_defconfig | 2 +- configs/Bananapi_m2m_defconfig | 2 +- configs/Bananapro_defconfig | 2 +- configs/CHIP_defconfig | 3 +- configs/CHIP_pro_defconfig | 2 +- configs/CSQ_CS908_defconfig | 2 +- configs/Chuwi_V7_CW0825_defconfig | 2 +- configs/Colombus_defconfig | 2 +- configs/Cubieboard2_defconfig | 2 +- configs/Cubieboard4_defconfig | 2 +- configs/Cubieboard_defconfig | 2 +- configs/Cubietruck_defconfig | 2 +- configs/Cubietruck_plus_defconfig | 2 +- configs/Empire_electronix_d709_defconfig | 2 +- configs/Empire_electronix_m712_defconfig | 2 +- configs/Hummingbird_A31_defconfig | 2 +- configs/Hyundai_A7HD_defconfig | 2 +- configs/Itead_Ibox_A20_defconfig | 2 +- configs/Lamobo_R1_defconfig | 2 +- configs/LicheePi_Zero_defconfig | 2 +- configs/Linksprite_pcDuino3_Nano_defconfig | 2 +- configs/Linksprite_pcDuino3_defconfig | 2 +- configs/Linksprite_pcDuino_defconfig | 2 +- configs/M5208EVBE_defconfig | 2 +- configs/M52277EVB_defconfig | 2 +- configs/M52277EVB_stmicro_defconfig | 2 +- configs/M5235EVB_Flash32_defconfig | 2 +- configs/M5235EVB_defconfig | 2 +- configs/M5249EVB_defconfig | 2 +- configs/M5253DEMO_defconfig | 2 +- configs/M5272C3_defconfig | 2 +- configs/M5275EVB_defconfig | 2 +- configs/M5282EVB_defconfig | 2 +- configs/M53017EVB_defconfig | 2 +- configs/M5329AFEE_defconfig | 2 +- configs/M5329BFEE_defconfig | 2 +- configs/M5373EVB_defconfig | 2 +- configs/M54418TWR_defconfig | 2 +- configs/M54418TWR_nand_mii_defconfig | 2 +- configs/M54418TWR_nand_rmii_defconfig | 2 +- configs/M54418TWR_nand_rmii_lowfreq_defconfig | 2 +- configs/M54418TWR_serial_mii_defconfig | 2 +- configs/M54418TWR_serial_rmii_defconfig | 2 +- configs/M54451EVB_defconfig | 2 +- configs/M54451EVB_stmicro_defconfig | 2 +- configs/M54455EVB_a66_defconfig | 2 +- configs/M54455EVB_defconfig | 2 +- configs/M54455EVB_i66_defconfig | 2 +- configs/M54455EVB_intel_defconfig | 2 +- configs/M54455EVB_stm33_defconfig | 2 +- configs/M5475AFE_defconfig | 2 +- configs/M5475BFE_defconfig | 2 +- configs/M5475CFE_defconfig | 2 +- configs/M5475DFE_defconfig | 2 +- configs/M5475EFE_defconfig | 2 +- configs/M5475FFE_defconfig | 2 +- configs/M5475GFE_defconfig | 2 +- configs/M5485AFE_defconfig | 2 +- configs/M5485BFE_defconfig | 2 +- configs/M5485CFE_defconfig | 2 +- configs/M5485DFE_defconfig | 2 +- configs/M5485EFE_defconfig | 2 +- configs/M5485FFE_defconfig | 2 +- configs/M5485GFE_defconfig | 2 +- configs/M5485HFE_defconfig | 2 +- configs/MK808C_defconfig | 2 +- configs/MPC837XERDB_defconfig | 2 +- configs/MSI_Primo73_defconfig | 2 +- configs/MSI_Primo81_defconfig | 2 +- configs/Marsboard_A10_defconfig | 2 +- configs/Mele_A1000G_quad_defconfig | 2 +- configs/Mele_A1000_defconfig | 2 +- configs/Mele_I7_defconfig | 2 +- configs/Mele_M3_defconfig | 2 +- configs/Mele_M5_defconfig | 2 +- configs/Mele_M9_defconfig | 2 +- configs/Merrii_A80_Optimus_defconfig | 2 +- configs/Mini-X_defconfig | 2 +- .../Nintendo_NES_Classic_Edition_defconfig | 2 +- configs/Orangepi_defconfig | 2 +- configs/Orangepi_mini_defconfig | 2 +- configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 +- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 2 +- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 +- configs/P1010RDB-PA_NAND_defconfig | 2 +- configs/P1010RDB-PA_SDCARD_defconfig | 2 +- configs/P1010RDB-PA_SPIFLASH_defconfig | 2 +- configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 +- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 2 +- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 +- configs/P1010RDB-PB_NAND_defconfig | 2 +- configs/P1010RDB-PB_SDCARD_defconfig | 2 +- configs/P1010RDB-PB_SPIFLASH_defconfig | 2 +- configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +- configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 +- configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +- configs/P1020RDB-PC_NAND_defconfig | 2 +- configs/P1020RDB-PC_SDCARD_defconfig | 2 +- configs/P1020RDB-PC_SPIFLASH_defconfig | 2 +- configs/P1020RDB-PD_NAND_defconfig | 2 +- configs/P1020RDB-PD_SDCARD_defconfig | 2 +- configs/P1020RDB-PD_SPIFLASH_defconfig | 2 +- configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +- configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +- configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +- configs/P2020RDB-PC_NAND_defconfig | 2 +- configs/P2020RDB-PC_SDCARD_defconfig | 2 +- configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +- configs/SBx81LIFKW_defconfig | 2 +- configs/SBx81LIFXCAT_defconfig | 2 +- configs/Sinlinx_SinA31s_defconfig | 2 +- configs/Sinlinx_SinA33_defconfig | 2 +- configs/Sinovoip_BPI_M2_defconfig | 2 +- configs/Sinovoip_BPI_M3_defconfig | 2 +- configs/Sunchip_CX-A99_defconfig | 2 +- configs/T1024RDB_NAND_defconfig | 2 +- configs/T1024RDB_SDCARD_defconfig | 2 +- configs/T1024RDB_SPIFLASH_defconfig | 2 +- configs/T1042D4RDB_NAND_defconfig | 2 +- configs/T1042D4RDB_SDCARD_defconfig | 2 +- configs/T1042D4RDB_SPIFLASH_defconfig | 2 +- configs/T2080QDS_NAND_defconfig | 2 +- configs/T2080QDS_SDCARD_defconfig | 2 +- configs/T2080QDS_SPIFLASH_defconfig | 2 +- configs/T2080RDB_NAND_defconfig | 2 +- configs/T2080RDB_SDCARD_defconfig | 2 +- configs/T2080RDB_SPIFLASH_defconfig | 2 +- configs/T2080RDB_revD_NAND_defconfig | 2 +- configs/T2080RDB_revD_SDCARD_defconfig | 2 +- configs/T2080RDB_revD_SPIFLASH_defconfig | 2 +- configs/T4240RDB_SDCARD_defconfig | 2 +- configs/UTOO_P66_defconfig | 2 +- configs/Wexler_TAB7200_defconfig | 2 +- configs/Wits_Pro_A20_DKT_defconfig | 2 +- configs/Wobo_i5_defconfig | 2 +- configs/Yones_Toptech_BD1078_defconfig | 2 +- configs/Yones_Toptech_BS1078_V2_defconfig | 2 +- configs/a64-olinuxino-emmc_defconfig | 2 +- configs/a64-olinuxino_defconfig | 2 +- configs/ae350_rv32_spl_defconfig | 2 +- configs/ae350_rv32_spl_xip_defconfig | 2 +- configs/ae350_rv64_spl_defconfig | 2 +- configs/ae350_rv64_spl_xip_defconfig | 2 +- configs/alt_defconfig | 2 +- configs/am335x_baltos_defconfig | 2 +- configs/am335x_boneblack_vboot_defconfig | 2 +- configs/am335x_evm_defconfig | 2 +- configs/am335x_evm_spiboot_defconfig | 2 +- configs/am335x_guardian_defconfig | 2 +- configs/am335x_hs_evm_defconfig | 2 +- configs/am335x_hs_evm_uart_defconfig | 2 +- configs/am335x_igep003x_defconfig | 2 +- configs/am335x_pdu001_defconfig | 2 +- configs/am335x_shc_defconfig | 2 +- configs/am335x_shc_ict_defconfig | 2 +- configs/am335x_shc_netboot_defconfig | 2 +- configs/am335x_shc_sdboot_defconfig | 2 +- configs/am335x_sl50_defconfig | 2 +- configs/am3517_evm_defconfig | 2 +- configs/am43xx_evm_defconfig | 2 +- configs/am43xx_evm_qspiboot_defconfig | 2 +- configs/am43xx_evm_rtconly_defconfig | 2 +- configs/am43xx_evm_usbhost_boot_defconfig | 2 +- configs/am43xx_hs_evm_defconfig | 2 +- configs/am57xx_evm_defconfig | 2 +- configs/am57xx_hs_evm_defconfig | 2 +- configs/am57xx_hs_evm_usb_defconfig | 2 +- configs/am64x_evm_a53_defconfig | 2 +- configs/am64x_evm_r5_defconfig | 2 +- configs/am65x_evm_a53_defconfig | 2 +- configs/am65x_evm_r5_defconfig | 2 +- configs/am65x_evm_r5_usbdfu_defconfig | 2 +- configs/am65x_evm_r5_usbmsc_defconfig | 2 +- configs/am65x_hs_evm_a53_defconfig | 2 +- configs/am65x_hs_evm_r5_defconfig | 2 +- configs/amarula_a64_relic_defconfig | 2 +- configs/amcore_defconfig | 2 +- configs/ap121_defconfig | 2 +- configs/ap143_defconfig | 2 +- configs/ap152_defconfig | 2 +- configs/apalis-imx8_defconfig | 2 +- configs/apalis-imx8x_defconfig | 2 +- configs/apalis-tk1_defconfig | 2 +- configs/apalis_imx6_defconfig | 2 +- configs/apalis_t30_defconfig | 2 +- configs/aristainetos2c_defconfig | 2 +- configs/aristainetos2ccslb_defconfig | 2 +- configs/arndale_defconfig | 2 +- configs/astro_mcf5373l_defconfig | 2 +- configs/at91sam9260ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9260ek_dataflash_cs1_defconfig | 2 +- configs/at91sam9260ek_nandflash_defconfig | 2 +- configs/at91sam9261ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9261ek_dataflash_cs3_defconfig | 2 +- configs/at91sam9261ek_nandflash_defconfig | 2 +- configs/at91sam9263ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9263ek_dataflash_defconfig | 2 +- configs/at91sam9263ek_nandflash_defconfig | 2 +- configs/at91sam9263ek_norflash_boot_defconfig | 2 +- configs/at91sam9263ek_norflash_defconfig | 2 +- configs/at91sam9g10ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9g10ek_dataflash_cs3_defconfig | 2 +- configs/at91sam9g10ek_nandflash_defconfig | 2 +- configs/at91sam9g20ek_2mmc_defconfig | 2 +- .../at91sam9g20ek_2mmc_nandflash_defconfig | 2 +- configs/at91sam9g20ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9g20ek_dataflash_cs1_defconfig | 2 +- configs/at91sam9g20ek_nandflash_defconfig | 2 +- configs/at91sam9m10g45ek_mmc_defconfig | 2 +- configs/at91sam9m10g45ek_nandflash_defconfig | 2 +- configs/at91sam9n12ek_mmc_defconfig | 2 +- configs/at91sam9n12ek_nandflash_defconfig | 2 +- configs/at91sam9n12ek_spiflash_defconfig | 2 +- configs/at91sam9rlek_dataflash_defconfig | 2 +- configs/at91sam9rlek_mmc_defconfig | 2 +- configs/at91sam9rlek_nandflash_defconfig | 2 +- configs/at91sam9x5ek_dataflash_defconfig | 2 +- configs/at91sam9x5ek_mmc_defconfig | 2 +- configs/at91sam9x5ek_nandflash_defconfig | 2 +- configs/at91sam9x5ek_spiflash_defconfig | 2 +- configs/at91sam9xeek_dataflash_cs0_defconfig | 2 +- configs/at91sam9xeek_dataflash_cs1_defconfig | 2 +- configs/at91sam9xeek_nandflash_defconfig | 2 +- ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 2 +- configs/axm_defconfig | 2 +- configs/axs101_defconfig | 2 +- configs/axs103_defconfig | 2 +- configs/ba10_tv_box_defconfig | 2 +- configs/bananapi_m1_plus_defconfig | 2 +- configs/bananapi_m2_berry_defconfig | 2 +- configs/bananapi_m2_plus_h3_defconfig | 2 +- configs/bananapi_m2_plus_h5_defconfig | 2 +- configs/bananapi_m2_zero_defconfig | 2 +- configs/bananapi_m64_defconfig | 2 +- configs/bcm963158_ram_defconfig | 2 +- configs/bcm968360bg_ram_defconfig | 2 +- configs/bcm968380gerg_ram_defconfig | 2 +- configs/bcm968580xref_ram_defconfig | 2 +- configs/beaver_defconfig | 2 +- configs/beelink-gtking_defconfig | 2 +- configs/beelink-gtkingpro_defconfig | 2 +- configs/beelink_gs1_defconfig | 2 +- configs/beelink_x2_defconfig | 2 +- configs/bitmain_antminer_s9_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/blanche_defconfig | 2 +- configs/boston32r2_defconfig | 2 +- configs/boston32r2el_defconfig | 2 +- configs/boston32r6_defconfig | 2 +- configs/boston32r6el_defconfig | 2 +- configs/boston64r2_defconfig | 2 +- configs/boston64r2el_defconfig | 2 +- configs/boston64r6_defconfig | 2 +- configs/boston64r6el_defconfig | 2 +- configs/brppt1_mmc_defconfig | 2 +- configs/brppt1_nand_defconfig | 2 +- configs/brppt1_spi_defconfig | 2 +- configs/brppt2_defconfig | 2 +- configs/brsmarc1_defconfig | 2 +- configs/brxre1_defconfig | 2 +- configs/bubblegum_96_defconfig | 2 +- configs/cardhu_defconfig | 2 +- configs/cei-tk1-som_defconfig | 2 +- configs/cgtqmx8_defconfig | 21 ++- configs/cherryhill_defconfig | 2 +- configs/chiliboard_defconfig | 2 +- configs/chromebit_mickey_defconfig | 2 +- configs/chromebook_bob_defconfig | 2 +- configs/chromebook_coral_defconfig | 2 +- configs/chromebook_jerry_defconfig | 2 +- configs/chromebook_link64_defconfig | 2 +- configs/chromebook_link_defconfig | 2 +- configs/chromebook_minnie_defconfig | 2 +- configs/chromebook_samus_defconfig | 2 +- configs/chromebook_samus_tpl_defconfig | 2 +- configs/chromebook_speedy_defconfig | 2 +- configs/ci20_mmc_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/clearfog_defconfig | 2 +- configs/clearfog_gt_8k_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/cm_t43_defconfig | 2 +- configs/cobra5272_defconfig | 2 +- configs/colibri-imx8x_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_t20_defconfig | 2 +- configs/colibri_t30_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/colorfly_e708_q1_defconfig | 2 +- configs/comtrend_ar5315u_ram_defconfig | 2 +- configs/comtrend_ar5387un_ram_defconfig | 2 +- configs/comtrend_ct5361_ram_defconfig | 2 +- configs/comtrend_vr3032u_ram_defconfig | 2 +- configs/comtrend_wap5813n_ram_defconfig | 2 +- ...-qeval20-qa3-e3845-internal-uart_defconfig | 2 +- configs/controlcenterdc_defconfig | 2 +- configs/coreboot64_defconfig | 2 +- configs/coreboot_defconfig | 2 +- configs/cortina_presidio-asic-base_defconfig | 2 +- configs/cortina_presidio-asic-emmc_defconfig | 2 +- configs/cortina_presidio-asic-pnand_defconfig | 2 +- configs/corvus_defconfig | 2 +- configs/crs305-1g-4s-bit_defconfig | 2 +- configs/crs305-1g-4s_defconfig | 2 +- configs/crs326-24g-2s-bit_defconfig | 2 +- configs/crs326-24g-2s_defconfig | 2 +- configs/crs328-4c-20s-4s-bit_defconfig | 2 +- configs/crs328-4c-20s-4s_defconfig | 2 +- configs/cubieboard7_defconfig | 2 +- configs/d2net_v2_defconfig | 2 +- configs/da850evm_defconfig | 2 +- configs/da850evm_nand_defconfig | 2 +- configs/dalmore_defconfig | 2 +- configs/db-88f6720_defconfig | 2 +- configs/db-88f6820-amc_defconfig | 2 +- configs/db-88f6820-gp_defconfig | 2 +- configs/db-mv784mp-gp_defconfig | 2 +- configs/db-xc3-24g4xg_defconfig | 2 +- configs/deneb_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/difrnce_dit4350_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dns325_defconfig | 2 +- configs/dockstar_defconfig | 2 +- configs/dra7xx_evm_defconfig | 2 +- configs/dra7xx_hs_evm_defconfig | 2 +- configs/dra7xx_hs_evm_usb_defconfig | 2 +- configs/draco_defconfig | 2 +- configs/dragonboard410c_defconfig | 2 +- configs/dragonboard820c_defconfig | 2 +- configs/dreamplug_defconfig | 2 +- configs/ds414_defconfig | 2 +- configs/dserve_dsrv9703c_defconfig | 2 +- configs/durian_defconfig | 2 +- configs/eb_cpu5282_defconfig | 2 +- configs/eb_cpu5282_internal_defconfig | 2 +- configs/edison_defconfig | 2 +- configs/efi-x86_app_defconfig | 2 +- configs/efi-x86_payload32_defconfig | 2 +- configs/efi-x86_payload64_defconfig | 2 +- configs/elgin-rv1108_defconfig | 2 +- configs/emlid_neutis_n5_devboard_defconfig | 2 +- configs/emsdp_defconfig | 2 +- configs/espresso7420_defconfig | 2 +- configs/etamin_defconfig | 2 +- configs/ev-imx280-nano-x-mb_defconfig | 118 +++++--------- configs/evb-ast2500_defconfig | 2 +- configs/evb-ast2600_defconfig | 2 +- configs/evb-px30_defconfig | 2 +- configs/evb-px5_defconfig | 2 +- configs/evb-rk3036_defconfig | 2 +- configs/evb-rk3128_defconfig | 2 +- configs/evb-rk3229_defconfig | 2 +- configs/evb-rk3288_defconfig | 2 +- configs/evb-rk3308_defconfig | 2 +- configs/evb-rk3328_defconfig | 2 +- configs/evb-rk3399_defconfig | 2 +- configs/evb-rv1108_defconfig | 2 +- configs/ficus-rk3399_defconfig | 2 +- configs/firefly-px30_defconfig | 2 +- configs/firefly-rk3288_defconfig | 2 +- configs/firefly-rk3399_defconfig | 2 +- configs/ga10h_v1_1_defconfig | 2 +- .../gardena-smart-gateway-at91sam_defconfig | 2 +- .../gardena-smart-gateway-mt7688_defconfig | 2 +- configs/gazerbeam_defconfig | 2 +- configs/ge_b1x5v2_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/geekbox_defconfig | 2 +- configs/giedi_defconfig | 2 +- configs/goflexhome_defconfig | 2 +- configs/gose_defconfig | 2 +- configs/grpeach_defconfig | 2 +- configs/gt90h_v4_defconfig | 2 +- configs/guruplug_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/h8_homlet_v2_defconfig | 2 +- configs/harmony_defconfig | 2 +- configs/helios4_defconfig | 2 +- configs/hihope_rzg2_defconfig | 2 +- configs/hikey960_defconfig | 2 +- configs/hikey_defconfig | 2 +- configs/hsdk_4xd_defconfig | 2 +- configs/hsdk_defconfig | 2 +- configs/huawei_hg556a_ram_defconfig | 2 +- configs/i12-tvbox_defconfig | 2 +- configs/iNet_3F_defconfig | 2 +- configs/iNet_3W_defconfig | 2 +- configs/iNet_86VS_defconfig | 2 +- configs/iNet_D978_rev2_defconfig | 2 +- configs/ib62x0_defconfig | 2 +- configs/icnova-a20-swac_defconfig | 2 +- configs/iconnect_defconfig | 2 +- configs/igep00x0_defconfig | 2 +- configs/imgtec_xilfpga_defconfig | 2 +- configs/imx28_xea_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx7_cm_defconfig | 2 +- configs/imx8mm-cl-iot-gate_defconfig | 2 +- configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 2 +- configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 2 +- configs/imx8mm_beacon_defconfig | 2 +- configs/imx8mm_evk_defconfig | 9 +- configs/imx8mm_venice_defconfig | 2 +- configs/imx8mn_beacon_2g_defconfig | 2 +- configs/imx8mn_beacon_defconfig | 2 +- configs/imx8mn_ddr4_evk_defconfig | 6 +- configs/imx8mn_evk_defconfig | 6 +- configs/imx8mp_evk_defconfig | 9 +- configs/imx8mq_cm_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- configs/imx8mq_phanbell_defconfig | 2 +- configs/imx8qm_mek_defconfig | 2 +- configs/imx8qm_rom7720_a1_4G_defconfig | 2 +- configs/imx8qxp_mek_defconfig | 2 +- configs/imxrt1020-evk_defconfig | 2 +- configs/imxrt1050-evk_defconfig | 2 +- configs/inet1_defconfig | 2 +- configs/inet86dz_defconfig | 2 +- configs/inet97fv2_defconfig | 2 +- configs/inet98v_rev2_defconfig | 2 +- configs/inet9f_rev03_defconfig | 2 +- configs/inet_q972_defconfig | 2 +- configs/inetspace_v2_defconfig | 2 +- configs/iot_devkit_defconfig | 2 +- configs/j7200_evm_a72_defconfig | 2 +- configs/j7200_evm_r5_defconfig | 2 +- configs/j721e_evm_a72_defconfig | 2 +- configs/j721e_evm_r5_defconfig | 2 +- configs/j721e_hs_evm_a72_defconfig | 2 +- configs/j721e_hs_evm_r5_defconfig | 2 +- configs/jesurun_q5_defconfig | 2 +- configs/jetson-tk1_defconfig | 2 +- configs/k2e_evm_defconfig | 2 +- configs/k2g_evm_defconfig | 2 +- configs/k2hk_evm_defconfig | 2 +- configs/k2l_evm_defconfig | 2 +- configs/khadas-edge-captain-rk3399_defconfig | 2 +- configs/khadas-edge-rk3399_defconfig | 2 +- configs/khadas-edge-v-rk3399_defconfig | 2 +- configs/khadas-vim2_defconfig | 2 +- configs/khadas-vim3_defconfig | 2 +- configs/khadas-vim3l_defconfig | 2 +- configs/khadas-vim_defconfig | 2 +- configs/km_kirkwood_128m16_defconfig | 2 +- configs/km_kirkwood_defconfig | 2 +- configs/km_kirkwood_pci_defconfig | 2 +- configs/kmcent2_defconfig | 2 +- configs/kmcoge5ne_defconfig | 2 +- configs/kmcoge5un_defconfig | 2 +- configs/kmeter1_defconfig | 2 +- configs/kmnusa_defconfig | 2 +- configs/kmopti2_defconfig | 2 +- configs/kmsupx5_defconfig | 2 +- configs/kmsuse2_defconfig | 2 +- configs/kmtegr1_defconfig | 2 +- configs/kmtepr2_defconfig | 2 +- configs/koelsch_defconfig | 2 +- configs/kontron_sl28_defconfig | 2 +- configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 2 +- configs/kylin-rk3036_defconfig | 2 +- configs/lager_defconfig | 2 +- configs/leez-rk3399_defconfig | 2 +- configs/libretech-ac_defconfig | 2 +- configs/libretech-cc_defconfig | 2 +- configs/libretech-cc_v2_defconfig | 2 +- configs/libretech-s905d-pc_defconfig | 2 +- configs/libretech-s912-pc_defconfig | 2 +- configs/libretech_all_h3_cc_h2_plus_defconfig | 2 +- configs/libretech_all_h3_cc_h3_defconfig | 2 +- configs/libretech_all_h3_cc_h5_defconfig | 2 +- configs/libretech_all_h3_it_h5_defconfig | 2 +- configs/libretech_all_h5_cc_h5_defconfig | 2 +- configs/linkit-smart-7688_defconfig | 2 +- configs/lion-rk3368_defconfig | 2 +- configs/liteboard_defconfig | 2 +- configs/ls1012a2g5rdb_qspi_defconfig | 2 +- configs/ls1012a2g5rdb_tfa_defconfig | 2 +- configs/ls1012afrdm_qspi_defconfig | 2 +- configs/ls1012afrdm_tfa_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1012afrwy_qspi_defconfig | 2 +- configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012afrwy_tfa_defconfig | 2 +- configs/ls1012aqds_qspi_defconfig | 2 +- configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012aqds_tfa_defconfig | 2 +- configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1012ardb_qspi_defconfig | 2 +- configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012ardb_tfa_defconfig | 2 +- configs/ls1021aiot_sdcard_defconfig | 2 +- configs/ls1021aqds_nand_defconfig | 2 +- configs/ls1021aqds_sdcard_ifc_defconfig | 2 +- configs/ls1021aqds_sdcard_qspi_defconfig | 2 +- configs/ls1021atsn_sdcard_defconfig | 2 +- ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 +- configs/ls1021atwr_sdcard_ifc_defconfig | 2 +- configs/ls1021atwr_sdcard_qspi_defconfig | 2 +- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028aqds_tfa_defconfig | 2 +- configs/ls1028aqds_tfa_lpuart_defconfig | 2 +- configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028ardb_tfa_defconfig | 2 +- configs/ls1043aqds_defconfig | 2 +- configs/ls1043aqds_lpuart_defconfig | 2 +- configs/ls1043aqds_nand_defconfig | 2 +- configs/ls1043aqds_nor_ddr3_defconfig | 2 +- configs/ls1043aqds_qspi_defconfig | 2 +- configs/ls1043aqds_sdcard_ifc_defconfig | 2 +- configs/ls1043aqds_sdcard_qspi_defconfig | 2 +- configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1043aqds_tfa_defconfig | 2 +- configs/ls1043ardb_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_defconfig | 2 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 2 +- .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_sdcard_defconfig | 2 +- configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_tfa_defconfig | 2 +- configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 5 +- configs/ls1046afrwy_tfa_defconfig | 2 +- configs/ls1046aqds_SECURE_BOOT_defconfig | 2 +- configs/ls1046aqds_defconfig | 2 +- configs/ls1046aqds_lpuart_defconfig | 2 +- configs/ls1046aqds_nand_defconfig | 2 +- configs/ls1046aqds_qspi_defconfig | 2 +- configs/ls1046aqds_sdcard_ifc_defconfig | 2 +- configs/ls1046aqds_sdcard_qspi_defconfig | 2 +- configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1046aqds_tfa_defconfig | 2 +- configs/ls1046ardb_emmc_defconfig | 2 +- configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1046ardb_qspi_defconfig | 2 +- configs/ls1046ardb_qspi_spl_defconfig | 2 +- .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 2 +- configs/ls1046ardb_sdcard_defconfig | 2 +- configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1046ardb_tfa_defconfig | 2 +- configs/ls1088aqds_defconfig | 2 +- configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1088aqds_qspi_defconfig | 2 +- configs/ls1088aqds_sdcard_ifc_defconfig | 2 +- configs/ls1088aqds_sdcard_qspi_defconfig | 2 +- configs/ls1088aqds_tfa_defconfig | 2 +- configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1088ardb_qspi_defconfig | 2 +- ...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1088ardb_sdcard_qspi_defconfig | 2 +- configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1088ardb_tfa_defconfig | 2 +- configs/ls2080aqds_SECURE_BOOT_defconfig | 2 +- configs/ls2080aqds_defconfig | 2 +- configs/ls2080aqds_nand_defconfig | 2 +- configs/ls2080aqds_sdcard_defconfig | 2 +- configs/ls2080ardb_SECURE_BOOT_defconfig | 2 +- configs/ls2080ardb_defconfig | 2 +- configs/ls2080ardb_nand_defconfig | 2 +- configs/ls2081ardb_defconfig | 2 +- configs/ls2088aqds_tfa_defconfig | 2 +- configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls2088ardb_qspi_defconfig | 2 +- configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls2088ardb_tfa_defconfig | 2 +- configs/lschlv2_defconfig | 2 +- configs/lsxhl_defconfig | 2 +- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/lx2160aqds_tfa_defconfig | 2 +- configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/lx2160ardb_tfa_defconfig | 2 +- configs/lx2160ardb_tfa_stmm_defconfig | 2 +- configs/lx2162aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/lx2162aqds_tfa_defconfig | 2 +- .../lx2162aqds_tfa_verified_boot_defconfig | 2 +- configs/m53menlo_defconfig | 2 +- configs/malta64_defconfig | 2 +- configs/malta64el_defconfig | 2 +- configs/malta_defconfig | 2 +- configs/maltael_defconfig | 2 +- configs/maxbcm_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/medcom-wide_defconfig | 2 +- configs/meerkat96_defconfig | 2 +- configs/microblaze-generic_defconfig | 2 +- configs/minnowmax_defconfig | 2 +- configs/miqi-rk3288_defconfig | 2 +- configs/mixtile_loftq_defconfig | 2 +- configs/mk802_a10s_defconfig | 2 +- configs/mk802_defconfig | 2 +- configs/mk802ii_defconfig | 2 +- configs/mscc_jr2_defconfig | 2 +- configs/mscc_luton_defconfig | 2 +- configs/mscc_ocelot_defconfig | 2 +- configs/mscc_serval_defconfig | 2 +- configs/mscc_servalt_defconfig | 2 +- configs/mt7620_mt7530_rfb_defconfig | 2 +- configs/mt7620_rfb_defconfig | 2 +- configs/mt7622_rfb_defconfig | 2 +- configs/mt7623a_unielec_u7623_02_defconfig | 2 +- configs/mt7623n_bpir2_defconfig | 2 +- configs/mt7628_rfb_defconfig | 2 +- configs/mt7629_rfb_defconfig | 2 +- configs/mt8183_pumpkin_defconfig | 2 +- configs/mt8512_bm1_emmc_defconfig | 2 +- configs/mt8516_pumpkin_defconfig | 2 +- configs/mt8518_ap1_emmc_defconfig | 2 +- configs/mvebu_crb_cn9130_defconfig | 2 +- configs/mvebu_db-88f3720_defconfig | 2 +- configs/mvebu_db_armada8k_defconfig | 2 +- configs/mvebu_db_cn9130_defconfig | 2 +- configs/mvebu_espressobin-88f3720_defconfig | 2 +- configs/mvebu_mcbin-88f8040_defconfig | 2 +- configs/mvebu_puzzle-m801-88f8040_defconfig | 2 +- configs/mx23_olinuxino_defconfig | 2 +- configs/mx23evk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_com_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/myir_mys_6ulx_defconfig | 2 +- configs/nanopc-t4-rk3399_defconfig | 2 +- configs/nanopi-k2_defconfig | 2 +- configs/nanopi-m4-2gb-rk3399_defconfig | 2 +- configs/nanopi-m4-rk3399_defconfig | 2 +- configs/nanopi-m4b-rk3399_defconfig | 2 +- configs/nanopi-neo4-rk3399_defconfig | 2 +- configs/nanopi-r2s-rk3328_defconfig | 2 +- configs/nanopi-r4s-rk3399_defconfig | 2 +- configs/nanopi_a64_defconfig | 2 +- configs/nanopi_m1_defconfig | 2 +- configs/nanopi_m1_plus_defconfig | 2 +- configs/nanopi_neo2_defconfig | 2 +- configs/nanopi_neo_air_defconfig | 2 +- configs/nanopi_neo_defconfig | 2 +- configs/nanopi_neo_plus2_defconfig | 2 +- configs/nas220_defconfig | 2 +- configs/net2big_v2_defconfig | 2 +- configs/netgear_cg3100d_ram_defconfig | 2 +- configs/netgear_dgnd3700v2_ram_defconfig | 2 +- configs/netspace_lite_v2_defconfig | 2 +- configs/netspace_max_v2_defconfig | 2 +- configs/netspace_mini_v2_defconfig | 2 +- configs/netspace_v2_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/nsim_700_defconfig | 2 +- configs/nsim_700be_defconfig | 2 +- configs/nsim_hs38_defconfig | 2 +- configs/nsim_hs38be_defconfig | 2 +- configs/nyan-big_defconfig | 2 +- configs/o4-imx6ull-nano_defconfig | 146 ++++++------------ configs/oceanic_5205_5inmfd_defconfig | 2 +- configs/odroid-c2_defconfig | 2 +- configs/odroid-c4_defconfig | 2 +- configs/odroid-go2_defconfig | 2 +- configs/odroid-n2_defconfig | 2 +- configs/odroid-xu3_defconfig | 2 +- configs/omap35_logic_defconfig | 2 +- configs/omap35_logic_somlv_defconfig | 2 +- configs/omap3_beagle_defconfig | 2 +- configs/omap3_evm_defconfig | 2 +- configs/omap3_logic_defconfig | 2 +- configs/omap3_logic_somlv_defconfig | 2 +- configs/omap4_panda_defconfig | 2 +- configs/omap4_sdp4430_defconfig | 2 +- configs/omap5_uevm_defconfig | 2 +- configs/omapl138_lcdk_defconfig | 2 +- configs/openrd_base_defconfig | 2 +- configs/openrd_client_defconfig | 2 +- configs/openrd_ultimate_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/orangepi-rk3399_defconfig | 2 +- configs/orangepi_2_defconfig | 2 +- configs/orangepi_3_defconfig | 2 +- configs/orangepi_lite2_defconfig | 2 +- configs/orangepi_lite_defconfig | 2 +- configs/orangepi_one_defconfig | 2 +- configs/orangepi_one_plus_defconfig | 2 +- configs/orangepi_pc2_defconfig | 2 +- configs/orangepi_pc_defconfig | 2 +- configs/orangepi_pc_plus_defconfig | 2 +- configs/orangepi_plus2e_defconfig | 2 +- configs/orangepi_plus_defconfig | 2 +- configs/orangepi_prime_defconfig | 2 +- configs/orangepi_r1_defconfig | 2 +- configs/orangepi_win_defconfig | 2 +- configs/orangepi_zero2_defconfig | 2 +- configs/orangepi_zero_defconfig | 2 +- configs/orangepi_zero_plus2_defconfig | 2 +- configs/orangepi_zero_plus2_h3_defconfig | 2 +- configs/orangepi_zero_plus_defconfig | 2 +- configs/origen_defconfig | 2 +- configs/p200_defconfig | 2 +- configs/p201_defconfig | 2 +- configs/p212_defconfig | 2 +- configs/p2371-0000_defconfig | 2 +- configs/p2371-2180_defconfig | 2 +- configs/p2571_defconfig | 2 +- configs/p2771-0000-000_defconfig | 2 +- configs/p2771-0000-500_defconfig | 2 +- configs/p3450-0000_defconfig | 2 +- configs/parrot_r16_defconfig | 2 +- configs/paz00_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/peach-pi_defconfig | 2 +- configs/peach-pit_defconfig | 2 +- configs/pg_wcom_expu1_defconfig | 16 +- configs/pg_wcom_seli8_defconfig | 2 +- configs/phycore-am335x-r2-regor_defconfig | 2 +- configs/phycore-am335x-r2-wega_defconfig | 2 +- configs/phycore-imx8mm_defconfig | 2 +- configs/phycore-imx8mp_defconfig | 2 +- configs/phycore-rk3288_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/phycore_pcl063_ull_defconfig | 2 +- configs/pic32mzdask_defconfig | 2 +- configs/pico-dwarf-imx6ul_defconfig | 2 +- configs/pico-dwarf-imx7d_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_bl33_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-imx8mq_defconfig | 2 +- configs/pico-nymph-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/pine64-lts_defconfig | 2 +- configs/pine64_plus_defconfig | 2 +- configs/pine_h64_defconfig | 2 +- configs/pinebook-pro-rk3399_defconfig | 2 +- configs/pinebook_defconfig | 2 +- configs/pinecube_defconfig | 2 +- configs/pinephone_defconfig | 2 +- configs/plutux_defconfig | 2 +- configs/pm9g45_defconfig | 2 +- configs/pogo_e02_defconfig | 2 +- configs/polaroid_mid2407pxe03_defconfig | 2 +- configs/polaroid_mid2809pxe04_defconfig | 2 +- configs/poplar_defconfig | 2 +- configs/popmetal-rk3288_defconfig | 2 +- configs/porter_defconfig | 2 +- configs/pov_protab2_ips9_defconfig | 2 +- configs/puma-rk3399_defconfig | 2 +- configs/px30-core-ctouch2-px30_defconfig | 2 +- configs/px30-core-edimm2.2-px30_defconfig | 2 +- configs/pxm2_defconfig | 2 +- configs/q8_a13_tablet_defconfig | 2 +- configs/q8_a23_tablet_800x480_defconfig | 2 +- configs/q8_a33_tablet_1024x600_defconfig | 2 +- configs/q8_a33_tablet_800x480_defconfig | 2 +- configs/qemu-riscv32_spl_defconfig | 2 +- configs/qemu-riscv64_spl_defconfig | 2 +- configs/qemu-x86_64_defconfig | 2 +- configs/r7-tv-dongle_defconfig | 2 +- configs/r8a774a1_beacon_defconfig | 2 +- configs/r8a774b1_beacon_defconfig | 2 +- configs/r8a774e1_beacon_defconfig | 2 +- configs/r8a77970_eagle_defconfig | 2 +- configs/r8a77980_condor_defconfig | 2 +- configs/r8a77990_ebisu_defconfig | 2 +- configs/r8a77995_draak_defconfig | 2 +- configs/rastaban_defconfig | 2 +- configs/rcar3_salvator-x_defconfig | 2 +- configs/rcar3_ulcb_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/roc-cc-rk3308_defconfig | 2 +- configs/roc-cc-rk3328_defconfig | 2 +- configs/roc-pc-mezzanine-rk3399_defconfig | 2 +- configs/roc-pc-rk3399_defconfig | 2 +- configs/rock-pi-4-rk3399_defconfig | 2 +- configs/rock-pi-4c-rk3399_defconfig | 2 +- configs/rock-pi-e-rk3328_defconfig | 2 +- configs/rock-pi-n10-rk3399pro_defconfig | 2 +- configs/rock-pi-n8-rk3288_defconfig | 2 +- configs/rock2_defconfig | 2 +- configs/rock64-rk3328_defconfig | 2 +- configs/rock960-rk3399_defconfig | 2 +- configs/rock_defconfig | 2 +- configs/rockpro64-rk3399_defconfig | 2 +- configs/rut_defconfig | 2 +- configs/s400_defconfig | 2 +- configs/s5p4418_nanopi2_defconfig | 2 +- configs/s5p_goni_defconfig | 2 +- configs/sagem_f@st1704_ram_defconfig | 2 +- configs/sam9x60ek_mmc_defconfig | 2 +- configs/sam9x60ek_nandflash_defconfig | 2 +- configs/sam9x60ek_qspiflash_defconfig | 2 +- configs/sama5d27_giantboard_defconfig | 2 +- configs/sama5d27_som1_ek_mmc1_defconfig | 2 +- configs/sama5d27_som1_ek_mmc_defconfig | 2 +- configs/sama5d27_som1_ek_qspiflash_defconfig | 2 +- configs/sama5d27_wlsom1_ek_mmc_defconfig | 2 +- .../sama5d27_wlsom1_ek_qspiflash_defconfig | 2 +- configs/sama5d2_icp_mmc_defconfig | 2 +- configs/sama5d2_ptc_ek_mmc_defconfig | 2 +- configs/sama5d2_ptc_ek_nandflash_defconfig | 2 +- configs/sama5d2_xplained_emmc_defconfig | 2 +- configs/sama5d2_xplained_mmc_defconfig | 2 +- configs/sama5d2_xplained_qspiflash_defconfig | 2 +- configs/sama5d2_xplained_spiflash_defconfig | 2 +- configs/sama5d36ek_cmp_mmc_defconfig | 2 +- configs/sama5d36ek_cmp_nandflash_defconfig | 2 +- configs/sama5d36ek_cmp_spiflash_defconfig | 2 +- configs/sama5d3_xplained_mmc_defconfig | 2 +- configs/sama5d3_xplained_nandflash_defconfig | 2 +- configs/sama5d3xek_mmc_defconfig | 2 +- configs/sama5d3xek_nandflash_defconfig | 2 +- configs/sama5d3xek_spiflash_defconfig | 2 +- configs/sama5d4_xplained_mmc_defconfig | 2 +- configs/sama5d4_xplained_nandflash_defconfig | 2 +- configs/sama5d4_xplained_spiflash_defconfig | 2 +- configs/sama5d4ek_mmc_defconfig | 2 +- configs/sama5d4ek_nandflash_defconfig | 2 +- configs/sama5d4ek_spiflash_defconfig | 2 +- configs/sama7g5ek_mmc1_defconfig | 2 +- configs/sama7g5ek_mmc_defconfig | 2 +- configs/sandbox64_defconfig | 2 +- configs/sandbox_defconfig | 2 +- configs/sandbox_flattree_defconfig | 2 +- configs/sandbox_noinst_defconfig | 2 +- configs/sandbox_spl_defconfig | 2 +- configs/seaboard_defconfig | 2 +- configs/seeed_npi_imx6ull_defconfig | 26 ++-- configs/sei510_defconfig | 2 +- configs/sei610_defconfig | 2 +- configs/sfr_nb4-ser_ram_defconfig | 2 +- configs/sheep-rk3368_defconfig | 2 +- configs/sheevaplug_defconfig | 2 +- configs/sifive_unleashed_defconfig | 2 +- configs/sifive_unmatched_defconfig | 2 +- configs/silinux_ek874_defconfig | 2 +- configs/silk_defconfig | 2 +- configs/smartweb_defconfig | 2 +- configs/smdk5250_defconfig | 2 +- configs/smdk5420_defconfig | 2 +- configs/smdkc100_defconfig | 2 +- configs/smdkv310_defconfig | 2 +- configs/smegw01_defconfig | 2 +- configs/snow_defconfig | 2 +- configs/socfpga_agilex_atf_defconfig | 2 +- configs/socfpga_agilex_defconfig | 2 +- configs/socfpga_agilex_vab_defconfig | 2 +- configs/socfpga_arria10_defconfig | 2 +- configs/socfpga_arria5_defconfig | 2 +- configs/socfpga_cyclone5_defconfig | 2 +- configs/socfpga_dbm_soc1_defconfig | 2 +- configs/socfpga_de0_nano_soc_defconfig | 2 +- configs/socfpga_de10_nano_defconfig | 2 +- configs/socfpga_de1_soc_defconfig | 2 +- configs/socfpga_is1_defconfig | 2 +- configs/socfpga_mcvevk_defconfig | 2 +- configs/socfpga_secu1_defconfig | 2 +- configs/socfpga_sockit_defconfig | 2 +- configs/socfpga_socrates_defconfig | 2 +- configs/socfpga_sr1500_defconfig | 2 +- configs/socfpga_stratix10_atf_defconfig | 2 +- configs/socfpga_stratix10_defconfig | 2 +- configs/socfpga_vining_fpga_defconfig | 2 +- configs/som-db5800-som-6867_defconfig | 2 +- configs/sopine_baseboard_defconfig | 2 +- configs/spring_defconfig | 2 +- configs/stih410-b2260_defconfig | 2 +- configs/stm32f429-discovery_defconfig | 2 +- configs/stm32f429-evaluation_defconfig | 2 +- configs/stm32f469-discovery_defconfig | 2 +- configs/stm32f746-disco_defconfig | 2 +- configs/stm32f769-disco_defconfig | 2 +- configs/stm32h743-disco_defconfig | 2 +- configs/stm32h743-eval_defconfig | 2 +- configs/stm32h750-art-pi_defconfig | 2 +- ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 2 +- ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 2 +- ...-microgea-stm32mp1-microdev2-of7_defconfig | 2 +- ...mp15-microgea-stm32mp1-microdev2_defconfig | 2 +- configs/stm32mp15_basic_defconfig | 2 +- configs/stm32mp15_dhcom_basic_defconfig | 2 +- configs/stm32mp15_dhcor_basic_defconfig | 2 +- configs/stm32mp15_trusted_defconfig | 2 +- configs/stmark2_defconfig | 2 +- configs/stout_defconfig | 2 +- configs/sun8i_a23_evb_defconfig | 2 +- configs/sunxi_Gemei_G9_defconfig | 2 +- configs/syzygy_hub_defconfig | 2 +- configs/tanix_tx6_defconfig | 2 +- configs/taurus_defconfig | 2 +- configs/tb100_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/tbs_a711_defconfig | 2 +- configs/tec-ng_defconfig | 2 +- configs/tec_defconfig | 2 +- configs/teres_i_defconfig | 2 +- ...able-x86-conga-qa3-e3845-pcie-x4_defconfig | 2 +- .../theadorable-x86-conga-qa3-e3845_defconfig | 2 +- configs/theadorable-x86-dfi-bt700_defconfig | 2 +- configs/theadorable_debug_defconfig | 2 +- configs/thuban_defconfig | 2 +- configs/thunderx_88xx_defconfig | 2 +- configs/ti816x_evm_defconfig | 2 +- configs/tinker-rk3288_defconfig | 2 +- configs/tinker-s-rk3288_defconfig | 2 +- configs/topic_miami_defconfig | 2 +- configs/topic_miamilite_defconfig | 2 +- configs/topic_miamiplus_defconfig | 2 +- configs/tplink_wdr4300_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/trimslice_defconfig | 2 +- configs/tuge1_defconfig | 2 +- configs/turris_mox_defconfig | 22 +-- configs/turris_omnia_defconfig | 2 +- configs/tuxx1_defconfig | 2 +- configs/u200_defconfig | 2 +- configs/uDPU_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/uniphier_ld4_sld8_defconfig | 2 +- configs/uniphier_v7_defconfig | 2 +- configs/uniphier_v8_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/venice2_defconfig | 2 +- configs/ventana_defconfig | 2 +- configs/verdin-imx8mm_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/vocore2_defconfig | 2 +- configs/vyasa-rk3288_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 1 - configs/wetek-core2_defconfig | 2 +- configs/x530_defconfig | 2 +- configs/xilinx_versal_mini_defconfig | 2 +- configs/xilinx_versal_mini_emmc0_defconfig | 2 +- configs/xilinx_versal_mini_emmc1_defconfig | 2 +- configs/xilinx_zynq_virt_defconfig | 2 +- configs/xilinx_zynqmp_mini_defconfig | 2 +- configs/xilinx_zynqmp_mini_emmc0_defconfig | 2 +- configs/xilinx_zynqmp_mini_emmc1_defconfig | 2 +- configs/xilinx_zynqmp_mini_nand_defconfig | 2 +- .../xilinx_zynqmp_mini_nand_single_defconfig | 2 +- configs/xilinx_zynqmp_mini_qspi_defconfig | 2 +- configs/xilinx_zynqmp_r5_defconfig | 2 +- configs/xilinx_zynqmp_virt_defconfig | 2 +- configs/zynq_cse_nand_defconfig | 2 +- configs/zynq_cse_nor_defconfig | 2 +- configs/zynq_cse_qspi_defconfig | 2 +- 1012 files changed, 1130 insertions(+), 1256 deletions(-) diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 6a58d3ccfc9..6a9d0a4673a 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 @@ -8,7 +9,6 @@ CONFIG_SYS_CLK_FREQ=912000000 CONFIG_MMC0_CD_PIN="PH1" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 21a77fd14da..798f879945c 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -7,7 +8,6 @@ CONFIG_MMC0_CD_PIN="PG1" CONFIG_MMC1_CD_PIN="PG13" CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 6c90176d371..568f64ee66c 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="PB10" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUNXI_NO_PMIC=y CONFIG_CONS_INDEX=2 diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 2c87b18604c..401cce0c14c 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -13,7 +14,6 @@ CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index f9f8f14151e..014f68e4c61 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -10,7 +11,6 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 26604c0b9e9..df3c99aae6b 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -8,7 +9,6 @@ CONFIG_USB0_VBUS_PIN="PC17" CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index d6bd9625596..b5e61aa8b56 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 CONFIG_MMC0_CD_PIN="PH1" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index 2b3c11681ad..a6ed8b53608 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro-emmc" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -8,7 +9,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_I2C1_ENABLE=y CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro-emmc" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index 55a0ac2410a..6adee59c3a5 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -9,7 +10,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_I2C1_ENABLE=y CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index cb43153981b..5259997ca52 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -10,7 +11,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB0_VBUS_DET="PH5" CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index 6ed414a8989..010e8c22659 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -10,7 +11,6 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index 5082196a8e5..df7b5b4ff26 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -9,7 +10,6 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig index 41f3caf054c..351a454339b 100644 --- a/configs/A33-OLinuXino_defconfig +++ b/configs/A33-OLinuXino_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PB2" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index b2b704de837..51341c0306d 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:40000,le:87,ri:112,up:38,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 23ec20108fb..4972352c90d 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo: CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index 68fb1250016..768d2300b1a 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 307952d85f9..cd35d052957 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="PG13" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 37bcb3d7bf4..e0adffd120b 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra" CONFIG_SPL=y CONFIG_MACH_SUN8I_R40=y CONFIG_DRAM_CLK=576 @@ -8,7 +9,6 @@ CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH23" CONFIG_USB2_VBUS_PIN="PH23" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 43903a5ce4b..50c8adca59e 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 CONFIG_MACPWR="PH23" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index cc40c914ebe..bad38a66568 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=600 @@ -8,7 +9,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index c89e40f3529..5447bea0bb8 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -8,7 +9,6 @@ CONFIG_USB1_VBUS_PIN="PH0" CONFIG_USB2_VBUS_PIN="PH1" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 88b0b026c5f..9e2c7cc1a56 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -1,15 +1,14 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y CONFIG_CHIP_DIP_SCAN=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y -CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_DFU_RAM=y # CONFIG_MMC is not set CONFIG_AXP_ALDO3_VOLT=3300 diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 7f10fd2b886..845a429976d 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro" CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index 9d2ee645249..1cd39d498f2 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 9207d6d4cd3..6d5ea16575b 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 209c249ee46..a6b3bd438a8 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=240 @@ -15,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_I2C_SDA="PA23" CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24" CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 124c226f85b..65cf6214792 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig index 90b2c69e5f1..c66f29e5da2 100644 --- a/configs/Cubieboard4_defconfig +++ b/configs/Cubieboard4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cubieboard4" CONFIG_SPL=y CONFIG_MACH_SUN9I=y CONFIG_DRAM_CLK=672 @@ -11,5 +12,4 @@ CONFIG_USB0_ID_DET="PH16" CONFIG_USB1_VBUS_PIN="PH14" CONFIG_USB3_VBUS_PIN="PH15" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cubieboard4" CONFIG_AXP809_POWER=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 120454b8997..b5a28ab5395 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index dceecf8527d..0929997736d 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -10,7 +11,6 @@ CONFIG_USB0_ID_DET="PH19" CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PH12" CONFIG_GMAC_TX_DELAY=1 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 83716bc9000..48d7f344bdd 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-cubietruck-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_CLK=672 @@ -13,7 +14,6 @@ CONFIG_USB1_VBUS_PIN="PD29" CONFIG_USB2_VBUS_PIN="PL6" CONFIG_I2C0_ENABLE=y CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-cubietruck-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_PHY_REALTEK=y diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index ab59507c182..eb6a3167afa 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:210,up:22,lo CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index d2ea3fce882..773f1a99270 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo: CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index f0fdf7e272c..24e8b5be1b5 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=251 @@ -7,7 +8,6 @@ CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 8a28fe02d9d..dcd22ac56a1 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_EMR1=4 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH9" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index 5fc9f63637b..4f67274420a 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index 68545fcf7b2..c7bea1ce833 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -7,7 +8,6 @@ CONFIG_MACPWR="PH23" CONFIG_MMC0_CD_PIN="PH10" CONFIG_SATAPWR="PB3" CONFIG_GMAC_TX_DELAY=4 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index 04d7b645047..b50bae9bbde 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" # CONFIG_NETDEVICES is not set diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 55c2fc2f46f..25e371f237b 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=408 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=122 CONFIG_USB1_VBUS_PIN="PH11" CONFIG_SATAPWR="PH2" CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index cb3686d4450..e278e279182 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=122 CONFIG_SATAPWR="PH2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index fe817510112..9a70d7e9dd0 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 9cb4e5e4f64..3fa0f0783f3 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5208EVBE=y CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE" +CONFIG_TARGET_M5208EVBE=y CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index 402ad7bb006..bab8ac4b78d 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x8000 -CONFIG_TARGET_M52277EVB=y CONFIG_DEFAULT_DEVICE_TREE="M52277EVB" +CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 8dc68a3f694..98c64ff31a6 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M52277EVB=y CONFIG_DEFAULT_DEVICE_TREE="M52277EVB_stmicro" +CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index c52a8a68017..393bb4998bf 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFC00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5235EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32" +CONFIG_TARGET_M5235EVB=y CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 6acf677ce26..59a34497981 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5235EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5235EVB" +CONFIG_TARGET_M5235EVB=y CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index 4ce75c1434f..1535aeca955 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5249EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5249EVB" +CONFIG_TARGET_M5249EVB=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_DEVICE_NULLDEV=y diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 8444063e1a1..7b3bf78b8f8 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_TARGET_M5253DEMO=y CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO" +CONFIG_TARGET_M5253DEMO=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index d716e52f660..0a6360d85ea 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5272C3=y CONFIG_DEFAULT_DEVICE_TREE="M5272C3" +CONFIG_TARGET_M5272C3=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index d6d4c7d3e39..5547ee33e36 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5275EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5275EVB" +CONFIG_TARGET_M5275EVB=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index b7eb325a901..90a4cf819fb 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5282EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5282EVB" +CONFIG_TARGET_M5282EVB=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 896337283f3..950a0fb3382 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x8000 -CONFIG_TARGET_M53017EVB=y CONFIG_DEFAULT_DEVICE_TREE="M53017EVB" +CONFIG_TARGET_M53017EVB=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2" diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index c8ef0d26c48..078abb2356c 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5329EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE" +CONFIG_TARGET_M5329EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index 41c0d4562a2..8b1325e71fe 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5329EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE" +CONFIG_TARGET_M5329EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 8575859a7aa..07955785e2e 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5373EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5373EVB" +CONFIG_TARGET_M5373EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index 6bfa2b0d1dc..6aa4c2fa262 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200" diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index badde21c249..7273ee02d71 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x20000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_mii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=25000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200" diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index 55768ad06ee..90df8f4af3c 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x20000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200" diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 9862364d462..d7b0f2d9d2c 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x20000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii_lowfreq" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200" diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index b8832eae6cb..556bbefd6ba 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_mii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200" diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index 9edbd2db5fb..19b1aa6a02a 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_rmii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200" diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 48291604892..a3583e5c5ba 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_M54451EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54451EVB" +CONFIG_TARGET_M54451EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index c889340c0f8..5f5e6a55f6f 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x20000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54451EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54451EVB_stmicro" +CONFIG_TARGET_M54451EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 51e74712d5a..50bdb2c0cce 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_a66" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index 99e647ff73c..40d025f66ea 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index b01c905d294..97d5d15ad65 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_i66" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 8879777bad4..d82f091fea3 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_intel" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index f18400e79b4..147d87e8789 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x4FE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_stm33" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig index a919bf720bb..c315d91e717 100644 --- a/configs/M5475AFE_defconfig +++ b/configs/M5475AFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475AFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig index b9f4904134a..f6a7adf9251 100644 --- a/configs/M5475BFE_defconfig +++ b/configs/M5475BFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475BFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig index ae585357263..2ae572d9fff 100644 --- a/configs/M5475CFE_defconfig +++ b/configs/M5475CFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475CFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig index a9d085f3707..4cd7d95037e 100644 --- a/configs/M5475DFE_defconfig +++ b/configs/M5475DFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475DFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig index 38d31ace012..5379fcc29ee 100644 --- a/configs/M5475EFE_defconfig +++ b/configs/M5475EFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475EFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig index 0a620c39f1a..e54781abb89 100644 --- a/configs/M5475FFE_defconfig +++ b/configs/M5475FFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475FFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig index 05b0ba7af8c..8b6f8f3e9e4 100644 --- a/configs/M5475GFE_defconfig +++ b/configs/M5475GFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475GFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig index 548deaf9027..d98128c9081 100644 --- a/configs/M5485AFE_defconfig +++ b/configs/M5485AFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485AFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig index 0d72da3b364..3b2eebe4f7e 100644 --- a/configs/M5485BFE_defconfig +++ b/configs/M5485BFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485BFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig index 68908e2f431..7b9cc4bca58 100644 --- a/configs/M5485CFE_defconfig +++ b/configs/M5485CFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485CFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig index 25872009536..aee1c2100e4 100644 --- a/configs/M5485DFE_defconfig +++ b/configs/M5485DFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485DFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig index a43b4022380..69195387a14 100644 --- a/configs/M5485EFE_defconfig +++ b/configs/M5485EFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485EFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig index 335ad0e1e73..a9ab4770df3 100644 --- a/configs/M5485FFE_defconfig +++ b/configs/M5485FFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485FFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig index 2665be9fb56..ce93b82ce04 100644 --- a/configs/M5485GFE_defconfig +++ b/configs/M5485GFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485GFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig index a0536bfae11..7feb9c4c1c0 100644 --- a/configs/M5485HFE_defconfig +++ b/configs/M5485HFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485HFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index cb5939e535f..f2c1019649b 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index eba1aa96bbd..003ebd8c6bf 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -2,8 +2,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFE000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_SYS_CLK_FREQ=66666667 CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb" +CONFIG_SYS_CLK_FREQ=66666667 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_MPC837XERDB=y diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index ab2fe2ba65e..6481f6f78cc 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -8,6 +9,5 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index ba5dcfbe1d5..e77b0072923 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=360 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:768,y:1024,depth:18,pclk_khz:66000,le:56,ri:60,up:30,lo CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 64d4f66b34d..a0aee660b40 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" CONFIG_SPL=y CONFIG_MACH_SUN4I=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SCSI_AHCI=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index ca82094c65d..c6bfe381db8 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=120 CONFIG_INITIAL_USB_SCAN_DELAY=2000 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index a2aa4bf8c1e..dd441efb482 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_MACPWR="PH15" CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 6392d0d84a8..2b9bca13d08 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 89427b06769..eb3458c9edc 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -7,7 +8,6 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_PHY_REALTEK=y diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index c5c93b9ada0..133bb6da68e 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 CONFIG_DRAM_ZQ=122 CONFIG_MMC0_CD_PIN="PH1" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index 823b82e71b4..be6dd417545 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index 15db3962fe6..0944e649578 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" CONFIG_SPL=y CONFIG_MACH_SUN9I=y CONFIG_DRAM_CLK=672 @@ -11,5 +12,4 @@ CONFIG_USB0_ID_DET="PH3" CONFIG_USB1_VBUS_PIN="PH4" CONFIG_USB3_VBUS_PIN="PH5" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" CONFIG_AXP809_POWER=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index 6832eaa5ef3..3353d09574a 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index d4dc950e9d6..38efde812a8 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=600 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=15291 CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index 5f629a56ab0..a6f427068da 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -9,7 +10,6 @@ CONFIG_USB2_VBUS_PIN="PH22" CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 1cd3f798f30..cf0b95bec2c 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -11,7 +12,6 @@ CONFIG_USB1_VBUS_PIN="PH26" CONFIG_USB2_VBUS_PIN="PH22" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 269a4453b95..002c5d6fe72 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index e44e91b1b7c..b7fd55b7a4a 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index bf612065d60..08d98bf473d 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 5809b1cd720..3f308e41cff 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index e1e7daf62cc..a17b187ea67 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 4863d608603..a937b5b2de2 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 1f3f4751163..b73a768c8df 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 329bd4b0e4c..44d6d47d434 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index d639f459e66..e748c2209bf 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index a2bc41c3260..3b7e6f61025 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 709e4ac196e..94c66f2daaf 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index e8abb67231c..746ed8df8dd 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 32efb87aa05..31d46184822 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index c73c9dbedd7..16c6ae01e87 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index d02bd7562e2..296fddaab13 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 542805798c3..47488a161e0 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 591c2785c39..d92fb414a1c 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 6bccd7c2d08..a9ad5d07a1c 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 8ec246d0f12..45b1747babe 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index c9e2f59dfb0..8b268415207 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 2791eefa87d..87501a1aa7a 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index f97742830ac..62f767595eb 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 0e7be2bb9c7..f8c51562a1f 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 5c53a702f75..3ffa22f076d 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index aca3e28da6e..620b6a4b1f8 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 3f317fda68a..d1c54bcd12c 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 755674d532c..d25e1ca3c8f 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index a1abbc13bf2..238a1c49e1c 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="\nSBx81LIFKW" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw" +CONFIG_IDENT_STRING="\nSBx81LIFKW" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 81e09074832..77a8fc6683d 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="\nSBx81LIFXCAT" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat" +CONFIG_IDENT_STRING="\nSBx81LIFXCAT" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 2b84af45378..8fa8246344c 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 @@ -9,7 +10,6 @@ CONFIG_MMC3_PINS="PC" CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 31329dd52e1..4eb5300b046 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=552 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:66000,le:90,ri:160,up:3,lo CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CMD_DFU=y CONFIG_DFU_RAM=y diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index 2ce3261b403..aba95270eb2 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index fbd7766cf13..d27f495f48f 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_TYPE=7 @@ -14,7 +15,6 @@ CONFIG_USB0_ID_DET="PH11" CONFIG_USB1_VBUS_PIN="PD24" CONFIG_AXP_GPIO=y CONFIG_SATAPWR="PD25" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_PHY_REALTEK=y diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig index ebe7c30242d..bb62ae9a7a9 100644 --- a/configs/Sunchip_CX-A99_defconfig +++ b/configs/Sunchip_CX-A99_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99" CONFIG_SPL=y CONFIG_MACH_SUN9I=y CONFIG_DRAM_CLK=600 @@ -10,5 +11,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_VBUS_PIN="PH15" CONFIG_USB1_VBUS_PIN="PL7" CONFIG_USB3_VBUS_PIN="PL8" -CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index a298779f974..99071d742f1 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index e4ad7387125..31880438bc3 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_FIT=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index c2cda977d91..102e4e14ade 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -7,13 +7,13 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 473b029b811..93acf0fb0a2 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index cf1f14557fb..337ee7fd977 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 15b97a9f988..063d6a734fd 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_FIT=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index ffd23fab6bf..b395bf17aa0 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x140000 +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index cb5d7ff2338..53b82f789f7 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 1029a8ec34d..aa4f094cb55 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_FIT=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 2b95637f2c2..bdcdcef605f 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index e47234d4d77..54056c3e194 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_FIT=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index d4431d69c73..53133555132 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -7,13 +7,13 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_FIT=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 3b533a31ad0..9284616c528 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 7b9013e5ecf..c6634795883 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index af85fa6cdf7..4c6879b7a5d 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -7,13 +7,13 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 73b90c21096..f2a4bef038f 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_FIT=y diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index 91124a444ab..954d197e55f 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -18,7 +19,6 @@ CONFIG_VIDEO_LCD_RESET="PG11" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_TL059WV5C0=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 3872f0bef8f..b001d8239ee 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:210,up:22,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index e789619c1ee..dbd6bd7bf83 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -9,7 +10,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index 42d93faa55e..7433727ff25 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_MMC0_CD_PIN="PB3" CONFIG_USB1_VBUS_PIN="PG12" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP_ALDO3_VOLT=3300 diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index 2f093e062d0..84302ffda86 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=408 @@ -17,7 +18,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig index 3c1eca45576..6701ecce2fe 100644 --- a/configs/Yones_Toptech_BS1078_V2_defconfig +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-yones-toptech-bs1078-v2" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=420 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-yones-toptech-bs1078-v2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 1bba7556a97..8ec9eb3e9c2 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 51398d94ed4..16cef18beef 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index e8dc8161a64..34c6af6e7e1 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -2,9 +2,9 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 494cb6527dd..4a8da329559 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -2,10 +2,10 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y CONFIG_XIP=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index d23b56c9bf3..9cd7848c92e 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -2,9 +2,9 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index adc9d669eae..188fa08dfbd 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -2,10 +2,10 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index d833b206d9b..3025c13d1dc 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Alt" CONFIG_R8A7794=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 8d0e9f8a610..7b09214597f 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_BALTOS=y CONFIG_SPL_MMC_SUPPORT=y @@ -10,7 +11,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index e0d144eab92..498174a1fa2 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -4,10 +4,10 @@ CONFIG_ARCH_CPU_INIT=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_AM33XX=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x280000 -CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index edb56283dfe..79fb8b3f8fd 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -2,9 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 24c5b34bbb1..9eb4ae1932b 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -5,12 +5,12 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index d412311cec6..7eafb6d4bd0 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_GUARDIAN=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -15,7 +16,6 @@ CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_ENV_OFFSET_REDUND=0x540000 CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" CONFIG_DISTRO_DEFAULTS=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index b4d3575ec20..3d678fa06a8 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -4,9 +4,9 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0x40300350 CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index f0c75cd4a45..21ef7d6a445 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -4,12 +4,12 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0x40301950 CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set # CONFIG_SPL_LIBDISK_SUPPORT is not set -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 6ebf8f859dd..5b9b370d30d 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x18000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_IGEP003X=y CONFIG_SPL_MMC_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033" diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index 81f211b5d5e..6315d449a23 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" CONFIG_AM33XX=y CONFIG_TARGET_PDU001=y CONFIG_SPL_MMC_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" CONFIG_LOCALVERSION="-EETS-1.0.0" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index caabdf4192e..1f6c7b744cb 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -15,7 +16,6 @@ CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index b1912cede4c..8d963b12d24 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_ICT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index a533c3924aa..6ac5485644f 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_NETBOOT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index fb815793486..c2f1f579cd4 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index bc0f2ddc952..3df8c976010 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SL50=y CONFIG_SPL_MMC_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x20000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 0b9bd0e475c..d9e089e2aa2 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="am3517-evm" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_AM3517_EVM=y CONFIG_EMIF4=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x3000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am3517-evm" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 6782695689f..b73fb9260d0 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -5,10 +5,10 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index fb8c78d11f5..546669f4658 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_AM43XX=y CONFIG_ENV_OFFSET_REDUND=0x120000 -CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI,QSPI_BOOT" CONFIG_QSPI_BOOT=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 7b2cb8e8d99..ed5ce0f380a 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -5,10 +5,10 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL_RTC_DDR_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index a8827e66785..b1be0272e71 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -5,9 +5,9 @@ CONFIG_ISW_ENTRY_ADDR=0x40300350 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 8c9ba774b83..0f4872993fb 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_SPL_TEXT_BASE=0x403018E0 CONFIG_AM43XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -14,7 +15,6 @@ CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 6157bd1913a..e21b3dff537 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP54XX=y CONFIG_TARGET_AM57XX_EVM=y @@ -14,7 +15,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 3de220808e9..3807732b02a 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 @@ -17,7 +18,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 20da3a0d26d..b0cfecdd63b 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_SPL_TEXT_BASE=0x40306D50 CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -19,7 +20,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 249b0dbabf6..1a579ddbdd3 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_AM642_A53_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 2810fa1fc57..bee4f589817 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm" CONFIG_SPL_TEXT_BASE=0x70020000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -21,7 +22,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm" CONFIG_SPL_LOAD_FIT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 01e027f607f..e2039e40f05 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 164c6651fb9..739ced8edb9 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 16163422251..5930ef14312 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -10,13 +10,13 @@ CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index bd051eb2ad6..61c00b83a00 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -10,13 +10,13 @@ CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index ec0c7df0f7e..5182d86894c 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index 5c1949f79d7..8f587ed8152 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -13,6 +13,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index b0de49cb165..ae44b66d109 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-amarula-relic" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_VIDEO_DE2 is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-amarula-relic" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index b66b33b0e74..a17cc21cb49 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0xFFC00000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_TARGET_AMCORE=y CONFIG_DEFAULT_DEVICE_TREE="amcore" +CONFIG_TARGET_AMCORE=y CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index a10bff8ae63..6f0cf6f0637 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ap121" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y -CONFIG_DEFAULT_DEVICE_TREE="ap121" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index e685a96a17c..1aae19c3bf2 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ap143" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP143=y -CONFIG_DEFAULT_DEVICE_TREE="ap143" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index 7eb7de68793..0f7a81730d3 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ap152" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP152=y -CONFIG_DEFAULT_DEVICE_TREE="ap152" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 2a0228262a1..b5bb577f816 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y -CONFIG_TARGET_APALIS_IMX8=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis" +CONFIG_TARGET_APALIS_IMX8=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/apalis-imx8x_defconfig b/configs/apalis-imx8x_defconfig index 22a83fe7565..4d999d8d536 100644 --- a/configs/apalis-imx8x_defconfig +++ b/configs/apalis-imx8x_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y -CONFIG_TARGET_APALIS_IMX8X=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-apalis" +CONFIG_TARGET_APALIS_IMX8X=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 5da83e9d1fb..7cd028f2c5c 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_APALIS_TK1=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=1 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index e1817c39f7b..ad109c444fe 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_MX6Q=y CONFIG_TARGET_APALIS_IMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 85f9ce9793b..40813a0db78 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_APALIS_T30=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 4d9cb5b4f11..d0e83508940 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0xD0000 CONFIG_MX6DL=y CONFIG_TARGET_ARISTAINETOS2C=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_7" CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_7" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index dd63e8f29d1..cad9c8b44d5 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0xD0000 CONFIG_MX6DL=y CONFIG_TARGET_ARISTAINETOS2CCSLB=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_cslb_7" CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_cslb_7" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 1b4dd324b8d..bc7af829fb8 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -7,10 +7,10 @@ CONFIG_TARGET_ARNDALE=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x86200 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_IDENT_STRING=" for ARNDALE" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index 0d27189195c..9d20cb93e05 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_SECT_SIZE=0x8000 -CONFIG_TARGET_ASTRO_MCF5373L=y CONFIG_DEFAULT_DEVICE_TREE="astro_mcf5373l" +CONFIG_TARGET_ASTRO_MCF5373L=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion" diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 89f5f2c9597..ce0a3ce35ac 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index a7d0d2811bc..5bb6ae68adf 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index a5eaba57bda..95a0798afaf 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 2172c7908d1..48780fd4937 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index c1f79bc69db..8705e881e56 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 4aaae5016a8..1483b6f45c4 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index c41744152d0..3d6e6cf6df9 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index c41744152d0..3d6e6cf6df9 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index d7f0238c15f..e716d7156e4 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 0547947722e..db3d0fbff13 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index a41ad60b1e7..01b2c84526b 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 65e8fab5592..4b0135f607b 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 2c292d2c7f2..c37a8c4a333 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 2a5acd5f015..e7ee1440239 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 25b4309d3ce..00cc182f852 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 32cb46d96a2..9610ddd34ed 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 25232054b13..6c85767b3da 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index ecfbacde0b3..28195da7e9f 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 8e0db876961..a98f759d100 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index f8efca1978b..cdcd67b017c 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index e5c270ac126..a958162574b 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index bc15efe6b92..f4c3fb864ef 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 084376dfc10..161ec94695f 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 44670faba09..3a66fe60756 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index c7b3012c916..47eee7d8a0b 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 71a4cb41190..781d91e2ca3 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -7,10 +7,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 9551aedcdca..1fa557ff83f 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 596b170f918..49f6a7dd2e4 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH" diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 27d5490ad47..8194c137890 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 62da9896b76..25c8a16813b 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 1bb8cacfe6f..b7f8903b1a0 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SPI_BOOT=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index d9633051fdf..d2f280c2546 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index fd07ebcb8dc..4fd826b8ff5 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index a7722276ea6..a1374208bc3 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 6c0d22c2ab7..dbbe2d5d66c 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0" CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xff000000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -12,7 +13,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa -CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 0bfd7548b09..b613c5f8cd2 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 @@ -22,7 +23,6 @@ CONFIG_DEBUG_UART_CLOCK=18432000 CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068" CONFIG_BOOTDELAY=3 diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 4a403ee8aa7..ada72651e48 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -2,10 +2,10 @@ CONFIG_ARC=y CONFIG_TARGET_AXS101=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="axs101" CONFIG_DEBUG_UART_BASE=0xe0022000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=750000000 -CONFIG_DEFAULT_DEVICE_TREE="axs101" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index c04604e31b3..cc6a09e9023 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -2,10 +2,10 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="axs103" CONFIG_DEBUG_UART_BASE=0xe0022000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=100000000 -CONFIG_DEFAULT_DEVICE_TREE="axs103" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 3b1977613bf..b35f9ec682e 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=384 @@ -7,7 +8,6 @@ CONFIG_DRAM_EMR1=4 CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB2_VBUS_PIN="PH12" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 4cbd62ffad5..777a249ff95 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 CONFIG_MACPWR="PH23" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index e6fd502038c..e7d4076b564 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry" CONFIG_SPL=y CONFIG_MACH_SUN8I_R40=y CONFIG_DRAM_CLK=576 CONFIG_MMC0_CD_PIN="PH13" CONFIG_USB1_VBUS_PIN="PH23" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig index a1882092525..26ced59fb02 100644 --- a/configs/bananapi_m2_plus_h3_defconfig +++ b/configs/bananapi_m2_plus_h3_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index c03341b1d54..fb6c945919a 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-bananapi-m2-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-bananapi-m2-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig index 09d0517c83c..ac3f8f5ab8b 100644 --- a/configs/bananapi_m2_zero_defconfig +++ b/configs/bananapi_m2_zero_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_MMC0_CD_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 802f9820d07..292044d7b8b 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 0be1e0981ab..4eb3986c618 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_TARGET_BCM963158=y CONFIG_DEFAULT_DEVICE_TREE="bcm963158" +CONFIG_TARGET_BCM963158=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index 3f115350a9c..2d759fa6485 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_TARGET_BCM968360BG=y CONFIG_DEFAULT_DEVICE_TREE="bcm968360bg" +CONFIG_TARGET_BCM968360BG=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index b1f8bf5000d..4415faa9fe5 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6838=y -CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index 8f74a4516f8..09d09eede6e 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_TARGET_BCM968580XREF=y CONFIG_DEFAULT_DEVICE_TREE="bcm968580xref" +CONFIG_TARGET_BCM968580XREF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 4c892443b97..b44e7e02757 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_BEAVER=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig index cb2f3e3ff10..b429c8237c0 100644 --- a/configs/beelink-gtking_defconfig +++ b/configs/beelink-gtking_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig index 771d250e9f8..7a8bd56a654 100644 --- a/configs/beelink-gtkingpro_defconfig +++ b/configs/beelink-gtkingpro_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 9f5265512bf..42925eabcb0 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-beelink-gs1" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-beelink-gs1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_LED=y CONFIG_LED_GPIO=y diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig index 9eeb930729a..6206d909003 100644 --- a/configs/beelink_x2_defconfig +++ b/configs/beelink_x2_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-beelink-x2" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=567 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-beelink-x2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 76cccfa586c..299206e85b3 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -7,12 +7,12 @@ CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=50000000 -CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" CONFIG_DEBUG_UART=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index e6583bcfc0a..20262e8be1d 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x200000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x220000 CONFIG_TARGET_BK4R1=y -CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index e6f07954575..67482b1a4ff 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot" CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche" CONFIG_R8A7792=y CONFIG_TARGET_BLANCHE=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index f11581427bf..8826e1f35ba 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index a1d523b6f44..8c0052d4187 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index e8cedccad8f..7ccc925060b 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_CPU_MIPS32_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index 948d527fc79..78d4b2e9414 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS32_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index 0eb8efd499c..332f3d93050 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_CPU_MIPS64_R2=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 500284b5d3b..f543137237b 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R2=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index 3e06176dca0..3896d668527 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_CPU_MIPS64_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index a3aeb944878..1353a1b280b 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 2c73ece62a0..759880246ff 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -8,13 +8,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc" CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index f4827e427f6..97b69c1a13c 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x60000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand" CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 37e7e3d8797..b834c210266 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index 38f5cce4682..1f466bea5a7 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -15,6 +15,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_BRPPT2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-brppt2" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SPL=y @@ -22,7 +23,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-brppt2" # CONFIG_EXPERT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index c27dd9243e2..6df2ffc831f 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brsmarc1" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=600 CONFIG_TARGET_BRSMARC1=y @@ -19,7 +20,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brsmarc1" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index c1014db629a..af5d5a65b40 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brxre1" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=1000 CONFIG_TARGET_BRXRE1=y @@ -15,7 +16,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 -CONFIG_DEFAULT_DEVICE_TREE="am335x-brxre1" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 1cfcbb6f1c5..34ff94615b2 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_OWL=y CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" CONFIG_MACH_S900=y CONFIG_IDENT_STRING="\nBubblegum-96" -CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index a17ac2b8f45..242f65b1baf 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_CARDHU=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 987e3ac8e95..8a48274a4db 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_CEI_TK1_SOM=y CONFIG_ARMV7_PSCI_0_1=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 238e421601f..6373512ee6c 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -6,30 +6,35 @@ CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8qm-cgtqmx8" CONFIG_TARGET_CONGA_QMX8=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx8/imximage.cfg" CONFIG_BOOTDELAY=3 -CONFIG_IMX_BOOTAUX=y CONFIG_LOG=y CONFIG_SPL_BOARD_INIT=y -CONFIG_HUSH_PARSER=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_CLK=y CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -38,17 +43,13 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_FAT=y -CONFIG_CMD_FUSE=y CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8qm-cgtqmx8" CONFIG_ENV_IS_IN_MMC=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x400000 +CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SPL_DM=y CONFIG_SPL_CLK=y CONFIG_CLK_IMX8=y CONFIG_CPU=y -CONFIG_DM_GPIO=y CONFIG_MXC_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y @@ -56,7 +57,6 @@ CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y -CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y @@ -81,6 +81,3 @@ CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_SPL_TINY_MEMSET=y # CONFIG_EFI_LOADER is not set -CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 -CONFIG_SYS_MMC_ENV_PART=0 -CONFIG_SYS_MMC_ENV_DEV=1 diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 01d15eba865..2508839330b 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x5F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="cherryhill" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="cherryhill" CONFIG_VENDOR_INTEL=y CONFIG_TARGET_CHERRYHILL=y CONFIG_DEBUG_UART=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 656f72a9140..f4b685a1d53 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-chiliboard" CONFIG_AM33XX=y CONFIG_TARGET_CHILIBOARD=y CONFIG_SPL_MMC_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x22000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-chiliboard" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index c09b63b9462..d652ab807dc 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index a846b6470fe..12cc3cc2220 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob" CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index e43f8783c5d..c007d2d7018 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3d00 CONFIG_NR_DRAM_BANKS=8 CONFIG_MAX_CPUS=8 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_SPL_TEXT_BASE=0xfef10000 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xde000000 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_CORAL=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 692b630174d..5bb2735c419 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -13,7 +14,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb" diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 872e33d7571..92c7a43f5ac 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -5,11 +5,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_X86_RUN_64BIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK64=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 60a7640a838..c938ad014fb 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index ae55842e3bf..2549c49e8b8 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 71b5f8bdfea..3a77831fc37 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_SAMUS=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 256a9f88987..6eef4ba896f 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_SPL_TEXT_BASE=0xffe70000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_SAMUS_TPL=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 4b460ee6a9e..8f7c70a8dfd 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 29efd26e3a6..447e4e95bc0 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x83800 +CONFIG_DEFAULT_DEVICE_TREE="ci20" CONFIG_SPL_TEXT_BASE=0xf4000a00 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_ARCH_JZ47XX=y -CONFIG_DEFAULT_DEVICE_TREE="ci20" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1" diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 9af4e672d20..6e379126c6b 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_TARGET_CL_SOM_IMX7=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 53c2bdbb42c..4702cf2df18 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_CLEARFOG=y CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 69694b5ecd9..a94dc225697 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index aefda70058a..2f44157adfe 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_MX6QDL=y CONFIG_TARGET_CM_FX6=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 35480098b12..101d77c9d26 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-cm-t43" CONFIG_SPL_TEXT_BASE=0x40300350 CONFIG_AM43XX=y CONFIG_TARGET_CM_T43=y @@ -19,7 +20,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-cm-t43" CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 2f6f5a8aea3..17739fbd502 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_COBRA5272=y CONFIG_DEFAULT_DEVICE_TREE="cobra5272" +CONFIG_TARGET_COBRA5272=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index fca0093f8f3..32d94d7fbbb 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y -CONFIG_TARGET_COLIBRI_IMX8X=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" +CONFIG_TARGET_COLIBRI_IMX8X=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg" diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 956806e437b..19d70c0cf8f 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_MX6DL=y CONFIG_TARGET_COLIBRI_IMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 24dd8526e30..7a0d69f1de5 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x380000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand" CONFIG_TARGET_COLIBRI_IMX7=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" CONFIG_BOOTDELAY=1 diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index 86eb3a4e607..d076a520808 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -5,13 +5,13 @@ CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc" CONFIG_TARGET_COLIBRI_IMX7=y CONFIG_TARGET_COLIBRI_IMX7_EMMC=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 02f40a88e6a..e0f39101d6b 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_COLIBRI_T20=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index d0740585fe7..127400e179f 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_COLIBRI_T30=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 31df3500d95..058fb526f29 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -9,8 +9,8 @@ CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x180000 CONFIG_DM_GPIO=y -CONFIG_TARGET_COLIBRI_VF=y CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" +CONFIG_TARGET_COLIBRI_VF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND" CONFIG_BOOTDELAY=1 diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig index 573451ef49c..5d3636e34e8 100644 --- a/configs/colorfly_e708_q1_defconfig +++ b/configs/colorfly_e708_q1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-colorfly-e708-q1" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-colorfly-e708-q1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO2_VOLT=1800 diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index bb9c0b89bd1..14795197a9e 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6318=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 80bafb02aa4..baff4b365d4 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6328=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 36dcf2cdb89..f733eb4a183 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6348=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 1c2eeeddf82..f9a921a7621 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM63268=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index fda61ecd729..dcc64bb6b76 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6368=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index fd99d36163e..e3257dcd688 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y CONFIG_INTERNAL_UART=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index ba0a87d532c..a8d961a7c50 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index e3cfdbc30b5..f4983cc94d1 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -2,9 +2,9 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0x1120000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="coreboot" CONFIG_SPL_TEXT_BASE=0x1110000 CONFIG_PRE_CON_BUF_ADDR=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="coreboot" CONFIG_X86_RUN_64BIT=y CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 501a20e7908..74ec369d78b 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -2,8 +2,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0x1110000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 -CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="coreboot" +CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y CONFIG_FIT=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index bfb16d797e0..d84db883d2f 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index 8fcb66f99f6..e5163d1e0fc 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index e85cdc579ee..a865cbf4c6a 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 491f5630822..77baef7c545 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -11,11 +11,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index a6f48843954..f924efb6e02 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s-bit" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index ea48ba2ebed..677e248e6b8 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index 8aeb591b05d..61bb79e63ef 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s-bit" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index d0b2bc5ff6b..87e64e93dd3 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 507f3ca9030..19cdd5bdf82 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s-bit" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index b958bd5a5e7..703fcaceb55 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 64dc593d7dd..8efb94dea83 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_OWL=y +CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7" CONFIG_MACH_S700=y CONFIG_IDENT_STRING="\ncubieboard7" -CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index d73a32e2b10..33e21495058 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" D2 v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" +CONFIG_IDENT_STRING=" D2 v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 42db153c7ff..99cb4be8c22 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -13,12 +13,12 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_LTO=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 7e48293014a..414fca53839 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -10,12 +10,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_LTO=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index f2c1e849787..bfecda10bb5 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA114=y CONFIG_TARGET_DALMORE=y -CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 3cf107b20a9..bb73635d92b 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 6cb813a3ebc..a7c84985999 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 +CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index b39e213dc59..6fa00d1a179 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 +CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_BOOTDELAY=3 diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index c51c1a1d422..e1f6aff8f59 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 10a4bda12ee..f2da99c5d3f 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -9,8 +9,8 @@ CONFIG_TARGET_DB_XC3_24G4XG=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 -CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_DEFAULT_DEVICE_TREE="armada-xp-db-xc3-24g4xg" +CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 3889ce08eae..5318d7d6127 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8-deneb" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 -CONFIG_DEFAULT_DEVICE_TREE="imx8-deneb" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/siemens/capricorn/imximage.cfg" diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index db7d683eb78..59171f7ca2f 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -16,6 +16,7 @@ CONFIG_MX6QDL=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_DHCOMIMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -26,7 +27,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index 537ffb84494..1679c08a2c3 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:480,y:272,depth:18,pclk_khz:12000,le:1,ri:43,up:1,lo:12 CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 094bca347e4..53fe37ccde2 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -16,6 +16,7 @@ CONFIG_TARGET_DISPLAY5=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -27,7 +28,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 8d691746e85..2ade8c2055e 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -16,6 +16,7 @@ CONFIG_TARGET_DISPLAY5=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -24,7 +25,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 493c802d520..d5d79f5297f 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_TARGET_DNS325=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 -CONFIG_IDENT_STRING="\nD-Link DNS-325" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325" +CONFIG_IDENT_STRING="\nD-Link DNS-325" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 0b434f46a09..4eba8665333 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DOCKSTAR=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar" +CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 30136d2f822..9d222f1ef30 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y @@ -14,7 +15,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 6be462d7d26..86ec00396d1 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 @@ -17,7 +18,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 53e1adf5e6e..229309c8f41 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_SPL_TEXT_BASE=0x40306D50 CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -19,7 +20,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index d48f8082755..2458037e2e9 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_DRACO=y @@ -21,7 +22,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 68313722436..7b7b32c0a23 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 -CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" +CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_DISTRO_DEFAULTS=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index d43fdf16b6d..3a9cf0a5ef0 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -3,9 +3,9 @@ CONFIG_ARCH_SNAPDRAGON=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c" CONFIG_TARGET_DRAGONBOARD820C=y CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C" -CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c" CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyMSM0,115200n8" diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index b4dedc9e59b..8956d2f3c59 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_DREAMPLUG=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING="\nMarvell-DreamPlug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug" +CONFIG_IDENT_STRING="\nMarvell-DreamPlug" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index d8522849061..b8a0bd09d42 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x7E0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index 8cea37b0b17..a232b904e2d 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-dserve-dsrv9703c" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_MMC0_CD_PIN="PH1" @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-dserve-dsrv9703c" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 171abbfd7cd..8d83e60a59c 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -4,8 +4,8 @@ CONFIG_TARGET_DURIAN=y CONFIG_SYS_TEXT_BASE=0x500000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 -# CONFIG_PSCI_RESET is not set CONFIG_DEFAULT_DEVICE_TREE="phytium-durian" +# CONFIG_PSCI_RESET is not set CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_BOOTARGS=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 3673010b23c..95f1df9a4c6 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_EB_CPU5282=y CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282" +CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400" CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index ec38b099111..a2bffaf2377 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_EB_CPU5282=y CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal" +CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418" CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/edison_defconfig b/configs/edison_defconfig index 304a172a1b9..82265484bc2 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x1101000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x300000 -CONFIG_ENV_OFFSET_REDUND=0x600000 CONFIG_DEFAULT_DEVICE_TREE="edison" +CONFIG_ENV_OFFSET_REDUND=0x600000 CONFIG_VENDOR_INTEL=y CONFIG_TARGET_EDISON=y CONFIG_SMP=y diff --git a/configs/efi-x86_app_defconfig b/configs/efi-x86_app_defconfig index 4644e51ccb3..e9ee66250cf 100644 --- a/configs/efi-x86_app_defconfig +++ b/configs/efi-x86_app_defconfig @@ -1,9 +1,9 @@ CONFIG_X86=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="efi-x86_app" CONFIG_DEBUG_UART_BASE=0 CONFIG_DEBUG_UART_CLOCK=0 -CONFIG_DEFAULT_DEVICE_TREE="efi-x86_app" CONFIG_VENDOR_EFI=y CONFIG_TARGET_EFI_APP=y CONFIG_DEBUG_UART=y diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 43e1df75afc..7e416b4d052 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 -CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="efi-x86_payload" +CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_VENDOR_EFI=y CONFIG_TARGET_EFI_PAYLOAD=y CONFIG_FIT=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index a44e1e3b1c2..e9b7f1693b2 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 -CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="efi-x86_payload" +CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_VENDOR_EFI=y CONFIG_TARGET_EFI_PAYLOAD=y CONFIG_FIT=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index db754b0939c..af4f3f1d231 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -3,12 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_ROCKCHIP_RV1108=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_TARGET_ELGIN_RV1108=y CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_DEBUG_UART=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb" diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index 0e908c327b1..e2d3b1397e2 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-emlid-neutis-n5-devboard" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=408 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-emlid-neutis-n5-devboard" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 2b6498e89ed..1948c76fee2 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -4,8 +4,8 @@ CONFIG_CPU_ARCEM6=y CONFIG_TARGET_EMSDP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_ENV_SIZE=0x1000 -CONFIG_SYS_CLK_FREQ=40000000 CONFIG_DEFAULT_DEVICE_TREE="emsdp" +CONFIG_SYS_CLK_FREQ=40000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index edc997e449c..a079accfae2 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -6,8 +6,8 @@ CONFIG_ARCH_EXYNOS7=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 -CONFIG_IDENT_STRING=" for ESPRESSO7420" CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420" +CONFIG_IDENT_STRING=" for ESPRESSO7420" # CONFIG_AUTOBOOT is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 3256fd3493e..d0a2a77d720 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x980000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_ETAMIN=y @@ -22,7 +23,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig index b06aedef2a9..cc95fdb0deb 100644 --- a/configs/ev-imx280-nano-x-mb_defconfig +++ b/configs/ev-imx280-nano-x-mb_defconfig @@ -1,91 +1,51 @@ -CONFIG_ARCH_MX6=y CONFIG_ARM=y -CONFIG_DEFAULT_DEVICE_TREE="ev-imx280-nano-x-mb" -CONFIG_EV_IMX280_NANO_X_MB=y -CONFIG_HUSH_PARSER=y -CONFIG_IMX_MODULE_FUSE=y -CONFIG_MX6ULL=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX6=y +CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_MX6ULL=y CONFIG_TARGET_O4_IMX6ULL_NANO=y - -CONFIG_K4B4G1646D_BCMA=y -# CONFIG_MT41K256M16HA_125E is not set - -# Device Tree -CONFIG_OF_CONTROL=y -CONFIG_OF_LIBFDT_OVERLAY=y - -# Environment -CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y - -# Clock driver for imx6ull is not implemented -# CONFIG_CLK_IMX6Q=y - -# Thermal -CONFIG_DM_THERMAL=y -CONFIG_IMX_THERMAL=y - -# Serial -CONFIG_DM_SERIAL=y -CONFIG_MXC_UART=y - -# eMMC support -CONFIG_CMD_MMC=y -CONFIG_DM_MMC=y -CONFIG_FSL_USDHC=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_SUPPORT_EMMC_RPMB=y - -# GPIO support -CONFIG_CMD_GPIO=y CONFIG_DM_GPIO=y -CONFIG_MXC_GPIO=y - -# USB support -CONFIG_CI_UDC=y +CONFIG_EV_IMX280_NANO_X_MB=y +CONFIG_IMX_MODULE_FUSE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_DM_USB=y -CONFIG_USB=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y - -# Fastboot support -CONFIG_CMD_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_USB_FUNCTION_FASTBOOT=y - -# Ethernet support CONFIG_CMD_DHCP=y -CONFIG_CMD_MDIO=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_PHYLIB=y -CONFIG_PHY_SMSC=y - -# Watchdog support is broken -# CONFIG_CMD_WDT=y -# CONFIG_IMX_WATCHDOG=y -# CONFIG_SYSRESET_WATCHDOG=y -# CONFIG_WATCHDOG_RESET_DISABLE=y -# CONFIG_WDT=y - -# misc -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_GPT=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMTEST=y -CONFIG_CMD_PART=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 2d0a5ec293b..91334195118 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -6,8 +6,8 @@ CONFIG_TARGET_EVB_AST2500=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_PRE_CON_BUF_ADDR=0x1e720000 CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb" +CONFIG_PRE_CON_BUF_ADDR=0x1e720000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 91518dbe358..f24425997d7 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -9,11 +9,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SIZE_LIMIT=0x10000 CONFIG_SPL=y # CONFIG_ARMV7_NONSEC is not set -CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y # CONFIG_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index d2fdfef2938..8bcf8edec5b 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-evb" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_EVB_PX30=y @@ -13,7 +14,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-evb" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index fce3b855947..3a5f1e7c955 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" CONFIG_ROCKCHIP_RK3368=y CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds" CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -15,7 +16,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1c0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 0555d40f51d..324528e2968 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -5,13 +5,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_SPL_TEXT_BASE=0x10081000 CONFIG_ROCKCHIP_RK3036=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index f72f27f3d8c..10628016423 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -3,10 +3,10 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_ROCKCHIP_RK3128=y CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index e708ed49094..02e19fa10cc 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x61000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" CONFIG_SPL_TEXT_BASE=0x60000000 CONFIG_ROCKCHIP_RK322X=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 @@ -11,7 +12,6 @@ CONFIG_TARGET_EVB_RK3229=y CONFIG_SPL_STACK_R_ADDR=0x60600000 CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 7361a3fe65d..658ddc97504 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x04000000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 9230983c880..f34f3497f4e 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb" CONFIG_ROCKCHIP_RK3308=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -11,7 +12,6 @@ CONFIG_TARGET_EVB_RK3308=y CONFIG_SPL_STACK_R_ADDR=0xc00000 CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 9cbfeb02796..fffabd605d1 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_STACK_R_ADDR=0x4000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 909c68822cc..21477719dca 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index c9cbf046860..be7ebd47079 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -2,10 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_ROCKCHIP_RV1108=y CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_DEBUG_UART=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index c20b564d434..a2df9eab3c2 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -2,13 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus" CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 CONFIG_TARGET_ROCK960_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus" CONFIG_DEBUG_UART=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 6487615fe08..d902ab7a9b3 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-firefly" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_EVB_PX30=y @@ -14,7 +15,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-firefly" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index b3c22346f4e..3fa8e155e34 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index fe9fbef7816..2ca2ac35e43 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index fbf8797bd98..599eeb96b4f 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=432 @@ -15,7 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index e3d5bc47d6b..8f25e42a549 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 @@ -17,7 +18,6 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index c03123f6e46..c0795b589ad 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 @@ -13,7 +14,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xB0000 CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y -CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 98c58b5c972..a8218167845 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_MEMTEST_END=0x07e00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="gazerbeam" CONFIG_IDENT_STRING=" gazerbeam 0.01" CONFIG_SYS_CLK_FREQ=33333333 -CONFIG_DEFAULT_DEVICE_TREE="gazerbeam" CONFIG_MPC83xx=y CONFIG_TARGET_GAZERBEAM=y CONFIG_SYSTEM_PLL_VCO_DIV_2=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index 49c3a99de70..efd4eed61a5 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 # CONFIG_GE_RTC is not set CONFIG_MX6QDL=y CONFIG_TARGET_GE_B1X5V2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-b1x5v2" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-b1x5v2" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index a266ffd849f..b831850ec0f 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_MX6Q=y CONFIG_TARGET_GE_BX50V3=y CONFIG_DM_GPIO=y -CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" +CONFIG_BOOTCOUNT_BOOTLIMIT=10 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index 4f0191cc004..55892f07f2c 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_GEEKBOX=y CONFIG_DEBUG_UART_BASE=0xFF690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 1c51943d3ea..8b653be1e51 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8-giedi" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 -CONFIG_DEFAULT_DEVICE_TREE="imx8-giedi" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/siemens/capricorn/imximage.cfg" diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 6e3e6325e92..9285e8d4d71 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GOFLEXHOME=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xC0000 -CONFIG_IDENT_STRING="\nSeagate GoFlex Home" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet" +CONFIG_IDENT_STRING="\nSeagate GoFlex Home" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 56d08086b7b..5cd4cb8c125 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Gose" CONFIG_R8A7793=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index b05d657f5c9..d497ac80076 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_RZA1=y CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" +CONFIG_RZA1=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="ignore_loglevel" diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig index 65f39d0ed13..1a5fe06bbe1 100644 --- a/configs/gt90h_v4_defconfig +++ b/configs/gt90h_v4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=480 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index a3fe98cabf7..954e429a9d5 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GURUPLUG=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 -CONFIG_IDENT_STRING="\nMarvell-GuruPlug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus" +CONFIG_IDENT_STRING="\nMarvell-GuruPlug" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 6e3aebbf1bd..68f4fe8566f 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -11,6 +11,7 @@ CONFIG_MX6QDL=y CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 77e65f22368..b6e4cba3ba2 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -11,6 +11,7 @@ CONFIG_MX6QDL=y CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index db31d97f3d0..5d022b63adb 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -11,6 +11,7 @@ CONFIG_MX6QDL=y CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index 39a61719dc9..29f965200e1 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-allwinner-h8homlet-v2" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_CLK=480 @@ -8,7 +9,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_PIN="PL5" CONFIG_USB1_VBUS_PIN="PL6" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-allwinner-h8homlet-v2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_AXP_DLDO4_VOLT=3300 diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index bd9201b0f36..4fc03056376 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_HARMONY=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 0c88486fac1..202e57344d9 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_HELIOS4=y CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index a42ac965773..be71ebb6a2e 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot" CONFIG_RCAR_GEN3=y CONFIG_TARGET_HIHOPE_RZG2=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig index ca3b2016ad9..316a0420df0 100644 --- a/configs/hikey960_defconfig +++ b/configs/hikey960_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x1ac98000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 -CONFIG_IDENT_STRING="\nHikey960" CONFIG_DEFAULT_DEVICE_TREE="hi3660-hikey960" +CONFIG_IDENT_STRING="\nHikey960" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 222b79e3adf..243733618b6 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=6 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x0 -CONFIG_IDENT_STRING="hikey" CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" +CONFIG_IDENT_STRING="hikey" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index b90bf7d25e3..75a1698e64e 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -4,10 +4,10 @@ CONFIG_TARGET_HSDK=y CONFIG_BOARD_HSDK_4XD=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd" CONFIG_DEBUG_UART_BASE=0xf0005000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 -CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd" CONFIG_DEBUG_UART=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index 1e51862e337..dd2cfb92646 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -3,10 +3,10 @@ CONFIG_ISA_ARCV2=y CONFIG_TARGET_HSDK=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="hsdk" CONFIG_DEBUG_UART_BASE=0xf0005000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 -CONFIG_DEFAULT_DEVICE_TREE="hsdk" CONFIG_DEBUG_UART=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 00290042f22..f08e2ad9d1b 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6358=y -CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 50ef9050049..6347481d888 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 CONFIG_MACPWR="PH21" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_PHY_REALTEK=y diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 0271a4012ac..f8a95dbcb33 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index 1ea234a4186..019c5a8f3a6 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:65000,le:159,ri:160,up:22, CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index ccd3b52dabb..b2462a3e258 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index f0cb036a9f8..9a90252dbd7 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=456 @@ -15,7 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 57ccfe71fbd..b24402c9475 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_IB62X0=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 -CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0" +CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index 24079c8b8d7..d33c390f258 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -11,7 +12,6 @@ CONFIG_USB1_VBUS_PIN="PG10" CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" CONFIG_VIDEO_LCD_POWER="PH22" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_UNZIP=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index d3aea6ead2e..4b6d82fe644 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_ICONNECT=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect" +CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 8aa7fb022ed..a3b97e512c0 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -3,10 +3,10 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x8000 +CONFIG_DEFAULT_DEVICE_TREE="omap3-igep0020" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap3-igep0020" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig index e5717d39ef4..c8e09829dff 100644 --- a/configs/imgtec_xilfpga_defconfig +++ b/configs/imgtec_xilfpga_defconfig @@ -1,8 +1,8 @@ CONFIG_MIPS=y CONFIG_SYS_MALLOC_F_LEN=0x600 CONFIG_ENV_SIZE=0x4000 -CONFIG_TARGET_XILFPGA=y CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr" +CONFIG_TARGET_XILFPGA=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_BOOTDELAY=5 diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 135c38c98b4..7247ed9d8ce 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -10,6 +10,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="imx28-xea" CONFIG_SPL_TEXT_BASE=0x1000 CONFIG_TARGET_XEA=y CONFIG_SPL_MMC_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx28-xea" CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 06005c4288e..7b20d2bba53 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index fa2adaf47d7..a163f42d573 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6DL_MAMOJ=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_IMX_HAB=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index f38b06dab98..bc5b9a751f7 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 64c20b8523f..85a29f3ee24 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -12,13 +12,13 @@ CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6Q=y CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_MX6LOGICPD=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index f1b53894701..3d931d15f36 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y @@ -18,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index a32ae6a75dc..854a8121d00 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 @@ -21,7 +22,6 @@ CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index f38b06dab98..bc5b9a751f7 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 34e3250f955..c48260dd27c 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 4b47e196f31..536e2366b81 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 9870612edfb..1b7be3bf9e9 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 2e33db21d82..a3e77687d2b 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 9c4f742135a..96318232629 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 36382439b2b..d7a7924d515 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7-cm" CONFIG_TARGET_IMX7_CM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7-cm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index be98fa833bd..f46f45bda91 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -13,13 +13,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_CL_IOT_GATE=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 6053da40758..4b60fc8f6e6 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -8,13 +8,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-ctouch2" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-ctouch2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index fadc6eb93ce..99c01791ba3 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -8,13 +8,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-edimm2.2" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-edimm2.2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 2248491ad42..6f272ef9bc8 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -11,13 +11,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_BEACON=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 1ac48167b56..a06c6f9794a 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -11,13 +11,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -31,7 +31,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -41,15 +40,9 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 07ddf372161..daffcc46d59 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-venice" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_VENICE=y CONFIG_SPL_MMC_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-venice" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index ecd7fabbb8e..ecbc8c30a54 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_BEACON=y CONFIG_IMX8MN_BEACON_2GB_LPDDR=y @@ -22,7 +23,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 9a77f22ce25..fa3fdfa880f 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_BEACON=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -21,7 +22,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 8eca79fd19c..205757da229 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-ddr4-evk" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_DDR4_EVK=y CONFIG_SPL_MMC_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-ddr4-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -33,7 +33,6 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -46,10 +45,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index e477028f71b..469bef0e6d7 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -13,13 +13,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -36,7 +36,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -49,10 +48,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 79b4a7b2470..d0f390ed776 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" CONFIG_SPL_TEXT_BASE=0x920000 CONFIG_TARGET_IMX8MP_EVK=y CONFIG_SPL_MMC_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -36,7 +36,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -46,15 +45,9 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 1f52f9bcf2e..e11122e645f 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -10,12 +10,12 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-cm" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_CM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-cm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 7116a909cb9..1df4192401e 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index f69b4702a2f..3a1b60b8a39 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_PHANBELL=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 8765c91ab99..7589967e21c 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-mek" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" @@ -17,7 +18,6 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-mek" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qm_mek/imximage.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index d363b1adef1..7e1070fd25a 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -8,12 +8,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8qm-rom7720-a1" CONFIG_TARGET_IMX8QM_ROM7720_A1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8qm-rom7720-a1" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 5c78319d56d..a8e8df7fe61 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" @@ -17,7 +18,6 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_mek/imximage.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index f0b05b7165b..0dc3743f887 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -8,13 +8,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk" CONFIG_SPL_TEXT_BASE=0x20209000 CONFIG_TARGET_IMXRT1020_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 9f509f3b9ff..0e426ce1fff 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk" CONFIG_SPL_TEXT_BASE=0x20209000 CONFIG_TARGET_IMXRT1050_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index e9588165bc6..e2678478f21 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig index 1e0e31cd30a..3ade9fea824 100644 --- a/configs/inet86dz_defconfig +++ b/configs/inet86dz_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=552 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index 56dc0b0201b..69bd0f87822 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index cbbbe8b1bcc..152b8a68948 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index d59990a1fda..049830b7dba 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index 191b13caf92..1769256b7d1 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-inet-q972" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=384 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:65000,le:280,ri:20,up:22,l CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-inet-q972" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 248d81b7a41..fe48f56cc59 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" IS v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" +CONFIG_IDENT_STRING=" IS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index 98cdf4730d0..4d9c85aa78c 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_IOT_DEVKIT=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_ENV_SIZE=0x1000 -CONFIG_SYS_CLK_FREQ=16000000 CONFIG_DEFAULT_DEVICE_TREE="iot_devkit" +CONFIG_SYS_CLK_FREQ=16000000 CONFIG_LOCALVERSION="-iotdk-1.0" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_PROMPT="IoTDK# " diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index b204c7a73e9..b0cde842ddd 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 08fad3e04b1..6084fcfaccf 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index f2a293480f3..365d6626900 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 8ebbe7348f6..1523e4aa016 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index 858e179573a..82b25e695a7 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index cff45ff6935..7842df9df66 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 92450b7e708..c4b5d0cd0b4 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=312 CONFIG_MACPWR="PH19" CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 74d315d1435..61f3673d802 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_JETSON_TK1=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 74c45a39ac1..2798d564895 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -13,11 +13,11 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index ceb2f765da9..2d579764892 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -12,11 +12,11 @@ CONFIG_TARGET_K2G_EVM=y CONFIG_ENV_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index bb7d9a292cc..6745da13159 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -13,11 +13,11 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 99ed46e3d21..f23bdbf9170 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -13,11 +13,11 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 63074a4eed7..146a6a43f17 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-captain" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-captain" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index cf5a6da3842..c7445fecb6a 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 197a6f66772..5e9c29a397a 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index 241da53c4cf..32513998393 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2" CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index 22951a90310..c4b24fc3142 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index a6fa4328909..0c731d4cee6 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" -CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 53a8cbf2907..2df00d54ec4 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 151425fbe39..e00d14c4933 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood 128M16" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 22c2e0509d2..490538d7915 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index c091cd6cfe6..1f14a9b0fe9 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -7,10 +7,10 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood PCI" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 0c09e2f1886..f6fb8afe5a1 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -5,8 +5,8 @@ CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_IVM_BUS=2 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 CONFIG_DEFAULT_DEVICE_TREE="kmcent2" +CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index f58186e80c4..a54808df607 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_KM_DEF_NETDEV="eth1" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmcoge5ne" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmcoge5ne" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMCOGE5NE=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 4d2c17f399a..51f0f87193a 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -10,10 +10,10 @@ CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids COGE5UN" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index aadcbf47bab..5138a5680c8 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_KM_DEF_NETDEV="eth2" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmeter1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmeter1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMETER1=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index faaa8d1a5f8..9b98034e889 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -10,10 +10,10 @@ CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index aaf8d374d30..80f74eac8cf 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmopti2" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmopti2" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMOPTI2=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 8ecddbdef14..0482634ead0 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmsupm5" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmsupm5" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMSUPX5=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index d8280f961bf..e0b0ad61d12 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -11,10 +11,10 @@ CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_SUSE2" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 0e69925e03a..d98b2eb19cc 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_KM_DEF_NETDEV="eth1" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtegr1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtegr1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMTEGR1=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index c4ebac60a5b..665adee38ba 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtepr2" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtepr2" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMTEPR2=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 562259b9510..ecbb4c9b8f0 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Koelsch" CONFIG_R8A7791=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 98718db5c2e..29a45ec54bc 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x3e0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28" CONFIG_SPL_TEXT_BASE=0x18010000 CONFIG_SYS_FSL_SDHC_CLK_DIV=1 CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_ENV_OFFSET_REDUND=0x3f0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index 71754380561..4a2d8afe4ee 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_TARGET_KP_IMX53=y +CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_OFFSET_REDUND=0x102000 # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 5ec9c6a38df..ed72d59c180 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -13,13 +13,13 @@ CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KP_IMX6Q_TPC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-kp" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx6q-kp" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 6642c84a5b6..b7076672747 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_SPL_TEXT_BASE=0x10081000 CONFIG_ROCKCHIP_RK3036=y CONFIG_TARGET_KYLIN_RK3036=y @@ -13,7 +14,6 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 9d318e73d75..0e7340e9587 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Lager" CONFIG_R8A7790=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index 4242dec9aa3..a3afb1d81bd 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index bfcd47101bf..ec51f2ad384 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s805x-libretech-ac" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-ac" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s805x-libretech-ac" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 11d620bc140..4029039340d 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 48b3ffe1a81..97c8a9e47b0 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc-v2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index 17ed47b48a6..c0301a0aa0a 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s905d-pc" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index df8be29751e..e2faea6242c 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc" CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s912-pc" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index ba261ecc24d..8725fe64cdc 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index ede2aa55fb5..5275fdc36da 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index ec32e7db0aa..96274019499 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index 8b9a9519de5..7f0e0be50b4 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-it" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-it" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_XMC=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index 9972cfd4744..25bfe52b329 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h5-cc" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h5-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_XMC=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index dd2524e4ec6..05bc8240492 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -5,13 +5,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y CONFIG_BOARD_LINKIT_SMART_7688=y -CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 58c6f003085..a1c01d3f37c 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_RK3368=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 798a6e9f299..106f472ad72 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -12,11 +12,11 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6UL=y CONFIG_TARGET_LITEBOARD=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-liteboard" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-liteboard" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 7a188d2149f..bc200b8cb6b 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 93690462d55..94bd37ad018 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 27a73931b55..d71bd5e4bcb 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index d17f1e28edf..4d056858eb4 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index eea33d3dcfb..82da55d0f8e 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 2d0548b04ea..56c978e93cc 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1D0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 1a8343e67c6..84775debf8b 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 64200daec4a..812b0ccc423 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1D0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index cafd0dc58a5..066a204de89 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 7a0e80025cc..8ba2541f555 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index ac03940ac9d..9f958543d23 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 349e4e95978..60d42759d22 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -7,9 +7,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 20b37ffba03..dbff94cb0f0 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index c8902defe57..e908a854b47 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index c460e39d0aa..ddfb01dba5f 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index cb65fd973a4..dfdb3c0623c 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_AHCI=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 93cb6bfbf27..1aac0bf4084 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 344211826f7..148d67b8b7e 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index c6d5c1ec957..207307f2068 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 47d8781a0f4..19385e7bc9c 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -7,11 +7,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 11d33fd8271..f7318f4581b 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index e08fa9caa2c..9c503a02337 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 80997a7b634..a4225fcd37d 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index b576806b9dd..4179e56f8fa 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -9,10 +9,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index bcdb96d0bbe..788b87cd677 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -10,10 +10,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index e310cfee1d8..23caf764633 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 34cd6fbaab2..e3d9a75dc90 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -9,10 +9,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 6ffc3bd3993..b8841d5b17a 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -10,10 +10,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 42fd350075d..5e04dca25c8 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 1bafc2bb03a..8f479b7cb22 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 8fb23acd884..f0951cdf3e0 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index f87c9a7cbfe..1de948f48cb 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 5de4e07457c..8a98ce99776 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 6e3318b1ed3..11b46211dcc 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index cd20980c989..1fe1dee7a99 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 4caabcadb81..29e47cd55a5 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index fb280726382..4d6a644a02f 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 5e1cfc6f31e..a4d4547b44a 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index bd7b2db13a7..fb592097364 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -5,8 +5,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 04633bc7b7e..cfba38129e3 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 5c993f3a017..8eb756023c8 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 1f6087ccd61..cf306234948 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index c66ec3ba539..10e1e01e816 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 44cbd76abf4..5438106c959 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -6,9 +6,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 7e53bc4b653..dcb9a750b02 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 33308aa0e36..45f28527e5c 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -4,11 +4,12 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y @@ -30,7 +31,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y -CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -60,4 +60,3 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y CONFIG_RSA=y -CONFIG_NXP_ESBC=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index ea62d7fa7e8..27e4409d768 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 7e7ae34226c..3177a03a79f 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 8905d450da3..9fd216ba54a 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 6627ac2bb0f..eab291a22fb 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 9da564a788c..5daac1f408c 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -7,11 +7,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 6cf46ff2c93..b1152cbef15 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 165c272c41f..abaec2105fa 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 8e60a358586..4b1628b1081 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 7e57b53a1f1..af2267b0318 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 9366bc1d328..f64d0d6c2d3 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 68efb1be923..dc2369422c3 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 3b43fd0ae6d..eb14baa7264 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index a9036dd11ff..3dd546f90d2 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index a6e464b5c14..73f5a53445b 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_FSL_LS_PPA=y @@ -15,7 +16,6 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 3514f29bfe3..3b191ecf27f 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index e5a8ad15a87..0b9de843109 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index faa08b2fed4..1ac6720b0b5 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -6,10 +6,10 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 53f13147fa9..226ebb0311d 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index c0fb4c98723..55e52c87701 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 57c91c1ad8e..9dc5f8dbb28 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 9abaead1c88..91903bd1106 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 44d4c13632d..fcb48741e3c 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index dadea57078b..3e8c269add0 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index ea308cafef2..c678fe00750 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -11,10 +11,10 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index de3759951e1..a78103c3b36 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 0e32aeb6349..c29a3a606b2 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 7b85bf6174d..0281c681e32 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 59469d3b7e7..c2bd323e123 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 84fbab0f428..224cc63296a 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -10,10 +10,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index e557858b8b3..6e7ecf95e7e 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -11,10 +11,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index bfa697c9ef7..f9841499830 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 6f9cce5b255..9a69d143d15 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index cc0f2b16aaa..bb36da157b0 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xE0000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 71174de458c..0b13a4c4145 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -7,13 +7,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 1175aafadbf..bf716f8026e 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 53abd06ec61..af300af1727 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 93032edc0c5..a1f2f2b4db6 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index ab1a9e22e03..3a995e29f86 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -6,9 +6,9 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 5d14b55e6b2..f54edb61321 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 10c139c98ea..bc88ce34184 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -6,9 +6,9 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 58fc6b23844..9551b6872fb 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index eed26fa8983..7dfc438b95f 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 56cd02418cd..9d8f3d25495 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 0385e3e7878..16611dc52a2 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_LSXL=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2" +CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_DISTRO_DEFAULTS=y CONFIG_API=y CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index d36ab373910..dae76d34cfe 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_LSXL=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" LS-XHL" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl" +CONFIG_IDENT_STRING=" LS-XHL" CONFIG_DISTRO_DEFAULTS=y CONFIG_API=y CONFIG_SYS_EXTRA_OPTIONS="LSXHL" diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 54d88c88d59..9935946074e 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index d25d3e8b98c..1d7a7512096 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 1d61807c11e..40d6f2a35d3 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index a160cfe21e3..4a747fcdbde 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -9,11 +9,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 8b69a36dd9d..f7fb60e2e1a 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -9,11 +9,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index fcc78c6fe5c..e1619827d02 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index 42a3a3af446..e404f7a0308 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index bf0ac38ff23..96f190610c4 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 0c1a3075586..277be6daaf9 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_TARGET_M53MENLO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo" CONFIG_SPL_TEXT_BASE=0x70008000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x180000 # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo" CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/menlo/m53menlo/imximage.cfg" diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index 878dc6ee05b..5ae79292da9 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_MALTA=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_TARGET_MALTA=y CONFIG_CPU_MIPS64_R2=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 7dfe67355ff..cd78b812126 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -2,9 +2,9 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_TARGET_MALTA=y CONFIG_BUILD_TARGET="u-boot-swap.bin" -CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R2=y # CONFIG_AUTOBOOT is not set diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 304f2198baa..0e9babd4dc5 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_MALTA=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_TARGET_MALTA=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 7436e4e9439..77c05d71085 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -2,9 +2,9 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_TARGET_MALTA=y CONFIG_BUILD_TARGET="u-boot-swap.bin" -CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_SYS_LITTLE_ENDIAN=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 02b13d4a099..e754108b73f 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index f4a572ded63..4dfd51628ba 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -10,11 +10,11 @@ CONFIG_MX6QDL=y CONFIG_TARGET_MCCMON6=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index fce6f4d6e6a..a2d3e44c225 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -10,12 +10,12 @@ CONFIG_MX6QDL=y CONFIG_TARGET_MCCMON6=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 1d87ca820f5..8d7b9ef15e0 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_MEDCOM_WIDE=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig index 200a51444ae..0c40546cf19 100644 --- a/configs/meerkat96_defconfig +++ b/configs/meerkat96_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" CONFIG_TARGET_MEERKAT96=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/novtech/meerkat96/imximage.cfg" CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 245763b4087..30952267081 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_MICROBLAZE_GENERIC=y @@ -11,7 +12,6 @@ CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 -CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 696a502c99a..b66f7e9b6ef 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_VENDOR_INTEL=y CONFIG_TARGET_MINNOWMAX=y CONFIG_INTERNAL_UART=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 234ced5ab06..9a728ccaa1f 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_MIQI_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 7ae37ce23f4..0e4cdc44670 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=251 @@ -7,7 +8,6 @@ CONFIG_MACPWR="PA21" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index fd4299bfc22..12e053cf1ad 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 3bea5750435..b5e9d23cb6f 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUNXI_NO_PMIC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index f811ff34ca2..5fa93c148b7 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" CONFIG_SPL=y CONFIG_MACH_SUN4I=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 2540272e405..8907dc2a3c4 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -7,13 +7,13 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="jr2_pcb110" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_JR2=y -CONFIG_DEFAULT_DEVICE_TREE="jr2_pcb110" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEBUG_UART=y CONFIG_FIT=y diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index d2ce2798f57..498ddd50d34 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=208333333 @@ -14,7 +15,6 @@ CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_LUTON=y CONFIG_DDRTYPE_MT47H128M8HQ=y -CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index 6e163502fad..0d5c13a55fb 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -7,12 +7,12 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y -CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEBUG_UART=y CONFIG_FIT=y diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index f1e0ec0ccf2..6d9e8276f58 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="serval_pcb106" CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVAL=y CONFIG_DDRTYPE_H5TQ1G63BFA=y -CONFIG_DEFAULT_DEVICE_TREE="serval_pcb106" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index 6c22824aacf..0e982527c99 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="servalt_pcb116" CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVALT=y -CONFIG_DEFAULT_DEVICE_TREE="servalt_pcb116" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 341d86838c2..5e9d267f27a 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y @@ -12,7 +13,6 @@ CONFIG_DEBUG_UART_BASE=0xb0000c00 CONFIG_DEBUG_UART_CLOCK=40000000 CONFIG_ARCH_MTMIPS=y CONFIG_BOARD_MT7620_MT7530_RFB=y -CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index 3bea8752550..82b525c4d43 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -5,13 +5,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xb0000c00 CONFIG_DEBUG_UART_CLOCK=40000000 CONFIG_ARCH_MTMIPS=y -CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index 81a5a3b05f3..6c0d4ba46d3 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -4,9 +4,9 @@ CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=25000000 -CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="mt7622-rfb" diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index dd40d0846ac..7085f367b49 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 -CONFIG_TARGET_MT7623=y CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc" +CONFIG_TARGET_MT7623=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index 0a91752e2a9..bd35dbac4db 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 -CONFIG_TARGET_MT7623=y CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" +CONFIG_TARGET_MT7623=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 831e54e9f35..039686096c6 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -5,13 +5,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y CONFIG_BOARD_MT7628_RFB=y -CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_FIT=y diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index cd9f7aaa06e..a624e706d27 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb" CONFIG_SPL_TEXT_BASE=0x201000 CONFIG_TARGET_MT7629=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x40800000 CONFIG_SPL_PAYLOAD="u-boot-lzma.img" CONFIG_BUILD_TARGET="u-boot-mtk.bin" -CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb" CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig index c74b812bd89..4ff2cdfb2f1 100644 --- a/configs/mt8183_pumpkin_defconfig +++ b/configs/mt8183_pumpkin_defconfig @@ -7,11 +7,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="mt8183-pumpkin" CONFIG_TARGET_MT8183=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=26000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="mt8183-pumpkin" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index 2787f75f642..b835436735b 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_DM_GPIO=y -CONFIG_TARGET_MT8512=y CONFIG_DEFAULT_DEVICE_TREE="mt8512-bm1-emmc" +CONFIG_TARGET_MT8512=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8512-bm1-emmc.dtb" diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index 780660058da..945643ab255 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="mt8516-pumpkin" CONFIG_TARGET_MT8516=y CONFIG_DEBUG_UART_BASE=0x11005000 CONFIG_DEBUG_UART_CLOCK=26000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="mt8516-pumpkin" CONFIG_DEBUG_UART=y CONFIG_FIT=y # CONFIG_FIT_ENABLE_SHA256_SUPPORT is not set diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig index 5bf405e314f..09075765f85 100644 --- a/configs/mt8518_ap1_emmc_defconfig +++ b/configs/mt8518_ap1_emmc_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x40008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 -CONFIG_TARGET_MT8518=y CONFIG_DEFAULT_DEVICE_TREE="mt8518-ap1-emmc" +CONFIG_TARGET_MT8518=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8518-ap1-emmc.dtb" diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 1afea4b9890..65cce2e63bc 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -7,9 +7,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OCTEONTX2_CN913x=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 +CONFIG_DEFAULT_DEVICE_TREE="cn9130-crb-A" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="cn9130-crb-A" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index fbccc8e2144..c9935da1028 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 11d90692fe1..b11badb52a3 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -8,9 +8,9 @@ CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 2d8e8ef127e..bc12b75c79d 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="cn9130-db-A" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="cn9130-db-A" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 95a48b182cb..157a4b7cb22 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index e9077c7ef3b..68a98f07326 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 652ea645459..dd5ac764198 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-puzzle-m801" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-puzzle-m801" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 01293816ff8..bfaa4a2c29c 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="imx23-olinuxino" CONFIG_SPL_TEXT_BASE=0x00001000 CONFIG_TARGET_MX23_OLINUXINO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx23-olinuxino" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index 086d2bfce3d..c6f3c3f9123 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx23-evk" CONFIG_SPL_TEXT_BASE=0x00001000 CONFIG_TARGET_MX23EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx23-evk" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index c5843c5433a..a5bda10a2ed 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -6,8 +6,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_TARGET_MX51EVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx51-babbage" +# CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 883abee4f13..4d25373966d 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -6,8 +6,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_TARGET_MX53CX9020=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020" +# CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg" CONFIG_BOOTDELAY=1 diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 799ffd85ea9..6c68234746b 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_TARGET_MX53LOCO=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-qsb" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" CONFIG_USE_PREBOOT=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index ceea3220049..e34f72796ce 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -6,8 +6,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2800 CONFIG_TARGET_MX53PPD=y CONFIG_DM_GPIO=y -CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd" +CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 3c90ab05dce..5252e3f46bc 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xFE000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6CUBOXI=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-hummingboard2-emmc-som-v15" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-hummingboard2-emmc-som-v15" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 3e66b334e55..d9f54da3e7e 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -10,8 +10,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6Q=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabrelite" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,DDR_MB=1024,SABRELITE" diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 56283a1388e..e1d8eb606bf 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -11,13 +11,13 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6SABREAUTO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_NXP_BOARD_REVISION=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto" CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index ba445438694..6284d9daae0 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6SABRESD=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 2abf48cffe3..9469c35bbd6 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SL=y CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index a44a7454b32..5dd0dfba266 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6SL=y CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_SPI_BOOT=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index dac3bd7fa5e..99fd2186d0d 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -10,13 +10,13 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SL=y CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index d9606cab7c7..771d69b3f0d 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -9,8 +9,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6SLL=y CONFIG_TARGET_MX6SLLEVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 3a4c2bac0f8..d0001223a9b 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6SLL=y CONFIG_TARGET_MX6SLLEVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" CONFIG_USE_IMXIMG_PLUGIN=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index f4278c36405..4bd1988c488 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SX=y CONFIG_TARGET_MX6SXSABREAUTO=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg" CONFIG_HUSH_PARSER=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index ceccb6b5b18..225b7e4b119 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_MX6SX=y CONFIG_TARGET_MX6SXSABRESD=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" # CONFIG_CMD_BMODE is not set CONFIG_NXP_BOARD_REVISION=y -CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index a4fa393042d..ee80038fdca 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_14X14_EVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-14x14-evk" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-14x14-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 02467c0314d..6b8fd3b5995 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_9X9_EVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-9x9-evk" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-9x9-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index 7ac7a2ef93c..2700f98e6c6 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -9,8 +9,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6ULL=y CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y -CONFIG_USE_IMXIMG_PLUGIN=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" +CONFIG_USE_IMXIMG_PLUGIN=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index be4d7c8acaa..dffb66ea354 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_TARGET_MX7DSABRESD=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 574a8b53ea0..023f2bb60e0 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi" CONFIG_TARGET_MX7DSABRESD=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index b490f9c36b3..698e138910a 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-com" CONFIG_LDO_ENABLED_MODE=y CONFIG_TARGET_MX7ULP_COM=y -CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-com" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ea/mx7ulp_com/imximage.cfg" CONFIG_DEFAULT_FDT_FILE="imx7ulp-com" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index b302440ca69..c7738a6b807 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y -CONFIG_TARGET_MX7ULP_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" +CONFIG_TARGET_MX7ULP_EVK=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index f2bbad92c80..05e62fc165f 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y -CONFIG_TARGET_MX7ULP_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" +CONFIG_TARGET_MX7ULP_EVK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index e929216c832..f16a1b663db 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6ULL=y CONFIG_TARGET_MYS_6ULX=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-myir-mys-6ulx-eval" CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ull-myir-mys-6ulx-eval" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 4bda66ada9b..ec040a2395c 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index ccdb1de12b1..1c28c2cab51 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" nanopi-k2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index 739506a7e7d..c9833fdb854 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index 7a24a25d68a..2b2fcac3666 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index eceb67e736f..6d3afe1b63d 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 73453d9df67..1bf5d1d0956 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index ea46dd0b28c..52996266a15 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 506f8287875..351d2eb5536 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 0fd6634c19c..70fc257eebd 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index 9625aca3469..dc2dbd62900 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index 5c659cd28bd..37b7817d869 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_MACPWR="PD6" CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 510e4e8990f..95dd56aa04c 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 5f79191af0f..806d95c1cc7 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index 1ba4ba745cd..c0255196384 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SUN8I_EMAC=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index acc78fc7e1a..924ff38f17c 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=408 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 3e031604eec..72f062e807c 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NAS220=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 -CONFIG_IDENT_STRING="\nNAS 220" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220" +CONFIG_IDENT_STRING="\nNAS 220" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index c8949ccb5b0..712e029fa1c 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" 2Big v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" +CONFIG_IDENT_STRING=" 2Big v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index 538056cfda8..94eebdf0999 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_ARCH_BMIPS=y CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d" +CONFIG_ARCH_BMIPS=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index 333652de122..47c44812f1f 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6362=y -CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 227a27ff83c..07047d9592b 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS v2 Lite" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" +CONFIG_IDENT_STRING=" NS v2 Lite" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index a3b2d0afe4c..5fe88085306 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS Max v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" +CONFIG_IDENT_STRING=" NS Max v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 89eab9d098c..5d9ea06259b 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS v2 Mini" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" +CONFIG_IDENT_STRING=" NS v2 Mini" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index abed503df20..df1f6982af7 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" +CONFIG_IDENT_STRING=" NS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 121bc096e46..df931c752ef 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6DL=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,DDR_MB=2048" diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index b655e32a709..9ea4546a75a 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6DL=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,DDR_MB=1024" diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 4d78df39ef1..2de5b7cb0c4 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6Q=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,DDR_MB=2048" diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 0c497215862..7353081d0bd 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6Q=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,DDR_MB=1024" diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 7d865de6444..d885749d396 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6S=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,DDR_MB=1024" diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index c47fb5e1b4b..caf05de8d9b 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6S=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,DDR_MB=512" diff --git a/configs/novena_defconfig b/configs/novena_defconfig index b5657590ff8..dcbbf4dac02 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6Q=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KOSAGI_NOVENA=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-novena" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_ENV_OFFSET_REDUND=0x84000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-novena" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index e8faf72051d..a67963a4b79 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -2,10 +2,10 @@ CONFIG_ARC=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 358ea77f7cf..5852a0cd8e4 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -3,10 +3,10 @@ CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 3a66b3b2537..cdbcba1f25c 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -3,10 +3,10 @@ CONFIG_ISA_ARCV2=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 97ede6e09d7..41e3618ffe2 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -4,10 +4,10 @@ CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 3a47c5a0d01..eaa12f5ab16 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x81000100 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_DEBUG_UART_BASE=0x70006000 CONFIG_DEBUG_UART_CLOCK=408000000 CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig index 906a3afe5d8..36e10c659b5 100644 --- a/configs/o4-imx6ull-nano_defconfig +++ b/configs/o4-imx6ull-nano_defconfig @@ -1,103 +1,59 @@ -CONFIG_ARCH_MX6=y CONFIG_ARM=y -CONFIG_DEFAULT_DEVICE_TREE="o4-imx-nano" -CONFIG_HUSH_PARSER=y -CONFIG_IMX_MODULE_FUSE=y -CONFIG_MX6ULL=y -CONFIG_O4_IMX_NANO=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX6=y +CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_MX6ULL=y CONFIG_TARGET_O4_IMX6ULL_NANO=y - -# CONFIG_K4B4G1646D_BCMA is not set -CONFIG_MT41K256M16HA_125E=y - -# Device Tree -CONFIG_OF_CONTROL=y -CONFIG_OF_LIBFDT_OVERLAY=y - -# Environment -CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y - -# Clock driver for imx6ull is not implemented -# CONFIG_CLK_IMX6Q=y - -# Thermal -CONFIG_DM_THERMAL=y -CONFIG_IMX_THERMAL=y - -# Serial -CONFIG_DM_SERIAL=y -CONFIG_MXC_UART=y - -# eMMC support -CONFIG_CMD_MMC=y -CONFIG_DM_MMC=y -CONFIG_FSL_USDHC=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_SUPPORT_EMMC_RPMB=y - -# GPIO support -CONFIG_CMD_GPIO=y CONFIG_DM_GPIO=y -CONFIG_MXC_GPIO=y - -# USB support -CONFIG_CI_UDC=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_DM_USB=y -CONFIG_USB=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y - -# Fastboot support -CONFIG_CMD_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_USB_FUNCTION_FASTBOOT=y - -# Ethernet support -CONFIG_CMD_DHCP=y -CONFIG_CMD_MDIO=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_DM_ETH=y -CONFIG_DM_ETH_PHY=y -CONFIG_FEC_MXC=y -CONFIG_FEC_MXC_MDIO_BASE=0x020b4000 -CONFIG_FEC_MXC_SHARE_MDIO=y -CONFIG_MII=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_PHYLIB=y -CONFIG_PHY_SMSC=y - -# I2C -CONFIG_CMD_I2C=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_MXC=y - -# Watchdog support is broken -# CONFIG_CMD_WDT=y -# CONFIG_IMX_WATCHDOG=y -# CONFIG_SYSRESET_WATCHDOG=y -# CONFIG_WATCHDOG_RESET_DISABLE=y -# CONFIG_WDT=y - -# VBUS -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y - -# misc +CONFIG_MT41K256M16HA_125E=y +CONFIG_IMX_MODULE_FUSE=y +CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_GPT=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x020b4000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 67dc0eae43e..9ba115c97d7 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-oceanic-5205-5inmfd" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y @@ -8,7 +9,6 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-oceanic-5205-5inmfd" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 8c489ef69d3..5457ab24002 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig index 7b21c120815..0c6989d4ba4 100644 --- a/configs/odroid-c4_defconfig +++ b/configs/odroid-c4_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c4/hc4" -CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 6aa41e37557..f5b03a30ab8 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="rk3326-odroid-go2" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_ODROID_GO2=y @@ -16,7 +17,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3326-odroid-go2" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig index 8a12148fb4f..065ecbcfb05 100644 --- a/configs/odroid-n2_defconfig +++ b/configs/odroid-n2_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-n2/n2_plus" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 755a2ca9add..2bcaaf2db73 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -6,8 +6,8 @@ CONFIG_ARCH_EXYNOS5=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x310000 -CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3" +CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 681a955a7a9..084c1ee7416 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit" CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 64fe9da6236..7f06249bd33 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit" CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 83122af2ab9..f58112ef3fa 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -4,11 +4,11 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="omap3-beagle" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_BEAGLE=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap3-beagle" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_USE_PREBOOT=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 7a263513a77..4d96505e361 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -4,11 +4,11 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_EVM=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 84f989de6bf..2371fff8e53 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index c825d0df4e3..19b9ff8e4b7 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit" CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 60a451b5efb..08dc3552c82 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="omap4-panda" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_PANDA=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap4-panda" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-panda.dtb" diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 3592cfd9fae..f90b2814288 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -4,12 +4,12 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_OFFSET=0xE0000 +CONFIG_DEFAULT_DEVICE_TREE="omap4-sdp" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_SDP4430=y CONFIG_CMD_BAT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap4-sdp" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb" diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index a23058bff97..a08c7fa6704 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="omap5-uevm" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP54XX=y CONFIG_TARGET_OMAP5_UEVM=y @@ -8,7 +9,6 @@ CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="omap5-uevm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 6274f315252..6f95fc4aa59 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -13,11 +13,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 3d83b2e8000..cc69bf2b385 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" +CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 4e943b3787c..6281f360f3e 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" +CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 8c77f2ae1ac..d05ba7ee29a 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" +CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 2b83fa206f8..e1b39435696 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y CONFIG_TARGET_OPOS6ULDEV=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index d34cf93c7c3..9f0053914ae 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index bebded4601c..6f8ceb0fb78 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-2" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_USB1_VBUS_PIN="PG13" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index 82b9815205e..c243a582001 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index a793c150afd..75c97d6b897 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-lite2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-lite2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index ecb1b7a6e3d..96bbd1bab6f 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-lite" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-lite" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 151c963a460..1064b4a39de 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index 5909cd483a5..55a8b003fb5 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-one-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-one-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index f72ffe27b26..5a538e133f1 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 995cfeaf7c9..f971ed1977c 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index e2067748eaa..04ecf153152 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index cbb89624c77..21f3c73ba60 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index ea24b0b6887..b17f640ca39 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 @@ -7,7 +8,6 @@ CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_SATAPWR="PG11" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 8e9ef1fae02..95a82e20f3e 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index 0ae5c2cae99..745451c4bf6 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 6075e61a7d6..8c2179ba8b5 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MACPWR="PD14" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 5af964bf100..72574a89a29 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-orangepi-zero2" CONFIG_SPL=y CONFIG_DRAM_SUN50I_H616_WRITE_LEVELING=y CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y @@ -8,7 +9,6 @@ CONFIG_DRAM_SUN50I_H616_WRITE_TRAINING=y CONFIG_MACH_SUN50I_H616=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_R_I2C_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-orangepi-zero2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_PHY_REALTEK=y diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 998c95d151a..332cd4739ea 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 86cc42417e8..9583d24c8d6 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig index 92766f54261..55a251374a1 100644 --- a/configs/orangepi_zero_plus2_h3_defconfig +++ b/configs/orangepi_zero_plus2_h3_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zero-plus2" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zero-plus2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index 2c4c49006e1..f3ecf35eee1 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 4c4dc1a0db6..dee956a67b8 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -7,10 +7,10 @@ CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ORIGEN=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4200 +CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" CONFIG_SPL_TEXT_BASE=0x02021410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for ORIGEN" -CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/p200_defconfig b/configs/p200_defconfig index 0c85cdcea16..10b240b30b3 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p200" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/p201_defconfig b/configs/p201_defconfig index f4b9a1a44c8..612f32fb7c4 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p201" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 51b84325c08..338fcdebbbc 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p212" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index da3be084be2..1c103c76425 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 -CONFIG_TEGRA210=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000" +CONFIG_TEGRA210=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index c7f4404bbac..bae2a7252c9 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180" CONFIG_TEGRA210=y CONFIG_TARGET_P2371_2180=y -CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 97303409674..c89763f9f0a 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" CONFIG_TEGRA210=y CONFIG_TARGET_P2571=y -CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 0ca1fdf381d..eb74ba4ce88 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 -CONFIG_TEGRA186=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-000" +CONFIG_TEGRA186=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index ca340f1bd7d..11e06232676 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 -CONFIG_TEGRA186=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-500" +CONFIG_TEGRA186=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 6e6a8133b4d..2aa9f676757 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" CONFIG_TEGRA210=y CONFIG_TARGET_P3450_0000=y -CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index f82dc6dc409..de340e230f2 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=600 @@ -10,7 +11,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PD10" CONFIG_USB1_VBUS_PIN="PD12" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 30b4d2a8521..e26445cc318 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_PAZ00=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 32f08a17419..260d3d459b4 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052" CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_TARGET_PCM052=y -CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index b0278941ad0..3f14326e46b 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -14,6 +14,7 @@ CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_PCM058=y CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-phytec-mira-rdk-nand" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-phytec-mira-rdk-nand" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 01054b0ee48..d3fbc4eca96 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=7 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" CONFIG_SPL_TEXT_BASE=0x02024410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pi" -CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index c6646dcd6e6..d6d97a84c36 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -7,10 +7,10 @@ CONFIG_TARGET_PEACH_PIT=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" CONFIG_SPL_TEXT_BASE=0x02024410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pit" -CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 65ab4fbc0ad..27e8192ded7 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -9,9 +9,12 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -22,8 +25,8 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y -CONFIG_MISC_INIT_R=y CONFIG_LAST_STAGE_INIT=y +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y @@ -38,19 +41,16 @@ CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:128k(rcw),128k(qe),128k(envred),128k(env),512k(res),1m(u-boot),-(ubi0);68000000.flash:-(ubi1)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_FLASH=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0x60060000 CONFIG_ENV_ADDR_REDUND=0x60040000 -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_FSL_DDR3=y -# CONFIG_MMC is not set CONFIG_SYS_I2C_MXC=y -CONFIG_SYS_I2C_MXC_I2C1=y -CONFIG_SYS_I2C_MXC_I2C2=y -CONFIG_SYS_I2C_MXC_I2C3=y +# CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index a00334bf49d..99389d64059 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index 8b3ad9db152..87de31d63a9 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_OFFSET=0xA0000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-regor-rdk" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=1000 CONFIG_TARGET_PHYCORE_AM335X_R2=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="am335x-regor-rdk" # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="am335x-regor-rdk.dtb" diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index cbf3b9fdc15..591ac755321 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_OFFSET=0xA0000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=1000 CONFIG_TARGET_PHYCORE_AM335X_R2=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="am335x-wega-rdk.dtb" diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 549a51db1ea..21514fabb5e 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_PHYCORE_IMX8MM=y CONFIG_SPL_MMC_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 -CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index f905c01b8f6..7f21e8888e0 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3C0000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk" CONFIG_SPL_TEXT_BASE=0x920000 CONFIG_TARGET_PHYCORE_IMX8MP=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 2997e428282..b7a52cfa5c7 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_PHYCORE_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 65239a049d5..104f6a4ebaa 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6UL=y CONFIG_TARGET_PCL063=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phytec-segin-ff-rdk-nand" CONFIG_SPL_TEXT_BASE=0x00909000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phytec-segin-ff-rdk-nand" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index c57ca29f3bc..f76eb62603b 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -7,11 +7,11 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6ULL=y CONFIG_TARGET_PCL063_ULL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-phytec-segin-ff-rdk-emmc" CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ull-phytec-segin-ff-rdk-emmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index b31209bb17b..ff15d80b4d2 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x88080000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y -CONFIG_MACH_PIC32=y CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk" +CONFIG_MACH_PIC32=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index ab571b5ddab..d9251928ffa 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -12,11 +12,11 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 589811a3121..a5dbcc8989b 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index a9c867e1a94..8e257e3118f 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index bb0f93f8da0..a3ba67fe852 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 0f27c547553..3ecc25b8c48 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -10,12 +10,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6QDL=y CONFIG_TARGET_PICO_IMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-pico" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-pico" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 159fb6b6cd7..1555385c606 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 7265ec01afd..415b2a15224 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -8,12 +8,12 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 673e822c89b..41207fbde1b 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 61275e29141..9d664c07f06 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_PICO_IMX8MQ=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 589811a3121..a5dbcc8989b 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 7d9e219c28e..fe7e61f985a 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 345de8c8dc5..4f1219f3e68 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index 048b31d73ce..6209e68e2d1 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y @@ -8,7 +9,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 10514b5ce2d..d1c2c3c3cc1 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_PINE64_DT_SELECTION=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 2fa66f38343..4e621db0c03 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y @@ -9,7 +10,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB3_VBUS_PIN="PL5" CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index c4bab29a063..f97d5e872b0 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_PINEBOOK_PRO_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index 43df3f3c82e..533a736999c 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinebook" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y @@ -7,7 +8,6 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinebook" CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_PWM=y diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig index a8c404f6b1c..4b7b410da57 100644 --- a/configs/pinecube_defconfig +++ b/configs/pinecube_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube" CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_SUNXI_DRAM_DDR3_1333=y CONFIG_DRAM_CLK=504 CONFIG_DRAM_ODT_EN=y CONFIG_I2C0_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube" CONFIG_SPL_I2C_SUPPORT=y # CONFIG_NETDEVICES is not set CONFIG_AXP209_POWER=y diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 64ecef59c90..64e13d31322 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y @@ -7,6 +8,5 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index d57f8bc3bdc..d55bf467536 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_PLUTUX=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index e0315504202..dd5000e7db0 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_PM9G45=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 34d1226686e..ea33b437026 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_POGO_E02=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x60000 -CONFIG_IDENT_STRING="\nPogo E02" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02" +CONFIG_IDENT_STRING="\nPogo E02" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig index 7f813594916..17fffeb1e26 100644 --- a/configs/polaroid_mid2407pxe03_defconfig +++ b/configs/polaroid_mid2407pxe03_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig index 36df3830950..e542b711132 100644 --- a/configs/polaroid_mid2809pxe04_defconfig +++ b/configs/polaroid_mid2809pxe04_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index f0af88f6a2b..31bfa09a5e3 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 -CONFIG_IDENT_STRING="poplar" CONFIG_DEFAULT_DEVICE_TREE="hi3798cv200-poplar" +CONFIG_IDENT_STRING="poplar" CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 03fd1a53664..697c5545fbe 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_POPMETAL_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 3d4037aa74d..a7f5deb2703 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Porter" CONFIG_R8A7791=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index e1750dc6939..46dc6b94812 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 0f15936c2d6..1466090cc39 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 @@ -13,7 +14,6 @@ CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 1afc146bbf2..3e50d871bf3 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-ctouch2" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_PX30_CORE=y @@ -14,7 +15,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-ctouch2" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index 9d78eee84d7..01e0b5a80ab 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-edimm2.2" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_PX30_CORE=y @@ -14,7 +15,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-edimm2.2" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index eb70b6bbf85..254baa5e3fc 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=720 CONFIG_TARGET_PXM2=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index 198cc5a298b..1fc5194caf3 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo: CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig index 58dd9dff602..dda1a0c51f6 100644 --- a/configs/q8_a23_tablet_800x480_defconfig +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig index 32b6c61c0fe..7925677d30e 100644 --- a/configs/q8_a33_tablet_1024x600_defconfig +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=456 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig index 3bc4eb26843..f3335f9d233 100644 --- a/configs/q8_a33_tablet_800x480_defconfig +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=456 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index f30bd5f0a0e..28ac2b3b53f 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -1,8 +1,8 @@ CONFIG_RISCV=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="qemu-virt" +CONFIG_SPL=y CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index ee91ece0ec0..78cfc410a38 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -1,8 +1,8 @@ CONFIG_RISCV=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="qemu-virt" +CONFIG_SPL=y CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 4815d8af4e6..a02ccab3d83 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x40000 CONFIG_MAX_CPUS=2 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" CONFIG_X86_RUN_64BIT=y CONFIG_TARGET_QEMU_X86_64=y CONFIG_DEBUG_UART=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 6cb3e53ff72..500a4540197 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 CONFIG_USB1_VBUS_PIN="PG13" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig index 4a87a9a31f6..ee74e89778b 100644 --- a/configs/r8a774a1_beacon_defconfig +++ b/configs/r8a774a1_beacon_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2M=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/r8a774b1_beacon_defconfig b/configs/r8a774b1_beacon_defconfig index 2c31222525c..90074f0ae80 100644 --- a/configs/r8a774b1_beacon_defconfig +++ b/configs/r8a774b1_beacon_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774b1-beacon-rzg2n-kit" CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2N=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774b1-beacon-rzg2n-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/r8a774e1_beacon_defconfig b/configs/r8a774e1_beacon_defconfig index a814d6ad639..7463618fa72 100644 --- a/configs/r8a774e1_beacon_defconfig +++ b/configs/r8a774e1_beacon_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774e1-beacon-rzg2h-kit" CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2H=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774e1-beacon-rzg2h-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 9dbe0e1d5b4..2e5fb60f1a2 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index dbe2912779c..1b9948bcbbf 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 13c19f25c8f..15743c1a816 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 3175b941890..562b80b9964 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_DRAAK=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 63c62a5c074..aeffeb8d4ef 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_RASTABAN=y @@ -21,7 +22,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index b994e07038b..efd6ca2da86 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SALVATOR_X=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 24e28abff58..a857e5bd1c2 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_ULCB=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index fc936fff665..6769cf86f50 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -10,12 +10,12 @@ CONFIG_ENV_OFFSET=0x60000 CONFIG_MX6S=y CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-riotboard" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-riotboard" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,SPL,DDR_MB=1024" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 2d02e294e68..77eaefcac9d 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc" CONFIG_ROCKCHIP_RK3308=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -11,7 +12,6 @@ CONFIG_TARGET_ROC_RK3308_CC=y CONFIG_SPL_STACK_R_ADDR=0xc00000 CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index aa131bf8ea0..8ddde6b1477 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 8aa5a155180..9db842287ad 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -6,13 +6,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 927b57685d9..ed6628c9228 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -6,13 +6,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index c7e1a8d2e4b..b1ea38e92b8 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb" diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 9c2c9e2a785..81516e9144f 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index bc4068a2d9f..ce932acb8c2 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL_STACK_R_ADDR=0x4000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index 3255e015120..14740dfcef1 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index d1d1613f581..935f569db5c 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index 5bbdbc5ad86..2f1743a7065 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_ROCK2=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index cb79cea821f..9653848cf6e 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index b7ef096b594..0233e0ea527 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -2,11 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROCK960_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" diff --git a/configs/rock_defconfig b/configs/rock_defconfig index cf23a10455f..91221736061 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -6,13 +6,13 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" CONFIG_SPL_TEXT_BASE=0x10080800 CONFIG_ROCKCHIP_RK3188=y CONFIG_TARGET_ROCK=y CONFIG_SPL_STACK_R_ADDR=0x60080000 CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index e9a01ec9d56..ae11a8f5eb0 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROCKPRO64_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" diff --git a/configs/rut_defconfig b/configs/rut_defconfig index ba3d6377df7..cf2664b7bbc 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=600 CONFIG_TARGET_RUT=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/s400_defconfig b/configs/s400_defconfig index af89fabf1fd..2b55eedd5e5 100644 --- a/configs/s400_defconfig +++ b/configs/s400_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400" CONFIG_MESON_AXG=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" s400" -CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index 36b8a159739..d99c30b6c39 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -8,12 +8,12 @@ CONFIG_SYS_MEMTEST_END=0xb0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x2E0200 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="s5p4418-nanopi2" CONFIG_TARGET_NANOPI2=y CONFIG_S5P4418_ONEWIRE=y CONFIG_ROOT_DEV=1 CONFIG_BOOT_PART=1 CONFIG_ROOT_PART=2 -CONFIG_DEFAULT_DEVICE_TREE="s5p4418-nanopi2" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 28d8be6b01f..6ff3805af19 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x34800000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 -CONFIG_TARGET_S5P_GONI=y CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" +CONFIG_TARGET_S5P_GONI=y CONFIG_ENV_VARS_UBOOT_CONFIG=y # CONFIG_AUTOBOOT is not set CONFIG_USE_BOOTARGS=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index efd23b405c5..d29a19e7415 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6338=y -CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index d65dbc1e1ad..0cdc7d40efd 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 779b59f4830..f7aaafdc4a9 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_SAM9X60EK=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 694c74bd634..7cb711d9ed0 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 30697ad5cda..f3bec6a1a29 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_giantboard" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_giantboard" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 66b5f257030..83cf4b482a5 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index b7d3b64d15a..219ecbfe1ae 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 4425fa610f5..9b263358541 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index a778df54bfc..3914632f090 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 44124cdf49c..93d47f5b614 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 88d6e1f5b01..04a88fe779d 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 8df3b3e6d5c..6af766b492e 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -7,10 +7,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 6d57551b344..faf115446d9 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_SAMA5D2_PTC_EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index bd6dbff5647..462c94ce6e7 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index add797b7ca9..9f6da2f8672 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 4dbe6de7226..17c610047d6 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 64ca9dd2a29..b9b145bffa5 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 2893fb94829..0077217492d 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -7,10 +7,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 3a3d9d2e660..ca072f481c1 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 1500c020ee6..f4d13a5ac73 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 3538dfd1bcc..c24dcc0b0ec 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index c763a8dc593..b2254ea1ee4 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 35c9f5fce97..69d1f3ec75c 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index ad48f29fd59..9107eee738b 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 7ae7b104d4b..bf2d5164d25 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 03f2aa18b5c..df4e72a0151 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 007ee7740e9..6f78d1e8dd4 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index af85192d0be..4b2f82320a0 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 5a46118ec82..4420a507823 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 8f7858ba63b..0ad8e84ea2e 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 232d99883a5..97fafcca4d1 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index c73b8de0eab..d7513d3cb6f 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 9326f53444c..74a22aaddba 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 9a373bab6fe..fafa85a5c02 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -3,9 +3,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox64" CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox64" CONFIG_SANDBOX64=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index bdbf714e2bd..f279bd1a0fc 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -3,9 +3,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_PRE_CON_BUF_ADDR=0xf0000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 853c9440ea0..965dc79cf5d 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -3,8 +3,8 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 -CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index c7fc98b5569..9f415cd8756 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -5,12 +5,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SANDBOX_SPL=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 87223a54d87..8bc1373ec31 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -5,12 +5,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SANDBOX_SPL=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index cf477baf943..c0bef12c3a9 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_SEABOARD=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 6503cabbd02..71ab08fb7dc 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -4,14 +4,17 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x3c00000 CONFIG_MX6ULL=y CONFIG_TARGET_NPI_IMX6ULL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-seeed-npi-imx6ull-dev-board" CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ull-seeed-npi-imx6ull-dev-board" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -24,15 +27,10 @@ CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMTEST=y -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set -# CONFIG_CMD_I2C is not set CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_USB=y @@ -40,17 +38,17 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="gpmi-nand:512k(spl),1m(uboot),1m(uboot-dup),-(ubi)" -CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_CMD_UBI=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -# CONFIG_DM_I2C_GPIO is not set -# CONFIG_SYS_I2C_MXC is not set +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y @@ -59,22 +57,16 @@ CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x180000 CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y -CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_PMIC=y -CONFIG_NET_RANDOM_ETHADDR=y -# CONFIG_SPL_PMIC_CHILDREN is not set -CONFIG_MMC=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_ENV_OFFSET=0x3c00000 CONFIG_MXC_UART=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_GADGET=y -CONFIG_SMBIOS_MANUFACTURER="Seeed" diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index d40048358b6..8ff99cbea04 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" sei510" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index aa2307ea290..51c7d600518 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" sei610" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 6cf07402a5d..ca4ef80d181 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -3,10 +3,10 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6358=y CONFIG_BOARD_SFR_NB4_SER=y -CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 90e3fff3fba..60256d19fda 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -2,11 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_SHEEP=y CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb" diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 242f97dba04..676c47af277 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_SHEEVAPLUG=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug" +CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 62416a7c1d8..5bf40cee08c 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -3,11 +3,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_TARGET_SIFIVE_UNLEASHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 01ca2d8c236..4c265048672 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -3,10 +3,10 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" CONFIG_TARGET_SIFIVE_UNMATCHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 7ef4599683f..10c7af1a2f0 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SILINUX_EK874=y -CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 00b91ddd858..73440cd98ce 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk" CONFIG_R8A7794=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 1f600d02780..901d8410600 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -13,10 +13,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 8e60f46a5c7..a2a20cf6c4c 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -10,10 +10,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5250" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 429b0638cdb..04b560a8a80 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=7 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" CONFIG_SPL_TEXT_BASE=0x02024410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5420" -CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index e12ac6a4368..f9df1281355 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -4,9 +4,9 @@ CONFIG_ARCH_S5PC1XX=y CONFIG_SYS_TEXT_BASE=0x34800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_TARGET_SMDKC100=y CONFIG_IDENT_STRING=" for SMDKC100" -CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)" diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 9d4cf3533eb..568f95a813c 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS4=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4200 +CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310" CONFIG_SPL_TEXT_BASE=0x02021410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDKC210/V310" -CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310" CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_SPL_FRAMEWORK is not set diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index aa10577a9f3..9bfaa010ae7 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-smegw01" CONFIG_TARGET_SMEGW01=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-smegw01" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/storopack/smegw01/imximage.cfg" diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 76215034acf..cb7dabfaba6 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x12c30000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for snow" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 29e3fb865e7..69215756356 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -8,11 +8,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 0e5ef062a51..2dfac1db799 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -9,12 +9,12 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index af726bab694..97eb7b4630e 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -8,12 +8,12 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 468775425d4..17f13ff4d56 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -3,12 +3,12 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_IDENT_STRING="socfpga_arria10" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index d4f9bade3d0..25503537e2a 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index ae7fd501917..7fea6b6764e 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 033c40736ed..2cea705e1a3 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 53efc9f5bda..c43403f1b0d 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index d94b9584dea..7d0f6488e4e 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index c95d97e9cad..b99a22bd68d 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -3,9 +3,9 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index c2f73b5d8df..0de70341d03 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -5,10 +5,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_IS1=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index b24b417a6bc..a965b54f277 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index d9f4df4a182..313c5ac86b7 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_ENV_OFFSET_REDUND=0x120000 # CONFIG_SPL_LIBDISK_SUPPORT is not set # CONFIG_SPL_SPI_SUPPORT is not set CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" -CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 4ea9b41a7e2..4f69f2144cb 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 16c9b927a9b..970fc430a35 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 734b5d2767b..968c255ccbf 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_ENV_OFFSET_REDUND=0xF0000 -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 9f2f220c3a8..cd1b6f9bba7 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -8,11 +8,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index da8bf986cd0..bbbae14366d 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -9,12 +9,12 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_OPTIMIZE_INLINING=y CONFIG_SPL_OPTIMIZE_INLINING=y CONFIG_BOOTDELAY=5 diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 3984b9bc784..6c47031a962 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -5,10 +5,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y CONFIG_ENV_OFFSET_REDUND=0x110000 -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=5 diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index 393882d997e..5aa95202250 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867" CONFIG_VENDOR_ADVANTECH=y CONFIG_TARGET_SOM_DB5800_SOM_6867=y CONFIG_DEBUG_UART=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 6a26723394f..0093076dc55 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y @@ -9,7 +10,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index a1fdf1d1f68..bbe5ab29a8c 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x12c30000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for spring" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 4866460e830..f86eff94f42 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -3,8 +3,8 @@ CONFIG_ARCH_STI=y CONFIG_SYS_TEXT_BASE=0x7D600000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 -CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260" CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260" +CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index a1721fddfdc..b0dcb38b3bd 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -5,9 +5,9 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco" CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_DISCOVERY=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index c6684477782..b614182b4fe 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval" CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_EVALUATION=y -CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index d5d6dc6278e..7960618d465 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco" CONFIG_STM32F4=y CONFIG_TARGET_STM32F469_DISCOVERY=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 77690265422..05d7ec2d79b 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x08008000 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" CONFIG_SPL_TEXT_BASE=0x8000000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 41500912847..40f94ac7728 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x08008000 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" CONFIG_SPL_TEXT_BASE=0x8000000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index 1712fe86c8d..03c17867eb6 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco" CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_DISCO=y -CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index cb7dedae347..9d78fb7fe82 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval" CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_EVAL=y -CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig index 78b937f5bf6..1af66c5b1bc 100644 --- a/configs/stm32h750-art-pi_defconfig +++ b/configs/stm32h750-art-pi_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x90000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32h750i-art-pi" CONFIG_STM32H7=y CONFIG_TARGET_STM32H750_ART_PI=y -CONFIG_DEFAULT_DEVICE_TREE="stm32h750i-art-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 24a7bdfd430..da78532d307 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index ab4819fa880..9e7a1a9d4ed 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 14bdf933094..b23b051ed76 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 55f919c0fb5..82dc57ad254 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 3ff46f70489..e199f2b7f98 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y @@ -17,7 +18,6 @@ CONFIG_TYPEC_STUSB160X=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index a127506a5f8..17f2c8799e5 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_SIZE=0x4000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y @@ -13,7 +14,6 @@ CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 40d06f4e00f..cd248747d36 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_ENV_SIZE=0x4000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y @@ -11,7 +12,6 @@ CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index afbf721299b..5bc5e794003 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index c46ef429b81..408d104e32b 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_STMARK2=y CONFIG_DEFAULT_DEVICE_TREE="stmark2" +CONFIG_TARGET_STMARK2=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1" diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 4d57d7147db..e8ac46fb7dc 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Stout" CONFIG_R8A7790=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index 3c5f7aac6a2..a3b1d76d8bb 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=552 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=63351 CONFIG_USB0_VBUS_PIN="axp_drivebus" CONFIG_USB0_VBUS_DET="axp_vbus_detect" CONFIG_USB1_VBUS_PIN="PH7" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index a02f07eeb7a..f7a77169298 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -9,7 +10,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 276c476baeb..b5ec025db9c 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA -CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index 9ce812ecc35..0390347415c 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-tanix-tx6" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_DDR3_1333=y CONFIG_DRAM_CLK=648 CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-tanix-tx6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index a79cdf3fa7c..99080fd34ff 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 @@ -24,7 +25,6 @@ CONFIG_DEBUG_UART_CLOCK=18432000 CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067" CONFIG_BOOTDELAY=3 diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 47e2f571bff..99ef8a11922 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -2,8 +2,8 @@ CONFIG_ARC=y CONFIG_TARGET_TB100=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_ENV_SIZE=0x800 -CONFIG_SYS_CLK_FREQ=500000000 CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100" +CONFIG_SYS_CLK_FREQ=500000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index e2e4db5c897..a1f1884bd2f 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_OFFSET=0x60000 CONFIG_MX6Q=y CONFIG_TARGET_TBS2910=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_PRE_CON_BUF_ADDR=0x7c000000 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index 6597f200eec..b3c2e69d6cd 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-tbs-a711" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_TYPE=7 @@ -11,7 +12,6 @@ CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-tbs-a711" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_DCDC5_VOLT=1200 diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 9733a09c5b1..d6a072e4e5a 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_TEC_NG=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 1f5ac9ec1ca..1de5c5769c6 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_TEC=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index a5d9fb082fe..41d34745a12 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_DRAM_CLK=552 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PL7" CONFIG_I2C0_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i" CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 897d061416e..ee42767a8af 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -4,8 +4,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y CONFIG_INTERNAL_UART=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index a8890eb4e8c..cd70f7681b6 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -4,8 +4,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y CONFIG_INTERNAL_UART=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index 51aeaafe874..f300cbff89f 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -4,8 +4,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700" +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_DFI=y CONFIG_TARGET_THEADORABLE_X86_DFI_BT700=y CONFIG_SMP=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index dbf006b1903..6d32e6c5be2 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index d1cc9a69bec..1bc050ebaf3 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_THUBAN=y @@ -21,7 +22,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index dd135ada369..97a41d8ee70 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -3,10 +3,10 @@ CONFIG_TARGET_THUNDERX_88XX=y CONFIG_SYS_TEXT_BASE=0x00500000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_DEBUG_UART_BASE=0x87e024000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core" -CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index e38d409fffb..0eda492f39a 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1C0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm" CONFIG_SPL_TEXT_BASE=0x40400000 CONFIG_TI816X=y CONFIG_TARGET_TI816X_EVM=y @@ -15,7 +16,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1E0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 8686a66d133..196348ac6f4 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 22714833ccc..3720caabde5 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x800000 CONFIG_SPL_SIZE_LIMIT=0x4B000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index ec66bb09584..d9490cd9b77 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt" -CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index e4145948859..31b9dd912cb 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt" -CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 0041ee15366..37e0d15a1b4 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt" -CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index 19769577793..7573c8883f4 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300" CONFIG_ARCH_ATH79=y CONFIG_BOARD_TPLINK_WDR4300=y -CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 4569675ccc4..82d9b95beab 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6DL=y CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b" +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 8648c7d3a2e..c4f5b1c11ff 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6Q=y CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_DEFAULT_DEVICE_TREE="imx6q-mba6b" +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 0c07dd08723..ab1f55bb948 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6S=y CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b" +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 6c62197dfd3..23f2bbededd 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFE000 CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_TRIMSLICE=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index e85394fbe80..0dbf850952f 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtuge1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtuge1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_TUGE1=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index f93be912c95..2c6f4938dbd 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -9,13 +9,15 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_FIXUP=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -23,19 +25,13 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y -CONFIG_BUTTON=y -CONFIG_BUTTON_GPIO=y -CONFIG_CMD_AES=y -CONFIG_CMD_BUTTON=y +CONFIG_CMD_SHA1SUM=y CONFIG_CMD_CLK=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_CMD_HASH=y CONFIG_CMD_I2C=y -CONFIG_CMD_LED=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y -CONFIG_CMD_SHA1SUM=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y @@ -43,17 +39,16 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_AES=y +CONFIG_CMD_HASH=y CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_FIT=y -CONFIG_FIT_ENABLE_SHA256_SUPPORT=y -# CONFIG_FIT_SIGNATURE is not set -CONFIG_FIT_VERBOSE=y -# CONFIG_FIT_BEST_MATCH is not set +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y # CONFIG_MVEBU_GPIO is not set @@ -100,4 +95,3 @@ CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_WDT=y CONFIG_WDT_ARMADA_37XX=y -CONFIG_SHA1=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 79662baa061..57ab384f639 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -16,12 +16,12 @@ CONFIG_ENV_OFFSET=0xF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index ff7782cc33b..58a374cf656 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtuxa1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtuxa1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_TUXX1=y diff --git a/configs/u200_defconfig b/configs/u200_defconfig index b01816336eb..3b31aa4a1e7 100644 --- a/configs/u200_defconfig +++ b/configs/u200_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" u200" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index 0c0757c4fa4..cdf6b2274ce 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index a936937eae5..791613ee000 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -10,12 +10,12 @@ CONFIG_ENV_OFFSET=0x60000 CONFIG_MX6QDL=y CONFIG_TARGET_UDOO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-udoo" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-udoo" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 6ab3815f612..8667c752bf6 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -10,13 +10,13 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SX=y CONFIG_TARGET_UDOO_NEO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index acc6d7daf71..117b76005ff 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -4,12 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" CONFIG_SPL_TEXT_BASE=0x00040000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index e989b84f29b..d92f5f40c56 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -4,12 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" CONFIG_SPL_TEXT_BASE=0x00100000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index 3d2a98ee3ca..8eeb455e626 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" CONFIG_ARCH_UNIPHIER_V8_MULTI=y CONFIG_MICRO_SUPPORT_CARD=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 95bebdd4ab0..91eb3a49650 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_TARGET_USBARMORY=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-usbarmory" +# CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index b1afcf1a300..595e8ecc23b 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_MX6ULL=y CONFIG_TARGET_DART_6UL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index ca18677dd4c..52db28fc384 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_VENICE2=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 4701f4c9477..bf1965d0b5f 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_VENTANA=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 8d722b63b0e..d969370e25a 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -13,13 +13,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-verdin" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_VERDIN_IMX8MM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-verdin" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 8edd0484049..92034b34f75 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -12,6 +12,7 @@ CONFIG_MX6SX=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_SOFTING_VINING_2000=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sx-softing-vining-2000" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sx-softing-vining-2000" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 5780af8c642..86692bffeb8 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x04e000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y @@ -12,7 +13,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y CONFIG_BOARD_VOCORE2=y -CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index e615d0e6743..dd9c0d4a651 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index c6e805a9c0b..d6b34454c82 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -13,13 +13,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revd1" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revd1" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index c5c5d99c6ca..946fd016b61 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 910419938cd..7e2b7d92a52 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -6,13 +6,13 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg" diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 34acc9e6c84..9b7f6c6052a 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -19,7 +19,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig index 364c16c3808..7d3e7cc4d18 100644 --- a/configs/wetek-core2_defconfig +++ b/configs/wetek-core2_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2" CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" wetek-core2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 76574c4de4b..c4ee77d3f4f 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 85d783c07cb..7f75f9bb9ce 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_SIZE=0x80 CONFIG_SYS_MALLOC_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="versal-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="versal-mini" # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 8837987e35e..11ba015b2bf 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_SYS_MALLOC_LEN=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" # CONFIG_EXPERT is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index b07dc040607..1fcab2403bc 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_SYS_MALLOC_LEN=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" # CONFIG_EXPERT is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 7e56395a521..3b34cf59a73 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -7,11 +7,11 @@ CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_OFFSET=0xE00000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_CMD_FRU=y CONFIG_CMD_ZYNQ_AES=y -CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 64989db2917..b0fd8617583 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 4594f8096d3..725f5adb18b 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index d7c64b9da53..2799c2f8301 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index a61507ea7ae..dbe5c42ffb1 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -5,8 +5,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 -# CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +# CONFIG_CMD_ZYNQMP is not set CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index cd5f6de635f..e16b9f4127a 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -5,8 +5,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 -# CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +# CONFIG_CMD_ZYNQMP is not set CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 15cba60d535..5d653714982 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y # CONFIG_CMD_ZYNQMP is not set # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index f7433e994d3..143c253f0ef 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x10000000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART_BASE=0xff010000 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART=y CONFIG_BOOTSTAGE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 6adbe987cb7..b9351d45042 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_CMD_FRU=y CONFIG_ZYNQMP_USB=y -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index b36fd4a43c6..2386da77ed6 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -6,9 +6,9 @@ CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x100000 CONFIG_ENV_SIZE=0x190 CONFIG_SYS_MALLOC_LEN=0x8000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" # CONFIG_AUTOBOOT is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 3e614dfc86f..d19170da8e4 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -6,9 +6,9 @@ CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x190 CONFIG_SYS_MALLOC_LEN=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" # CONFIG_AUTOBOOT is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 7cb1d6122d4..3d0f742798f 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -7,13 +7,13 @@ CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x190 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SYS_MALLOC_LEN=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x0 CONFIG_DEBUG_UART_CLOCK=0 # CONFIG_ZYNQ_DDRC_INIT is not set # CONFIG_CMD_ZYNQ is not set -CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_DEBUG_UART=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" From 534f0fbd65203871c2b054096422a5d0f3346cb1 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 15 Jun 2021 15:33:02 +0900 Subject: [PATCH 155/156] arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y If both POSITION_INDEPENDENT and SYS_RELOC_GD_ENV_ADDR are enabled, wherever original env is placed anywhere, it should be relocated to the right address. Relocation offset gd->reloc_off is calculated with SYS_TEXT_BASE in setup_reloc() and env address gd->env_addr is relocated by the offset in initr_reloc_global_data(). gd->env_addr = (orig env) + gd->reloc_off = (orig env) + (gd->relocaddr - SYS_TEXT_BASE) However, SYS_TEXT_BASE isn't always runtime base address when POSITION_INDEPENDENT is enabled. So the relocated env_addr might point to wrong address. For example, if SYS_TEXT_BASE is zero, gd->env_addr is out of memory location and memory exception will occur. There is a difference between linked address such as SYS_TEXT_BASE and runtime base address. In _main, the difference is calculated as "run-vs-link" offset. The env_addr should also be added to the offset to fix the address. gd->env_addr = (orig env) + ("run-vs-link" offset) + gd->reloc_off = (orig env) + (SYS_TEXT_BASE - _start) + (gd->relocaddr - SYS_TEXT_BASE) = (orig env) + (gd->relocaddr - _start) Cc: Marek Vasut Signed-off-by: Kunihiko Hayashi Acked-by: Marek Vasut Tested-by: Marek Vasut --- arch/arm/lib/crt0_64.S | 5 +++++ lib/asm-offsets.c | 2 ++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 9d2319c0e87..680e674fa33 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -112,6 +112,11 @@ ENTRY(_main) ldr x9, _TEXT_BASE /* x9 <- Linked value of _start */ sub x9, x9, x0 /* x9 <- Run-vs-link offset */ add lr, lr, x9 +#if defined(CONFIG_SYS_RELOC_GD_ENV_ADDR) + ldr x0, [x18, #GD_ENV_ADDR] /* x0 <- gd->env_addr */ + add x0, x0, x9 + str x0, [x18, #GD_ENV_ADDR] +#endif #endif /* Add in link-vs-relocation offset */ ldr x9, [x18, #GD_RELOC_OFF] /* x9 <- gd->reloc_off */ diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c index ee592cfda1c..c691066332d 100644 --- a/lib/asm-offsets.c +++ b/lib/asm-offsets.c @@ -41,5 +41,7 @@ int main(void) DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd)); + DEFINE(GD_ENV_ADDR, offsetof(struct global_data, env_addr)); + return 0; } From 3ef4572110a43acdd7d401b0cb184c6ebd6eaa17 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 28 Jun 2021 15:38:55 -0400 Subject: [PATCH 156/156] Prepare v2021.07-rc5 Signed-off-by: Tom Rini --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 71cf6f72b04..027e31e09e4 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2021 PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = -rc4 +EXTRAVERSION = -rc5 NAME = # *DOCUMENTATION*