Djam/u-boot
1
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2025-05-02 09:36:15 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

clk: rockchip: rk3588: Fix clk_aux16m in clock driver

Browse source 
The rate and error value is not returned for aux16m clocks, fix this.

Fixes: 7a474df740 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman 2023-03-14 00:38:27 +00:00 • committed by Kever Yang
parent a67e219d0c
commit 67a1d773e7
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
drivers/clk/rockchip/clk_rk3588.c
View file

@ -1558,7 +1558,7 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
case CLK_AUX16M_0: case CLK_AUX16M_0:
case CLK_AUX16M_1: case CLK_AUX16M_1:
rk3588_aux16m_get_clk(priv, clk->id); rate = rk3588_aux16m_get_clk(priv, clk->id);
break; break;
case ACLK_VOP_ROOT: case ACLK_VOP_ROOT:
case ACLK_VOP: case ACLK_VOP:
@ -1707,7 +1707,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
case CLK_AUX16M_0: case CLK_AUX16M_0:
case CLK_AUX16M_1: case CLK_AUX16M_1:
rk3588_aux16m_set_clk(priv, clk->id, rate); ret = rk3588_aux16m_set_clk(priv, clk->id, rate);
break; break;
case ACLK_VOP_ROOT: case ACLK_VOP_ROOT:
case ACLK_VOP: case ACLK_VOP: