include: Remove duplicate newlines

Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
Marek Vasut 2024-07-23 01:28:34 +02:00 committed by Tom Rini
parent a1af57b70a
commit 6627fbba20
41 changed files with 0 additions and 115 deletions

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@ -73,7 +73,6 @@
#define ATAPI_CMD_START_STOP 0x1B #define ATAPI_CMD_START_STOP 0x1B
#define ATAPI_CMD_READ_12 0xA8 #define ATAPI_CMD_READ_12 0xA8
#define ATA_GET_ERR() inb(ATA_STATUS) #define ATA_GET_ERR() inb(ATA_STATUS)
#define ATA_GET_STAT() inb(ATA_STATUS) #define ATA_GET_STAT() inb(ATA_STATUS)
#define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) #define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
@ -189,7 +188,6 @@ typedef struct hd_driveid {
unsigned short words164_255[92];/* reserved words 164-255 */ unsigned short words164_255[92];/* reserved words 164-255 */
} hd_driveid_t; } hd_driveid_t;
/* /*
* PIO Mode Configuration * PIO Mode Configuration
* *

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@ -65,7 +65,6 @@ int blkmap_map_mem(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
int blkmap_map_pmem(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, int blkmap_map_pmem(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
phys_addr_t paddr); phys_addr_t paddr);
/** /**
* blkmap_from_label() - Find blkmap from label * blkmap_from_label() - Find blkmap from label
* *

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@ -62,7 +62,6 @@
For more information on these sources, see the manual. For more information on these sources, see the manual.
--*/ --*/
#ifndef _BZLIB_H #ifndef _BZLIB_H
#define _BZLIB_H #define _BZLIB_H
@ -117,7 +116,6 @@ typedef
} }
bz_stream; bz_stream;
#ifndef BZ_IMPORT #ifndef BZ_IMPORT
#define BZ_EXPORT #define BZ_EXPORT
#endif #endif
@ -141,7 +139,6 @@ typedef
# define BZ_EXTERN extern # define BZ_EXTERN extern
#endif #endif
/*-- Core (low-level) library functions --*/ /*-- Core (low-level) library functions --*/
BZ_EXTERN int BZ_API(BZ2_bzCompressInit) ( BZ_EXTERN int BZ_API(BZ2_bzCompressInit) (
@ -174,7 +171,6 @@ BZ_EXTERN int BZ_API(BZ2_bzDecompressEnd) (
bz_stream *strm bz_stream *strm
); );
/*-- High(er) level library functions --*/ /*-- High(er) level library functions --*/
#ifndef BZ_NO_STDIO #ifndef BZ_NO_STDIO
@ -247,7 +243,6 @@ BZ_EXTERN void BZ_API(BZ2_bzWriteClose64) (
); );
#endif #endif
/*-- Utility functions --*/ /*-- Utility functions --*/
BZ_EXTERN int BZ_API(BZ2_bzBuffToBuffCompress) ( BZ_EXTERN int BZ_API(BZ2_bzBuffToBuffCompress) (
@ -269,7 +264,6 @@ BZ_EXTERN int BZ_API(BZ2_bzBuffToBuffDecompress) (
int verbosity int verbosity
); );
/*-- /*--
Code contributed by Yoshioka Tsuneo Code contributed by Yoshioka Tsuneo
(QWF00133@niftyserve.or.jp/tsuneo-y@is.aist-nara.ac.jp), (QWF00133@niftyserve.or.jp/tsuneo-y@is.aist-nara.ac.jp),

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@ -99,7 +99,6 @@ struct virt_internal_data {
int dev_num; int dev_num;
}; };
#if defined(CONFIG_DFU_NAME_MAX_SIZE) #if defined(CONFIG_DFU_NAME_MAX_SIZE)
#define DFU_NAME_SIZE CONFIG_DFU_NAME_MAX_SIZE #define DFU_NAME_SIZE CONFIG_DFU_NAME_MAX_SIZE
#else #else

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@ -309,7 +309,6 @@ enum {
HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1, HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,
HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0, HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,
/* fc_aviconf0-fc_aviconf3 field values */ /* fc_aviconf0-fc_aviconf3 field values */
HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03, HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,
HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00, HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,

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@ -345,7 +345,6 @@
/* Current version of ACPI memory address space */ /* Current version of ACPI memory address space */
#define EC_ACPI_MEM_VERSION_CURRENT 2 #define EC_ACPI_MEM_VERSION_CURRENT 2
/* /*
* This header file is used in coreboot both in C and ACPI code. The ACPI code * This header file is used in coreboot both in C and ACPI code. The ACPI code
* is pre-processed to handle constants but the ASL compiler is unable to * is pre-processed to handle constants but the ASL compiler is unable to
@ -984,7 +983,6 @@ struct __ec_align4 ec_response_get_protocol_info {
uint32_t flags; uint32_t flags;
}; };
/*****************************************************************************/ /*****************************************************************************/
/* Get/Set miscellaneous values */ /* Get/Set miscellaneous values */
@ -1300,7 +1298,6 @@ struct __ec_align4 ec_params_flash_erase {
uint32_t size; /* Size to erase in bytes */ uint32_t size; /* Size to erase in bytes */
}; };
#define EC_VER_FLASH_WRITE 1 #define EC_VER_FLASH_WRITE 1
/* v1 add async erase: /* v1 add async erase:
* subcommands can returns: * subcommands can returns:
@ -1451,7 +1448,6 @@ struct __ec_align4 ec_response_vbnvcontext {
uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; uint8_t block[EC_VBNV_BLOCK_SIZE_V2];
}; };
/* Get SPI flash information */ /* Get SPI flash information */
#define EC_CMD_FLASH_SPI_INFO 0x0018 #define EC_CMD_FLASH_SPI_INFO 0x0018
@ -1469,7 +1465,6 @@ struct __ec_align1 ec_response_flash_spi_info {
uint8_t sr1, sr2; uint8_t sr1, sr2;
}; };
/* Select flash during flash operations */ /* Select flash during flash operations */
#define EC_CMD_FLASH_SELECT 0x0019 #define EC_CMD_FLASH_SELECT 0x0019
@ -1801,7 +1796,6 @@ struct __ec_todo_packed ec_response_lightbar {
struct lightbar_params_v0 get_params_v0; struct lightbar_params_v0 get_params_v0;
struct lightbar_params_v1 get_params_v1; struct lightbar_params_v1 get_params_v1;
struct lightbar_params_v2_timing get_params_v2_timing; struct lightbar_params_v2_timing get_params_v2_timing;
struct lightbar_params_v2_tap get_params_v2_tap; struct lightbar_params_v2_tap get_params_v2_tap;
struct lightbar_params_v2_oscillation get_params_v2_osc; struct lightbar_params_v2_oscillation get_params_v2_osc;
@ -2667,7 +2661,6 @@ struct __ec_align2 ec_response_thermal_get_threshold {
uint16_t value; uint16_t value;
}; };
/* The version 1 structs are visible. */ /* The version 1 structs are visible. */
enum ec_temp_thresholds { enum ec_temp_thresholds {
EC_TEMP_THRESH_WARN = 0, EC_TEMP_THRESH_WARN = 0,
@ -2765,7 +2758,6 @@ struct __ec_align4 ec_params_tmp006_set_calibration_v1 {
float val[0]; float val[0];
}; };
/* Read raw TMP006 data */ /* Read raw TMP006 data */
#define EC_CMD_TMP006_GET_RAW 0x0055 #define EC_CMD_TMP006_GET_RAW 0x0055
@ -3082,7 +3074,6 @@ struct __ec_align1 ec_response_temp_sensor_get_info {
/*****************************************************************************/ /*****************************************************************************/
/* Host event commands */ /* Host event commands */
/* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */ /* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */
/* /*
* Host event mask params and response structures, shared by all of the host * Host event mask params and response structures, shared by all of the host
@ -3619,7 +3610,6 @@ struct __ec_align4 ec_response_charge_state {
}; };
}; };
/* /*
* Set maximum battery charging current. * Set maximum battery charging current.
*/ */
@ -4207,7 +4197,6 @@ struct __ec_align4 ec_response_pd_log {
uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */
}; };
/* The timestamp is the microsecond counter shifted to get about a ms. */ /* The timestamp is the microsecond counter shifted to get about a ms. */
#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
@ -4322,7 +4311,6 @@ struct __ec_align1 ec_params_pd_write_log_entry {
uint8_t port; /* port#, or 0 for events unrelated to a given port */ uint8_t port; /* port#, or 0 for events unrelated to a given port */
}; };
/* Control USB-PD chip */ /* Control USB-PD chip */
#define EC_CMD_PD_CONTROL 0x0119 #define EC_CMD_PD_CONTROL 0x0119

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@ -2017,7 +2017,6 @@ struct efi_firmware_image_authentication {
struct win_certificate_uefi_guid auth_info; struct win_certificate_uefi_guid auth_info;
} __attribute__((__packed__)); } __attribute__((__packed__));
/** /**
* struct efi_signature_data - A format of signature * struct efi_signature_data - A format of signature
* *

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@ -153,7 +153,6 @@ static inline void efi_set_bootdev(const char *dev, const char *devnr,
EFI_GUID(0xb2ac5fc9, 0x92b7, 0x4acd, \ EFI_GUID(0xb2ac5fc9, 0x92b7, 0x4acd, \
0xae, 0xac, 0x11, 0xe8, 0x18, 0xc3, 0x13, 0x0c) 0xae, 0xac, 0x11, 0xe8, 0x18, 0xc3, 0x13, 0x0c)
/* Use internal device tree when starting UEFI application */ /* Use internal device tree when starting UEFI application */
#define EFI_FDT_USE_INTERNAL NULL #define EFI_FDT_USE_INTERNAL NULL

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@ -15,7 +15,6 @@
#ifndef _ENV_INTERNAL_H_ #ifndef _ENV_INTERNAL_H_
#define _ENV_INTERNAL_H_ #define _ENV_INTERNAL_H_
/************************************************************************** /**************************************************************************
* *
* The "environment" is stored as a list of '\0' terminated * The "environment" is stored as a list of '\0' terminated

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@ -70,7 +70,6 @@ struct jt_funcs {
#undef EXPORT_FUNC #undef EXPORT_FUNC
}; };
#define XF_VERSION 9 #define XF_VERSION 9
#if defined(CONFIG_X86) #if defined(CONFIG_X86)

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@ -256,7 +256,6 @@ void flash_perror(int err);
#define AMD_ID_GL128N_2 0x22212221 /* 2nd ID word for S29GL128N */ #define AMD_ID_GL128N_2 0x22212221 /* 2nd ID word for S29GL128N */
#define AMD_ID_GL128N_3 0x22012201 /* 3rd ID word for S29GL128N */ #define AMD_ID_GL128N_3 0x22012201 /* 3rd ID word for S29GL128N */
#define AMD_ID_LV320B_2 0x221A221A /* 2d ID word for AM29LV320MB at 0x38 */ #define AMD_ID_LV320B_2 0x221A221A /* 2d ID word for AM29LV320MB at 0x38 */
#define AMD_ID_LV320B_3 0x22002200 /* 3d ID word for AM29LV320MB at 0x3c */ #define AMD_ID_LV320B_3 0x22002200 /* 3d ID word for AM29LV320MB at 0x3c */
@ -476,7 +475,6 @@ void flash_perror(int err);
#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */ #define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
/* manufacturer offsets /* manufacturer offsets
*/ */
#define FLASH_MAN_AMD 0x00000000 /* AMD */ #define FLASH_MAN_AMD 0x00000000 /* AMD */

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@ -197,7 +197,6 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t;
/* DEBUG_29 register */ /* DEBUG_29 register */
#define DDR_TX_BD_DIS (1 << 10) /* Transmit Bit Deskew Disable */ #define DDR_TX_BD_DIS (1 << 10) /* Transmit Bit Deskew Disable */
#if (defined(CONFIG_SYS_FSL_DDR_VER) && \ #if (defined(CONFIG_SYS_FSL_DDR_VER) && \
(CONFIG_SYS_FSL_DDR_VER >= FSL_DDR_VER_4_7)) (CONFIG_SYS_FSL_DDR_VER >= FSL_DDR_VER_4_7))
#ifdef CONFIG_SYS_FSL_DDR3L #ifdef CONFIG_SYS_FSL_DDR3L
@ -473,7 +472,6 @@ extern phys_size_t fixed_sdram(void);
extern void ddr_enable_ecc(unsigned int dram_size); extern void ddr_enable_ecc(unsigned int dram_size);
#endif #endif
typedef struct fixed_ddr_parm{ typedef struct fixed_ddr_parm{
int min_freq; int min_freq;
int max_freq; int max_freq;

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@ -97,7 +97,6 @@ struct dtsec {
u32 res9[80]; u32 res9[80];
}; };
/* TBI register addresses */ /* TBI register addresses */
#define TBI_CR 0x00 #define TBI_CR 0x00
#define TBI_SR 0x01 #define TBI_SR 0x01

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@ -14,7 +14,6 @@
#include <asm/arch/soc.h> #include <asm/arch/soc.h>
#endif #endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A006379 #ifdef CONFIG_SYS_FSL_ERRATUM_A006379
static inline bool has_erratum_a006379(void) static inline bool has_erratum_a006379(void)
{ {
@ -62,7 +61,6 @@ static inline bool has_erratum_a008378(void)
u32 svr = get_svr(); u32 svr = get_svr();
u32 soc = SVR_SOC_VER(svr); u32 soc = SVR_SOC_VER(svr);
switch (soc) { switch (soc) {
#ifdef CONFIG_ARCH_LS1021A #ifdef CONFIG_ARCH_LS1021A
case SOC_VER_LS1020: case SOC_VER_LS1020:

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@ -33,7 +33,6 @@
#error Neither CONFIG_SYS_FSL_IFC_LE nor CONFIG_SYS_FSL_IFC_BE is defined #error Neither CONFIG_SYS_FSL_IFC_LE nor CONFIG_SYS_FSL_IFC_BE is defined
#endif #endif
/* /*
* CSPR - Chip Select Property Register * CSPR - Chip Select Property Register
*/ */
@ -790,7 +789,6 @@ enum ifc_nand_fir_opcodes {
*/ */
#define IFC_GPCM_STAT_BSY 0x80000000 /* GPCM is busy */ #define IFC_GPCM_STAT_BSY 0x80000000 /* GPCM is busy */
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <asm/io.h> #include <asm/io.h>

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@ -12,7 +12,6 @@
/* PHY Pre-defined Compare and CA delay-line Configuration (MPPDCMPR2) */ /* PHY Pre-defined Compare and CA delay-line Configuration (MPPDCMPR2) */
#define MPPDCMPR2_MPR_COMPARE_EN (1 << 0) #define MPPDCMPR2_MPR_COMPARE_EN (1 << 0)
/* MMDC PHY Read DQS gating control register 0 (MPDGCTRL0) */ /* MMDC PHY Read DQS gating control register 0 (MPDGCTRL0) */
#define AUTO_RD_DQS_GATING_CALIBRATION_EN (1 << 28) #define AUTO_RD_DQS_GATING_CALIBRATION_EN (1 << 28)

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@ -161,7 +161,6 @@ struct fsl_secboot_img_hdr {
#endif /* CONFIG_ESBC_HDR_LS */ #endif /* CONFIG_ESBC_HDR_LS */
#if defined(CONFIG_FSL_ISBC_KEY_EXT) #if defined(CONFIG_FSL_ISBC_KEY_EXT)
struct ie_key_table { struct ie_key_table {
u32 key_len; u32 key_len;

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@ -221,7 +221,6 @@
#define GT_PCI0_HICMASK_OFS 0xca4 #define GT_PCI0_HICMASK_OFS 0xca4
#define GT_PCI1_SERR1MASK_OFS 0xca8 #define GT_PCI1_SERR1MASK_OFS 0xca8
/* /*
* I2O Support Registers * I2O Support Registers
*/ */
@ -283,7 +282,6 @@
#define GT_CPU_WR_DXDXDXDX 0 #define GT_CPU_WR_DXDXDXDX 0
#define GT_CPU_WR_DDDD 1 #define GT_CPU_WR_DDDD 1
#define GT_PCI_DCRM_SHF 21 #define GT_PCI_DCRM_SHF 21
#define GT_PCI_LD_SHF 0 #define GT_PCI_LD_SHF 0
#define GT_PCI_LD_MSK (MSK(15) << GT_PCI_LD_SHF) #define GT_PCI_LD_MSK (MSK(15) << GT_PCI_LD_SHF)
@ -292,7 +290,6 @@
#define GT_PCI_REMAP_SHF 0 #define GT_PCI_REMAP_SHF 0
#define GT_PCI_REMAP_MSK (MSK(11) << GT_PCI_REMAP_SHF) #define GT_PCI_REMAP_MSK (MSK(11) << GT_PCI_REMAP_SHF)
#define GT_CFGADDR_CFGEN_SHF 31 #define GT_CFGADDR_CFGEN_SHF 31
#define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF) #define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF)
#define GT_CFGADDR_CFGEN_BIT GT_CFGADDR_CFGEN_MSK #define GT_CFGADDR_CFGEN_BIT GT_CFGADDR_CFGEN_MSK
@ -309,7 +306,6 @@
#define GT_CFGADDR_REGNUM_SHF 2 #define GT_CFGADDR_REGNUM_SHF 2
#define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF) #define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF)
#define GT_SDRAM_BM_ORDER_SHF 2 #define GT_SDRAM_BM_ORDER_SHF 2
#define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF) #define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF)
#define GT_SDRAM_BM_ORDER_BIT GT_SDRAM_BM_ORDER_MSK #define GT_SDRAM_BM_ORDER_BIT GT_SDRAM_BM_ORDER_MSK
@ -318,7 +314,6 @@
#define GT_SDRAM_BM_RSVD_ALL1 0xffb #define GT_SDRAM_BM_RSVD_ALL1 0xffb
#define GT_SDRAM_ADDRDECODE_ADDR_SHF 0 #define GT_SDRAM_ADDRDECODE_ADDR_SHF 0
#define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF) #define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF)
#define GT_SDRAM_ADDRDECODE_ADDR_0 0 #define GT_SDRAM_ADDRDECODE_ADDR_0 0
@ -330,7 +325,6 @@
#define GT_SDRAM_ADDRDECODE_ADDR_6 6 #define GT_SDRAM_ADDRDECODE_ADDR_6 6
#define GT_SDRAM_ADDRDECODE_ADDR_7 7 #define GT_SDRAM_ADDRDECODE_ADDR_7 7
#define GT_SDRAM_B0_CASLAT_SHF 0 #define GT_SDRAM_B0_CASLAT_SHF 0
#define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF) #define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF)
#define GT_SDRAM_B0_CASLAT_2 1 #define GT_SDRAM_B0_CASLAT_2 1
@ -396,7 +390,6 @@
#define GT_SDRAM_B0_BLEN_8 0 #define GT_SDRAM_B0_BLEN_8 0
#define GT_SDRAM_B0_BLEN_4 1 #define GT_SDRAM_B0_BLEN_4 1
#define GT_SDRAM_CFG_REFINT_SHF 0 #define GT_SDRAM_CFG_REFINT_SHF 0
#define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF) #define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF)
@ -443,7 +436,6 @@
#define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF) #define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF)
#define GT_TC_CONTROL_SELTC0_BIT GT_TC_CONTROL_SELTC0_MSK #define GT_TC_CONTROL_SELTC0_BIT GT_TC_CONTROL_SELTC0_MSK
#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0 #define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0
#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK \ #define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK \
(MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF) (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
@ -481,7 +473,6 @@
#define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF) #define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF)
#define GT_PCI0_BARE_SCS10DIS_BIT GT_PCI0_BARE_SCS10DIS_MSK #define GT_PCI0_BARE_SCS10DIS_BIT GT_PCI0_BARE_SCS10DIS_MSK
#define GT_INTRCAUSE_MASABORT0_SHF 18 #define GT_INTRCAUSE_MASABORT0_SHF 18
#define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF) #define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF)
#define GT_INTRCAUSE_MASABORT0_BIT GT_INTRCAUSE_MASABORT0_MSK #define GT_INTRCAUSE_MASABORT0_BIT GT_INTRCAUSE_MASABORT0_MSK
@ -490,7 +481,6 @@
#define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF) #define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF)
#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK #define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK
#define GT_PCI0_CMD_MBYTESWAP_SHF 0 #define GT_PCI0_CMD_MBYTESWAP_SHF 0
#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF) #define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK #define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK

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@ -8,7 +8,6 @@
#ifndef _KEY_MATRIX_H #ifndef _KEY_MATRIX_H
#define _KEY_MATRIX_H #define _KEY_MATRIX_H
/* Information about a matrix keyboard */ /* Information about a matrix keyboard */
struct key_matrix { struct key_matrix {
/* Dimensions of the keyboard matrix, in rows and columns */ /* Dimensions of the keyboard matrix, in rows and columns */

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@ -213,7 +213,6 @@
quickly avoid procedure declaration conflicts and linker symbol quickly avoid procedure declaration conflicts and linker symbol
conflicts with existing memory allocation routines. conflicts with existing memory allocation routines.
*/ */
@ -256,12 +255,10 @@ extern "C" {
#include <stdio.h> /* needed for malloc_stats */ #include <stdio.h> /* needed for malloc_stats */
#endif #endif
/* /*
Compile-time options Compile-time options
*/ */
/* /*
Debugging: Debugging:
@ -306,10 +303,8 @@ extern "C" {
returns a unique pointer for malloc(0), so does realloc(p, 0). returns a unique pointer for malloc(0), so does realloc(p, 0).
*/ */
/* #define REALLOC_ZERO_BYTES_FREES */ /* #define REALLOC_ZERO_BYTES_FREES */
/* /*
WIN32 causes an emulation of sbrk to be compiled in WIN32 causes an emulation of sbrk to be compiled in
mmap-based options are not currently supported in WIN32. mmap-based options are not currently supported in WIN32.
@ -335,7 +330,6 @@ extern "C" {
#include <windows.h> #include <windows.h>
#endif #endif
/* /*
HAVE_MEMCPY should be defined if you are not otherwise using HAVE_MEMCPY should be defined if you are not otherwise using
ANSI STD C, but still have memcpy and memset in your C library ANSI STD C, but still have memcpy and memset in your C library
@ -460,7 +454,6 @@ do { \
#endif #endif
/* /*
Define HAVE_MMAP to optionally make malloc() use mmap() to Define HAVE_MMAP to optionally make malloc() use mmap() to
allocate very large blocks. These will be returned to the allocate very large blocks. These will be returned to the
@ -563,7 +556,6 @@ do { \
# endif # endif
#endif #endif
/* /*
This version of malloc supports the standard SVID/XPG mallinfo This version of malloc supports the standard SVID/XPG mallinfo
@ -626,7 +618,6 @@ struct mallinfo {
#define M_MMAP_THRESHOLD -3 #define M_MMAP_THRESHOLD -3
#define M_MMAP_MAX -4 #define M_MMAP_MAX -4
#ifndef DEFAULT_TRIM_THRESHOLD #ifndef DEFAULT_TRIM_THRESHOLD
#define DEFAULT_TRIM_THRESHOLD (128 * 1024) #define DEFAULT_TRIM_THRESHOLD (128 * 1024)
#endif #endif
@ -677,10 +668,8 @@ struct mallinfo {
It must be greater than page size to have any useful effect. To It must be greater than page size to have any useful effect. To
disable trimming completely, you can set to (unsigned long)(-1); disable trimming completely, you can set to (unsigned long)(-1);
*/ */
#ifndef DEFAULT_TOP_PAD #ifndef DEFAULT_TOP_PAD
#define DEFAULT_TOP_PAD (0) #define DEFAULT_TOP_PAD (0)
#endif #endif
@ -713,7 +702,6 @@ struct mallinfo {
*/ */
#ifndef DEFAULT_MMAP_THRESHOLD #ifndef DEFAULT_MMAP_THRESHOLD
#define DEFAULT_MMAP_THRESHOLD (128 * 1024) #define DEFAULT_MMAP_THRESHOLD (128 * 1024)
#endif #endif
@ -753,10 +741,8 @@ struct mallinfo {
All together, these considerations should lead you to use mmap All together, these considerations should lead you to use mmap
only for relatively large requests. only for relatively large requests.
*/ */
#ifndef DEFAULT_MMAP_MAX #ifndef DEFAULT_MMAP_MAX
#ifdef HAVE_MMAP #ifdef HAVE_MMAP
#define DEFAULT_MMAP_MAX (64) #define DEFAULT_MMAP_MAX (64)
@ -784,7 +770,6 @@ struct mallinfo {
in mallopt will fail. in mallopt will fail.
*/ */
/* /*
USE_DL_PREFIX will prefix all public routines with the string 'dl'. USE_DL_PREFIX will prefix all public routines with the string 'dl'.
Useful to quickly avoid procedure declaration conflicts and linker Useful to quickly avoid procedure declaration conflicts and linker
@ -815,7 +800,6 @@ struct mallinfo {
*/ */
#ifdef INTERNAL_LINUX_C_LIB #ifdef INTERNAL_LINUX_C_LIB
#if __STD_C #if __STD_C

View file

@ -6,7 +6,6 @@
* (C) Copyright 2009 Freescale Semiconductor, Inc. * (C) Copyright 2009 Freescale Semiconductor, Inc.
*/ */
#ifndef __MC13892_H__ #ifndef __MC13892_H__
#define __MC13892_H__ #define __MC13892_H__

View file

@ -32,7 +32,6 @@
#define PHY_ID_KSZ9031 0x00221620 #define PHY_ID_KSZ9031 0x00221620
#define PHY_ID_KSZ9131 0x00221640 #define PHY_ID_KSZ9131 0x00221640
/* Registers */ /* Registers */
#define MMD_ACCESS_CONTROL 0xd #define MMD_ACCESS_CONTROL 0xd
#define MMD_ACCESS_REG_DATA 0xe #define MMD_ACCESS_REG_DATA 0xe

View file

@ -73,7 +73,6 @@ struct bd_info;
#define MMC_MODE_1BIT BIT(28) #define MMC_MODE_1BIT BIT(28)
#define MMC_MODE_SPI BIT(27) #define MMC_MODE_SPI BIT(27)
#define SD_DATA_4BIT 0x00040000 #define SD_DATA_4BIT 0x00040000
#define IS_SD(x) ((x)->version & SD_VERSION_SD) #define IS_SD(x) ((x)->version & SD_VERSION_SD)
@ -113,7 +112,6 @@ struct bd_info;
#define MMC_CMD62_ARG1 0xefac62ec #define MMC_CMD62_ARG1 0xefac62ec
#define MMC_CMD62_ARG2 0xcbaea7 #define MMC_CMD62_ARG2 0xcbaea7
#define SD_CMD_SEND_RELATIVE_ADDR 3 #define SD_CMD_SEND_RELATIVE_ADDR 3
#define SD_CMD_SWITCH_FUNC 6 #define SD_CMD_SWITCH_FUNC 6
#define SD_CMD_SEND_IF_COND 8 #define SD_CMD_SEND_IF_COND 8

View file

@ -13,7 +13,6 @@
#ifndef __MPCXX_H__ #ifndef __MPCXX_H__
#define __MPCXX_H__ #define __MPCXX_H__
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Exception offsets (PowerPC standard) * Exception offsets (PowerPC standard)
*/ */
@ -200,7 +199,6 @@
#define SCCR_DFALCD10 0x00000002 /* Division by 5 */ #define SCCR_DFALCD10 0x00000002 /* Division by 5 */
#define SCCR_DFALCD11 0x00000003 /* Division by 7 (maximum) */ #define SCCR_DFALCD11 0x00000003 /* Division by 7 (maximum) */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* BR - Memory Controler: Base Register 16-9 * BR - Memory Controler: Base Register 16-9
*/ */
@ -253,7 +251,6 @@
#define OR_TRLX 0x00000004 /* Timing Relaxed */ #define OR_TRLX 0x00000004 /* Timing Relaxed */
#define OR_EHTR 0x00000002 /* Extended Hold Time on Read */ #define OR_EHTR 0x00000002 /* Extended Hold Time on Read */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* MPTPR - Memory Periodic Timer Prescaler Register 16-17 * MPTPR - Memory Periodic Timer Prescaler Register 16-17
*/ */
@ -464,7 +461,6 @@
#define TGCR_STP1 0x0002 /* Stop timer 1 */ #define TGCR_STP1 0x0002 /* Stop timer 1 */
#define TGCR_RST1 0x0001 /* Reset timer 1 */ #define TGCR_RST1 0x0001 /* Reset timer 1 */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Timer Mode Register 18-9 * Timer Mode Register 18-9
*/ */
@ -485,7 +481,6 @@
#define TMR_ICLK_TIN_PIN 0x0006 /* TINx pin */ #define TMR_ICLK_TIN_PIN 0x0006 /* TINx pin */
#define TMR_GE 0x0001 /* Gate Enable */ #define TMR_GE 0x0001 /* Gate Enable */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C Controller Registers * I2C Controller Registers
*/ */

View file

@ -7,7 +7,6 @@
#ifndef __MV886352_H #ifndef __MV886352_H
#define __MV886352_H #define __MV886352_H
/* PHY registers */ /* PHY registers */
#define PHY(itf) (itf) #define PHY(itf) (itf)

View file

@ -58,7 +58,6 @@ static inline int nand_erase(struct mtd_info *info, loff_t off, size_t size)
return mtd_erase(info, &instr); return mtd_erase(info, &instr);
} }
/***************************************************************************** /*****************************************************************************
* declarations from nand_util.c * declarations from nand_util.c
****************************************************************************/ ****************************************************************************/

View file

@ -225,7 +225,6 @@ int eth_get_dev_index(void); /* get the device index */
int eth_env_set_enetaddr_by_index(const char *base_name, int index, int eth_env_set_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr); uchar *enetaddr);
/* /*
* Initialize USB ethernet device with CONFIG_DM_ETH * Initialize USB ethernet device with CONFIG_DM_ETH
* Returns: * Returns:

View file

@ -609,7 +609,6 @@ int gpt_verify_partitions(struct blk_desc *desc,
struct disk_partition *partitions, int parts, struct disk_partition *partitions, int parts,
gpt_header *gpt_head, gpt_entry **gpt_pte); gpt_header *gpt_head, gpt_entry **gpt_pte);
/** /**
* get_disk_guid() - Read the GUID string from a device's GPT * get_disk_guid() - Read the GUID string from a device's GPT
* *

View file

@ -272,7 +272,6 @@
#define PCI_X_CMD_MAX_SPLIT 0x0030 /* Max Outstanding Split Transactions */ #define PCI_X_CMD_MAX_SPLIT 0x0030 /* Max Outstanding Split Transactions */
#define PCI_X_CMD_VERSION(x) (((x) >> 12) & 3) /* Version */ #define PCI_X_CMD_VERSION(x) (((x) >> 12) & 3) /* Version */
/* Slot Identification */ /* Slot Identification */
#define PCI_SID_ESR 2 /* Expansion Slot Register */ #define PCI_SID_ESR 2 /* Expansion Slot Register */

View file

@ -12,5 +12,4 @@ void gt64120_pci_init(void *regs, unsigned long sys_bus, unsigned long sys_phys,
unsigned long io_bus, unsigned long io_phys, unsigned long io_bus, unsigned long io_phys,
unsigned long io_size); unsigned long io_size);
#endif /* _PCI_GT64120_H */ #endif /* _PCI_GT64120_H */

View file

@ -1535,7 +1535,6 @@
#define PCI_VENDOR_ID_ZIATECH 0x1138 #define PCI_VENDOR_ID_ZIATECH 0x1138
#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 #define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550
#define PCI_VENDOR_ID_SYSKONNECT 0x1148 #define PCI_VENDOR_ID_SYSKONNECT 0x1148
#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 #define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200
#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 #define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300

View file

@ -95,7 +95,6 @@ struct scsi_cmd {
#define M_X_WIDE_REQ (0x03) #define M_X_WIDE_REQ (0x03)
#define M_X_PPR_REQ (0x04) #define M_X_PPR_REQ (0x04)
/* /*
** Status ** Status
*/ */
@ -131,7 +130,6 @@ struct scsi_cmd {
#define SENSE_VOLUME_OVERFLOW 0xD #define SENSE_VOLUME_OVERFLOW 0xD
#define SENSE_MISCOMPARE 0xE #define SENSE_MISCOMPARE 0xE
#define SCSI_CHANGE_DEF 0x40 /* Change Definition (Optional) */ #define SCSI_CHANGE_DEF 0x40 /* Change Definition (Optional) */
#define SCSI_COMPARE 0x39 /* Compare (O) */ #define SCSI_COMPARE 0x39 /* Compare (O) */
#define SCSI_COPY 0x18 /* Copy (O) */ #define SCSI_COPY 0x18 /* Copy (O) */

View file

@ -77,7 +77,6 @@ typedef struct spd_eeprom_s {
unsigned char intel_cas; /* 129 Intel spec: CAS# Latency support */ unsigned char intel_cas; /* 129 Intel spec: CAS# Latency support */
} spd_eeprom_t; } spd_eeprom_t;
/* /*
* Byte 2 Fundamental Memory Types. * Byte 2 Fundamental Memory Types.
*/ */

View file

@ -436,7 +436,6 @@ int spl_load_legacy_img(struct spl_image_info *spl_image,
struct spl_load_info *load, ulong offset, struct spl_load_info *load, ulong offset,
struct legacy_img_hdr *hdr); struct legacy_img_hdr *hdr);
/** /**
* spl_load_imx_container() - Loads a imx container image from a device. * spl_load_imx_container() - Loads a imx container image from a device.
* @spl_image: Image description to set up * @spl_image: Image description to set up

View file

@ -7,7 +7,6 @@
#ifndef __include_tegra_kbc_h__ #ifndef __include_tegra_kbc_h__
#define __include_tegra_kbc_h__ #define __include_tegra_kbc_h__
#define KEY_IS_MODIFIER(key) ((key) >= KEY_FIRST_MODIFIER) #define KEY_IS_MODIFIER(key) ((key) >= KEY_FIRST_MODIFIER)
struct kbc_tegra { struct kbc_tegra {

View file

@ -274,7 +274,6 @@ int usb_init(void);
int usb_stop(void); /* stop the USB Controller */ int usb_stop(void); /* stop the USB Controller */
int usb_detect_change(void); /* detect if a USB device has been (un)plugged */ int usb_detect_change(void); /* detect if a USB device has been (un)plugged */
int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol); int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol);
int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int usb_set_idle(struct usb_device *dev, int ifnum, int duration,
int report_id); int report_id);
@ -600,7 +599,6 @@ struct usb_hub_descriptor {
} u; } u;
} __attribute__ ((packed)); } __attribute__ ((packed));
struct usb_hub_device { struct usb_hub_device {
struct usb_device *pusb_dev; struct usb_device *pusb_dev;
struct usb_hub_descriptor desc; struct usb_hub_descriptor desc;

View file

@ -30,7 +30,6 @@
#define USB_PROT_HID_KEYBOARD 1 #define USB_PROT_HID_KEYBOARD 1
#define USB_PROT_HID_MOUSE 2 #define USB_PROT_HID_MOUSE 2
/* Sub STORAGE Classes */ /* Sub STORAGE Classes */
#define US_SC_RBC 1 /* Typically, flash devices */ #define US_SC_RBC 1 /* Typically, flash devices */
#define US_SC_8020 2 /* CD-ROM */ #define US_SC_8020 2 /* CD-ROM */
@ -190,7 +189,6 @@
#define USB_TEST_MODE_PACKET 0x04 #define USB_TEST_MODE_PACKET 0x04
#define USB_TEST_MODE_FORCE_ENABLE 0x05 #define USB_TEST_MODE_FORCE_ENABLE 0x05
/* /*
* "pipe" definitions, use unsigned so we can compare reliably, since this * "pipe" definitions, use unsigned so we can compare reliably, since this
* value is shifted up to bits 30/31. * value is shifted up to bits 30/31.
@ -225,7 +223,6 @@
#define USB_ST_BIT_ERR 0x40 /* Bitstuff error */ #define USB_ST_BIT_ERR 0x40 /* Bitstuff error */
#define USB_ST_NOT_PROC 0x80000000L /* Not yet processed */ #define USB_ST_NOT_PROC 0x80000000L /* Not yet processed */
/************************************************************************* /*************************************************************************
* Hub defines * Hub defines
*/ */

View file

@ -58,7 +58,6 @@
* *
*/ */
#ifndef __USBDESCRIPTORS_H__ #ifndef __USBDESCRIPTORS_H__
#define __USBDESCRIPTORS_H__ #define __USBDESCRIPTORS_H__
@ -111,7 +110,6 @@
/* c.f. CDC 4.7 Table 19 */ /* c.f. CDC 4.7 Table 19 */
#define DATA_INTERFACE_PROTOCOL_NONE 0x00 /* No class protcol required */ #define DATA_INTERFACE_PROTOCOL_NONE 0x00 /* No class protcol required */
/* c.f. CDC 5.2.3 Table 24 */ /* c.f. CDC 5.2.3 Table 24 */
#define CS_INTERFACE 0x24 #define CS_INTERFACE 0x24
#define CS_ENDPOINT 0x25 #define CS_ENDPOINT 0x25
@ -168,7 +166,6 @@
#define BULK 0x02 #define BULK 0x02
#define INTERRUPT 0x03 #define INTERRUPT 0x03
/* configuration modifiers /* configuration modifiers
*/ */
#define BMATTRIBUTE_RESERVED 0x80 #define BMATTRIBUTE_RESERVED 0x80
@ -239,7 +236,6 @@ struct usb_generic_descriptor {
u8 bDescriptorSubtype; u8 bDescriptorSubtype;
} __attribute__ ((packed)); } __attribute__ ((packed));
/* /*
* communications class descriptor structures * communications class descriptor structures
* *
@ -319,7 +315,6 @@ struct usb_class_country_selection_descriptor {
u16 wCountryCode0[0]; u16 wCountryCode0[0];
} __attribute__ ((packed)); } __attribute__ ((packed));
struct usb_class_telephone_operational_descriptor { struct usb_class_telephone_operational_descriptor {
u8 bFunctionLength; u8 bFunctionLength;
u8 bDescriptorType; u8 bDescriptorType;
@ -327,7 +322,6 @@ struct usb_class_telephone_operational_descriptor {
u8 bmCapabilities; u8 bmCapabilities;
} __attribute__ ((packed)); } __attribute__ ((packed));
struct usb_class_usb_terminal_descriptor { struct usb_class_usb_terminal_descriptor {
u8 bFunctionLength; u8 bFunctionLength;
u8 bDescriptorType; u8 bDescriptorType;
@ -405,7 +399,6 @@ struct usb_class_atm_networking_descriptor {
u16 wMaxVC; u16 wMaxVC;
} __attribute__ ((packed)); } __attribute__ ((packed));
struct usb_class_mdlm_descriptor { struct usb_class_mdlm_descriptor {
u8 bFunctionLength; u8 bFunctionLength;
u8 bDescriptorType; u8 bDescriptorType;

View file

@ -19,10 +19,8 @@
#include "usbdescriptors.h" #include "usbdescriptors.h"
#define MAX_URBS_QUEUED 5 #define MAX_URBS_QUEUED 5
#if 1 #if 1
#define usberr(fmt,args...) serial_printf("ERROR: %s(), %d: "fmt"\n",__FUNCTION__,__LINE__,##args) #define usberr(fmt,args...) serial_printf("ERROR: %s(), %d: "fmt"\n",__FUNCTION__,__LINE__,##args)
#else #else
@ -269,14 +267,12 @@ struct usb_bus_instance;
#define USB_REQ_SET_IDLE 0x0A #define USB_REQ_SET_IDLE 0x0A
#define USB_REQ_SET_PROTOCOL 0x0B #define USB_REQ_SET_PROTOCOL 0x0B
/* /*
* USB Spec Release number * USB Spec Release number
*/ */
#define USB_BCD_VERSION 0x0110 #define USB_BCD_VERSION 0x0110
/* /*
* Device Requests (c.f Table 9-2) * Device Requests (c.f Table 9-2)
*/ */
@ -328,7 +324,6 @@ struct usb_bus_instance;
#define USB_DEVICE_REMOTE_WAKEUP 0x01 #define USB_DEVICE_REMOTE_WAKEUP 0x01
#define USB_TEST_MODE 0x02 #define USB_TEST_MODE 0x02
/* USB Requests /* USB Requests
* *
*/ */
@ -341,7 +336,6 @@ struct usb_device_request {
u16 wLength; u16 wLength;
} __attribute__ ((packed)); } __attribute__ ((packed));
/* USB Status /* USB Status
* *
*/ */
@ -425,7 +419,6 @@ typedef enum usb_device_event {
} usb_device_event_t; } usb_device_event_t;
typedef struct urb_link { typedef struct urb_link {
struct urb_link *next; struct urb_link *next;
struct urb_link *prev; struct urb_link *prev;
@ -519,7 +512,6 @@ struct usb_configuration_instance {
struct usb_interface_instance *interface_instance_array; struct usb_interface_instance *interface_instance_array;
}; };
/* USB Device Instance /* USB Device Instance
* *
* For each physical bus interface we create a logical device structure. This * For each physical bus interface we create a logical device structure. This

View file

@ -44,7 +44,6 @@
#define xyzModem_close 1 #define xyzModem_close 1
#define xyzModem_abort 2 #define xyzModem_abort 2
#define CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT #define CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT
#define CYGACC_CALL_IF_SET_CONSOLE_COMM(x) #define CYGACC_CALL_IF_SET_CONSOLE_COMM(x)
@ -60,8 +59,6 @@ typedef struct {
int chan; int chan;
} connection_info_t; } connection_info_t;
int xyzModem_stream_open(connection_info_t *info, int *err); int xyzModem_stream_open(connection_info_t *info, int *err);
void xyzModem_stream_close(int *err); void xyzModem_stream_close(int *err);
void xyzModem_stream_terminate(bool method, int (*getc)(void)); void xyzModem_stream_terminate(bool method, int (*getc)(void));

View file

@ -27,14 +27,12 @@
#define SECTOR_SIZE 0x200 #define SECTOR_SIZE 0x200
#define SECTOR_BITS 9 #define SECTOR_BITS 9
typedef enum zfs_endian { typedef enum zfs_endian {
UNKNOWN_ENDIAN = -2, UNKNOWN_ENDIAN = -2,
LITTLE_ENDIAN = -1, LITTLE_ENDIAN = -1,
BIG_ENDIAN = 0 BIG_ENDIAN = 0
} zfs_endian_t; } zfs_endian_t;
/* Endian macros. */ /* Endian macros. */
#define zfs_to_cpu16(x, a) (((a) == BIG_ENDIAN) ? be16_to_cpu(x) \ #define zfs_to_cpu16(x, a) (((a) == BIG_ENDIAN) ? be16_to_cpu(x) \
: le16_to_cpu(x)) : le16_to_cpu(x))
@ -51,7 +49,6 @@ typedef enum zfs_endian {
#define cpu_to_zfs64(x, a) (((a) == BIG_ENDIAN) ? cpu_to_be64(x) \ #define cpu_to_zfs64(x, a) (((a) == BIG_ENDIAN) ? cpu_to_be64(x) \
: cpu_to_le64(x)) : cpu_to_le64(x))
enum zfs_errors { enum zfs_errors {
ZFS_ERR_NONE = 0, ZFS_ERR_NONE = 0,
ZFS_ERR_NOT_IMPLEMENTED_YET = -1, ZFS_ERR_NOT_IMPLEMENTED_YET = -1,
@ -89,9 +86,6 @@ struct zfs_dirhook_info {
time_t mtime2; time_t mtime2;
}; };
struct zfs_filesystem *zfsget_fs(void); struct zfs_filesystem *zfsget_fs(void);
int zfs_open(zfs_file_t, const char *filename); int zfs_open(zfs_file_t, const char *filename);
uint64_t zfs_read(zfs_file_t, char *buf, uint64_t len); uint64_t zfs_read(zfs_file_t, char *buf, uint64_t len);