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phy: marvell: cp110: remove unused definitions

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Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of
1.5G/3G/6.25G were referenced in the driver non configuration (dts)
was using it.

This patch removes unused definitions.

Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
This commit is contained in:
Marcin Wojtas 2019-10-15 12:30:39 +02:00 • committed by Stefan Roese
parent b21e1f36d4
commit 5ed3dc27bb
4 changed files with 27 additions and 42 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/dts/armada-8040-mcbin.dts
View file

@ -302,7 +302,7 @@
phy-type = <COMPHY_TYPE_SFI>; phy-type = <COMPHY_TYPE_SFI>;
}; };
phy5 { phy5 {
phy-type = <COMPHY_TYPE_SGMII3>; phy-type = <COMPHY_TYPE_SGMII2>;
phy-speed = <COMPHY_SPEED_3_125G>; phy-speed = <COMPHY_SPEED_3_125G>;
}; };
}; };

14
drivers/phy/marvell/comphy_core.c
View file

@ -24,9 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
static const char *get_speed_string(u32 speed) static const char *get_speed_string(u32 speed)
{ {
static const char * const speed_strings[] = { static const char * const speed_strings[] = {
"1.25 Gbps", "1.5 Gbps", "2.5 Gbps", "1.25 Gbps", "2.5 Gbps", "3.125 Gbps",
"3.0 Gbps", "3.125 Gbps", "5 Gbps", "5 Gbps", "5.125 Gpbs", "6 Gbps",
"5.125 Gpbs", "6 Gbps", "6.25 Gbps",
"10.3125 Gbps" "10.3125 Gbps"
}; };
@ -40,11 +39,10 @@ static const char *get_type_string(u32 type)
{ {
static const char * const type_strings[] = { static const char * const type_strings[] = {
"UNCONNECTED", "PEX0", "PEX1", "PEX2", "PEX3", "UNCONNECTED", "PEX0", "PEX1", "PEX2", "PEX3",
"SATA0", "SATA1", "SATA2", "SATA3", "SGMII0", "SATA0", "SATA1", "SGMII0", "SGMII1", "SGMII2",
"SGMII1", "SGMII2", "SGMII3", "QSGMII", "USB3" "USB3", "USB3_HOST0", "USB3_HOST1",
"USB3_HOST0", "USB3_HOST1", "USB3_DEVICE", "USB3_DEVICE", "RXAUI0", "RXAUI1", "SFI", "AP",
"XAUI0", "XAUI1", "XAUI2", "XAUI3", "IGNORE"
"RXAUI0", "RXAUI1", "SFI", "IGNORE"
}; };
if (type < 0 || type > COMPHY_TYPE_MAX) if (type < 0 || type > COMPHY_TYPE_MAX)

3
drivers/phy/marvell/comphy_cp110.c
View file

@ -1130,8 +1130,6 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
break; break;
case COMPHY_TYPE_SATA0: case COMPHY_TYPE_SATA0:
case COMPHY_TYPE_SATA1: case COMPHY_TYPE_SATA1:
case COMPHY_TYPE_SATA2:
case COMPHY_TYPE_SATA3:
mode = COMPHY_FW_MODE_FORMAT(COMPHY_SATA_MODE); mode = COMPHY_FW_MODE_FORMAT(COMPHY_SATA_MODE);
ret = comphy_sata_power_up(lane, hpipe_base_addr, ret = comphy_sata_power_up(lane, hpipe_base_addr,
comphy_base_addr, comphy_base_addr,
@ -1166,7 +1164,6 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
mode); mode);
break; break;
case COMPHY_TYPE_SGMII2: case COMPHY_TYPE_SGMII2:
case COMPHY_TYPE_SGMII3:
if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) { if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) {
debug("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n", debug("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n",
lane); lane);

50
include/dt-bindings/comphy/comphy_data.h
View file

@ -7,16 +7,13 @@
#define _COMPHY_DATA_H_ #define _COMPHY_DATA_H_
#define COMPHY_SPEED_1_25G 0 #define COMPHY_SPEED_1_25G 0
#define COMPHY_SPEED_1_5G 1 #define COMPHY_SPEED_2_5G 1
#define COMPHY_SPEED_2_5G 2 #define COMPHY_SPEED_3_125G 2
#define COMPHY_SPEED_3G 3 #define COMPHY_SPEED_5G 3
#define COMPHY_SPEED_3_125G 4 #define COMPHY_SPEED_5_15625G 4
#define COMPHY_SPEED_5G 5 #define COMPHY_SPEED_6G 5
#define COMPHY_SPEED_5_15625G 6 #define COMPHY_SPEED_10_3125G 6
#define COMPHY_SPEED_6G 7 #define COMPHY_SPEED_MAX 7
#define COMPHY_SPEED_6_25G 8
#define COMPHY_SPEED_10_3125G 9
#define COMPHY_SPEED_MAX 10
#define COMPHY_SPEED_INVALID 0xff #define COMPHY_SPEED_INVALID 0xff
#define COMPHY_TYPE_UNCONNECTED 0 #define COMPHY_TYPE_UNCONNECTED 0
@ -26,26 +23,19 @@
#define COMPHY_TYPE_PEX3 4 #define COMPHY_TYPE_PEX3 4
#define COMPHY_TYPE_SATA0 5 #define COMPHY_TYPE_SATA0 5
#define COMPHY_TYPE_SATA1 6 #define COMPHY_TYPE_SATA1 6
#define COMPHY_TYPE_SATA2 7 #define COMPHY_TYPE_SGMII0 7
#define COMPHY_TYPE_SATA3 8 #define COMPHY_TYPE_SGMII1 8
#define COMPHY_TYPE_SGMII0 9 #define COMPHY_TYPE_SGMII2 9
#define COMPHY_TYPE_SGMII1 10 #define COMPHY_TYPE_USB3 10
#define COMPHY_TYPE_SGMII2 11 #define COMPHY_TYPE_USB3_HOST0 11
#define COMPHY_TYPE_SGMII3 12 #define COMPHY_TYPE_USB3_HOST1 12
#define COMPHY_TYPE_QSGMII 13 #define COMPHY_TYPE_USB3_DEVICE 13
#define COMPHY_TYPE_USB3 14 #define COMPHY_TYPE_RXAUI0 14
#define COMPHY_TYPE_USB3_HOST0 15 #define COMPHY_TYPE_RXAUI1 15
#define COMPHY_TYPE_USB3_HOST1 16 #define COMPHY_TYPE_SFI 16
#define COMPHY_TYPE_USB3_DEVICE 17 #define COMPHY_TYPE_AP 17
#define COMPHY_TYPE_XAUI0 18 #define COMPHY_TYPE_IGNORE 18
#define COMPHY_TYPE_XAUI1 19 #define COMPHY_TYPE_MAX 19
#define COMPHY_TYPE_XAUI2 20
#define COMPHY_TYPE_XAUI3 21
#define COMPHY_TYPE_RXAUI0 22
#define COMPHY_TYPE_RXAUI1 23
#define COMPHY_TYPE_SFI 24
#define COMPHY_TYPE_IGNORE 25
#define COMPHY_TYPE_MAX 26
#define COMPHY_TYPE_INVALID 0xff #define COMPHY_TYPE_INVALID 0xff
#define COMPHY_POLARITY_NO_INVERT 0 #define COMPHY_POLARITY_NO_INVERT 0