x86: baytrail: Use macros instead of magic numbers for FSP settings

Introduce various meaningful macros for FSP settings and switch over
to use them instead of magic numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2017-05-31 01:04:14 -07:00
parent 6702488cfa
commit 5e74e5a682
8 changed files with 181 additions and 124 deletions

View file

@ -6,8 +6,8 @@ UPD data for configuring the SoC.
All properties can be found within the `upd-region` struct in
arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
Intel's FSP Binary Configuration Tool for Bay Trail. This list of properties is
matched up to Intel's E3800 FSPv4 release.
Intel's FSP Binary Configuration Tool for Bay Trail. This list of properties
is matched up to Intel's E3800 FSPv4 release.
# Boolean properties:
@ -44,8 +44,8 @@ matched up to Intel's E3800 FSPv4 release.
- fsp,enable-memory-down
If you set "fsp,enable-memory-down" you are strongly encouraged to provide an
"fsp,memory-down-params{};" to specify how your memory is configured. If you do
not set "fsp,enable-memory-down", then the DIMM SPD information will be
"fsp,memory-down-params{};" to specify how your memory is configured. If you
do not set "fsp,enable-memory-down", then the DIMM SPD information will be
discovered by the FSP and used to setup main memory.
@ -72,41 +72,12 @@ discovered by the FSP and used to setup main memory.
# Integer properties:
- fsp,dram-speed:
0x0: "800 MHz"
0x1: "1066 MHz"
0x2: "1333 MHz"
0x3: "1600 MHz"
- fsp,dram-speed
- fsp,dram-type
0x0: "DDR3"
0x1: "DDR3L"
0x2: "DDR3U"
0x4: "LPDDR2"
0x5: "LPDDR3"
0x6: "DDR4"
- fsp,dimm-width
0x0: "x8"
0x1: "x16"
0x2: "x32"
- fsp,dimm-density
0x0: "1 Gbit"
0x1: "2 Gbit"
0x2: "4 Gbit"
0x3: "8 Gbit"
- fsp,dimm-bus-width
0x0: "8 bits"
0x1: "16 bits"
0x2: "32 bits"
0x3: "64 bits"
- fsp,dimm-sides
0x0: "1 rank"
0x1: "2 ranks"
- fsp,dimm-tcl
- fsp,dimm-trpt-rcd
- fsp,dimm-twr
@ -116,6 +87,9 @@ discovered by the FSP and used to setup main memory.
- fsp,dimm-tfaw
};
For all integer properties, available options are listed in fsp_configs.h in
arch/x86/include/asm/arch-baytrail/fsp directory (eg: MRC_INIT_TSEG_SIZE_1MB).
Example (from MinnowMax Dual Core):
-----------------------------------
@ -125,18 +99,17 @@ Example (from MinnowMax Dual Core):
fsp {
compatible = "intel,baytrail-fsp";
fsp,mrc-init-tseg-size = <0>;
fsp,mrc-init-mmio-size = <0x800>;
fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
fsp,mrc-init-spd-addr1 = <0xa0>;
fsp,mrc-init-spd-addr2 = <0xa2>;
fsp,emmc-boot-mode = <2>;
fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
fsp,enable-sdio;
fsp,enable-sdcard;
fsp,enable-hsuart1;
fsp,enable-spi;
fsp,enable-sata;
fsp,sata-mode = <1>;
fsp,enable-xhci;
fsp,sata-mode = <SATA_MODE_AHCI>;
fsp,enable-lpe;
fsp,lpss-sio-enable-pci-mode;
fsp,enable-dma0;
@ -150,27 +123,24 @@ Example (from MinnowMax Dual Core):
fsp,enable-i2c6;
fsp,enable-pwm0;
fsp,enable-pwm1;
fsp,igd-dvmt50-pre-alloc = <2>;
fsp,aperture-size = <2>;
fsp,gtt-size = <2>;
fsp,serial-debug-port-address = <0x3f8>;
fsp,serial-debug-port-type = <1>;
fsp,mrc-debug-msg;
fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
fsp,aperture-size = <APERTURE_SIZE_256MB>;
fsp,gtt-size = <GTT_SIZE_2MB>;
fsp,scc-enable-pci-mode;
fsp,os-selection = <4>;
fsp,os-selection = <OS_SELECTION_LINUX>;
fsp,emmc45-ddr50-enabled;
fsp,emmc45-retune-timer-value = <8>;
fsp,enable-igd;
fsp,enable-memory-down;
fsp,memory-down-params {
compatible = "intel,baytrail-fsp-mdp";
fsp,dram-speed = <1>;
fsp,dram-type = <1>;
fsp,dram-speed = <DRAM_SPEED_1066MTS>;
fsp,dram-type = <DRAM_TYPE_DDR3L>;
fsp,dimm-0-enable;
fsp,dimm-width = <1>;
fsp,dimm-density = <2>;
fsp,dimm-bus-width = <3>;
fsp,dimm-sides = <0>;
fsp,dimm-width = <DIMM_WIDTH_X16>;
fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
fsp,dimm-tcl = <0xb>;
fsp,dimm-trpt-rcd = <0xb>;
fsp,dimm-twr = <0xc>;